key: cord-0624065-5p30z97m authors: Narayan, Krishna; Harrison, Mark C. title: Implementing commercial inverse design tools for compact, phase-encoded, plasmonic digital logic devices date: 2021-10-04 journal: nan DOI: nan sha: b647d59601f57e8c7e058d4b4e062f510c48ed9b doc_id: 624065 cord_uid: 5p30z97m Numerical simulations have become an essential design tool in the field of photonics, especially for nanophotonics. In particular, 3D finite-difference-time-domain (FDTD) simulations are popular for their powerful design capabilities. Increasingly, researchers are developing or using inverse design tools to improve device footprints and performance. These tools often make use of 3D FDTD simulations and the adjoint optimization method. We implement a commercial inverse design tool with these features for a simple plasmonic logic circuit design that has complex requirements. Without modifying underlying code, we find ways to use this tool to implement a design that incorporates phase encoded inputs in a dielectric-loaded surface plasmon polariton waveguide. The complexity of the requirements in conjunction with limitations in the inverse design tool force us to make concessions regarding the density of encoding and to use on-off keying to encode the outputs. We compare the performance of the inverse-designed device to a conventionally-designed device with the same operational behavior. Finally, we discuss the limitations of the inverse design tools for realizing complex device designs and comment on what is possible at present and where improvements can be made. VER the past two decades, using simulation design tools has become the standard approach for new nanophotonic designs. In particular, 3D finite-difference time-domain (FDTD) simulations are very popular. These tools allow for fast iteration and robust exploration of the design space at low cost [1] - [5] . Furthermore, they tend to be relatively easy-to-use and accurate, making them accessible to photonics researchers and designers with a wide variety of backgrounds. Therefore, 3D FDTD simulation tools are a valuable first step for design and a strong theoretical compliment to experimental results. More recently, inverse design tools have begun to emerge as a method of finding optimized designs quickly without needing to explore the entire design space [6] - [11] . These tools allow researchers to define a figure of merit (FOM) and use the tool to find optimized, non-intuitive designs which maximize or This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible. This work was supported in part by the Air Force Office of Scientific Research under Grant FA9550-21-1-0188. minimize that figure. They often implement the adjoint method in conjunction with FDTD simulations to perform optimizations. Lumerical, one of the most popular commercial FDTD software packages, includes a packaged inverse design tool that leverages an integration with Python code [12] . This tool is designed to be easy-to-use and robust, and is therefore suitable to researchers who may not be able to write their own inverse-design code, which can be quite difficult to implement. Despite this promise, these commercial inverse design tools have some limitations when it comes to certain complex design considerations. Inverse design tools often have restrictions on how the FOM can be defined and how many different scenarios can be optimized. Additionally, although the underlying code implementing the adjoint optimization may be provided (as is the case with Lumerical's tools), this code is often quite long and complicated. In fact, making modifications to the code could in itself constitute a significant undertaking and may be outside the project scope of designers who simply want to leverage inverse design as a tool. This leaves the question of whether these tools can be adapted to help solve complex design problems without modifying the source code, and if so, what limitations of the tools will be necessary to overcome. In the present work, we leveraged Lumerical's inverse design tool to design a compact device with logic-gate behavior that acts on phase-encoded inputs. The device is made using dielectric-loaded surface plasmon polariton (DLSPP) waveguides. Both the phase-encoded inputs and the plasmonic nature of the device presented unique challenges for implementing the commercial inverse design tool. We found solutions to implementing these tools within the tool's normal constraints rather than within the Python code containing the underlying algorithm, modifying only the base simulations and the accompanying setup script responsible for launching the tools. We focused on plasmonic devices for a number of reasons. An excellent case has been made for the use of plasmonics to act as active elements in a hybrid with silicon photonics acting as passive waveguides in large-scale photonic integrated [13] . Plasmonic devices offer tight confinement of the optical fields, which allows them to have smaller footprints than their silicon photonic counterparts. They also interface easily with electronic circuits, which is desirable for many active components [14] . We selected a DLSPP waveguide architecture (Figure 1 (a)) for its relatively low propagation loss and ease of fabrication [15] . The architecture consists of a 500 nm layer of silver on a silicon substrate with a patterned dielectric layer on top of that. We used SiO2 for the dielectric layer, but other transparent dielectrics such as optical polymers could be used as well [16] , [17] . An important application of photonic logic devices is for use in basic processing and routing in fiber optic communication networks [14] , [18] . Many of these networks take advantage of dense encoding schemes for transmission, such as quadrature amplitude modulation (QAM) or phase-shift keying (PSK). However, dense encoding schemes typically have to be translated to a normal binary encoding when processing information electronically. Designing photonic devices that operate on denser encoding schemes would preclude that requirement, saving power and increasing throughput [19] . For optical processing, PSK encoding schemes are preferable to other, denser options, because PSK has continuous, uniform, and unambiguous transitions between encoded states. Therefore, we choose to design our devices to operate on a binary PSK (BPSK) encoding scheme, where two different phase states of the signal represent digital 0 and digital 1 ( Figure 1(b) ). The goal of this work was to use inverse design tools to implement digital logic with photonic devices. Although inverse design has been shown for nonlinear devices [8] , the Lumerical inverse design tools only work for linear designs [20] . While linear device designs using interference have shown logic function behavior with amplitude-encoded inputs, nonlinear optical processes are required to achieve most logic functions with phase-encoded inputs. An exception to this is the XOR gate [21] , which can be demonstrated with linear functions. XOR logic gates are useful for a number of computing applications, and the typical behavior of a two-input XOR gate is that the output is true (1) when the inputs are different from each other, and false (0) otherwise. This behavior, as it was implemented in our devices with PSK encoded inputs and amplitude encoded outputs, is represented in Table I . Due to the limitations of inverse design and the usefulness of XOR gates for digital logic, we choose to implement this logic function in our design. As previously mentioned, we implemented Lumerical's inverse design tool, a Python suite called LumOpt, to achieve our designs. LumOpt leverages the adjoint method for inverse design optimization [22] . This method allows the gradient of a design space to be calculated with only two simulations: the normal, or forward simulation, and the reverse, or adjoint simulation. In the adjoint simulation, the location and direction of the light source and output monitor are swapped. The design is optimized using a figure of merit (FOM) that matches the light mode somewhere in the device, typically an output port. Optimization of different outputs is also possible by setting up a unique base (input condition) for each FOM. The design we optimized had two input waveguides spaced 2.5 µm apart. They were 400 nm wide. The optimization region was 3.5 µm by 3.5 µm, and we set the radius filter of the inverse design tool to 200 nm. The radius filter is used for optimizing at the end of the design process to ensure that all features have the specified minimum radius which in turn ensures they are manufacturable. The design had two output waveguides that were also spaced 2.5 µm apart and were 400 nm wide. Inverse design optimizations using LumOpt can take a significant amount of time to complete, even on simulation computers with a large amount of processing power. This is compounded by the fact that we had to use a uniformly spaced mesh for our simulations. The automatically-generated nonuniform mesh was smaller than the inverse design topology resolution near the metal interface, so we used a fixed mesh to avoid errors in the gradient calculation step. Unfortunately, this uniform mesh increased the time to complete simulations. In order to speed up the overall design process, we first optimized the design using 2D simulations. This allowed us to run each individual simulation faster and therefore have a larger number of simulations run, resulting in a better optimization. However, the 2D designs are not as accurate as 3D designs, since they assume infinite extent in the dimension not simulated. This problem is made worse by the fact that we used plasmonic devices, and the plasmonic confinement was in the dimension not simulated. Therefore, 3D optimization is necessary. After running the 2D optimization, we used the results as the starting point of the 3D optimization. This allowed the optimization to converge more quickly, requiring fewer rounds of optimization and therefore fewer simulations and less time overall. We also found that the results were better when we optimized with the 2D results as the starting condition as opposed to the default starting condition for optimizations, which is the optimization region having a refractive index halfway between the waveguide index and background index. The inverse design tool has some important limitations that we had to accommodate in order to realize our goal. First, the adjoint method is implemented in Lumerical such that each base simulation must use only one input light source. Having only one source is an obvious problem for designing a two-input logic gate, which requires two inputs that vary relative to one another. We overcame this limitation by using a single source object in Lumerical and selecting symmetric and antisymmetric coupled modes for the inputs of different base conditions ( Figure 2 ). These two cases represent inputs that are in-phase with each other and π radians out of phase with each other, which are suitable for the two conditions we need to define XOR behavior if we are using a BPSK encoding. In order to validate this approach, we re-ran the simulation with separate sources after the optimization was complete to verify it had the same behavior as with the single coupled-mode source used for the optimization. Although we can design with BPSK encoded inputs, we are unable to have higher degrees of phase-shift keying due to this limitation. Next, we are unable to directly select for phase of the signal at the output. Ideally, we would select for phase conditions so our device uses BPSK encoding at both input and output ports. Unfortunately, the mode-matching requirement for the FOM means that we can only select for amplitude at the output, as well as mode if we have a multi-mode waveguide. (In our case, the output ports were single mode waveguides). While it would be possible to use the same trick we used for the inputs, with two outputs that have a coupled mode, the result would be a trivial design. Therefore, the outputs of our XOR device are amplitude encoded, also known as on-off keying. One positive side-effect of this is that we are able to implement two output ports, one which acts as an XOR gate and one which acts as its inverse, XNOR. In order to fully characterize our inverse-designed devices, we also designed devices with the same behavior using more conventional simulation design methods. Specifically, we designed multi-mode interferometer (MMI) devices based on a design in Ota, et. al. [23] . These devices are thin so they support fewer modes than larger MMI devices and have less complex interference patterns [23] . On one of the inputs, there is a wide region leading up to the device, which is a phase adjuster. This phase adjuster adds π/2 radians of phase to that input, which adjusts the interference pattern within the device. This phase adjuster is designed to support the fundamental and first guided mode, and could be redesigned to offer a different phase shift [24] . Just as with the inverse-designed devices, these conventional devices operate with BPSK encoding on the inputs and amplitude encoding on the outputs. One output port acts as an XOR gate, while the other acts as an XNOR gate. The size of the input and output waveguides are the same. For both our devices, we designed them to operate at a wavelength of 1310 nm, which is a typical communications wavelength. The inverse design can easily be re-run to operate at a wavelength of 1550 nm, and adjusting the conventional design to operate at 1550 nm can also be done as MMIs are well-understood analytically [25] . The topology of the design generated from Lumerical's inverse design tool is shown in Figure 3 (a). The generated design is non-intuitive, but in certain respects is similar to a directional coupler. The power inside the device for two different combinations of phase at the input is shown in Figure 4 (a) and (b) , and the Hy field is shown in Figure 4 (c) and (d), from which you can see the phase relations between the inputs. From these figures, it is plain to see that the inverse-designed device achieves the desired XOR behavior. When the inputs are in phase with one another, the light is directed to the output port on the bottom of the device. Conversely, when the inputs are π radians out of phase with one another, the top output port is selected. These relations translate to an XOR function with phase-encoding on the inputs and amplitude-encoding on the top output port, and an XNOR function on the bottom output port. The topology of the conventionally-designed device is shown in Figure 3(b) . The power inside the device and the Hy fields for different phase combinations at the inputs are shown in Figure 5 Once again, the figures demonstrate the desired XOR behavior. This device behaves in the same way as the inverse-designed device. Inputs with signals that are in phase (00 and 11 cases) cause light to couple into the bottom output port, while inputs with signals π radians out of phase with each other (01 and 10 cases) causes light to couple into the top output port. In addition to confirming the XOR behavior of the inverseand conventionally-designed devices, we characterized their performance. Table 2 compares important metrics between both devices. Specifically, we compared insertion loss, extinction ratio, and device area between both devices. The insertion loss is defined as Pout is the power coupled into the active output port and Pin is the input power to the device. The extinction ratio is defined as where Pon is the power coupled into the output port when it is active and Poff is the power coupled into the same output port when it is inactive. Finally, the area of the device was calculated as the active area, excluding the input waveguides. For the inverse-designed devices, this area is the area that was topologically inverse-designed. The inversedesigned region is 3.5 µm by 3.5 µm, which corresponds to an area of 12.25 µm 2 . For the conventionally-designed device, we must include the phase adjuster portion which is essential to achieving the device behavior, so we extended the length to include this component, leading to dimensions of 8.4 µm by 2.8 µm. Even though this device is thinner than the inversedesigned device, the area is 23.52 µm 2 , which is almost twice the area. The performance of both inverse-designed and conventionally-designed devices is good for a plasmonic device. The insertion loss of these devices is at an acceptable level, and they both show a very good extinction ratio, meaning there is little ambiguity in the device behavior. Finally, they both have a fairly small overall area, a benefit conferred by using plasmonic waveguides. More interesting features emerge when directly comparing the two devices. First, the inverse-designed device has a substantially lower insertion loss than the conventionallydesigned device. This is primarily due to the reduced propagation distance in the inverse-designed device. Because propagation losses tend to be high in plasmonic devices, a significant improvement is made by reducing the length of the device. In order to achieve this shorter length, the inversedesigned device must have a wider area than the conventionally-designed device. However, this short length probably contributes to the inverse-designed device having a lower extinction ratio than the conventionally-designed device. While the wider size of the inverse-designed device may limit how closely these devices could be packed into a single PIC, the overall area of the inverse-designed device is much smaller, so the tradeoff is worth it. Furthermore, even though the extinction ratio is lower, it is still at an acceptable level. Overall, the inverse-designed device shows improved characteristics over the conventionally designed device. Despite the good performance of the inverse-designed device, there are several drawbacks that arose from limitations in the inverse design tool used. The largest drawback is that we are unable to design the XOR device to have a phase-encoded output using Lumerical's inverse design tools. There is no way to use phase of the light at the output port as a design parameter or FOM. To be clear, designing for phase-encoded outputs is a difficult challenge regardless of the tools used. It is desirable to have phase-encoded outputs to enable arbitrary cascading from outputs to inputs of PSK logic devices. However, if we wish to pursue this approach further, we will either need a second stage to the device that re-encodes the output in phase or need to use a different design approach. Another drawback arises from the limitation that we can only have one input source. Ideally, we would like to design devices that use higher-order PSK, which uses more phase states to represent encoded multi-bit symbols as opposed to single bits. With one input source, we can represent BPSK inputs by cleverly adapting coupled modes, but this is not possible for higher-order PSK signals. Therefore, to pursue higher-order PSK logic, we will need to use conventional design methods. It is worth noting that higher-order PSK would no longer use binary logic, and therefore would require different kinds of logic gates (for example a MIN and MAX function) or a translation to binary logic with decoder and encoder gates [26] . These are challenging problems worthy of further investigation, and inverse design tools may yet play a role in designing devices for some intermediate stages. Finally, the Lumerical inverse design tool only works for linear designs. Although this allows us to achieve XOR behavior, if we use phase encoding we will need to leverage nonlinear optical effects for other logic functions, which are inherently nonlinear. There are several avenues to achieve the desired behavior which are currently under investigation, but none of them involve using Lumerical's inverse design tool. Once again, it may be possible that intermediate stages or subcomponents could be designed using these inverse design tools, but it will not be possible to generate a complete device using only inverse design. We used Lumerical's inverse design tool with FDTD simulations to design a plasmonic device which exhibits XOR logic gate behavior. The device has phase-encoded inputs and amplitude-encoded outputs, operating with BPSK. Some of the major design decisions were constrained due to limitations of the inverse design tool being used. In order to evaluate the performance of the device and the benefits of using inverse design, we designed a plasmonic device with comparable operation using conventional simulation methods. Comparing the performance of the inverse-designed device to the conventionally-designed device illustrates that inverse design provides improvement in insertion loss and device area, with a comparable extinction ratio. These performance improvements highlight the usefulness of inverse design methods for creating novel devices, even when their limitations impose additional design constraints. Moving forward, it is likely that the particular limitations of Lumerical's inverse design tool will prevent them from being used by itself for more complex photonic logic design unless improvements and updates are made. However, this and other inverse design tools may still prove useful for intermediate stages and important sub-components, and may help to reduce the overall area and increase the performance of complex, nonlinear, photonic and plasmonic digital logic devices. Three-dimensional FDTD analysis of a nanostructured plasmonic sensor in the near-infrared range Design and analysis of a plasmonic demultiplexer based on band-stop filters using doublenanodisk-shaped resonators Multifunctional logic gates based on silicon hybrid plasmonic waveguides Silicon photonic crystal all-optical logic gates Ultracompact double tunable two-channel plasmonic filter and 4-channel multi/demultiplexer design based on aperture-coupled plasmonic slot cavity Inverse Design of Plasmonic Structures with FDTD Inverse design in nanophotonics Adjoint Method and Inverse Design for Nonlinear Nanophotonic Devices Inverse design and demonstration of a compact and broadband on-chip wavelength demultiplexer Deep learning in nano-photonics: inverse design and beyond Design of Compact and Efficient Silicon Photonic Micro Antennas With Perfectly Vertical Emission Photonic Inverse Design The Case for Hybrid Photonic Plasmonic Interconnects (HyPPIs): Low-Latency Energy-and-Area-Efficient On-Chip Interconnects Plasmonic circuits for manipulating optical information Long-range dielectric-loaded surface plasmon-polariton waveguides Polymer waveguides for electro-optical integration in data centers and high-performance computers Grating couplers for (Bloch) long-range surface plasmons on metal stripe waveguides Design Challenges in Silicon Photonics Digital optical processing of optical communications: towards an Optical Turing Machine Photonic Inverse Design Overview -Python API What can we do with a linear optical logic gate? Adjoint shape optimization applied to electromagnetic design Plasmonic-multimode-interference-based logic circuit with simple phase adjustment Feasibility of Cascadable Plasmonic Full Adder Optical multi-mode interference devices based on self-imaging: principles and applications All-optical quaternary computing and information processing: a promising path The authors thank James Kelly of Chapman University for remote management of simulation tools during the COVID-19 pandemic which enabled this work.