BBBffi ■1 ■ nan HH Digitized by the Internet Archive in 2013 http://archive.org/details/nornetworktransd688boon u(p%% uiucdcs-r-7^-688 /J^LA^h NOR NETWORK TRANSDUCTION PROCEDURES: "MERGING OF GATES" AND "SUBSTITUTION OF GATES" FOR FAN -IN AND FAN-OUT RESTRICTED NETWORKS (NETTRA-G3-FIFO AND NETTRA-PGl-FIFO) by Boonklee Plangsiri December 197^ DEPARTMENT OF COMPUTER SCIENCE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS IHE LIBRARY OF THE JAN 231975 UNIVERSITY OF ILLINOIS ^BANA-CHAMPAIGN uiucdcs-r -74-688 NOR NETWORK TRANSDUCTION PROCEDURES: "MERGING OF GATES" AND "SUBSTITUTION OF GATES" FOR FAN-IN AND FAN-OUT RESTRICTED NETWORKS (NETTRA-G3-FIFO AND NETTRA-PGl-FIFO)* by Boonklee Plangsiri December 197*4- Department of Computer Science University of Illinois at Urbana-Champaign Urbana, Illinois 6l801 -K- This work was supported in part by the Department of Electrical Engineering and Department of Computer Science and was submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering, January 1975- This work was supported in part by the National Science Foundation under Grant No. GJ-40221. Ill ACKNOWLEDGMENT The author would like to express his sincere gratitude to his thesis adviser, Professor S. Muroga, for his valuable suggestions and help in the preparation of this paper and more especially for his valuable time spent in the careful reading of this thesis. The author would like to thank Mr. H. C. Lai and Mr. Jay Culliney for their guidance and their indispensable assistance and also for their suggestions in writing this paper throughout the period of this thesis research. The author has spent many hours with these two persons in illuminating conversations relevant to this paper. Finally, the author would like to thank the people in the research group led by Professor S. Muroga. IV TABLE OF CONTENTS Page 1. INTRODUCTION 1 2. MODIFIED PROGRAM NETTRA-G3-FIFO 6 2.1 Original Program NETTRA-G3 6 2.2 Modified Program NETTRA-G3-FIFO Ik 2.3 Variations of Modified Subroutine GTMERG 21 2.1+ Evaluation and Experimental Results of the Three Versions of Modified Subroutine GTMERG 39 3. MODIFIED PROGRAM NETTRA-PG1-FIF0 1+7 3.1 Original Program NETTRA-PG1 1+7 3.2 Modified Program NETTRA-PG1-FIF0 5I+ 3.3 Variations of Modified Subroutine SUBSTI 6l 3.1+ Evaluation and Experimental Results of the Three Versions of Modified Subroutine SUBSTI 7I+ k. EXPERIMENTAL RESULTS 83 l+.l Outline of the programs Used in Running the Experiment 83 1+.2 Results of the Computer Experiment . 86 1+.3 Comparison and Conclusion ° 96 k.h Networks for Functions with Don't Care 100 LIST OF REFERENCES 108 V LIST OF FIGURES Figure Page 2.1.1 Example of the "Merging of gates" procedure 7 2.1.2 General organization of the program NETTEA-G3 9 2.1.3 Flow chart of the original subroutine GTMERG 12 2.2.1 General organization of the program NETTRA-GJ-FIFO . . 15 2.3-1 Flow chart of Version I of modified subroutine GTMERG 23 2.3*2 Example to show how the fan-out of the merged gate I J is reduced after merging 28 2.3*3 Example to show how the fan-out of gates in CS(lJ) is reduced after merging 30 2.3 A Flow chart of Version II of modified subroutine GTMERG 32 2.3.5 Flow chart of Version III of modified subroutine GTMERG o . . . . . . . . 38 2.^.1 The organization of the program that was used to evaluate the effectiveness of the three versions of modified subroutine GTMERG hO 3.1.1 Organization of the program NETTRA-PG1 kQ 3.1.2 Flow chart of subroutine PROCIP 4 9 3.1.3 Example of transformation performed by "SUBSTI" .... 51 3.1.14- Flow chart of original subroutine SUBSTI in NETTRA-PG1 . . . . . . .... 53 3.2.1 General organization of the program NETTRA-PG1-FIF0 . . 56 3.2.2 Flow chart of subroutine PROCIP in NETTRA-PGl-FIFO . . 57 3.3.1 Flow chart of Version I of modified subroutine SUBSTI 63 VI Figure Page 3.3.2 Illustration of finding MAXA 65 3.3.3 Example to show how the fan -out of a gate which is substituted for gate I can be reduced 69 3»3«4 Flow chart of Version II of modified subroutine SUBSTI 71 3.3.5 Flow chart of Version III of modified subroutine SUBSTI 75 3.4.1 The organization of the program that was used to evaluate the effectiveness of the three versions of modified subroutine SUBSTI 77 4.1.1 (a) The organization of the program that was used to run the experiments for NETTRA-PG1-FIF0. (b) The organization of the program that was used to run the experiments for NETTRA-G3-FTF0 84 4.2.1 The organization of the program FIFO ALONE 95 4.4.1 Su and Nam's resultant network with FI = FO = FOX = 2 and F00 = 102 4.4.2 The resultant network for Su and Nam's functions derived by NETTKA-KJ1-FIF0 with cost = 22037 and FI = FO = FOX = 2, F00 = 104 4.4.3 The resultant network for Su and Nam's functions derived by NETTRA-G3-FIF0 with cost = 20033 and FI = F0 = FOX = 2, F00 - 106 I it VI 1 LIST OF TABLES Table Page 2.4.1 Results of 45 networks derived by 3 versions of the modified subroutine GTMERG with FI = FO = F00 = FOX = 3 . . . l\3 2.4.2 A measure of efficiency and effectiveness of the 3 versions of subroutine GTMERG J+ 5 3.4.1 Results of 45 networks derived by the 3 versions of the modified subroutine SUBSTI with FI - FO - F00 = FOX = 3 78 3.4.2 A measure of the efficiency and effectiveness of the 3 versions of modified subroutine SUBSTI 8l 4.2.1 Thirty 4-variable functions with FI = FO = F00 = FOX = 2 . 87 4.2.2 Thirty 4-variable functions with FI = FO = F00 = FOX = 3 . 89 4.2.3 Thirty 5-variable functions with FI - FO = F00 = FOX = 3 . 91 4.2.4 Thirty 5-variable functions with FI = FO = F00 = FOX = 4 . 93 4.3.1 Comparison of the effectiveness of the programs NETTRA-PGl-FIFO and NETTRA-G3-FIF0 97 4.4.1 Su and Nam's 4-variable, 4-incompletely specified output functions and the dual of the functions .... 103 4.4.2 Results of networks derived by NETTRA-PGl-FIFO and NETTRA-G3-FIF0 for Su and Nam's incompletely specified functions 103 4.4.3 The networks costs by NETTRA-PGl-FIFO and NETTRA-G3-FIF0 for nine different completions of Su and Nam's incompletely specified functions with FI = FO = FOX = 2 and F00 = 107 1. INTRODUCTION The design of a network with NOR or NAND gates is one of the most important problems in the field of logical design because most of the basic gates of bipolar transistor integrated circuits, such as DTL, TTL, and ECL, realize NOR or NAND gates. Many papers have been published on the synthesis problems of networks with NOR or NAND gates using different approaches. These may be classified into five groups as follows : a) Boolean algebra methods (e.g., [9])« Exhaustive method [10]. Integer programming and branch-and-bound methods [11] [12]. Network transformation methods (e.g., [13] [1^]). Network transduction procedures [1] [2] [3] [h] [5] [8]. Each method has different advantages and disadvantages. The boolean algebra methods are relatively easy to use but the results are not necessary optimal networks if certain restrictions such as maximum fan-in are imposed. The exhaustive method, in general, gives an optimal network, but it takes excessive calculation time even for small networks. Therefore, it is applicable only to networks of very few gates. The integer programming and branch-and-bound methods also give an optimal network within much shorter time than the exhaustive method. This method is, however, too time-consuming if the number of gates approximately exceeds ten. The network transformation methods transform the network, designed by some conventional methods such as Boolean algebra methods, into a simpler one by reducing the number of gates and connections, based on certain algebraic properties. But the applicability of the network transformation methods is limited, since they employ only superficial properties of gates and/or network configurations and usually concern only an individual gate and its connections. Recently, the network transduction procedures have been studied by the research group led by Professor S. Muroga of the Department of Computer Science at the University of Illinois. The network transduction procedures also transform the network, designed by some conventional methods. But unlike the transformation methods, these procedures are used on the powerful concept of the compatible set of permissible functions [1] [2] [3] in removing gates and connections from a network. The procedure considers every gate and external variable in the network, starting from the output gate(s) toward the network inputs. This more complete consideration by the transduction procedures generally results in greater reduction in the numbers of gates than can be obtained by the transformation methods. These two methods require much less calculation time than the integer programming and branch-and-bound methods, but the optimality of transformed networks cannot be guaranteed. Several computer programs for designing NOR-gate networks by the transduction procedures have been implemented [2] [3] [k-] [5] [8]. Such programs are known as "transduction programs". The name of these transduction programs always begins with NETTRA (NETwork TRAnsduction) which designates the whole collection of programs realizing network transduction procedures. All NETTRA programs (transduction programs) either transform or assist in transforming networks of NOR gates. The procedures either add or remove gates and connections, and at the same time, they replace the connections of an output of some particular gate to other gates with the outputs of other existing gates and/or external variables in the networks. By means of transduction, a large non-optimal network realizing one or more functions can often be reduced to a smaller, less expensive (in terms of the number of gates, first, and connections, second), near-optimal network which realizes the same function(s). In general, such a transduction could involve a complete reorganizing of the network. The transduction programs that have been developed so far could be divided into three groups, according to their capabilities. a) Prunning Procedures . They are a type of transduction procedures which remove only connections. The program realized by such procedures is designated "NETTBA-P" . b) General Procedures . The name indicates a general type of transduction procedures which either add or remove connections in a network. We call the program realized by such procedures "NETTRA-G" . c) Error Compensation Procedure . This procedure is the error compensation type [8]. We call the programs realized in this group "NETTRA-E" . Even though the optimality of networks derived by the trans- duction procedures cannot be guaranteed, they are, in general, reasonably good. They take much less calculation time than any other methods especially when the networks contain many gates and connections. Because of the advantage that they can handle networks with many gates and connections when optimal networks are not required (in most practical cases), the logical design of networks by the transduction procedures is very effective from practical point of view. In this paper, the two NOR-network transduction procedures — "merging of gates" and "substitution of gates" — will be discussed under fan-in and fan-out restrictions. They have been originally studied and implemented into the computer programs called "NETTRA.-G3" and "NETTRA-PG1" by J. Culliney and H. C. Lai [k] [5 J. These original programs try to reduce only the number of gates and connections without considering fan-in and fan-out restrictions on gates and external variables in the network. Since the logical design of networks under fan-in and fan-out restrictions is very important from the viewpoint of design practice, it is desirable to obtain a network with as few gates and connections as possible under fan-in and fan-out restrictions. This paper will present the modified computer algorithms of the two network transduction procedures — "merging of gates" and "substitution of gates" ~ in the programs NETTRA-G3 and METTRA-PG1 in such a way that they can handle fan-in and fan-out restricted networks. The discussion in this paper will be concentrated only on the modification of these two programs. The idea in the modification is quite simple because we only have to keep track of the number of fan-in and fan-out of gates or external variables during the transduction procedures so that they will not exceed the specified limits. The reader is assumed to have a knowledge of the concept of compatible set of permissible functions (CSPF's) contained in [1] [2] [3], which is the basis of our network transductions discussed in this paper. The following is the contents of this paper. The original program NETTM-G3 will be discussed in section 2.1. The modified program called WETTRA-G3-FIF0 will be discussed in detail in section 2.2. The suffix "FIFO" is used to represent the modification with which the program can handle fan-in (i.e., Fl) and fan-out (i.e., FO) restricted networks. The program NETTRA.-G3-FIF0 has three different versions, each of which has different modifications. These versions will be discussed in section 2.3« In section 2.k, the results of the experiment to determine the effectiveness of these three versions will be given. In section 3.1, the original program NETTRA-FG1 will be discussed. The modified program NETTRA-PG1-FIF0, which can handle fan-in and fan-out restricted networks will be explained in detail in section 3-2. This modified program also has three different versions which will be discussed in section 3«3« The experimental results of these versions will be given in section 3«^. Chapter k provides further discussion concerning the experimental results of NETTRA-FG1-FIF0 and NETTRA-G3-FIF0. The results will give a general idea about the effectiveness of these two procedures in terms of computation time and the cost of the resultant networks. In addition, section k.h will give the experimental results on networks with incompletely specified output function(s). 2. MODIFIED PROGRAM NETTRA-G3-FIFO 2.1 Original Program NETTRA-G3 This section will discuss the NOR-network transduction procedure "merging of gates" realized by the FORTRAN program designated NETTRA-G3 [3]« The program is one of the transduction programs realizing a general procedure. The program realizes a procedure which merges two NOR -gates at a time into one. If two gates in a given network can be replaced by one gate with inputs from external variables and/or existing gates not fed by these two gates without changing the function which the network realizes, they are said to be mergeable . The gate replacing those two gates is called the merged gate . An example of the "merging of gates" procedure is shown in Figure 2.1.1. Suppose that gates I and J are mergeable into gate IJ with inputs from gates K, M and N which are not fed by gate I or gate J (Figure 2.1.1(a)). The procedure constructs the merged gate IJ with inputs from gates K, M, and N, and removes gates I and J from the network. Then, it connects the output of the merged gate IJ to all immediate successors of gates I and J as shown in Figure 2.1.1(b). The resultant network still realizes the specified output functions (see [3] for detail of the procedure). The procedure realized by program NETTRA-G3 first examines every pair of gates in the network to see if they are mergeable. For the sake of efficiency, this procedure does not use necessary and sufficient conditions for gates to be mergeable. Instead, the concept of compatible -E>- -{m>~ SUBNETWORK t>- SUBNETWORK OUTPUT FUNCTIONS (a) Original network SUBNETWORK u> n> SUBNETWORK OUTPUT FUNCTIONS (b) Resultant network Figure 2.1.1 Example of the "Merging of gates" procedure 8 set of permissible functions (CSPF's) is used [3] [5]. The "merging of gates" procedure is essentially realized by the FORTRAN subroutine GTMERG. This subroutine along with the following support subroutines, written in FORTRAN IV for IBM 360/75, constitutes the program NETTPA-G3: MAIN, MINI2, OUTPUT and SUBNET. Two system-supplied timing subroutines STIMEZ and KTIMEZ are also assumed to be available. If they are not, their use can be omitted from the program without harming the procedure itself. The general organization of program NETTRA-G3 is shown in Figure 2.1.2. An arrow from block i to block J shows that the subroutine represented by block i calls the subroutine represented by block j. The function of subroutine MENI2 is to calculate compatible set of permissible functions for all gates and external variables in the network. Subroutine MINI2 can also remove redundant connections and this sometimes results in removing gates from the network. For more details about MINI2, the reader should read [1] and [2]. The functions of other support subroutines are outlined as follows : MAIN : This subroutine repeatedly reads in groups of input data which contain information about the given network, i.e., the number of external variables, the number of output functions, etc. It controls the calling sequence of the other subroutines and finally prints out the information of the resultant networks by calling subroutine OUTPUT. SUBNET : This subroutine may be entered at three different points by a call to either SUBNET, UNNECE or PVALUE. Entry SUBNET: It calculates the level number of each gate in the network and lists all immediate successors and immediate predecessors for each gate. MAIN OUTPUT GTMERG i SUBNET MINI 2 STIMEZ KTIMEZ Figure 2.1.2 General organization of the program NETTM-G3 10 Entry IMNECE: It removes the connections or gates which constitute no path from an external variable to an output gate. Entry PVALUE: It calculates the truth table for the entire network . OUTPUT : This subroutine is to print out the information about the network configurations of the given initial network and also the resultant networks. Since the "merging of gates" procedure is essentially performed by subroutine GTMERG, it is sufficient to discuss only this subroutine for the program NETTRA-G3. The following definitions will facilitate the discussion of the flow charts of all subroutines in this paper. 1. P(l) denotes all predecessors of gate I. 2. IP(l) denotes all immediate predecessors of gate I. 3. S(l) denotes all successors of gate I. k. IS(l) denotes all immediate successors of gate I. 5« f(l) is the vector representing the output function of gate or external variable I. 6. G r (l) is the vector representing the CSPF of gate or (l) (2) (2 ) external variable I. It is expressed with (GJ; (i), G^ (i), ..., GJ; (i)) In the actual program, array "GSMA.LL" stores the CSPF's of gates and external variable in the network. 7» N is the number of external variables. 8. M is the number of output gates. 9« R is the number of gates in the network. 10. WM = N + M 11. NR = N + R 12. Connectable function K(l) is defined as follows: 11 The set K(l) of all connectable functions to gate I with respect to G„(l) is expressed with vector (K (1) (I), K (2) (I), K (3) (l), ..., K (2N) (I)) • where K^'(l) = for all i such that gJ?\i) = 1. K^(l) = * for all other cases. * denotes "don't care", i.e., it can he either or 1. "i" W takes a value from 1, 2, 3, . .., 2 . A necessary and sufficient condition that gate J can be "connected" to gate I is f(j) e K(l). 13. A connectahle set for a merged gate IJ is the set of gates and/or external variables that can be connected to the merged gate IJ. A gate or an external variable L is connectable to the merged gate IJ if, and only if, it satisfies the following conditions. (i) L/S(l)US(j)UIUJ (condition for a loopless network) (ii) f(L)eK(lJ) If the following is satisfied, gates I and J are mergeable: Vf(L) €G (IJ) LeCS(lj) where CS(lj) denotes the connectable set of the merged gate IJ and G„(lJ) is given by G c (lJ) = G c (l) fl & c (j) / 0. The flow chart of the original subroutine GTMERG is given in Figure 2.1.3* The procedure in this subroutine can be briefly described as follows: (See [3] and [5] for the concept of CSPF's and the basic transduction procedure based on it.) 12 c START } CALL KTJJI2 I-HM+1 J- 1 + 1 1 CALCULATE G C (IJ) G C (I.T)-G C (I) nG c (j). DETERMINE K(U). J = J + 1 YES YES 1 = 1 + 1 YES ( RETURN J CALL PVALUX CALL UNNECE CALL SUBNET DISCONNECT ALL OUTPUTS OF GATE J AND CONNECT I TO IS(J) YES I- J J- I DISCONNECT ALL INPUTS OF GATE I AND CONNECT CS(IJ) TO I Figure 2.1.3 Flow chart of the original subroutine GTMERG 13 Step 1 Calculation of CSPF's Call subroutine MINI2 to calculate CSPF's for all gates and external variables in a given network. Step 2 Select a pair of gates Select two gates I and J such that J > I according to the ascending order of the gate labels. If all possible pairs have been considered, return to the calling subroutine. Step 3 Calculate the CSPF of a merged gate IJ Calculate G c (lJ) = G c (l) fl G (j). If G (IJ) - 0, gates I and J are not mergeable. Go to step 2. Determine K(lJ). Step k Check substitutability If f(l)eG c (j) and l/S(j), go to step 8. If f (J) e G (I) and j/S(j), interchange the labels of I and J and go to step 8. Step 5 Find the connectable set (CS(lJ)) for a merged gate IJ Find the set of existing gates or external variables L such that (i) L/S(l) U S(j) U I U J (ii) f(L)eK(U) The set of such gates and/or external variables is the connectable set (CS(lJ)) for the merged gates IJ. Step 6 Check the realizability of merged gate IJ If Vf(L) /G (IJ), go to step 2. LeCS(lJ) Step 7 Construct the merged gate Disconnect all the inputs of gate I, and connect gates and/or external variables in CS(lj) to gate I. IK Step 8 Substitution Disconnect all outputs of gate J, and connect gate I to all immediate successors of gate J. The resultant network still realizes the specified function(s). Step 9 Update information on the new network Call subroutine SUBNET to update the information on the configuration of the network (e.g., predecessors list and successor list). Go to step 1. 2.2 Modified Program NETTRA-G3-FIF0 This section discusses the modification of the program NETTRA-G3 so that it can handle networks under the fan-in and fan-out restrictions. The modified program is called NETTRA-G3-FIF0 which is one of the transduction programs realizing the "merging of gates" procedure. The suffix FIFO means that the program implements the procedure which can handle the fan-in (i.e., Fl) and fan-out (i.e., FO) restricted networks. Since the principal procedure in NETTRA-G3 is mainly performed by subroutine GTMERG, the main modification of this program is necessary only in this subroutine. The following discussion on the modified program (NETTRA-GJ-FIFO) will emphasize only the change to be made in the subroutine GTMERG in detail. The general organization of the modified program is shown in Figure 2.2.1. The reader will see that it is the same as that given in Figure 2.1.2 in the previous section. The modification is made only inside subroutine GTMERG, but the sequences of calling subroutine programs are still kept the same. Modified program NETTRA-G3-FIF0 consists of the same subroutines as program NETTRA-G3. 15 MAIN OUTPUT GTMERG • SUBNET MINI 2 STIMEZ KTIMEZ Figure 2.2.1 General organization of the program NETTRA.-G3-FIF0 16 It is important to note here that the modified program NETTRA-G3-FIF0 cannot solve the fan-in and fan-out problems in a network. It can only reduce the number of gates and connections in the network while maintaining the fan-in and fan-out restrictions. Therefore, the given network must satisfy the fan-in and fan-out restrictions. The modification of subroutine GTMERG is simply to check the fan-in and fan-out of gates to be merged, and the fan-out of gates and /or external variables that are connectable to the merged gate. The program will not attempt to merge any two mergeable gates if it causes a fan-in or fan-out problem in the resultant network. Thus, if the sum of the fan-out of two mergeable gates exceeds the fan-out limit, these two gates will not be considered. And, if the total number of the fan-out of gates or external variables to be connected to the merged gate exceeds the fan-out limit, the program will not attempt to merge these two gates. The program also considers the total number of inputs to be connected to the merged gate in order to prevent a fan -in problem of the merged gate. These are the basic ideas in modifying the program. But, if we use a straightforward method as discussed above to check the fan-in and fan-out of gates and external variables before merging any two gates, there will be fewer possibilities that the gates are merged. This is because some pairs of mergeable gates can still be merged without causing the fan-out problems, even though the sum of fan-out of these two gates, or the number of fan-out of gates to be connected to the merged gate exceeds the fan-out limit. The reason is that, after these two gates are merged, some redundant connections can be removed, solving the fan-in and fan-out problems (see Figure 2.3.2 and Figure 2.3.3). Since the procedure tends to increase the number of connections whenever it tries to merge any two IT gates, this often causes the fan-in and fan-out problems in the network, even though the number of gates is reduced. So we come up with the problem to find out what is the best way to modify the program such that the program effectively reduces the number of gates while satisfying the fan-in and fan-out restrictions. Moreover in choosing the best way, computation time is another factor to be considered. In the following sections we will see the three different versions of modified subroutine GTMERG, each of which has a different way of modification to handle fan-in and fan-out restricted networks. They have different advantages and disadvantages which will be considered on the basis of the experimental results given in the last section. For our further discussion of the program, the following definitions are necessary. 1. FI denotes the maximum fan-in permitted for each gate in a network. 2. FO denotes the maximum fan-out permitted for each gate except output gates. 3. F00 denotes the maximum fan-out permitted for each output gate. k. FOX denotes the maximum fan-out permitted for each external variable. 5. Two dimensional array "INC$MX" is used to determine whether there is a connection between gates or between external variables. If gate J is connected to gate I, we set IEC$MX(l,j) = 1. If there is no connection between gates I and J, INC$MX(l,j) is set to zero. 6. The array "LIFRED" stores the total number of all immediate predecessors of each gate in the network. Thus LIFRED(l) = k 18 if gate I has k inputs. Of course, LIERED(l) = when I is an external variable. 7. The array "LISUCC" stores the total number of all immediate predecessors of each gate or external variable. Thus LISUCC (i) = k if gate or external variable I is connected to k gates. Arrays "LIPRED" and "LISUCC" are used to find the fan-in and fan-out of each gate or external variable. They are always updated each time the network configuration changes by calling subroutine SUBNET. 8. The two-dimensional array "GSMALL" stores the CSPF's of all gates and external variables in the network. GSMALL(i, j) contains the j component of the vector representing the CSPF of gate or external variable i. The array "GSMALL" is also updated each time any two gates are merged by calling subroutine MINK. 9. An entry in the i position of vector G C (IJ) = (G^IJ), G^ 2) (IJ), ..., G^ 2 } (IJ)) such that G^ (U) = 1 is called a necessary-O, where i takes the integer H values 1, 2., 3, .,., 2 . An entry in the i ^ position of vector G C (IJ) = (G^IJ), g£ 2) (IJ), ..., G^ 2 } (IJ)) such that Gp (IJ) = is called a necessary-1 . 10. All necessary-O' s in Gp(lJ) are said to be covered by f(K) if the entries in the same positions of vector f(K) as necessary-O f s in G (IJ) are 0. All necessary-1' s in G„(lj) are said to be covered by f(K) if the entries in the same positions of vector f(K) as necessary-1' s in G C (IJ) are 1. 19 If all necessary-O's and necessary-l's in G (IJ) are covered "by the output functions of all gates and external variables in CS(lJ), then Vf(K) eG p (u) KeCS(lj) holds . 11. SETOFK is a subset of the connectable set CS(lj) for the merged gate IJ, which satisfies the condition: Vf(k) eG (IJ) K e SETOFK As it can be easily seen, if Vf(K) /G (IJ), Ke CS(IJ) then SETOFK obviously does not exist. A way to find the gates and/or external variables in SETOFK follows. After all necessary-O's and necessary-l's in G r (lJ) are determined, among gates and/or external variables in CS(lJ), we select first a gate or an external variable whose function covers the largest number of necessary-l's. From now on, we will not consider these covered necessary-l's. Then we select next a gate or an external variable in CS(lj) whose function covers the largest number of the remaining necessary-l's. We keep on selecting until all necessary-l's in G r (lJ) have been covered. Then, all gates and external variables that we have selected are those in SETOFK. In order to illustrate a way to determine SETOFK, let us consider the following example. 20 Example 2.2.1 : Illustration of a way to determine SETOFK. I ; l i i ; i = 1 2 3 k 5 6 7 8 G C (U) = 1 * K(IJ) = *0****** f(K) =10111000 f(L) =00010101 f(M) =10001010 f(N) =00000011 Suppose that G (i) G (j) = G c (lJ) / 0. From Example 2.2.1, (2) we see that only the second position where G^ (IJ) = 1 is necessary-0 th and the rest, except for the 6 position, are necessary-1's. Suppose that gates K, L, M, N are those in CS(lJ) and they have the output functions as shown in Example 2.2.1. It can easily be seen that f(K) V f(L) v f(M) V f(N)eG (u). Therefore, SETOFK exists. All necessary-1's are indicated by the arrows above the positions in Example 2.2.1. We select gate K first because f(K) covers the largest number of necessary-1's. After gate K has been selected, we do not consider the necessary-1's 1, 3, k t and 5, because they are covered by the selected gate K. Next, gate K is selected because f (N) covers the largest number of the remaining necessary-1's (positions 7 a nd 8), and all necessary-1's have been covered. Then gates K and N are the gates in SETOFK. From the example we can see that f(K) V f(K) e G (IJ). Thus, in order to merge gates I and J we need to connect only gates in SETOFK to the merged gate IJ. This helps to reduce the fan-in of the merged gate IJ. It should be noted that SETOFK is not necessarily a minimal or irredundant set. 21 2.3 Variations of Modified Subroutine GTMERG In this section, three different versions of modified subroutine GTMERG will be discussed. The main feature of each version and the steps that show how each version has been modified will be considered along with the flow chart. The significant difference among the three versions is the way of checking the fan-in and fan- out of gates and/or external variables before merging any two gates in a network, as will be discussed in detail for each version. Version I . This version has a simple modification. The main purpose of this version is to quickly reduce the number of gates in the network in order to save computation time in deriving the network. The main modification in this version is made by checking the fan -in and fan-out of gates before merging to make sure that after merging any two gates there will be no fan-in and fan-out problems. This is done in the following mariner. 1. If the total sum of the fan-out of two gates under consideration exceeds the fan-out limit, these two gates will not be considered. This is because, if these two gates are merged, the fan- out of the merged gate will exceed the fan-out limit. 2. The fan-out of each gate or external variable in the connectable set must be less than the fan-out limit, except the fan- out of the gates or external variables which are immediate predecessors of the pair of mergeable gates. 3. If the number of gates to be connected to the merged gate exceeds the fan-in limit, the two gates will not be merged. In this version, the number of ages to be connected to the merged gate is the number of gates and/or external variables in SETOFK. This condition 22 is needed to prevent the occurrence of a fan-in problem of the merged gate. The above three conditions are sufficient to guarantee that the network, after merging any two gates, satisfies the fan-in and fan-out restrictions. The flow chart of this version is shown in Figure 2.3»1« It is the same as the original flow chart in Figure 2.1.3 except for extra blocks to check the fan-in and fan-out of gates and external variables. Notice that the given network before transformation must satisfy the fan -in and fan-out restrictions. Subroutine GTMERG only tries to reduce the number of gates and connections in the network without violating the fan-in and fan-out restrictions. Since the program realizes the same procedure as the original program, only the modified part of the program will be discussed according to the flow chart. The modified program of subroutine GTMERG can handle both networks with and without the fan-in and fan-out restrictions. When no fan-in and fan-out restrictions are imposed on a network, the program skips some unnecessary steps for checking the fan-in and fan- out of the network as shown in blocks k, 13 and 25 in Figure 2.3»1« The procedure in Version I of the modified GTMERG subroutine can be explained as follows: Step 1 Calculation of CPSF's Call subroutine MTNI2 to calculate the compatible set of permissible functions for all gates and external variables in a network as shown in block 1 of the flow chart. Step 2 Select a pair of gates Select two gates I and J such that J > I, both according to the ascending order of the gate labels (blocks 2 and 3). 23 l> II f START J CALL' KDII2 CALL FVALUI RETURN Figure 2.3.1 Flow chart of Version I of modified subroutine GTMERG 2k If all possible gate pairs have been considered, return to the calling subroutine. Step 3 Check the fan-out of the selected pair of gates (block 5) Since the fan-out of gates in the network can be found from the array "LISUCC", we have to check the following: (a) For gate I which is an output gate. If LISUCC(l) + LISUCC (j) > F00, then gates I and J will not be considered. Go to step 2. (b) For gate I which is not an output gate. If LISUCC (i) + LISUCC (j) > FO, then gates I and J will not be considered. Go to step 2. Step k Calculate the CSPF for the merged gate (blocks 6 and 7) Find G r (lJ) = Gp(l) H G„(j) and determine the positions in Gp(lJ) that are necessary-1's and necessary-O's. If G (u) = 0, go to step 2. Step 5 Check substitutability (blocks 8 and 9) If f(l) e G r (j) and I ^ S(j), gate I can substitute for gate J. Go to step 11. If f(j)eG (i) and J^S(l), gate J can substitute gor gate I. Interchange I and J, and go to step 11. Step 6 Find gates and/or external variables in CS(lj) (blocks 11-20) In blocks Ik and 15 we check the fan-out of gates or external variables in CS(lj) as follows: For any gate or external variable K, if K e IP(l) U IP(j), the program does not check the fan-out of gate or external variable K. This is because if gate or external variable K is selected as a gate in CS(lJ), the fan-out of gate K will not exceed the limit. For gate K such that K^IP(l) U IP(j), the program goes to block 15 and the fan-out of gate K is examined as follows: 25 (a) For K which is an external variable. If LISUCC(K) > FOX, external variable K is not selected. (b) For K which is an output gate. If LISUCC(K) > F00, gate K is not selected. (c) For K which is any other gate. If LISUCC(K) > FO, gate K is not selected. Gate or external variable K can be a gate or an external variable in CS(lJ) if and only if the above cases and the following cases hold (blocks 16-19). a) K/S(l) U S(J) U I U J c b) f(K)eK(lJ) These last two conditions are the same as those in step 5 in the original subroutine GTMERG described in section 2.1. Step 7 Check realizability of the merged gate (block 23) If Vf c (K) ^ G f ,(lJ), gates I and J cannot be merged. Go to Ke CS(IJ) step 2. Step 8 Reduce the number of gates in CS(lJ) by finding SETOFK (block 2k) In this step, we find SETOFK from gates and/ or external variables in CS(lJ) as discussed in section 2.2. Step 9 Check the fan-in of the merged gate (block 26) If the number of gates and/or external variables in SETOFK exceeds the fan -in limit, go to step 2. This is because it causes a fan-in problem for the merged gate if the number of gates and/or external variables in SETOFK exceeds the fan-in limit. Step 10 Construct the merged gate (block 27) Disconnect all inputs of gate I and connect all gates or external variables in SETOFK to gate I (gate I becomes the merged gate IJ), 26 Step 11 Substitution (block 28) Disconnect all outputs of gate J and connect gate I to all immediate predecessors of gate J. The resultant network still realizes the specified function(s) satisfying the fan-in and fan-out restrictions. Step 12 Update the information on the new network (blocks 29, 30 and 31) Call subroutine SUBNET to update the information on the network configuration and to calculate the truth table for the network output (S). Version II . This version is different from version I in that the conditions used to check the fan-in and fan-out of gates or external variables are not sufficient to guarantee that the network after merging any two gates will satisfy the fan-in and fan-out restrictions. The procedure uses the pruning procedure in subroutine MINI2 to help in removing some redundant connections after merging gates. It allows some gates, whose fan-out is equal to the fan-out limit, to be connected to the merged gate. Then it calls subroutine MINI2 to hopefully remove some redundant connections, such that it sometimes results in removing some gates from the network [2] [k]. This sometimes helps to solve the fan-out problems of the merged gate or gates to be connected to the merged gate. The conditions used in this version to check the fan -in and fan-out of gates before merging any pair of gates I and J are as follows : 1. If gate I is a successor of gate J, or gate J is a successor of gate I, the program does not check the sum of the fan-out of these two gates. Otherwise, if the sum of the fan-out of gates I and J exceeds the fan-out limit, gates I and J are not considered. 27 2. For every gate or external variable which is connectable to the merged gate IJ, the program does not check the fan-out of gates or external variables which are predecessors of gate I or gate J. For other gates and external variables which are not predecessors of gates I and J, the program does not consider the gates and external variables whose fan-out equals the fan-out limit. 3. If the number of gates and/or external variables which have to be connected to the merged gate IJ exceeds the fan-in limit, the two gates are not merged. In this version, this is the number of gates and external variables in SETOFK. The reason why the procedure does not check the sum of the fan-out of two mergeable gates I and J if gate I is a predecessor of gate J or vice versa is that after merging gates I and J, the fan-out of merged gate IJ may be less than the sum of the fan-out of these two gates before merging. This is because there is at least one path between gates I and J. If gate I is a predecessor of gate J or vice versa, this path can be removed in some cases after merging gates I and J. Let us consider a simple example in Figure 2.3.2 for the maximum fan -in and fan-out of three. Suppose that gates I and J are mergeable. The sum of the fan-out of gates I and J is four, as shown in Figure 2.3.2(a). But after merging gates I and J, gates K and M can be removed because gates K and M are successors of gate J and they cannot be the gates in CS(IJ). This reduces the fan-out of the merged gate I J to three, satisfying the fan-out restriction as shown in Figure 2.3.2(b). If gate J is not a predecessor of gate I or vice versa, this cannot happen. In a similar way according to condition 2, the program does not check the fan-out of gates or external variables which are 28 E> N £> l=E> ^O (a) Network before merging gates I and J E> i-E>™ (b) Network after merging Figure 2.3-2 Example to show how the fan -out of the merged gate I J is reduced after merging 29 predecessors of gate I or gate J (they cannot be successors of gate I or J either), because there is a possibility that the fan-out of these gates or external variables may be reduced after merging gates I and J. Moreover, after merging gates I and J, CSPF's of all gates or external variables that are predecessors of gates I and J will be changed. This might cause elimination of some redundant connections [1] [2]. Let us consider the example in Figure 2.3-3 for the maximum fan -in and fan-out of three. Suppose that gates I and J are mergeable, and that gate K is connectable to the merged gate IJ (Ke CS(lJ)). The fan-out of gate K is three as shown in Figure 2.3.3(a). But gate K can still be connected to the merged gate IJ because after merging gates I and J, gates M and L can be removed from the network (gate L cannot be a gate in CS(lj) since Le S(j)). This reduces the fan-out of gate K to two, and. after gate K is connected to the merged gate IJ, the fan-out of gate K is three, satisfying the fan-out restriction as shown in Figure 2.3«3(h). This is possible only if gate K is a predecessor of gate I or gate J. For the other gates this cannot occur. Condition 3 is similar to that of version I, since in version II we also connect gates and/or external variables in SETOFK to the merged gate IJ. We see that conditions 1 and 2 for checking the fan-in and fan-out of gates or external variables are not sufficient to guarantee that the network after merging any two gates I and J will satisfy the fan-out restriction, since gates or external variables which are predecessors of gate I or J may have the fan-out which exceeds the limit after merging. Therefore, after merging any two gates, we have to check the fan-out of the merged gate IJ and the fan-out of every gate and/or 30 E>-r-E> — — t^J=e> — n> K ^> (a) Network before merging gates I and J -E> E> r£> R> £>";=£> O- i=L> (b) Network after merging Figure 2.3-3 Example to show how the fan-out of gates in CS(lJ) is reduced after merging 31 external variable that is connected to the merged gate IJ. If there is any gate or external variable whose fan-out exceeds the fan-out limit, these two gates I and J cannot be merged. This requires the program to store all the information on the network configuration before merging any two gates, and if there is any fan-out problem after merging, all this information must be restored in order to get back to the original network before merging. This wastes some computation time if the given network has many pairs of mergeable gates to be considered and such pairs cause fan-out problems after merging. Unfortunately we have no information to tell us which pair of mergeable gates can be merged without causing any fan-out problems and we still do not know whether the pruning procedure in subroutine MINI2 helps to solve the fan-out problems or not. The flow chart of version II of modified subroutine GTMERG is given in Figure 2,J>.K. The procedure in this version is described in the following steps. Note that some steps that are similar to the original program or similar to version I, are not described in detail. Step 1 Calculation of CSPF's (block l) Step 2 Initialization (blocks 2 and 3) Step 3 Select a pair of gates If all pairs of gates have been considered, return to the calling subroutine. Step k Check the fan-out of the selected pair of gates I and J (Blocks 5 and 6) In this step, the program checks the fan-out of the pair of gates I and J according to condition 1 as mentioned at the beginning. 32 CALL M3HI2 I-N + l YES J- 1 + 1 find Gc(u) a c (i)r>oc(j). DETERMINE NECESSARY-1'8 AND NECE88ARY-0'8 IN G C (IJ). 22_ OSMALL- Q DiCAMK - TEMP Ul CALL PVALUE 1*0 CALL SUBNET CALL KIN 12 26 35 CALL U1WECE Q- OSMALL TEMP - DClMX 3* TIS CALL PVALUE J 33 J2L YES DI8C0SKECT INPUTS OF GATE I AND CONNECT GATES IN SETOFK TO GATE I CALL SUBNET FIND SETOFK DISCONNECT ALL OUTPUTS OF GATE J AND CONNECT OUTPUT OF GATE I TO IS(J) » OS MALL TEMP-INCAMX U I- J J-I 12 K-0 t a K-K + I RETURN Figure 2.3 »k Flow chart of Version II of modified subroutine GTMEEG 33 In block 5, if Je S(l) or I e S(j), the sum of the fan-out of gates I and J is not checked and the program goes to block 7. Otherwise, the program goes to block 6 and the sum of the fan-out of gates I and J is checked as follows: (a) For I which is an output gate. If LISUCC(l) + LISUCC(j) > F00, gates I and J are not considered. Go to step 3* (b) For I which is not an output gate. If LISUCC(l) + LISUCC(j) > FO, gates I and J are not considered. Go to step 3* Step 5 Calculate the CSPF of the merged gate IJ (blocks 7 and 8) Find G c (lJ) = Gp(l) n G c (j) and determine necessary-O's and necessary-1's in G c (lJ). If G (ij) = 0, go to step 3. Step 6 Check the substitutability (blocks 9, 10, and 11 ) If f(l)eG (j) and I e S(j), gate I can substitute for gate J. Go to step 11. If f(j)eG (i) and Je S(l), gate J can substitute for gate I. Interchange the labels of I and J and go to step 11. Step 7 Find gates and/or external variables in CS(lJ) (blocks 1^-21) In this step, we check the fan-out of gates or external variables which are connectable to the merged gate IJ as in condition 2. In block 15, if gate or external variable Kg P(l) U P(j), the fan-out of gate or external variable K is not checked. Otherwise, the program goes to block 16 and the fan-out of gate or external variable K is checked as follows: (a) For K which is an output gate. If LISUCC(K) > F00, gate K is not considered. (b) For K which is not an output gate. If LISUCC(K) > FO, then gate K is not considered. 3* (c) For K which is an external variable. If LISUCC(K) > FOX, external variable K is not considered. Gate or external variable K can be a gate or an external variable in CS(lJ) if and only if the above cases and the following cases hold. (Blooks 17-20) a) Ke S(I) U S(j) U I U J b) f(K)sK(U). Step 8 Check the realizability of the merged gate IJ (blocks 23 and 2k) If CS(IJ) = or Vf(K) 4 G (IJ), go to step 3- KeCS(l) L Step 9 Reduce the number of gates and/or external variables in CS(lJ) ~ by finding SETOFK (block 25) Step 10 Check the fan-in of the merged gate IJ (block 27) If the number of gates and/or external variables in SETOFK exceeds the fan-in limit, gates I and J are not merged. Go to step 3« Step 11 Store the information on the original network (blocks 28 and 32) In this step we have to store all the information on the original network before merging. We set up two arrays called "Q" and "TEMP". The information on network configuration will be stored in the array "TEMP" by transforming the contents in array "INC^MX" (TEMP= INC$MX). The CSPF's of the original network are stored in the array "Q" by transforming the contents in array "GSMA.LL" (Q = GSMALL). If gate I can be substituted for gate J or vice versa, go to step 13. Step 12 Construct the merged gate (block 29) Disconnect all inputs of gate I and connect all gates or external variables in SETOFK to gate I. 35 Step 13 Substitution (block 30 ) Disconnect all outputs of gate J and connect gate I to IS(j). The resultant network still realizes the specified function(s) but does not necessarily satisfy the fan-out restriction. Step 14 Update the information on the new network (blocks 33, 3*4-, and 35) Step 15 Recalculate CSPF's (block 36) In this step CSPF's of the new network are recalculated by calling subroutine MINI2. Since subroutine MTNI2 also realizes the pruning procedure, it has the capability to remove some redundant connections. Therefore, after this step some connections or gates may be removed from the network. Step 16 Check fan -out problem in the new network (block 38) In this step, we check the fan-out of the merged gate and the fan-out of every gate and external variable that is connected to the merged gate. If there is any fan-out problem in the network, go to step 17. Otherwise, go to step 2 and the procedure will be repeated again for the new network. Step 17 Restore the information on the original network (block 39) Since there is a fan-out problem in the network after merging, we have to go back to the original network by restoring the information about the original network. This can be done by setting INC$MX = TEMP GSMA.LL = Q, In order to get all the lists of successors, predecessors, and detailed information on the network configuration, subroutine SUBNET is called in block k-0. The truth table is calculated again by calling 36 subroutine FVALUE in block kl. Go to step 3 to examine the next pair of gates. Version III . This version is very similar to Version II. The method of checking the fan-in and fan-out of gates and external variables in this version is the same as that in Version II. The only difference is that in this version, instead of connecting all gates and/or external variables in SETOFK to the merged gate, we connect all gates and/or external variables in the connectable set to the merged gate. The effectiveness of this version depends mainly on the power of the pruning procedure in subroutine MINI2. The reason is that the connectable set may contain some redundant gates or external variables and the number of gates and/or external variables in the connectable set may exceed the fan-in limit. If after calling subroutine MINI2 and removing some redundant connections the number of gates or external variables that are connected to the merged gate still exceeds the fan- in limit, the gates cannot be merged. The way that the program checks the fan-in and fan-out of gates or external variables is the same as conditions 1 and 2 in Version II. The program also does not check the number of gates and/or external variables in the connectable set before merging. Therefore, in this version, after merging any two gates, the network may have both fan-in and fan-out problems. This requires the program to check both the fan- in and fan-out of the merged gate and also the fan-out of every gate or external variable that is connected to the merged after merging any two gates and subroutine MINI2 is called. If there is any fan-in or fan-out problem in the transformed network, we have to go back to the original network before merging. 37 This is the same as version II in that all the information on the network has to be stored before merging so that we can come back to the original network when there is any fan-in or fan-out problem in the transformed network. The flow chart of this version is given in Figure 2.3.5. The procedure in this version is very similar to the procedure in version II. The procedure follows the same steps as in version II except in steps 9, 10, 12, and 16 which will be discussed in the following . a) Since in version III we connect all gates and/or external variables in CS(lj) to the merged gate I J, we do not have to find SETOFK, and step 9 is skipped. b) In version III, the program does not check the number of gates and/ or external variables in CS(u) but simply connects them to the merged gate IJ; therefore, step 10 is skipped. c) In step 12, instead of connecting all gates and/or external variables in SETOFK to the merged gate IJ, the program connects all gates and external variables in CS(lJ) to the merged gate IJ as shown in block 27 in the flow chart of version III. d) In step 16, not only the fan-out of the merged gate IJ and the fan-out of every gate or external variable connected to the merged gate IJ are checked, but also the fan-in of the merged gate IJ has to be checked. If there is any fan-in or fan-out problem in the new network, gates I and J are not merged. This is shown in block 36 in the flow chart of version III. 38 n ii CALL PVALUI « CALL BUBfIT Figure 2.3.5 Flow chart of Version III of modified subroutine GTMERG 39 2.k Evaluation and Experimental Results of the Three Versions of Modified Subroutine GTMERG In order to evaluate the efficiency and effectiveness of each version of these modified subroutines, we run some examples of fan-in and fan-out restricted networks and study the resultant networks in terms of cost (number of gates, first, and connections, second) and computation time. We have to compromise between these two factors in order to decide which version is the best. In one version, we may obtain networks with lower costs but it may require longer computation time. In the other, networks with reasonably low costs may be obtained within a shorter computation time. Moreover one version may be considerably good for particular examples while another version may be good for other examples. In this section, the results of the experiment which show such a comparison of these three versions of the modified subroutine GTMERG are given. The organization of the program that was used to run the experiment is different from the flow chart of NETTRA-GJ5-FIF0 in Figure 2.2.1. The difference is only the change in the order of the subroutines which are called by subroutine MAIN. The order of calling subroutines in the program that was used to run the experiment is given in Figure 2.k.l. The program needs three additional subroutines NOKNET, FROCII, and FIFO for the experiment. Notice that subroutines MINI2, SUBNET, and OUTPUT are still used in the program and that they are called according to the flow chart in Figure 2.2.1. The functions of these three additional subroutines are briefly described as follows: NORNET is the name of a subroutine which synthesizes a network realizing a given set of output functions using a universal network as ko NORNET PROC FIFO GTMERG C sTop ) Figure 2.4.1 The organization of the program that was used to evaluate the effectiveness of the three versions of modified subroutine GTMERG in an initial network. (it should be noted that there are many other networks which can be used as an initial network. One example is the three-level network based on the minimal sum of products.) NORNET was used in this experiment because it is simple and fast. One problem with NOKNET is that synthesized networks tend to have a large number of gates and connections. PR PC I I is the subroutine used to remove redundant gates and connections in an initial network. It also has the capability of adding connections to some gates in order to remove others. The detailed discussion of the procedure in subroutine PROCII is beyond the scope of this paper and it is not necessary for the reader to know about subroutine PROCII in order to understand the subject dealt with in this paper. FIFO is the set of subroutines used to transform the network such that it satisfies the fan-in and fan-out restrictions. For details of these subroutines, see [7]. Thus the action of MAIN in the program in Figure 2.^.1 can be summarized as follows. NORNET is called to provide an initial network and PROCII is called to remove redundant gates and connections in the network. The network obtained from this step does not satisfy the fan-in and fan-out restrictions. Therefore, FIFO is called to solve the fan-in and fan-out problems in the network by adding more gates and connections. Subroutine GTMERG is then called to transform the network by the "merging of gates" procedure. Usually the network obtained by FIFO contains more gates and connections than the one in the previous step, since some additional gates and connections must be added in order to satisfy the fan-in and fan-out restrictions. From the experimental k2 results we will see that the modified subroutine GTMERG can eliminate many gates and connections from the network obtained by FIFO. As a matter of fact, networks obtained by the program shown in Figure 2.4.1 can be reduced to a better one (in terms of the number of gates, first, and connections, second) through iterations, as we will see in section 4.1. The purpose of the experiment in this section is only to compare networks derived by different versions. Therefore, iteration of the program is not necessary. The experiment was performed with IBM 360/75. Forty-five examples have been chosen randomly. Among these forty-five examples, there are 5~* 4-, and 5-variable functions, some of which are multiple- output functions. Table 2.4.1 shows the results of the experiment of these forty-five functions with the maximum fan-in and fan-out restrictions of three. The cost of the network is defined as ( 100 x R ) + C where R is the number of gates and C is the number of connections. Thus a network with ten gates and fifty connections, for example, has the cost of 1050. The first column labeled "initial network cost" is the cost of the networks obtained by FIFO, satisfying the fan-in and fan-out restrictions. Each of the second, third and fourth columns has two subcolumns which show the computation time in centiseconds and the cost of the resultant network derived by each version. The computation time in this table is the time used for modified subroutine GTMERG only. The results in Table 2.4.1 are summarized in Table 2.4.2. The first column shows the average time per function which is used to derive a network. In the second column, the number of the lowest cost 43 EH -4 LTN VO ON 3 H O CO »- OJ ON t- ON H UA CO O tr- J- J- UA CO OJ H OJ H KN H H H KN OJ OJ KN KN KN OJ OJ J- OJ UA VO H O 3 CO 3 ON VO UA UA CO t- VO UA -4 ON -4 co UA H UA 3 [— _4 H O H H H H H H H H H OJ OJ KN g •H CO ' — > fc o CD > H co H -4 OJ -4 UA O UA UA UA ON r— OJ ir- UA CO -4 O ON UA OJ O S *H D— -4- UA VO H H CO H -4" -4 OJ ON C— CO ON VO UA H HI -P 0O H NA H -4 H H H VO En 3 CD H -4 OJ OJ o "-^ EH J* UA VO ON S H O CO CO OJ KN [— VO H UA CO CO t— -4 VO VO CO 0J H OJ H KN H H H KN UA OJ KN KN KN OJ H _4 OJ UA VO o % CO 3 ON VO UA UA CO [— ^ 0- -4 c— -4 CO -4 ON UA % ON VO H H o H H OJ H H H H H OJ OJ KN. £ O •H CO >- — ^ £h o CO cd > @ co UA -4 o ON LTN -4 -4 UA O OJ VO -4 ON ON t— UA t— EK OJ ON ON S «H o OJ OJ 0J H H UA t— OJ ON % O- H OJ t- t- t- H -P -4 CO H H H UA ON EH £ CI) o EH -4 UA VO ON 21 H O CO l>r KN VO t- CO KN UA CO CO t- 0J UA J" CO 0J H OJ H KN. H H H KN UA 0J KN KN ro OJ H -=h OJ UA vo O ?j CO a ON VO LTN UA CO t~ ^3 ON -4 ON UA co -4" ON UA o CO -4 o H H OJ H H H H H OJ H OJ KN H £ O •H co > v M o CD CD > H w UA -4 o 0- -4 UA UA c- O -4 -4 OJ UA UA MA UA o EK -4 KN O *>< «H C— OJ OJ OJ H H UA H OJ ^ VO KN KN KN VO O UA H -P KN CO H OJ H t— H Eh iH H CD O H .* 03 bi -p * H ° to •H -P " CO) CO UA CO VO 3 H OJ q O- CO H OJ O O- H UA KN t- t- UA O UA H OJ OJ KN OJ H H KN CO KN UA -4 -4 KN OJ -4 KN 0- CO UA CO -4 KN C— UA o CO CO ON VO VO CO UA KN CO 3 UA O KN VO KN H H H H H -4 H OJ OJ OJ H OJ OJ J- -4 •H fl H OJ KN -4 UA VO l>- CO ON O H S KN -4 UA VO t*r CQ ON O H H H H H H H H H H OJ OJ H H ti O •H n CD > E-t CO O O o 0) H w H -P En £ CD O v£>vOOLArACOHr-coCMvo.-d-H _3- K\UA[0*ir\hr\UA_H/ L^ -=}- VO la _=*- _-j- f^^_ir\oO ON c~- vo la o vD &— O CMHCMHCMr-lCMCM-=t-CMKNCMCM LA LA LA fA NO C— C— LA LA _H^ ON O ON t^ NO 00 ON H NO KN. 0J KN CM H ff> lA K"; (A Ol ai LA CM H ON ON (A C\| 0\ A ^ 0J KN. VO O H CM o o\ -4- h- on VO H 00 00 VO CM _-t as ON O -* VO 8! VO KN. vo o J$ C7N a) H VO vo -H- vo vo CM KN H CM CM IA ON H in ON NO IT. la _h^ O in ia H o ir, CM ia t- A IA O VO 4 r-\ r-1 K~\ r~\ K~\ CO •H ■s O H 0J Eh EH CO O O CJ a> H ra H +3 Eh fl CD O VO VO LA ia J- CD ON t- On CM NO 4- H J- |A\LAfO,Lr\IAJ-4-^D4-VO Lrv -3; ^J- f- H LTN CO CO J" NO L^ O NO t— O CMHKNr-ICMr-ICMCMKNCMKNCMCM CO CO 1A A A rl NO A H Ol LA LA LA [T; NO t>- L"- LA LA .H/ + ONO ON 1^ NO CO O H NO KN 3 CMKNCMHKNKNJ-KNCMCMCM C— f- CO O KN O KN 00 ON CM CO CM H CM LTN NO CM o kn r— KN OO H h- LAN C— h- H H -=t- CM o KN CM H a) VO J- kn ON CM -3- V0 H CM CM ON VO O LAN CM C— KN _Hr H -4- _=h O H VO O C7 tA ON Ol H -d" CO KN 00 EH CO o O O CD H P EH £ CU o vovOCMLrN_H-ooOt^-HCMOO-=t-HcocOLrNLrNLrNH _=)- f^ LA |Ai LA KN LA J- L>- -4" VO LIN J- LA LA LA IA VO t~ J" t— CO LTNCO ON_HrVD O OCOCO O ONO ON h NO 0O cmhcmhcmhcmcm-=i-cmk>cmcmcmkncmh KN LA H CM J- C- LA LA jj- J- t— H VO KN GJ KN KN KN KN CM CM CM -HrLACML— ONOOOiH VO0NKNH|>-CMt-CM H CM 00 VO CM KN -4 LA t— LA K\ t— LA VO ON LA J" O CM KN LA H H o CM O LA O CM -4 K— -4 H CM CM H VO LA VO VO 00 CM VO LA H C-- VO J- 0J -Hr ON _=r VO KN H M •H O ■P £ •H -P fl CD •h a p VO r- h- LA KN 0O CM VO w LA -3- -d- kn r— -4- V0 r— O O co CM LA o vo -4- ai o KN CM -H/ H ^t- CM KN _=h LA H On La co -=f H _4 LA IA -d- CM KN -=f- KN h 4 NO NO O KN -4- -=h -4" CM KN KN LAONVO L^VO KNKNONl LArAD— t-00 t— t— LA f- OnH CM -=h 00 ON H CM KN CM OJ J- J- J" IA» J- IA\ . CMKN-d-LAvOL^COONOHOJKN-d-LAVOO-COONO CM CMCM CM CM CM CM CM KNKNKNKNKNKNKNKNKNKN-d- H CM KN -=* J- -4" J" -=t" ^5 Table 2.1*-. 2 A measure of efficiency and effectiveness of the 3 versions of subroutine GTMERG Average time per function (centisecs) No. of the lowest cost networks derived by each version No. of networks with equal cost, but less time, derived by each version Version I 32^.20 3 5 Version II 313-3^ 1 16 Version III 900.00 3 NONE k6 networks derived "by each version is obtained by counting the number of networks with the lowest cost among the three versions. The cost of a network in this table is defined as the number of gates, ignoring the number of connections. In other words, if the cost of a network derived by version I is 2530 and the cost of a network derived by version II is 2527, we say that version I and version II both derive the same cost network. In the third column, the number of networks with an equal cost but less computation time is obtained by counting the number of the networks which have as low a cost as the networks derived by the other versions but take less computation time. For example, for function 15 in Table 2A.1, the three versions derive network with the same cost of 1835 but the computation time of version II is less than the other two versions. Therefore, it is counted as one of the 16 functions listed in the third column for version II. The computation time in the experiment is obtained from the timing subroutines STIMEZ and KTIMEZ. From Table 2.4.2, we can conclude that the program of version II is more effective and efficient than the other two versions. This is because it can derive networks with less average computation time (almost three times less than version III), as shown in the first column of Table 2.4.2. Even though it can derive only one lowest-cost network, it can derive 16 networks which have as low a cost as those derived by the other two versions but require less computation time. This means that among forty-five functions, version II can derive 17 networks with the lowest cost and less computation time while version I can do this for 8 functions and version III for only 3 functions. In chapter k, we will have more experimental results of version II of the modified subroutine GTMERG. ^7 3- MODIFIED PROGRAM NETTRA-PG1-FIFO 3.1 Original Program NETTRA-PG1 In this section, we will discuss another transduction procedure called "substitution of gates". It is realized by the FORTRAN program designated as NETTRA-PGl [2] which is one of the transduction programs' in the system. The name "NETTRA-PGl" means that the program realizes both the pruning procedure and the general procedure. The program was originally studied and implemented into the FORTRAN program by J. Culliney [k]. The generalized organization of the program NETTRA-PG1 is shown in Figure 3«1«1« The program consists of subroutines MAIN, PROCIP, MINI2, SUBNET, OUTPUT and SUBNET. Two system-supplied timing routines STIMEZ and KTIMEZ are also assumed to be available but if they are not, their use is omitted. Subroutines MINK, OUTPUT, and SUBNET are common subroutines in the transduction programs. They are the same as those discussed in section 2.1. An arrow from block i to block j means that the subroutine represented by block i calls the subroutine represented by block j. The pruning procedure using CSPF's is mainly embodied in subroutine MINI2 and the "substitution of gates" procedure is in subroutine SUBSTI. Subroutine PROCIP controls the calling sequence of two subroutines MTNI2 and SUBSTI. The flow chart of PROCIP is shown in Figure 3.1.2. Subroutine PROCIP is called by MAIN. If an appropriate flag has been set by MAIN, PROCIP always bypasses the calling of subroutine SUBSTI and loops around in k8 PROCIP * — ^ MINI 2 SUBSTI SUBNET STIMEZ KTIMEZ Figure 3.1.1 Organization of the program KETTRA-PG1 ^9 C START 3 1 ]>_ CALL MINI2 YES ■** CALL SUBSTI I Figure 3.1.2 Flow chart of subroutine FROCIP 50 block 1, 2, and 3 until the network can no longer be improved by- subroutine MINI2. If a flag has not been set, subroutine PROCIP alternates the calls of subroutines MINI2 and SUBSTI until no further improvement in the network can be made. This flag is tested in block 2 in Figure 3.1.2. The network transformation procedure in program NETTRA-PG1 is mainly performed by subroutine SUBSTI. Subroutine SUBSTI is quite simple. It merely tries to substitute the combined outputs of the other gates or external variables in a network for the connections of the output of gate I to other gates. If it succeeds, gate I can be removed from the network. One example of the transformation performed by SUBSTI is shown in Figure 3«1»3« Suppose that the network in Figure 3«l»3(a) resulted from the application of MINI2, and the CSPF's have already been calculated. Assume that G (i), G (J ), and G (j ) are (1**0110*), (*0*0010l), and (1*10100*) respectively. The outputs from gates J., and J have "necessary-0's" [2] in the same positions as the output from gate I. Therefore, the outputs from gates J and J can be substituted for the output from gate I [2] [k-~\. This is done by subroutine SUBSTI, resulting in Figure 3 -l* 3(h). After subroutine SUBSTI replaces the connections of the output of one gate with the outputs of other gates in the network, it immediately returns to subroutine PROCIP for another application of subroutine MINI2. The reason why subroutine SUBSTI does not continue trying to remove further gates is that, after one gate is removed, a considerable amount of stored data (e.g., CSPF's of gates and external variables and network configurations) must be updated. 51 x, x 2 x 3 SUBNETWORK =S>-' SUBNETWORK -f, *f* • • — TTNd • „ f — ,jV° — TT^o ^ [ IT — ihs Xi x 2 x 3 (a) Original network Xi x 2 SUBNETWORK n> -)*>- SUBNETWORK ^ ^ x 3 i 1 — ) K D° — • • — TTnd— • »> — £jV° l 1 Tj^yv.. , - Xj x 2 v X 3 fi 'm (b) Resultant network Figure 3.1.5 Example of transformation performed by "SUBSTI" 52 The flow chart of subroutine SUBSTI in NETTRA-FG1 is shown in Figure 3.1.4. The procedure in subroutine SUBSTI (described in [2] and [k]) is briefly summarized as follows: Step 1 (initialization) Set I = NM + 1. Step 2 Increase I by 1. If I is an isolated gate, repeat this step. Otherwise, go to next step. If I > NR, return to the calling subroutine. Step 3 Determine necessary-1* s and necessary-O's in G„(l). (See [2] and [k-].) A necessary-1 in G p (l) is an entry in the i h position of vector G C (I) = (G^I), G^ 2) (I), ..., G ( c 2 kl)) such that G;, = 1, where i takes the integer values 1, 2, 3, •••, 2 . A necessary-0 in Gp,(l) is an entry in the i th position of vector G r (D = (4 l] (T) t G^ 2) (I), ..., G^ 2 \l)) such that G^ = 0. Step k- Find SU(l) which is defined as follows: SU(l) is the set of gates and/ or external variables which can substitute for gate I. For a gate or an external variable J that can be substituted for gate I, the following conditions must be satisfied. (a) JeS(l) (condition for a loopless network) (b) f(j) < G C (I) The symbol " > " is the vector comparison where * > 1 or and 1 > 0. Thus (*101*Oll) is greater than ( 10011010 ), and this can be written as ( 10011010 ) < (*101*01l). We can easily see that for any 53 DETERMINE NECESSARY-O'S AND NECESSARY-1'S IN G C (I) J =0 J = J + l YES YES •( RETURN J MAKE SUBSTITUTION BY DISCONNECTING I FROM THE NETWORK AND CONNECTING ALL GATES eSU(l) TO IS(I) Figure J>.l.k Flow chart of original subroutine SUBSTI in NETTRA-PG1 5h f(j) to satisfy f(j) 1, and 8 are the necessary-1's in which are indicated by the arrows above the positions as shown in the above table. Now suppose that gates J, K, L, and M have the output functions as shown in the table. We can see immediately that gates J, K, L, and M are in SU(l). Since f(j) v f(K) V f(L) V f(M)eG c (l), SETOFJ exists. To determine SETOFJ, we first select gate J because f(j) covers the largest number of the necessary-1's in G (i). After gate J is selected, we do not consider positions 1, 3, h t and 5 again. Next, gate M will be selected because f (M) covers the largest number of the remaining necessary-1's (positions 7 and 8), and all necessary-1's in Gp(l) have been covered. Therefore, gates J and M are in SETOFJ. We can see that f(j) v f(M) eG (i). It shows that the combined outputs of gates J and M can be substituted for gate I. In this way, it helps 61 to solve the fan-in problems of the immediate successors of gate I, since we do not have to substitute all gates and/or external variables in SU(l) for gate I. Notice that SETOFJ is neither an irredundant nor a minimal set. 3.3 Variations of Modified Subroutine SUBSTI In this section three different versions of the modified subroutine SUBSTI are discussed. The main features of each version and the differences of the modification in each version are considered along with flow charts. Version I : The modification of subroutine SUBSTI in this version is simple. It is more or less the same as that in version I of subroutine GTMERG. The main purpose of the modification is to reduce the computation time of the program by removing redundant gates quickly. This is done by checking the fan-in and fan-out of a gate under consideration and the gates and/or external variables to be substituted for that gate prior to the substitution in order to make sure that there will be no fan-in and fan-out problems in the network after substitution. This is done in the following manner: Suppose that we want to substitute for gate I. 1. If the total sum of the fan-out of any other gate or external variable and the fan-out of gate I is greater than the fan-out limit, the former gate or external variable will not be considered as a gate or an external variable in SU(l). 2. If the sum of the number of gates and/ or external variables to be substituted for gate I and the fan-in of any immediate successor of gate I exceeds the fan -in limit, we cannot substitute for gate I. 62 In this version, the number of gates and/or external variables to be substituted for gate I is the number of gates and/or external variables in SETOFJ. These two conditions will be checked before substituting for any gate I. They have to guarantee that after being substituted for gate I, the fan-out of the gate or external variables that are connected to all immediate successors of gate I does not exceed the fan-out limit, and that the fan-in of all immediate successors of gate I does not exceed the fan-in limit. The flow chart of this version is in Figure 3*3 »1« Most of the blocks are identical to the original flow chart in Figure 3«1«3« Only some blocks have been added for checking fan-in and fan-out of gates or external variables. The modified subroutine SUBSTI can handle both fan-in and fan-out restricted and non-restricted networks. In the case that the network does not have the fan-in and fan-out restrictions, some unnecessary blocks are skipped and the program becomes the same as the original one. As shown in blocks 9 a nd 20, the program tests whether or not, the network has the fan-in and fan- out restrictions. If not, some blocks will be skipped. As can be seen from the flow chart in Figure 3«3«1, in the case of the fan-in and fan- out restricted network the program does not return to subroutine PROCIP after substituting for any gate. Instead, the program calls subroutine SUBNET to update a network configuration and calls subroutine MINI2 to recalculate CSPF's of a new network as shown in blocks 25, 26 and 27. Then, it comes back to the beginning of the program in order to search for other gates for substitution. The variable "flag" indicates the improvement in the network. At the beginning of the program, 63 f~ START J TIT 28 FLAG-0 I FLAG»1 I »NM + 1 29 YES 1 = 1 + 1 deter mire NECESSARY -O'S AND NECESSARY-1'S IN FIND GATE KcIS(l) WHICH HAS THE MAXIMUM NUMBER OF INPUTS 27_ CALL MINI2 26 CALL FVALUE 25 CALL SUBNET RETURN MAXA* FI -LIPRED(K) +1 J-0 J- J + I 2U MAKE SUBSTITUTION FIND SETOFJ ADD J TO SU(I) FLAG-1 f RETURN J Figure 3.3*1 Flow chart of Version I of modified subroutine SUBSTT 64 "flag" is set to zero. If there is any improvement in the network, "flag" is set to 1. The procedure in this version can be described based on the flow chart in Figure 3»3«1 as follows: Step 1 Initialization (blocks 1 and 2) Set I = NM+1 and flag = 0. Step 2 (blocks 29 and 30 ) Increase I by one by setting 1 = 1 + 1. If all gates are examined, return to the calling subroutine. Step 3 (block k) Determine necessary-0's and necessary-1's in G (i). Step k (blocks 5 and 6) This step finds the maximum number of gates and/or external variables in SETOFJ such that the fan-in of all immediate successors of gate I will not exceed the fan-in limit after substitution. MAXA denotes the variable which expresses this number. If gate K which is an immediate successor of gate I has the largest number of inputs, then MAXA. = FI - LIPEED(K) + 1 . To illustrate the importance of this number, let us consider the example in Figure 3»3»2 where the maximum fan -in and fan-out equals 3* Among all immediate successors of gate I, gate K has the largest number of inputs (LIPRED(K) = 3) as shown in Figure 3.3.2(a). Therefore MAXA = 3-3 + 1=1. It implies that in order to substitute for gate I, the number of gates and/or external variables in SETOFJ cannot exceed 1. Otherwise, after substituting for gate I, the fan-in of gate K will exceed the fan-in limit. Figure 3»3«2(b) shows the resultant network after gate J is substituted for gate I. 65 G>— CWI> E> M (a) Network before substitution BE>- U>- O E> 4r> £> (b) Network after substitution Figure 3»3«2 Illustration of finding MAXA 66 Step 5 (blocks 9-l6) In this step, we find SU(l) which contains gates and/or external variables that can be substituted for gate I. In block 10, the program checks the fan-out of gates and/or external variables that can be substituted for gate I as follows: (a) For J which is an output gate. If LISUCC(J) +LISUCC(l) > F00, gate J is not considered as a gate in SU(l). (b) For J which is any gate other than output gates. If LISUCC(j) +LISUCC(l) > F0, J is not considered as a gate in SU(l). (c) For J which is an external variable. If LISUCC(j) +LISUCC(l) > FOX, J is not considered as an external variable in SU(l). Gate or external variable J can be a gate or an external variable in SU(l) if and only if the above cases and the following cases hold. (Blocks 11-15) (a) JeS(l) (block 11) (b) f(j) < G c .(l) (blocks Ik and 15 ). Step 6 (block 19) Find SETOFJ as explained in section 3*2. Step 7 (block 23) Cound the number of gates and/or external variables in SETOFJ. If the sum is greater than MAXA which is found in step h, the program will not substitute for gate I. Go to step 2. 67 Step 8 (block 2*0 Make substitution by disconnecting gate I from the network and connecting all the gates and/or external variables in SETOFJ to all immediate successors of gate I. The resultant network still realizes the specified function(s) and satisfies the fan-in and fan-out • restrictions. Step 9 (blocks 25 and 26) Call subroutine SUBNET to update the information on the new network configuration. Step 10 (block 27) Calculate the CSPF's of the new network by calling subroutine MINI2. Set flag = 1 to indicate the improvement. Go to step 2 to search for other gates in the new network to be substituted for. Version II . This version is different from version I in such a way that the conditions used for checking the fan-in and fan-out are not sufficient to guarantee that the network after substitution will satisfy the fan-in and fan-out restrictions. The procedure in this version allows some gates and/or external variables whose fan-out exceeds the fan-out limit to substitute for gate I under a certain condition. After substituting for any gate I, subroutine MINI2 is called with the hope that some redundant connections may be removed, helping to solve the fan -in and fan-out problems of some gates or external variables. The conditions used in this version to check the fan-in and fan-out of gates and/or external variables before being substituted for gate I are as follows : 1. Among all gates and/or external variables that can be substituted for gate I (gates or external variables in SU(l)), the 68 program does not check the fan-out of gates or external variables which are the predecessors of gate I. If the fan-out of each other gate or external variable equals the maximum fan-out limit, it is not selected as a gate or an external variable in SU(l). 2. The program does not check the number of gates and/ or external variables that can be substituted for gate I. This is the number of gates and/or external variables in SETOFJ. The above two conditions are not sufficient to guarantee that, after substituting for any gate, the network will satisfy the fan-in and fan-out restrictions. Therefore, after substituting for any gate, we have to check the fan-out of gates or external variables connected to the immediate successors of gate I (due to the insufficiency of condition l) and the fan-in of all immediate successors of gate I (due to the insufficiency of condition 2). This requires the program to store all the information on the network before substitution (e.g., the network configuration and the CSPF's). If there is any fan-in or fan- out problem after substitution, all this information must be restored in order to get back to the original network before substitution. The reason why the program does not check the fan-out of each gate or external variable that is a predecessor of gate I is that, after substituting for gate I, the CSPF's of gates or external variables which are predecessors of gate I may change and result in removing some connections (see [1] and [2]). This sometimes helps to reduce the fan-out of some gates. Let us consider the example in Figure 3»3»3> where the maximum fan-in and fan-out is three. As can be easily seen, gate J can be substituted for gate I. But the total sum of the fan-out of gates I and J is four exceeding the 69 £> (a) Network before substitution =£>-• E> E> ^=E> (b) Network after substitution Figure 3.3.3 Example to show how the fan- out of a gate which is substituted for gate I can be reduced TO limit as shown in Figure 3»3»3(a)« However, after we substitute gate J for gate I, gate K can also be removed from the network as shown in Figure 3.3«3(b). This reduces the fan-out of gate J to three which satisfies the restriction. In condition 2, the program does not check the number of gates and/or external variables in SETOFJ before substituting for any gate I, because after substitution, subroutine MINI2 can sometimes remove some redundant input connections of some immediate successors of gate I (see [2] and [k-] for a detailed discussion of the procedure in subroutine MIWI2). This reduces the number of the fan-in of immediate successors of gate I. The flow chart of version II of the modified subroutine SUBSTI is shown in Figure 3»3»^» The procedure in this version can be described in the following steps. Step I (blocks 1 and 2) Set I = HM+.l and flag = 0. Step 2 (blocks 31 and 32) Increase I by one. If I is greater than HE, return to the calling subroutine. Step 3 (block k) Determine necessary-1's and necessary-0's in CL,(l). Step k (blocks 8-15) Find SU(l) and check the fan-out of gates and/or external variables in SU(l) as follows: In block 8, if gate or external variable J is a predecessor of gate I, the program does not check the fan-out of gate or external 71 f START J FLAG = YES *( RETURN J DETERMINE NECESSARY-O'S AND NECESSARY-1'S IN r. c (i). 11 5 J = ♦ 6 J = J + l FAN-TJJ 'AND FAN -OUT RE^-* 1 ^STRICTIONS^ ? to YES YES GSMALL = Q INC$MX = TEMP £_29_ CALL SUBNET J2. CALL PVALUE 18 FIND SETOFJ ADD J TO SU(I) 26 CALL MTNI2 J85. ^ALL PVALUE CALL SUBNKT -£L MAKE SUBSTITUTION 22 Q= GSMALL TEMP = TNC$MX MAKE SUBSTITUTION II 21 FLAG = 1 f RETURN J Figure 3«3«^ Flow chart of Version II of modified subroutine SUBSTI 72 variable J. Otherwise the program goes to block 9 and the fan-out of gate J is checked as follows : (a) For J which is an output gate. If LISUCC(J) > F00, gate J is not considered. (b) For J which is not an output gate. If LISUCC(J) > FO, gate J is not considered. (c) For J which is an external variable. If LISUCC(J) > FOX, external variable J is not considered. Gate or external variable J can be a gate or an external variable in SU(l) if and only if the above cases and the following cases hold. a) J/S(l) b) f(j) TEMP 26 CALL SUBNET 29 CALL PVALUE 25 CALL MINI2 2k CALL PVALUE 23 CALL SUBNET 22 MAKE SUBSTITUTION 21 Q* GSMALL TEMP - INC$MX MAKE SUBSTITUTION 20 HAG. 1 I RETURN J Figure 3.5.5 Flow chart of Version III of modified subroutine SUBSTI 76 discussed here in terms of cost (number of gates, first, and the number of connections, second) and computation time in the same way as they have been discussed in section 2.k. Finally, the best version will be chosen after going through the experimental results. The organization of the program that was used to run the experiment is shown in Figure J).h.\. It is almost the same as that given in Figure 2.4.1, except that subroutine GTMERG is replaced by subroutines PROCIP and SUBSTI. It also has three additional subroutines: NOPNET, PROCIP and FIFO. The action of the program is the same as that explained in section 2.k except that, after FIFO Is called to solve the fan-in and fan-out problems in a network, subroutine PROCIP and SUBSTI are called to transform the network. Since we only want to compare the resultant networks derived by different versions, the iteration of the program in Figure J.k.l is not necessary (see the next chapter for the iteration of the program). The experiment was performed on IBM 360/75- We used the same forty- five examples as those in section 2.4 with the maximum fan- in and fan-out of three. Table J.k-.l shows the results of the experiments. The cost of the network is defined as (lOOxR) + C, where R is the number of gates and C is the number of connections. The first column labeled "initial network cost" is the cost of networks obtained by FIFO. Each column from the second to the fourth has two sub-columns which show the computation time in centiseconds and the costs of the resultant networks derived by each version, respectively. The computation time in this table is the time used in modified subroutine SUBSTI only. 77 FIFO _j ! PRO •CIP I SUBSTI (stop) Figure J.k.l. The organization of the program that was used to evaluate the effectiveness of the three versions of modified subroutine SUBSTI 78 cu -C -p fe K> II o 0) h fl II -P H >Jpt. P XI >d •p a) •H !> i§ •H ^H H a; H TJ CO w § J*i CO ^ o - VO LTN l>- -* -d- CO H CO C- KN UN KN CO kn H OJ H KN H H H KN C-t CVJ -Hr KN KN KN H -d- 8! VO VO H O ON CD 3 O D— LTN LTN CO CO C— H -d; KA ITN O VO ON l?N CO -4- H O H H H r-\ -d- H OJ H OJ H 0J H KN KN M d o •H - — - CO w *H o CU cu |> W w O J* o\ LTN 0J UN o LTN OJ UN H Lf\ KN CO UN ON o a ON CO CO S *H rr\ K\ KN OJ H VO VO LTN CO -H/ OJ ON VO O ON 0J M -P 3 CO OJ OJ UN rH OJ H VO OJ EH C OJ OJ a> o EH -dr UN VO ON 0J H O CO c— VO o- c— CO rH CO H CO t— UN ON CO CO KN H 0J H H KN H H H KN t- 0J -d- KN KN KN H -d- OJ UN VO H O ON oo a O t— LTN LTN CO CO t— -=* -=j- VO KN O VD ON UN 3 0J CO 1— I o H H H H -=1- H OJ H 0J H OJ KN KN § •H CO 0) > o H -P CN -d- KN O OJ t- ON UN -d- -d- VO LTN o rr\ co 0- 0J D— ON H KN UN KN KN OJ VO -3- LTN KN H OJ ON VC CO KN OJ VO c— yQ OJ KN OJ H H H t- -d- EH £ OJ OJ CD O EH -d- UN VO ON 9 H O CO E-r CO o- t>- CO KN CO H CO tr- c— H -=f- CO KN H OJ H K\ H H H KN t— 0J -d- KN KN KN H -=l- OJ VO t- O KN CO 3 O tr- LTN LTN CO CO ON OJ -=t VO LTN O VC ON UN -* -d- 0J H O CJ H H H -d- H OJ H 0J r-\ OJ H KN -d- fl O •H CO s~^ in w CD V > 0> g CO O OJ CO KN ey LTN ON ON LTN ?l O ON o UN O O -Hr o UN O OJ ,>} »H H H H t- H LTN ON 0- c— OJ 0J VO KN KN H +3 H H KN 0J EH C CO o H M •H O ^ CO UN CO VO 3 H OJ o C-r CO H OJ o o- H UN KN c- C~ UN O -P g § •H -P g fl 0) ° UN H OJ 0J KN OJ OJ H KN CO NA LTN -d- -=f KN OJ -H- KN t— CO ir\ CO -=*; ^ t- LTN o CO CO ON VO VO CO UN KN CO ?1 LP\ O KN V0 KN rH H H H H -d- H OJ OJ 0J H 0J OJ -d" -4- •H fl H OJ KN -=P LfN VO £— CO ON O H ^H KN -* UN VO c~- CO ON O H H H H H H H H H H 0J OJ 79 H r-\ OJ vO UN UN CO kn c- CO KN r-\ OJ O CO UN OJ UN _H/ E^ vO OJ O KN o CO -H/ -3- vO KN UN kn -H/ -=T Lf\ -d" [— LfN -H/ ITN LTN UN N^v VO t— vO UN ,4- t^ 1— 1 o O OJ vo in ON CO kn VO ON OJ ON 00 o O ON VO t- -d/ H OJ OJ VO KN ON H H s •H M o OJ OJ kn H OJ H OJ OJ OJ OJ KN OJ OJ I^N OJ OJ H KN t OJ OJ KN , „ *H w (U o > rvi CO J- VO 3 -H O D— O -=f- r- -H/ ^ C- CO LTN KN H -H/ O o UN OJ VO O CO H CO VO [-- H OJ H rH H H OJ H i-H H OJ rH H H U Eh OJ OJ VO UN UN o\ OJ ON (^ t- -H/ CO o ^ -H/ UN VO VO VO ON UN OJ OJ o CO J- -H/ vO KN VO KN VO -4- t?7 -H/ C~ VO -d- uS UN K> VO UN (^ VO UN _H/ Sn o H kn vO UN UN O KN 00 H LTN O E— o o ON CO CO UN O ^t UN 00 KN H H g o OJ OJ KN H KN OJ KN OJ -H/ OJ -* I H w ^ ON VO un un VO CO OA t- H LTN LTN VO [- OJ UN LT\ UN UN o OJ KN KN VO «=E, »H H J" KN t- ON -H/ LTN CO OJ H -H/ UN (Ov OJ VO t— t— H CO rH -3" H VO CO H -P CO o\ -H/ -H/ t- J" ON OJ VO -H/ H -=)- o o K> KN UN O VO H OJ t- % EH £ 0) o OJ H KN H H H H H OJ rH H OJ Eh UN OJ un UN LfN VO o ON OJ LTN rCN -^- O CO VO UN VO CO VO ON UN O -4 o CQ -=f" -H/ vo kn VO -H/ VO -3" t~ -Hr t- LTN -H/ LfN UN UN N"N VO U^ t- VO UN s £ O 3- kn UN LT\ UN CO KN 00 ON -Hr ON O o C H CO CO VO -Hr UN VO H a o O OJ OJ KN H kn OJ KN OJ K> OJ KN KN OJ N"N KN OJ H KN OJ -H/ KN OJ OJ KN •H ^ — s W w h o CL) > W w o j± O UN O OJ -=h LfA O ON -H/ t- o O ON OJ ON -Hr H OJ OJ VO -4- ON S *H -* -H/ f- H H o D— K^ -d- O t- O ON N^\ H VO CO O OJ VO VO KN O t-- H -P H H OJ OJ H OJ LTN H H KN H H OJ UN OJ H J- OJ H EH C o H X a5 •H P •H £ w p ° ° VO c~- -H/ UN c- CO OJ v£) f EK H OJ KN -3- !0» UN ON VO t- VO KN KN ON t- UN -H/ t— KN £> -H/ VO c- ON CO Er -* 00 VO UN K> t- t— CO fc- tr L/N E- o CO OJ UN O vo -d/ OJ J" H -H/ o to» ^1" -H/ ON H OJ ^ 00 ON H OJ KN KN OJ -H/ rH -H/ OJ KN -H/ LfN KN -H/ -H/ OJ KN K> OJ OJ -H/ -H/ KN -=!■ KN J- •H a OJ KN -d" LT\ VO t- CO ON O H OJ KN -J- UN VO C- CO ON o H OJ KN -H/ UN OJ OJ OJ OJ OJ OJ OJ OJ KN KN KN KN m r.h, respectively. Section ^.1 provides the detail of the programs that were used to run the experiment. The results of the experiment are given in section k.2. Section k.3 offers some comparison and conclusion of the effectiveness of these two programs. In addition, section k.k discusses the capability of the two programs to handle networks which have incompletely specified output function(s). k.l Outline of the Programs Used in Running the Experiment The organization of the programs that were used in running the experiment in this section is close to the actual system that we use in designing NOR -gate networks. The organization of the programs that were used to run the experiment in this section for NETTRA-PG1-FIF0 and NETTRA-G3-FIF0 is given in Figures i+.l.l(a) and (b), respectively. The figures show the order of the subroutines which are called by subroutine MAIN. Subroutine SUBSTI is version I of the modified subroutine and subroutine GTMERG is version II of the m NORNET NORNET I j 1 — ► procii •« 1 * PROCE •* — 1 i ! \ FIFO FIFO \ *# I PROCIP * GTMERG I > y SUBSTI (^STOP ) , ! C" op) ** (a) 00 Figure ^-.1.1 (a) The organization of the program that was used to run the experiments for NETTRA-PG1-FIF0. (b) The organization of the program that was used to run the experiments for NETTRA-G3-FIF0 85 modified subroutine. Subroutines NORNET, PROCIP and FIFO are the same as those given in sections 2.4 and 3«4. The programs in Figure 4.1.1(a) and Figure 4.1.1(b) are different from those given in Figures 2.4.1 and 3-4.1 in that they have loops in Figures 4.1.1(a) and (b). Some subroutines are called several times in order to repeat the procedures until there is no further improvement. This helps to reduce the cost of network in each subroutine. For the sake of simplicity, from this point the programs in Figure 4.1.1(a) and (b) will henceforth be referred to as NETTRA-PG1-FIF0 and NETTRA-GJ-FIFO, respectively. The loops in Figure 4.1.1 marked with a single asterisk (*) are followed until there is no further reduction in the cost of network. Thus, for example, subroutine SUBSTI is called by subroutine PROCIP until it cannot further reduce the cost of the network, and subroutine GTMERG loops itself until there is no further cost reduction. The loops marked with two asterisks (**) are followed with a minimum of five iterations. If the cost of the network continues to decrease even after five iterations, the loop is continued until there is no further reduction in the cost of the network. Thus, the action of the programs in Figure 4.1.1 can be summarized as follows: NORNET is called to provide an initial network. PROCII is called repeatedly until there is no further improvement in the network cost. FIFO is called to solve the fan-in and fan-out problems in the network and gives the resultant network which satisfies the fan-in and fan-out restrictions. Then subroutine SUBSTI in NETTRA-PG1-FIF0 or subroutine GTMERG in NETTRA-GJ-FIFO is called repeatedly to reduce the cost of the network while maintaining the fan-in and fan-out restrictions. 86 k.,2 Results of the Computer Experiment Thirty ^-variable functions and thirty 5-variable functions using several different combinations of fan-in and fan-out restricted values were used as examples in the experiment. All subroutines were compiled using the FOTRAN-IV compiler level 21.7, opt = 2. Tables ^.2.1 through k.2.k give the results of the experiment. In each table, the column entitled "FUNCTION (HEXADECIMAL)" gives the hexadecimal representation of the truth of each function; for example, lj-AFl = 0100 1010 1111 0001. The cost of the initial network (universal network) derived by N0RNET for each function is given in the column labelled "ORIGINAL NETWORK (NORNET)". In all these tables, the cost is defined as (l000xR)+C where R is the number of gates and C is the number of connections. For example, a network with 33 gates and 79 connections has a cost of 33079- The columns labelled "NETTRA-PG1-FIF0" and "NETTRA-G3-FIF0" consist of three subcolumns. Subcolumn "FIFO" lists, for each function, the lowest cost networks derived by FIFO in NETTRA-PG1-FIF0 and NETTRA-PG1-FIF0. Subcolumn "SUBSTI" lists, for each function, the lowest cost networks derived by subroutine SUBSTI in NETTRA-PG1-FIF0. Similarly, subcolumn "GTMERG" lists, for each function, the lowest cost networks derived by subroutine GTMERG in NETTRA-G3-FIF0. Subcolumn "ITER" gives the number of iterations required (number of loops marked with two asterisks) in order to obtain the lowest cost networks. The costs in the column labelled "FIFO ALONE" are the lowest cost networks obtained by the program FIFO ALONE. The flow chart of the program FIFO ALONE is given in Figure U.2.1. The single asterisk (*) and double asterisk (*-*) have the same meanings as 87 cvj ii Ph II o o PH o II H Ph ^J •P •H £ o •H -P O > -P H OJ -=t- 0) H ■§ En O fin H Ph H g I EH Eh C5 En o Ph H On EH CO CO o H Ph o Ph H Ph I M H K O O g H EH O OJ NO OJ OJ OJ OJ KN KN -d- O kn O CO H H O H H H KN O O OJ LTN OJ o LTN o KN O OJ ^7 o H H H OJ o OJ OJ o H KN O CO H KN OJ o H CO OJ o t-r o OJ o 3 o CO _* CO ■-I t~- H OJ H Lf\ OJ O kn H KN OJ KN H OJ OJ KN OJ KN CM O O O o q O O o O o O O ON a kn CO H H J- -=t O MD H £1 H OJ H OJ H H H OJ H OJ kn OJ O -d- H -4- OJ O LT\ OJ OJ KN OJ KN OJ OJ -Hf OJ _* o KN O ON CO H O 3 -=f H H H H H KN -d- KN t— OJ OJ o O O O o o if\ O- H H -d- 21 OJ OJ OJ H H pq o a KN U O .-I .ON <1 H CO H O 9 LTN O H t- O o H NO o H H -d- O H LT\ o H KN CO ON KN O o o q H H H H h- t"- t- 0- H H H H Ph 3 g OJ O 3 KN CO O OJ -=h LTN ON OJ -4" r-J fe Ph r-l LfN Ph o CO pq KN -4" ON CO O 5j NO ON N LTN VO CO ON £1 KN KN KN O O OJ J* KN O KN OJ NO -=1- OJ LTN H O ON H OJ o 3 OJ o t- -=f C- O [— H H O KN CO CO H H H KN H KN KN KN H OJ OJ KN OJ OJ OJ 8! KN OJ O O O O O o O o O O o o O o ON H KN -Hr O H .3 OJ ON LTN CO ON KN O -=*: H H OJ OJ OJ H H H H H H OJ H OJ H Ol LTN O CO H -=}■ H KN OJ KN OJ OJ KN CVJ o o O o o O O H NO O ON KN H -=1- OJ H OJ H H OJ H H ON KN c— H ON OJ KN OJ CO ON ON H KN -=t- KN H OJ KN -d- OJ KN KN KN -d- cu O o O o O O O O O o O o o O -Hr OJ H -=f- NO CO L^ H LTN NO KN -3 OJ KN OJ H H OJ OJ H OJ OJ OJ KN H o H LfN o H o H LTN o H -d- 3 t- H ^T ^T H t>- \0 CO O ON Ph h Ph NO KN O CO NO CO H O ON _h> pq w [>- LTN 88 t3 % •H •P 8 O H CVJ CD H Eh Ph Eh H H H KN rH H H KN KN KN OJ H H H OJ H o Ph H fe \<~\ C5 00 J* KN fr- J* ON KN c- VO J" KN VO 00 ON VO O Fn H kn OJ H H OJ OJ 81 H 0J KN OJ H H H I H O O O O O O O O o O o O O 8 <^ EH O H 0J -d- O on oo J± .* ON VO O VO H 9 K H OJ H rH H H H H OJ H rH H EH H S O H CO vO -=h c- -* O KN KN ^P VO -d- 00 0O ON t- H K\ 0J H H KN OJ KN H OJ KN OJ H H H O O o O O O O O 8 o O o O O O H Jt LT\ H ON ON J± OJ VO OJ CO H 9 H rH 0J H H H rH OJ H H OJ H H H « Eh H H H H H OJ H OJ H LTN KN OJ H OJ KN H o PR H pq H H EH 00 ir\ KN VO _=h ON KN H IXN CO OJ VO 00 ON VO Ph H KN OJ . r^ H OJ OJ KN 8 OJ -=h 0J H H H i O O O O O o O O o O o O o O <£j pH H KN -4- VO ON co -d- O VO 00 CO t- H 3 O ffi CO H OJ H OJ H H OJ H H 0J H H H EH o Pn H Pq CO VO -=h VO -=*■ O KN KN VO 00 KN VO 00 ON t~- H kn OJ KN H KN OJ KN OJ 0J -=± OJ H H H O O o O O O O O o o O o O O O H -4- ir\ LTN ON ON _=h OJ t- CO ON t- H r^ H H OJ rH OJ H rH OJ H H OJ H H H FIFO ALONE C~7 VO ON CO -* O KN ON O OJ 0O ON °3 ON ^- H KN OJ kn H KN OJ -=t- OJ -d- -=h H H H H O o O O O O O o o o o O O O O H -=J- ON LTN o\ ON -d- -Hf r^ oo 0J KN H r^ o H CM H OJ H H KN OJ KN H H H § K 5 -Hr kn OJ LPs OJ VO LTN KN t— t— LTN KN c— V0 t- ORIGII NETWO (NORNI O O o O o o O O o o O O o O O H H H rH H H H H H H H H H H H r— t— c— C— D— c— E-- t- t>- C— t~- t- t- t-- t>7 H H H H H H H H H H H H H H H hH O -=j- g J$ C- 9 Pq ON a ON VO m O KN KN o C- CO t- O t— < ON o H KN O EH ^ KN o vo Pi t- H o KN § cO CO m E^ _d" ON Pq pq P^H O vo O o Q «J pq ON VO ON VO t- CO o\ O H OJ KN -=i- LTN VO E— 00 ON o s H H H H OJ OJ OJ OJ OJ OJ OJ OJ OJ 0J K\ 89 K Eh H H H na H H H NA H H H 0J H OJ r-J H o fa M fa 1 NA C5 KA -ft -=J- OJ OJ NA -Hr O OJ OJ 0J 0A VO OA -d" a B 0J H OJ na OJ H H OJ OJ OJ OJ H OJ 0J H i t^p o O o O o O O O o o O O o o O EH Eh o H 00 H UA iH o- t- O H OA 0A o 0A OJ H KA H VO o KA -Hr j* OJ OJ KA J* O KA 0J NA 0A V0 O ^J- fa H CVJ H OJ NA OJ H H OJ OJ OJ OJ H OJ NA H O O o o o O O o O O O O O o O O CO rc\ LfA H C— c— o O OA H OA 0J UA VO ■H H <-\ H H H H H « Eh H H H KA H H H NA H H H OJ H 0J H 1— 1 O Ph H | H H EH 02 KA -=t- -=t OJ OJ NA -H/ CO 0J OJ OJ OA VO CO -=h e OJ H OJ KA 8 H H H OJ OJ OJ H 0J OJ H O O ' O O O O O O o o O o o O ■ pH O 0O NA UA H C- e~ OA OA OA o CA a KA VO pS CO H H H H H EH S o fa H NA -=t -=t OJ OJ NA -=t CO KA OJ KA OA VO 0A -=J; OJ H OJ tO OJ H H H OJ 0J OJ H 0J OJ H O O O o 8 O O O O O O O o o O o CO NA UA C— t— OA O OA H OA a -=t- VO H H H H H H H NA -St -Hr CO OJ NA -=t OJ VO 0J NA O VO OA -4; OJ H OJ NA OJ H H NA OJ OJ OJ KA 0J 0J H O O O O o O O O o o O O o O O a CO ?l H OJ o H c- f- 3 H H OA H H ^r a 3 VO 2S EC H H ° fe UA o -Hr VO .=*■ UA NA CO OA KA -4- UA t- UA -H/ o o O o O o O o O O O o o o o P^i s s H H H H H H H H H H H H H H H C— t"- r- t— C— O- o- t- f- c— l>- t- t- t- t- H H H H H H H H H H H H H H H 5 SO , — ^ HH H H W VO UA OJ -4- O CO pq UA Pn O OA Ph fa E VO CO 3 H & na -4 OA P-4 CO VO f0 o < VO o R Ph CO O < CO V0 'S H o -H- £ <: OJ oa UA Pn VO OA fa VO -d- fa t- H OJ NA _Hr UA VO C- CO 0A o H 0J KA -* UA s H H H H H H *-* 90 « o M QJ •H -P O O OJ OJ (D H EH EH CO CO o H o F-H H C5 H K O O o H EH O F>4 OJ H OJ OJ OJ H O UN ON UN Ol H OJ o O o 3 00 CM H o Ol ["- t- UN ON O OJ vo -=h J* Ol H OJ rH OJ KN OJ H H H o O o O O O o o O O o vO ■s* vO KN UN o On VO VO H H H H H -rt- LTN ON h- H OJ H Ol O o O O fr- CM ON KN 3 o CM C"7 00 UN OJ H OJ VO -* -* QJ H OJ H KN KN OJ H H iH O O o O O O o O O O o VO LfN VO -=*" VO o ON VO V0 rH H H rH r-H OJ H OJ OJ KN H H -rt UN ON o H OJ H Ol O o O o C- CM ON ON 3 o 0.1 t- t- UN ON o OJ VO -=fc -=t rvi H OJ H OJ KN OJ H H H o O o O o O Q O O O o V0 -=t VO kn UN O ON VO VO H H H H H -+ UN ON O H OJ H 0.1 O o O o t- CM On ON 3 o Ol t-- 00 UN OJ H OJ VO -* -=h Ol H OJ H KN K\ OJ H H H O O o O O O o O O O o vo UN VO -H/ VO o ON VO VO H H H H H H *"> UN o E H OJ Ol O O o o h-l C— 3 o < rH VO o -=h 0- UN UN o OJ OJ VO -=t ^t Ol H KN H KN -=f- OJ H H <-i o O O O O O q o O o H VO t-r VO. -=fc KN H ON VO VO H H H OJ H -Hr O H t~ H KN Q CT 0JVO UNK>UNKNKNt~-UNhr\t- vo F>h CO H 00 ON H VO O OJ 9 H a H OJ P-4 VO o o OJ OJ ON KN KN OJ ON VO _=h ON OJ UN OJ vo OJ pq o pq ON OJ o H 00 OJ KN KN VO ON OJ KN O ON ON o KN 91 KN P^ O O Pn o P"H H P°h fj •H w o •H -P o a; H •H e i in !» -p •H kn CVl EH « Eh HH -H/ KN rH H LTN OJ LTN OJ LTN OJ -d- H -d- -d- KN g H P"4 N-\ C5 OJ On o vo OJ O LTN -=f OJ C— KN OJ ^t c— H C5 -Jr ltn -sf KN -=t- KN -Hr KN -d- KN LfN j^- vo _H/ KN I *9 O O o O O O O O o O o o o o o •^ Eh ON H ON t"- OJ KN OJ LTN H CO VO o OJ LfN KN Eh O H i<> H H OJ H OJ H OJ H OJ OJ KN OJ r-\ Eh o C— ltn H VD KN O H UN t- VO VO o VO o OJ fkn -d- vO -=h KN -=f- KN LTN KN -d- KN LfN _H/ VO LfN KN HH O O O O o O o O o O o o O o o fL, LT\ VO o tr KN KN VO r- -d- ON o H LfN r— KN OJ KN OJ H OJ H OJ H OJ H KN OJ KN OJ H « EH M OJ KN H KN OJ OJ OJ OJ KN OJ t- KN c— LT\ KN O P-H H Ph H J? H EH s ra H H o LfN KN o t- O ON ON OJ O Lf\ VO H Ph ir\ VO -d- KN -£ KN -d- -=f -d" KN -ct J- Lf\ -H/ KN I O o O O o O o O O O O O o o o i EH Eh VO -=f- ON C"r OJ KN J* O r— O OJ H CO U~\ _H^ OJ KN H H OJ H OJ OJ OJ OJ OJ OJ OJ OJ 1^ g o i — i 00 VO H tr- VO O ON H o o KN H LfN VO H LfN vO -=h io* -3- KN ■3- -=}■ LfN _H/ -d- LTN -Hf KN o o o o o O o O o o O O O o O U-t H c— o CO LfN KN VO H CO OJ _* OJ CO LfN -Hr KN KN OJ rH OJ rH OJ OJ OJ OJ OJ OJ OJ OJ H o H 00 F- H CO LTN O ■4 H o CO OJ KN LfN o OJ MS ltn VO -* KN -4" KN LfN -d- LfN -5F VO -* VO _=h KN o O o O o O o O o o O O o O O H ON o O -d- KN CO H CO t— -d- OJ Lf\ OJ -d- KN KN OJ OJ OJ H OJ OJ OJ OJ KN OJ KN OJ H RIGINAL JETWORK NORNET ) LfN LfN KN o H LTN UN o OJ D— VO H t— CO ?l O o o H o H o H o O o O O o KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN kn IA KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN KN o ^^ ^-> VQ CO KN O fe KN O O < W H Ph OJ -d- H l-H Pn r-i a -J- C— O o F>4 Q KN C- ON < PQ KN Fh ° y P Lr\ P-H OJ H H KN ON VO O Q P-H ON ON O ON Q ■gj LfN m CO VO o o H H pq VO -d- KN OJ O CO VO KN CO KN CO S t- c— j- LfN c— H & o « w VO CO P>H LTN Q W CO t- ON pq O Ph VO 9 Ph < ON pq P-4 VO < H 9 CO ON -Jr < f^H ON o .sj" CO PQ o t~ 4 OJ OJ OJ H NA OJ NA H OJ H OJ OJ OJ OJ OJ « Eh -=fr LT\ UA OJ -=t" VO UA NA H OJ NA OJ _=t UA -dr H O P>4 H 1 rH Ph H EH OA H H OJ H 00 OA OA NA VO CO CO CO OA _d- _d" -d" NA UA -d- UA NA _=h NA -d- NA -=t- NA UA CO O O O O O O O O O O O ' B UA O OA b- t- O H 00 VO C-r UA OA VO H 2 CO OJ OJ H H OJ OJ NA H OJ H OJ H OJ OJ NA EH I P=H H 1=4 H H UA OJ VO 00 O NA -d" CO OA OA OA O UA _H/ _d" NA UA -d- VO _dr UA NA -d- NA _* NA VO O O O O O O O O O O O O t— O OJ C— H C-t OA O CO o- O t— rH H OJ OJ OJ H NA OJ NA H NA H OJ OJ OJ OJ NA og £3 fc -d- OJ fc UA H VO NA -d" -d" OA UA O LT\ -H/ NA -=h « -=h UA NA VO NA -H/ VO VO O O O O O O O O O O O O O t- OJ c— H _d" -=*- OJ O CO VO O H UA H NA OJ OJ H NA OJ NA OJ NA H NA OJ OJ NA NA Is? " O d M y 3 & e « H S K g S 00 UA UA CO CO O 0A H CO CO CO t- O OA c— O O O O O H O H O O O H O O na NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA na NA NA NA NA NA NA NA NA NA NA NA NA NA O rt >—■ ^^ UA a NA FQ VO OJ CO Q VO CO CO H _=t- H 1-3 < VO O CO O VO OJ VO w v o o o C- H _^r H OJ H KN KN O KN H 00 KN O LTN H KN KN O H H OJ o VO KN O KN O -d- O E— H O -=*■ O VO OJ LfN o OJ OJ VO KN O kn H LfN o OJ OJ -d- o ON H LfN O H OJ ON kn O -=* H KN KN O KN CO kn O LfN KN KN O o VO in KN O o O o o VO KN LfN o KN OJ o -3- o -dr H OJ ltn o kn OJ OJ o o r- o o H KN O OJ H H kn o « OJ OJ OJ OJ OJ OJ OJ H En 02 CO O-H ONKNCOKN-d-LfNLTNO OJCO HO H -Hr ^,A(Otr\fT\4l04J- LfN m LfN LTN KN OOOOOOOOOOOOOOO ONH_H / KNLfNHL v -_3-ONVO OJ KN OJ OJ HOJHrHHHHHHHOJHOJOJ ?l O H r— H ON kn CO KN -d" LfN VO o LfN o OJ Ol .=* LTN KN KN KN kn -4- KN -d -d- LfN _d- LTN LfN o O o O O O O o O o O O O O ON H -=* rn LfN H t- -=r O VO KN -* kn Ol H OJ H H H H H H OJ H OJ H OJ OJ H KN O 3 o e f -1 p o ON H OJ UN o OJ OJ ON KN O -d- H CO KN O CO H CO KN O LTN KN KN O -Hr O VO KN O LTN H J* -4" O CO o -4- O 3 KN LfN O KN OJ VO KN o KN H OJ LfN o KN OJ KN LfN O LfN OJ H KN O H 1 LfN o KN KN KN LfN O KN KN KN KN O KN KN KN O H KN KN KN H O KN KN KN LfN H KN KN KN LfN o KN KN KN O H KN KN KN OJ O KN KN KN O KN KN KN O KN KN KN H O KN KN KN fc- O KN KN KN CO O KN KN KN 3 KN KN KN O H EH O VO LTN ON OJ P-H CO H P p o vo «: OJ KN ft cS VO P"H KN O -d- OJ LfN VO -4- KN VO ON KN O H CO CO CO S VO P o KN VO KN P-H ON -d C— O Ph ON Q CO LfN pq CO CO VO o m ON s H OJ H KN H LfN 9k & En o fa fa CVJ OJ KN CVJ KN -H- -d- CO ON ON ON VO ON O KN -H- .h- KN C\J -H- KN UA .h- -H- KN o O O o O O O O o o r— tr UA a rH ^ KN CVJ l>- KN H H H OJ rH CM CVJ r-\ H ON O cvj -H- VO e- ON KN ,3 -=f KN O o o o -H- i>- CO vO H ■H H H VO UA ON _h- -H- KN O o O C7N CO VO H H H ON CVJ o rH 1 ON o CO o KN KN O -H- VO l>- ON -H- -H- UA LTN -H- KN LTN |T\ -=J- -H- KN u o O O O O o O o o o H E"r ITN CVJ ON KN H jdr 00 CO vO CVJ H CVJ CVJ H H CVJ rH H r-i H 1 •H c o O -H- CVJ -H- ITS KN KN -H- -H- LTN -H- -d- KN UA KN -H- -H- KN o o o O O o O o O O O O o O O ON KN ^ KN H t- VO o ON KN H LT\ t— CO VO H cvj H H OJ H OJ OJ H H OJ H H H H o fa H fa O hH 1 VO -H- O ON KN UA O OJ OJ ON KN O VO H H KN O KN ON -H- o H OJ O -H- o o UA o KN CVJ ON -H- o o CVJ KN -H- o ON H KN KN O O UA o H CVJ C~- VO KN -H- O O LTN ON H H O UA OJ ON KN O VO H < g EH a g fa H g g M M O ffi S s 00 o KN KN KN UA O KN KN KN UA O KN KN KN 00 O KN KN KN OO O KN KN KN O H KN KN KN ON o KN KN KN KN KN KN CO O KN KN KN CO O KN KN KN CO O KN KN KN O KN KN KN O H KN KN KN ON o KN KN KN KN KN KN O H Eh O fa vo H t- H CO H ON H O OJ H OJ OJ OJ KN OJ -H- OJ UA CVJ vo OJ fa ON UA Q OJ _H- H _H- KN -H- CO 0J H fa UA OJ CO ON OJ Q O OJ OJ f- UA ON KN O KN 95 NORNET u PROCI i ! i FT ^^ r 1 rvj C stop j ** Figure if. 2.1 The organization of the program FIFO ALONE 96 in Figure U.l.l. All the networks in column "FIFO ALONE" satisfy the specified fan-in and fan-out restrictions. From Tables if .2. 1 through k.2.k, a general observation can be made as follows. The networks derived by subroutines SUBSTI and GTMERG generally contain considerably fewer gates than the networks listed under "FIFO". The networks listed under "FIFO" generally contain fewer gates than the networks listed under "FIFO ALONE". Moreover, the number of iterations to obtain the lowest cost networks generally is less than five. Some lowest cost networks can be obtained at the first iteration and there are few functions that require more than five iterations. This general observation gives support to the effectiveness of the program in reducing the cost of the network of subroutines SUBSTI and GTMERG while maintaining the fan- in and fan-out restrictions. In addition, the costs of the networks derived by subroutine GTMERG generally are lower than those derived by subroutine SUBSTI. k. 3 Comparison and Conclusion In this section, a comparison of the effectiveness of programs NETTRA-PG1-FIF0 and NETTRA-GJ-FIFO is made in terms of cost and computation time. The conclusion arrived at after comparing the procedures in the two programs to transform the fan-in and fan-out restricted networks is also discussed. Table h-.J.l shows the comparison of the effectiveness of these two programs. The table summarizes the results of the experiment given in the previous section. In Table k.J.l, the average time is the total average time used in deriving each network in seconds. All 97 w fl V0 (U cm O o3 ° -P r 2 • ri « OJ H |T\ H •H o H +3 CD CO ^1 O 01 H 1 ■POM Pi <+H -P O OJ OJ -=*■ OJ O CO ^ CD -P rv* • £ 00 GO • t- CA OJ CA CO OJ -* 9 <; oi X co X co X fl o Pi o a o S P O fa O h O P>H O fa 4j II .p II •H ,| • H II 4J II O O O O O O o o Pi ° PJ ° Pi O PJ ° 3 fa c ^ 3 fa p fa " II ^ II II ^ II • o • o • O . o Pi F"4 Pi h U fa Pi fa S ii £ II £ II o3 ., !> " 7 H 1 H 1 H 1 H -H- h -H- (in IT\ P<4 UA fa 98 time values are printed by the programs and they are measured by system-provided timing routines. The number of the lowest cost networks is the number of the networks derived by one program with a lower cost than the other. Table k.^.l shows, for example, that among thirty U-variable functions with FI = FO = FOX = F00 = 2, NETTRA-FG1-FIF0 can derive 2 networks with a lower cost than those derived by NETTEA-G3-FIF0; and NETTRA-G3-FIF0 can derive 15 networks with a lower cost than those derived by NETTPA-PG1-FIF0. For the other 13 functions, both of them derive the networks with the same cost. The average number of iterations is the average number of iterations required to obtain the lowest cost network. From Table k.3.1, it is seen that NETTRA-G3-FIF0 requires slightly more average computation time than NETTEA-PG1-FIF0 for all specifications of the fan-in and fan-out restrictions. Another interesting result is the number of the networks with the lowest cost. In the case that the fan-in and fan-out of the networks are more restricted (fewer number of fan-in and fan-out of gates and external variables is allowed), KETTRA-G3-FIF0 is more powerful than KETTRA- PG1-FIF0. For example, for ^-variable functions with FI = FO = F00 = FOX = 2, EETTRA-G3-FIF0 can derive 15 networks with a lower cost than those derived by NETIRA-PG1-FIF0 . And for 5-variable functions with FI = FO = F00 = FOX = 3* it can derive 20 networks with a lower cost than those derived by NETTRA-PGl-FIFO (see Table k.J.l). In the case that the fan-in and fan-out are less restricted (greater fan-in and fan-out of gates and external variables is allowed), such as if-variable functions with FI = FO = FOX = FOO = 3 and 5-variable functions with FI = FO = FOX = F00 = k, both of the programs can derive almost the same number of the networks 99 with the lowest cost. This shows the greater effectiveness of NETTRA-G3-FIF0 over NETTRA-PG1-FIF0 in the derivation of more restricted networks. Additional support for NETTRA.-G3-FIF0 is that the average number of iterations is less than that for NETTPA-PG1- FIFO. A major reason why NETTFA-G3-FIF0 is more effective than NETTRA-PG1-FIF0 is that in the "merging of gates" procedure, the output gates sometimes can also be merged to other non-output gates. In most such cases, some successors of a non-output gate can be removed after merging, whereas in the "substitution of gates" procedure we cannot substitute for an output gate. Another reason is that the "substitution of gates" procedure tends to create the fan-out problems of the gates and/or the external variables that are substituted for any particular gate, due to the large number of immediate successors of that particular gate. The procedure also creates the fan -in problems of the immediate successors of the gate to he substituted for, because the combined outputs of the other gates and/or external variables are substituted for only one input of these immediate successors. We have a different situation with the "merging of gates" procedure because all the original inputs of the mergeable gates are first removed and a new set of gates and/or external variables are connected to the merged gate. In most cases, after merging any two gates, gates which are connected between the two mergeable gates can also be removed. This helps to reduce the cost of the network very quickly while keeping the number of levels of the network down. However, when initial networks are far from optimal, NETTBA-PG1-FIF0 seems to work very well but when initial networks are nearly optimal, it does not improve them well. 100 On the other hand, NETTRA-G3-FIF0 seems to work well when initial networks are nearly optimal and also when initial networks are far from optimal. In any case, the given results indicate that the modified programs NETTEA-PG1-FIF0 and NETTEA-G3-FIF0 are the effective programs for synthesizing the fan-in and fan-out restricted networks within a reasonably short computation time. In general NETTEA-G3-FIF0 appears to he somewhat more effective than NETTEA-PG1-FIF0 even though it requires more computation time. k.k Networks for Functions with Don't Care An advantage of the network transduction procedures in NETTRA-PG1-FIF0 and NET TEA -G3 -FIFO is that they are capable of designing networks for incompletely specified output function(s). This is because the concept of compatible set of permissible functions on which the procedures are based on can easily handle incompletely specified function(s). Once the CSPF's of all gates and external variables are calculated for incompletely specified output function(s) [1], the rest of the procedure is the same as the case of completely specified output function(s). In this section, some experimental results on incompletely specified output networks under fan-in and fan-out restrictions are described. The programs that were used in running the experiment for NETTEA-PG1-FIF0 and NETTBA-G3-FIF0 in this section are the same as those in Figure lj-.3«l« However, we have to add the array "OUTSAV" to the programs in order to store the incompletely specified output function(s). 101 Su and Nam [6 ] presented, an algorithm to synthesize multiple output networks using NAND gates under fan-in and fan-out restrictions. An example of 4-variable, 4-output functions with FI = F0 = FOX = 2 and F00 = was used in their experiment. Their resultant network has the cost of 250*4-2 with the maximum number of levels of 6, assuming that complemented and non- complemented external variables are available as the network inputs. This network is given in Figure k.k.1* We used the same functions to test the programs NETTRA-PG1-FIF0 and NETTRA-G3-FIF0. Since both programs synthesize NOR -gate networks, we have to use the dual functions of Su and Nam's functions as given in Table k.k.l. That is, NETTRA-PG1-FIF0 and NETTRA-G3-FIF0 were used to synthesize a NOR-gate network, realizing the functions given by the NOR-truth table. By simply changing NOR gates to NAND gates, a NAND-gate network realizing NAND truth table (Su and Nam's functions) will be obtained. The results of using Su and Nam's functions as an input to NETTRA-PG1-FIF0 and NETTRA-G3-FIF0 are shown in Table k.k.2 with different specifications of FI, F0, FOX, and F00. Table k.k.2 shows computation time (in seconds), costs, and number of levels of the resultant networks. Since Su and Nam's resultant network has the specification of FI = F0 = FOX = 2 and F00 = 0, it is suitable to compare Su and Nam's resultant network with the networks derived by NETTRA-PG1- FIFO and NETTRA-G3-FIF0 under the same specification as shown in the first row of Table k.k.2. The resultant network derived by NETTRA- PG1-FIF0 has the cost of 22037 with the maximum number of levels of 7 as shown in Figure k.k.2. The resultant network derived by NETTRA-G3- FIFO has the cost of 20033 with the maximum number of levels of 8 as 102 o o « II -P o * S M cti 0) ^ CM ra " 3 fc » I! ■d O 3 H CO pt, I •H 103 Table 4.4.1 Su and Nam's 4-variable, 4 -incompletely specified output functions and the dual of the functions OUTPUT FUNCTIONS NOR TRUTH TABLE NAND TRUTH TABLE (Su and Nam's) z i Z 2 Z 3 h 000*1*1101*11111 011*1*1100110000 001*1*00001**000 001*1*0101111111 00000*0100*0*111 1111001100*0*001 111**0 1111*0*011 0000000101*0*011 Table 4.4.2 Results of networks derived by NETTRA-PG1-FIF0 and NETTRA-G3-FIF0 for Su and Nam's incompletely specified functions SPECIFICATION (FI,F0,F0X,F00) NETTRA-PG1-FIF0 NETTRA-G3-FIF0 COST NO. OF LEVELS TIME (SEC.) COST NO. OF LEVELS TIME (SEC.) (2,2,2,0) 22037 7 44.72 20033 8 54.81 (2,2,2,1) 22037 13 31.54 23038 10 34.15 (2,2,2,2) 20033 10 29.28 18032 10 20.24 lCA- -p to S H O " Ph O o fo [X| OJ 3 CO o I o <1> o En fe H II o CD -P a a -P H w a; O OJ OJ II -p w o o OJ J- H 1 o w i | •0 S P CM s Eh CO o o -H- t— NO ON ON co r— CO c— -4" Eh K\ K\ K\ [<~N KN KA KN KN KA Eh O O O O O O O O o pq o C\J H -* KN. K\ H KN H S CM 0J 0J CM CM CM CM CM CM o Ph H P«4 §3 • !> VD CO NO On 3 ON ?i O H CO H c5 Ph §3 H CO g EH EH W a EH CO o o _H- C— O K\ ON t- ON CM O KN rov m. -d- N"\ KN NA KN -=t -=!- O O O O O O O O o On 0J KA co CM o KN -4- -* H CM CVJ H CM CM CM CM CM Ph [x, Ph Ph Ph Ph Ph Ph Ph ^ v -H- tr c- t- & t— t— C- t- tr a N P R R R P P P p o KN K> N"\ N~N K*\ KN KN KN KN H EH 15 *" N • 3§ CO CO CO CO O O O O O pq CO PQ CO KA NA NA CM CM NA N"\ CM CM N"\ s — - EH K N CO CO CO CO o o O O O KA m CM CM KN m CM CM NA o W pq EH 3 b H Eh O ^S O O O O O O O O O s] 0J K> NA K> KN N"N K> KN m KN Ph Ph M to 1*1 Ph Ph Ph Ph Ph Ph Ph Ph O O C~- t— t- t- t- t- t- t~ t- pq s w o P Ph Ph Ph Ph Ph Ph Ph Ph Ph K H D— lf\ C— NO pT IS\ t- LTN t- -=* in NO E- CO ON O EH O 108 LIST OF REFERENCES [1] Kambayashi, Y. and S. Muroga, "Network transduction by permissible functions (General principles of NOR network transduction NETTRA programs)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinois. [2] Culliney, J. N., H. C. Lai, and Y. Kambayashi, "Pruning procedures for NOR networks using permissible functions (Principles of NOR networks transduction programs NETTRA-PG1, NETTRA-P1, and NETTRA-P2)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinois. [3] Lai, H. C. and Y. Kambayashi, "NOR network transduction by generalized gate merging and substitution (Principles of NOR network transduction programs NETTRA-G3 and NETTRA -G^)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinoi s . [k] Lai, H. C. and J. N. Culliney, "Program manual: NOR network pruning procedures using permissible functions (Reference manual of NOR network transduction programs NETTRA-FG1, NETTRA-P1 and NETTRA-P2)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinois. [5] Lai, H. C, "Program manual: NOR network transduction by generalized gate merging and substitution (Reference manual of NOR network transduction programs NETTRA -G3 and NETTRA-G^)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinois. [6] Su, Y. H. and C. W. Nam, "Computer-aided synthesis of multiple output multi-level NAND networks with fan-in and fan-out constraints", IEEE Trans. Comput., Vol. C-20, December 1971. [7] Legge, J. G., "The design of NOR-networks under fan-in and fan-out constraints (A program manual for FIFOTRAN-Gl)", Report No. 66l, Department of Computer Science, University of Illinois, Urbana, Illinois. [8] Kambayashi, Y., H. C. Lai, and J. N. Culliney, "NOR network transduction by error compensation (Principles of NOR network transduction programs NETTRA -El, NETTRA -E2, and NETTRA-3)", to appear as Report, Department of Computer Science, University of Illinois, Urbana, Illinois. 109 [9] McCluskey, E. J., "Logical design theory of NOR gate networks with complemented inputs", Proc. U"th Ann. Symp. on Switching Circuit Theory and Logical Design, pp. 137-1^8, 1963* [10] Hellerman, L., "A catalog of three -variable OR-LNVERT and AND- INVERT logical circuits", IEEE Trans. Electronic Computers, Vol. EC-12, pp. 198-223, June I963. [11] Nakagawa, T. and S. Muroga, "Comparison of the implicit enumeration method and the branch-and-bound method for logical design", Report No. ^55, Department of Computer Science, University of Illinois, Urbana, Illinois, June 1971* [12] Muroga, S. and T. Ibaraki, "Design of optimal switching networks by integer programming", IEEE Trans. Comput., Vol. C-21, pp. 573- 582, June 1972. [13] Lee, H. and E. S. Davidson, "A transform for NAND network design", IEEE Trans. Comput., Vol. C-21, pp. 12-20, January 1972. [1*4- ] Lai, H. C, T. Nabagawa, and S. Muroga, "Redundancy check technique for designing optimal networks by branch-and-bound method", International Journal of Computer and Information Sciences, September 197^ • BIBLIOGRAPHIC DATA SHEET 1. Report No. uiuc DC S-R -7^-688 3. Recipient's Accession No. 4. Title and Subtitle NOR NETWORK TRANSDUCTION PROCEDURES: "MERGING OF GATES" AND "SUBSTITUTION OF GATES" FOR FAN-IN AND FAN-OUT RESTRICTED NETWORKS 5. Report Date December 197^ 7. Author(s) Boonklee Plangsiri 8- Performing Organization Rept. No. 9. Performing Organization Name and Address Department of Computer Science University of Illinois at Urbana-Champaign Urbana, Illinois 6l801 10. Project/Task/Work Unit No. 11. Contract /Grant No. NSF GJ-40221 12. Sponsoring Organization Name and Address National Science Foundation 1800 G Street, N.W. Washington, D.C. 20550 13. Type of Report & Period Covered Technical Report 14. 15. Supplementary Notes 16. Abstracts This report presents two computer algorithms which can find minimal NOR(NAND) networks under fan-in and fan-out restrictions by using the concept of compatible set of permissible functions (CSPF's). These two algorithms realize the network transduction procedures — "merging of gates" and "substitution of gates", which are implemented into computer programs called "NETTRA-G3-FIF0" and "NETTRA-PGl-FIFO", respectively. Both programs have the capabilities in transforming a large non- optimal NOR network under fan-in and fan-out restrictions into a near-optimal one by reducing the number of gates and connections. The paper also includes the results of the computer experiments on these two programs. 17. Key Words and Document Analysis. 17a. Descriptors fan-in; fan-out; transduction; restrictions; merging of gates; substitution of gates; incompletely specified function(s); NOR(NAND) network synthesis. 17b. Idem if iets/Open-Ended Terms 17c. COSATI Field/Group 18. Availability Statement Release unlimited 19. Security < lass (1 "his Report) UNCLASSIFIED 20. Security Class (This Page UNCLASSIFIED 21. No. of Pages 115 22. Price FORM NTIS-35 ( 10-70) USCOMM-DC 40329-Pv l QCT ft>7 ,0 .7£ mm 3 0112088401598 I HBkHH Hfl wa i w Hi 2* • ■ I m H .'it**. ■ I I