t L I E> HAHY OF THE U N IVLR.SITY Of ILLINOIS 510.84 no. 226- 236 cop 2- The person charging this material is re- sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAIGN MAY 3 JUN V may MAY 4 19 38 L161 — O-1096 Digitized by the Internet Archive in 2013 http://archive.org/details/switchingmodeaud229sell V J. I iV Report No. 229 ~^?Vd-^i SWITCHING-MODE AUDIO AMPLIFIER by James E. Selleck June 1, 1967 w \mm qf we AUG 13 jy ba MUIY Of lUmflis Report No. 229 SWITCHING -MODE AUDIO AMPLIFIER 1 " by James E. Selleck June 1, 1967 Department of Computer Science University of Illinois Urbana, Illinois 6l801 Submitted in partial fulfillment of the Master of Science degree in Electrical Engineering, June 1967. ACKNOWLEDGMENT The author wishes to acknowledge the assistance given by Professor T. A. Murrell (thesis advisor). The Digital Computer Labo- ratory supplied the electrical components during the early development of the thesis model and printed the thesis. Department C15 (Subsystem Development) in Systems Development Division of International Business Machines Corporation in Poughkeepsie, New York developed the circuit design and analysis programs ASAP, ACOP, and SSNA and supplied com- ponents, laboratory facilities, and computer time for this thesis develop- ment. Miss Patricia Robinson spent the long hours typing the thesis. 111 TABLE OF CONTENTS Section F* a ge 1. STATEMENT OF PURPOSE AND INTRODUCTION 1 2. THEORY AND DESIGN 4 3. EXPERIMENTAL RESULTS 29 4. CONCLUSIONS 36 5. LIST OF REFERENCES 37 APPENDIX A 39 APPENDIX B 46 IV 1. STATEMENT OF PURPOSE AND INTRODUCTION The purpose of the paper is to show the system equations, design method, and a working model of an audio amplifier operating in the switching mode. The principle of complementary switching for an audio power amplifier was developed by Mr. A, G. Bose (See References 2, 3, and 4) of MIT Research Laboratory of Electronics. Mr. Bose used a non-linear forward path network and a linear feedback network, while this paper uses a local sawtooth generator for better linearity and for higher percentage of modulation. After a low power audio signal is converted to a single- edge modulated square wave, switching circuit technology is used to power amplify the resulting square wave. Finally, the amplified audio signal is recovered by using a detector. FREQUENCY CONTROL LOCAL SAWTOOTH GENERATOR IMPEDANCE TRANSFORMER AUDIO INPUT POWER AMPLIFIER SYMMETRY CONTROL LOUD SPEAKER DETECTOR LOAD FIGURE 1 SWITCHING-MODE AUDIO AMPLIFIER SYSTEM DIAGRAM A local sawtooth generator, with a frequency control, generates a linear ramp with a repetition rate about ten times the high- est audio frequency to be amplified. The impedance transformer pre- vents loading on the sawtooth generator thereby improving the linearity of the sawtooth ramp and drives the low input impedance summing cir- cuit. The summing circuit driving the complementary switch- ing power amplifier develops a square wave output. The symmetry con- trol adjusts the square wave output to the symmetrical state when no audio signal is applied to the summing network. When an audio signal is added to the sawtooth wave and the symmetry control level, a single- edge modulated square wave is developed at the output of the power am- plifier. The time period of the square wave is fixed by the fly-back of the sawtooth wave, the amplitude information of the audio signal is in the asymmetry of the square wave, and the frequency information of the audio signal is in the rate of change in the asymmetry of the square wave. A low- pass filter detects the amplified audio signal from the edge modu- lated square wave. For this investigation a low-pass filter and a resis- tive load is used in the model, but in actual system application a loud- speaker can be used for the low-pass filter as well as the output device. The local sawtooth generator method of modulation is ad- vantageous, because the modulation is on a linear ramp instead of a non- linear signal such as sinusoidal or exponential. The linear ramp allows higher per cent of modulation and low carrier signal frequency for the same audio signal range. A current feedback pair is used in the sum- ming circuit, because the very low input impedance minimizes the interaction between the two input signals. The power amplifier's transistors are in either the cut-off or saturation states for minimiza- tion of the device power dissipation. Therefore, larger signal powers can be handled with low power high frequency devices. 2. THEORY AND DESIGN Local Sawtooth Generator The local sawtooth generator is an asymmetrical multi- tator with a current source (transistor T3 in Figure 2) replacing one base resistor, With a constant-current charging a capacitor, a linear voltage ramp is generated. The other side of the multivibrator gener- ates the fly-back of the sawtooth generator. OVquT volt T 2 VouTp.p FIGURE 2 LOCAL SAWTOOTH GENERATOR The period of one complete cycle of the sawtooth is 1 t D = t a ■+ t b ~ 10 xf AMAX , where ^AmaX = maximum audio to be amplified. During time period t (ramp), transistor Tj is off and transistor T 2 is saturated. Capacitor C^ 's time constant is: t] = R i C 1 and capacitor C 2 is being charged by a constant-current I, During time period t D (fly-back), transistor Tj is saturated, and transistor T 2 is off. The time constant of capacitor C\ is: V = Ri'Ci and the time constant of capacitor C 2 is: t 2 ' = R 2 C 2 The frequency of the sawtooth generator and the allowed asymmetry of the generator output determines the times t a and t^, t_ + t b = t c fg and the asymmetry is defined as: ■o - to/2 - tb to/2 x 100 Rl = R 2 = 7 +v c MAX tb to r 1 - A, 100 where IC^AX * s ^ e max i mum saturation collector current for transis tors T^ and T 2 . Matching the boundary conditions at the completion of tunc t^: V C = .V (1 e-t/t 2 ') when t = l b< v OUT = " V C *2' = t b In V OUT P-P +v t ' and C 2 = ° Matching the boundary conditions at the completion of time t. When t t a +, V c = at when t - t-, V c = \ V (1 - e " l a/ ti ) Y C { = - "V Cl + (V C j + V) (1-e-tb/tl 1 ) = -V (1-e-ta/ti) + V (Z-e-ta/ti) (l.e-tb/ti 1 ) = e-tb/ti ' -2 + e-ta/ti where tj - RiCj and tj ' = R, 'C 1 ^1 For normal operation of transistor T^, the base resis- ts- ce Ri ' is more than an order of magnitude larger than the collector resistance R\. The asymmetry of the multivibrator is desired for the sawtooth generator for minimization of the fly-back time (larger per- cent of modulation). Therefore, t b is less than t a< Ik. tl' ^ ^L The controlling factor in the resulting boundary equation is the positive exponent. e + tb/ti' = 2 t = t a + t b , A Q = t: °/ 2 I tb x 100 to/2 1 - A ° 100 J tl' ln2 C _tb_ R? 2R In VOUT 1 _ 2zR V 100 In 1- v OUT P-P V R 1 'ln2 R L ' ln2 2 1 A ° 100 ' A MAX = 20 KC , . . t o -i 200 x 10 J 5. x 1 _fc> = 5 usee, With a 12 volt supply and 6 volt peak-to-peak output, ic MAX 300 ma, . . R l = R 2 = + 12V 3 00 ma = 400a Let Ri = R 2 = 390^ 8 For these operating conditions, the maximum percentage of asymmetry is 80 per cent which results in approximately 80 per cent maximum modulation later in the system. The output voltage decreases with increase in percentage of asymmetry. = (390.^ ) x 20 = 7. 8K *i' = Ri x hFE MIN Let IV = 7. 5K r - fc o 1 A o 2 2R 2 100 In 1 - Y ° UT P~P V 1. 85 x 10~ 9 Let C? = 1. 8 nf. to , A o r. 1 = x — — 1 °1 R, ' ln2 2 1 1 100 = 96. 2 x 10" 12 Let C x = 100 pf. C 2 x Vq2 I (charging current) = , ElP = 2.4 ma. Let. V B T3 6 volt to insure Ti is operating in the linear region. R hFE 1 + h FE V - VBT3 ~ v BEj3 = 2. 32 x 10+3 Use a 5K ohm variable resistance for the frequency con- trol. Impedance Transformer The requirements for the impedance transformer circuit a re. minimum loading on the sawtooth generator, ability to drive a low input impedance summing circuit, and linear operation with large signal input. The circuit configuration to meet these requirements is a voltage feedback pair with unity feedback. The feedback pair has better linear- ity during large signal operation than a Darlington network. v IN o FIGURE 3 IMPEDANCE TRANSFORMER The dc circuit equations are. 10 V c = V - h FE 1 + h FEj 1^ R Vtr. = V c V B = V - (R 3 1 R 4 ) I E V OUT = Vtkt - V IN " V BE- R T E! + _H5_ 1 + h FE ■E- V The dc design criteria are that Vq be approximately- equal to plus six volts when Vjpq is at its most positive level for linear transistor operation, and that the emitter current of the first transistor equals the collector current of the second transistor to balance the out- put voltage sensitivity between the two transistors, Rj = 1200 ohm R 3 + R 4 = 1100 ohm R 2 = 1100 ohm The value of R o was derived by using the Steadv-State AC Network Analysis Program ( SSNA ) with the performance criteria of: stable input impedance, maximum input impedance, and minimum out- put impedance. The program was also used to select the value of C^ based on the criterion of minimum capacitance with less than one per cent effect on the sawtooth fundamental. 11 Summing Network The function of the summing network is to add electronic- ally the sawtooth and the audio signals. The audio signal would normally come from a preamplifier that has an output dc level of +9 volts and low ac output impedance. The summing network was designed on the com- puter with the following circuit topology and component and operation point limitation. V A<> I. 1 Re V s O— )| WSA FIGURE 4 SUMMING NETWORK 12 1. OK f^R, -£ 10. K 0. 5K ^"R z ^ 10. K 25 a ^ R 3 ^ 5. K 100 n ^R 4 ^ 5.K 100^ ^R 5 ^ 10. K 100-^ ^R 7 ^10. K All resistors are 5 per cent tolerance of selected values, 30 fr HFE 1 ^ 150 PNP transistor 30 -± HFE Z ^ 150 NPN transistor (VE l - VC)-^ 5 volt (VC - VE 2 )^ , 7 volt Ir., -=' 10 ma 2 ma -^ Id ^ 10 ma 5 STATE 1 STATE 2 Vj\ (audio input dc level; +9- 9 volt t8. 1 volt V (+12) supply voltage +11.4 volt fl2. 6 volt V (-12) supply voltage -12.6 volt -11,4 volt The following equations were generated by the Automatic Circuit Optimum Program (ACOP) written by Mr. A. G. Kennard, IBM, Systems Development Division, Poughkeepsie, New York. HFEi Al = 1 + HFEi 13 A2 = HFE 2 1 + HFE 2 CI JL + J_ + l R R 7 HIE. C2 = V (-12) VBE 2 ~1 1 ■ x - R HIE 2 "J CI 1 1 C3 = — + R 3 ' HIE 1 C4 = V ( + 12) VBE! R HIEi C3 C5 = HIE 2 x CI - 1 R 4 HIE 2 2 x (1 + HFE 2 ) x CI C6 = V (-12) . (C4~VBE!)xAl C2 + VBE2 R HIE 1 HIE 2 x (1+HFE 2 )_ C5 D R + J- + -L R 2 R 7 HIEi x C3 - 1 R ? 2 x CI HIE! 2 x C3 x (1+HFEi) Al HIEi x HIEo x CI x C5 x R R 7 2 x C12 x HIE ? 2 x C5 x (1+HFE 2 ) Al R 7 x CI x HIE 2 x C5 x C3 x HIE X 2 VB C6 VA R x \C1 x HIE 2 + C2 JL C4 - VBEj X R 7 H1E : x (H-HFEi) D VC = VB x Al VB x Al VB HIEi HIE^xCS R 7 x CI x HIE 2 x (1+HFE 2 )J C5 + C6 14 VEi = VB HIEj x C3 + C4 VE- VB R 7 V_C HIE. x _ + CZ Then the program randomly selects circuit components between the specified limits. The circuit components that gave the minimum value for delta are used as starting values where delta is de- fined as: DELTA = VE 2 (state 2) - VE 2 (state 1) VE 2 (state 2) 104 x 1(P + VE 2 (state 1)' x 10 ! The program then does a direct search to minimize the variable delta. The purpose of the delta function is to design a circuit whose output voltage is near zero and then minimize the difference be- tween these two states of the output voltage. See Appendix B for examples of the computer printout. The computer program SSNA was used to design Cl for less than . 1 per cent change in the phase angle of the voltage transfer function for the sawtooth input. The resulting component values were: Rl — 2. OK R 5 — 4. 3K R 2 — 6.2K R6 — 2. OK R 3 — 1. 6K R 7 — 7. 5K R 4 — 2. 7K Cl - 100 nf 15 The resistor R^ is changed to a 5000 ohm variable re- sistor to control the output dc level (symmetry control). The use of this variable resistor is covered later in the power amplifier section. Power Amplifier The power amplifier has two functions: zero crossing detection andpower" amplification. The output dc level of the summing network, with no audio signal input, is adjusted by the symmetry con- trol to the position with half of the time base of the sawtooth signal below zero and half above zero. Then as the audio signal is applied, the zero crossing of the sawtooth is modulated along the time base. The first stage of the power amplifier is a complementary switching circuit which detects the zero crossing. The first two diodes minimize the zero crossing detection zone, plus removing the requirement for the summing circuit to supply the power amplifier base current. The second stage of the power amplifier delivers the high power square wave to the load net- work. The second pair of diodes limits the base current and limits the reverse voltage on the base-emitter junction of the output transistors. 16 o +v 5 -W%mr INPUT D i OVO- rr 1 D *U?\^ OUTPUT +V ? iimnniuifi -v, R L =15 D 4 -V, -V FIGURE 5 POWER AMPLIFIER The dc design equations for the power amplifier are: For transistors T3 and T4 ic 5V " V CESAT 5.0-1.0 ON RL 15 4. = 267 ma 15 R 5 = R 6 5V - V B E SAT 5 - 8V I C Q N /hFE MlN 267 ma/Z5 - = 393 Let R5 = R^ = 390rv 1? When transistors Ti and To are OFF + 12V R ? D„ 3£ -o v ^5 For transistors Tj and To V = R5 R 3 + R 5 (12V - V D ^)^ + 5 volt Let R 3 = R 5 = 390 .n , V D = . 8 volt. V = 1/2 (11.2) = 5,6 volts^ + 5 volt IC + 12V - V CE SAT ON R3 12 - . 3 390 = 30. 3 ma R l = R2 12V - V B E SAT 12 - .3 ^mvi/h ON /n FEMIN 30. 3/25 = 9, 669-^ Let R, = R 2 = 10K Transistor Power: Tj and T 2 P = 1 /2 (IbV be + IcVce) = 3. 21 mwatt T3 and T 4 P = 1/2 (IbV be + Ic v CE) = 137 - 8 mwatt Detector A low pass filter attenuates the square wave and passes the amplified audio signal. 18 Z o = 1 5S1 = R o T / s / 1 s : 2 ° ^ — *• ^ ~ s * / x' ,/ ' •o * j ' • «> / ' „ a 1 cm x y • * I'm 2 • // ™ a* ™ // II 1 II - i li II II li " i - 1 ' i i 1 1 II 1 1 1 1 1 1 1 a u zrr ui to £ UJ a: UJ u_ _i CL ! I a. o o O -L o cvi 10 1 10 Voltage Gain 4. CONCLUSIONS The only purpose for the low-pass filter is to prove the presence of the audio signal whose amplitude is the percentage of modu- lation times one half the square wave amplitude. Using a loudspeaker as the load, the rise and fall times of the amplifier output square wave are similar to the rise and fall times of the amplifier output square wave when the amplifier is loaded with a resistive load. The model used had only 25 db power gain. By increasing the power supply voltages and adjusting the resistors in the power amplifier , the power gain is increased. Example: 1 watt output transistors (germanium) Power of Transistor 1 2 * V CE SAT ^M) I,- , = ^ower 01 iransistor = I = ,, 667a re ^ON t .. it- 1 1 i\ R = 15-n-, +V (supply) - R IC N + V CE SAT 25. 3 volt Maximum Power gain = 10 log ~(25) 2 3,000 15 (3.5)^_ = 10 log (1. 0204 x 10 4 )= 40 db Maximum Power in speaker is 41. 66 watt as compared to 7. 4 watt output for class B push pull. 36 5. LIST OF REFERENCES 1. Modulat ion Theory by Harold S. Black, D. Van Nostrand Company, Inc. , New York, 1953, pp. 263-280. 2. "A Two-State Modulation Simplifies Audio Circuits" by A. G. Bose, Electronic^, August 23, 1963, pp. 36 and 38. 3. "A Two-State Modulation System" by A. G. Bose, Quarterly- Progress Report #70, MIT Research Laboratory of Electronics, July 15, "19637 pp. 198-205. 4. "A Two-State Modulation System" by A. G. Bose, paper #7. 1 of the Western Electronics Show and Convention, 1963. 5. Linear Amplifier Design Manual by R. J. Byrnes, Standards Engineering, General Products Division, IBM, April 1963. 6. Communication Engineering by W. L. Everitt and G. E. Anner, Second Edition, 1937, McGraw-Hill Company, Inc. , New York, pp. 179-214. 7. Introduction to Fortran by S. C. Plumb McGraw-Hill Company, Inc. iNel^FoTk7T%4r 8. Functional Circuits and Oscillators by Herbert J. Reich, D. Van Nostrand Company, Inc. 1961, pp. 220-236. 9- "Junction Transistor Circuits Application" by P. G. Salzer, Electro nics , August, 1953, page 173. 10. Introduction to Modern Network Synthesis by M. E. Van Valkenburg, Toi^wireyirs^sTT^^ . 11. Communication Circuits by L. A. Ware and H„ R. Reed, Third Edition, 1962, Joh^TwTiev & Sons, Inc. New York, pp. 146-205. 12. G ener al Electric Transistor Manual, Sixth Edition, 1962, pp. 1 30- 138 and"pTT697~ 13.- IBM 7090/7094 Programming Systems^ Fortran IV Language, IBM Systems Reference Library, File Number 7090-25, Form Number C286274-3, November 1964. 1 4 • jBM 7090/7094 IBSYS Operating System, Version 13, IBJOB Processor , IBM System Reference Library, File Number 7090-27, Form Number C28-6389-1, July 1965. 37 1 7 . IBM 7090 / 70 40 Direct Couple Ope r ating System Progra mmer J s Guide, IBM Systems Reference Library, File Number 7090-36, Form Number C28-6382-3. March 1965. APPENDIX A Circuit Design and Analysis Programs ASAP Automated Statistical Analysis Program description below was written >by Arthur t G, Kennard, "ASAP is an 'Automated Statistical Analysis Program 1 that was developed for the IBM 7090/94 computer. This program is de- signed to perform a Monte Carlo statistical analysis on the d-c currents and voltages of transistor and diode circuits. The mathematical d-c model for such a transistor- diode circuit is a set of equations, formu- lated using the simple rules of algebra. Such a set of algebraic simul- taneous equations will always have a unique solution for a given biasing condition. Moreover, such a solution can always be obtained by suc- cessive or step-by- step elimination of the unknowns. The task of generating these equations and the mechanics of obtaining the solutions become difficult and error prone, especially when the number of circuit components becomes large, particularly those that are nonlinear such as transistors and diodes. This task becomes almost impossible if one has to analyze circuits with extensive feedback loops. "A high-speed scientific computer can perform the mechanics and produce the solution faster, more economically, and more reliably. However, a computer always requires a well-defined algorithm capable of handling a general case. "This project was intended to investigate and establish such an algorithm for a general transistor and diode d-c circuit analysis. It was intended that the user will be required only to provide a simple topological description of the circuit in an English-text form, thus eliminating the need for writing the d-c equations manually. The ASAP program, through a pattern recognition program, SHADOW, scans and analyzes this input data, producing a table which indicates the sections or subpatterns of this data. ASAP uses this data to write the set of Kirchoff equations, then solves them algebraically using the Gauss re- duction method. The program then writes a complete source program subroutine (using FORTRAN programming language), compiles this sub- routine to convert it into machine language, and then calls on another subroutine which will perform the statistical analysis of the circuit. This process is carried out automatically from start to finish, thus justifying the name 'Automated Statistical Analysis Program - ASAP. ' 39 40 "The unique feature of this method is that the equation solution is carried out analytically (symbolically) in almost the same manner as it would be done by hand. In essence, these equations are solved once analytically, rather than many thousands of times if one is required to perform a statistical simulation of a circuit. "The topological description of the circuit may include resistors, voltage sources, current sources, diodes, and transistors. The diodes and transistors are represented by voltage -current tables supplied as input data. All items of the topolotical description must include the appropriate tolerances, and density functions. The output information is always given in tabular form. A frequency plot is given when requested. "A feature of this program is the ability to determine the effects of component variation on the output parameters. The program computes two types of sensitivity. The first, statistical sensitivity, is a qualitative analysis where the measure of the spread of each parameter about the mean value is taken into consideration. The second type is based on a 1% deviation of each component parameter from its nominal value. "A requirement for such a system is that it must perform a statistical analysis of the circuit. The most widely known and accepted method is the Monte Carlo simulation process, since it makes no as- sumptions about the statistical nature of any component parameter distribution but will accept any continuous density function. "Briefly stated, the Monte Carlo method of treating system analysis is a scheme by which the performance of a large number of simulated samples of a system can be evaluated when the system is comprised of elements with values that may vary between tolerance limits. By repeatedly selecting random combinations of these para- meters and computing the variables of the system, a valuable indication of the system's probability of meeting specific performance criteria can be derived. "The Monte Carlo sampling process is analogous to pro- viding a large sample of every component in the circuit. The samples are chosen so that they will have the statistical characteristics of their population. From each component- sample set, select one element, build the circuit in such a way that no new random variables are intro- duced in the process, and measure and record the dependent parameters of the circuit with caution. This operation is repeated many times. The dependent variables are then tabulated in a statistical frequency distribu- tion. The subroutine that will perform the statistical analysis is called STRESS (.Statistical Reliability Evaluation by Synthetic Sampling). 41 "The ASAP program is composed of two parts. The first is also called ASAP and is designed and programmed to accept the user's simple topological description of his circuit, and the component para- meter information, such as their nominal values, the tolerances and the type of density function that characterizes each component. The output of this program is another computer program which contains all the statistical information and mathematical models of the circuit and its nonlinear components, The second part of this program, STRESS, per- forms the statistical analysis. "This implies that one can, by making the necessary modifications, eliminate the STRESS capability and replace it by any other design criteria whether it be Taylor design, nominal design, or any feasible combination. It is not difficult for the user to convince himself that these design criteria are but special cases of the statistical design. For example: ASAP, as it stands, can produce the worst-case circuit analysis, by setting all component parameters at their worst- case tolerance limits and with zero tolerance about these selected values. Thus, the random-number generator will always select these worst-case limits to be used in the analysis. Similarly, the nominal design can be accomplished by setting all component parameters at their specified nominal value and w;th zero tolerance about these values. " A COP Automated Circuit Optimum Program uses the first part of ASAP. The user defines the topology of the circuit and specifies the values or range of values fcr the circuir. parameters. The program does the nominal case and tolerance case if tolerances are specified. The user defines a variable expressed in terms of input and output parameters. The second part of the program uses the Monte Carlo simulation process of selecting nominal circuit components and calculates the above defined variable. After doing the specified number of random selections, the program selects the minimum value of the optimum variable and then does a direct search on the component values to find the t rue minimum of the optimum variable. Then the component tolerances are included and 42 the program will minimize the optimum variable again. This program was written by Arthur G. Kennard (author of ASAP). SSNA The Steady -State AC Network Analysis Program (SSNA) is developed for an IBM 7094 model 2 computer. The program analyzes linear networks in the small signal sinusoidal frequency do- main. The network can consist of: 1. Constant lump parameters: resistors, capacitors, and inductors 2. Distributive transmission lines or distributive monolithic resistors 3. Transistors (the program has two transistor models of which the data for either can be entered on one data card for each transistor) The program allows for one resistance, one inductance, one capacitance, and/or Q of coil to be entered on one data card (passive data branch). A configuration number defines how these R, L, and/or C are con- nected together to form a two terminal network. There can be up to three of these R, L, and C configurations connected in any series- parallel combination, as long as the overall combination (a branch set) is a two terminal network. These two external terminals then become two major nodes. 43 Circuit Limitations; Resistors 633 Inductors 633 Capacitors 633 Transmission Lines 20 Transistors 10 Nodes 1708 Major Nodes 20 The program generates its own equations from a topo- logical description of the network. The network data is in fixed format, but no programming experience is needed. There are four general modes of operations (which can be done individually or all at once with the network data entered only once): 1. Frequency response (on the log or linear scale). 2. Variation of any passive parameters by increment- ing the parameter with a frequency response for each increment, 3. Variation of any passive branch set by direct sub- stitution with a frequency response for each modifi- cation. 4. Variation of any transistor's parameters by substi- tution with a frequency response for each substitution. The number of frequency points a given network can be solved for is unlimited. Any number of networks described with pre- viously stated components can be cascaded together. 44 The output results for single -ended networks may con- sist of: sist of: 1 . Node voltages 2. One of sixteen possible transfer functions between any two major nodes 3. Input impedance (one of three functions) 4. Output impedance (one of four functions) 5. Mutual impedance (impedance between the input and the output nodes) 6. Semilog plot of the transfer function 7. Nyquist plot of the transfer function 8. Printer plots of the three impedance functions 9. When cascading, 2, 6, a nd 7 outputs are also available for the accumulative networks. The output results for differential networks may con- 1. Voltage gains for both sides of the network 2. Differential voltage gain 3. Common mode rejection 4. Common mode rejection ratio 5. Delta and wyei equivalent iriput dm pedances 6. Nyquist and semilog plots of the above voltage gains 7. Semilog plot of the common mode rejection ratio 45 8. Rectangular plots of the equivalent input impedances 9. When cascading, the above outputs are available for the accumulative network SSNA will load in 50 second and will analyze 1899 com- ponent network in 2.4 second per frequency point. Programs ASAP, ACOP, and SSNA are IBM experi- mental programs and are not available for general public use. APPENDIX B Samples of Computer Runs The minimum open loop gain of the sawtooth generator to insure the oscillator operation with worse-case components using SSNA shown on pages 47 to 48. Selecting the ac emitter resistor of the second transis- tor in the impedance transformer using SSNA shown on pages 49 to 50. The dc designing of the summing network using ACOP shown on pages 51 to 56. The dc analysis of the summing network using ASAP shown on pages 57 to 60. The ac analysis of the low pass filter using SSNA on pages 61 to 64. 46 47 « O H < W O W Q O O H W Q O 2 Oh O a w u < H •—i U < U W u < x>o-H-HOOOir>in ■o o ro II II w w Oh U X U O Oh 2 ft o o O —i (> <\1 o ro ii ii H CQ Oh U u 2 a Oh O Oh o o PO o m vO m U CQ U CQ Cm W H H l-H 01 CO Ch O H U 01 o u 01 CO < CQ X H Ch O Oh CO Ch 01 H 01 2 Oh PS O H CO I— I CO Z < 2 a O 0h tt Oh m in II II W 01 a pq Oh Oh o o O sO II II 01 01 Oh U a u U Oh 2 ft o o O vO (M P0 H Oh CQ U U a 0h O Oh v£> O co in rg m o ii ii U CQ U CQ Ch" 48 GAIN BETWEEN NODE 9 AND NODE 8 FREQUENCY IND. NETWORK GAIN CPS GAIN PHASE 1.000 CPS 1.322E-05 90.0 2.000 CPS 2.643E-05 90.0 4,000 CPS 5.287E-05 90.0 8.000 CPS 1.057E-04 90.0 10.000 CPS 1.322E-04 90.0 20.000 CPS 2,643E~04 90.0 40.000 CPS 5.287E-04 90.0 80.000 CPS 1.057E-03 90.0 100.000 CPS 1.322E-03 90.0 200.000 CPS 2.643E-03 90.0 400.000 CPS 5.287E-03 89.9 800.000 CPS 1.057E-02 89.9 1.000 KCPS 1.322E-02 89-9 2. 000 KC 2. 643E-02 89. 7 4. 000 KC 5. 286E-02 89. 5 8. 000 KC 0. 106 89. 10. 000 KC 0. 132 88. 7 20. 000 KC 0. 264 87. 4 40. 000 KC 0. 527 84. 8 80. 000 KC 1. 041 79. 6 100. 000 KC 1. 291 77. 1 200. 000 KC 2. 421 65. 2 400. 000 KC 3. 974 46. 5 800. 000 KC 5. 228 25. 2 1. 000 MC 5. 468 18. 9 2. 000 MC 5. 796 1.7 4. 000 MC 5. 671 -15. 2 8. 000 MC 5. 014 -36. 4 10. 000 MC 4. 664 -44. 5 20. 000 MC 3. 310 -73. 6 40. 000 MC 2. 019 -109. 6 80. 000 MC 1. 183 -157. 2 100. 000 MC 1. 016 -176. 200. 000 MC 0. 711 118. 5 400. 000 MC 0. 567 60. 7 800. 000 MC 0. 484 26. 5 1.000GC 0.466 19.8 2. 000 GC 0. 427 7. 6 49 « O s 2 < W IB ft in ft W ft « ft A IT) O o ^o o o —4 ~H -I o w Q 2 o o o o o II II sS II II H PQ • 1 i 1 1 ^r 3 u CO x u o « « W w H H W H H Q 2 H (\J (^ ^ O 1 i— i ft ft o o w ft ft O s Z 00 H H H 00 <\j O v£> ■^ o in « sO o Oh r> Q j sD sO H II II H i ii U W W U w w u o o o o o W In U w ft u ft 1 1 1 1 1 X U 1-1 X u a u u vO w u z In In in In In w rg w in < z z CO < pq y fe CO < £ ft (VJ u o o o S ft pq o <; 00 o o o o m i— i ft • • • -H O 00 cm o in « <: — i o o o ° 1 | , O X ^ (M X O r-( 2 u -H H rg H fM cr; r\j « OJ U pq w u XHKK In CO ii ii H pq ft U U O ft co pes i ii H pq ft U U Q <; w W W H H H W u W W CXH Q S 2 w o o o o o o I 1 1 1 1 <; < a. «5 S w < ft o ft ft ft o ft w u 2: 2 222 2 o o CO o O g § > ffinn H • H • o CO i— i CO W X H < H CO H- 1 O O O O o CO i—i CO Z CM 00 II II CO •— i CO — I CO ii ii CO W O N O h ^ < U PQ < U cq o h o h m U « u pq PS 50 S S K* X X w X ffi K X - 1 M y 2 £ ^ ooo^ H < 5 O — i ci ,-h ^r o oo m Q z < . 00 CO w 2 pj H rH f- vfl ft -• h h h ^i h w Q ^ S^^ E X X X X ft S O o o z H rt in to in in in z w rn on m en m w H W pq ^^^ w E K X X X o s w tt w H w H 2 O vD o co t- c-> w < < CO h ro ro ^ CO Q S 00 O CI CO CO E w E r- ^r co o co i— i . — i i — i i — i u ft z S h h h h h 1 R 1 1 'J < M H ^2^ PQ p J & d X X X X X w O -7 < H W w w tf H « h r^ oo m ^r H « o r- r- c~> c-> ft m in \D h rs] O en r- ^ o ro i— < i — i X u •^ 2 W 2 < w Q | - 1 CO < < o o o o o o o o o o 1 1 I 1 ! CQ 2 E Z w & « Q o ft X o ft Z < co o ^H ft P4 o o o o w Z W O 1 i i p o z z . Z r- r^ r- i> t^- Eh f\J CT~ O s s s ft < w Q II II ii ii £ a s s s O^ CT- o o o o o 2 ft w < 1 — 1 ft U w »8 o < H i— t U i— i u w cq u z ft w D ft O O O O O W H W W M o o o o o o o o o o w ft < ft ft o g a u w o o o o o o o o o o < w < < rt o lo o its o > « u a a ft -h r^ ro ro c~i 51 TOPOLOGICAL INPUT DATA NOVEMBER 30, 1966 5:08 PM 2000 CASES NO SENSITIVITIES DONT VERIFY INPUTS Rl, 1. TO 10. 0, SHAPE1 R2, 0. 5 TO 10. 0, SHAPE1 R3, .025 TO 5.0, SHAPEl R4, .1 TO 5. 0, SHAPEl R5, . 1 TO 10. , SHAPEl R7, . 1 TO 10. 0, SHAPEl Rll, VA1-VB1, Rl, VE21, TOL . 05 R12, VA2-VB2, Rl, VE22, TOL . 05 R21, VB1-GND, R2, VE21, TOL . 05 R22, VB2-GND, R2, VE22, TOL . 05 R31, VP121-VE11, R3, VE21-, TOL . 05 R32, VP122-VE12, R3, VE22, TOL . 05 R41, VC1-VM121, R4, VE21, TOL . 05 R42, VC2-VM122, R4, VE22, TOL . 05 R51, VE21-VM121, R5, VE21, TOL . 05 R52, VE22-VM122, R5, VE22, TOL . 05 R71, VE21-VB1, R7, VE21, TOL . 05 R72, VE22-VB2, R7, VE22, TOL . 05 VA1=9. 9 VA2 = 8. 1 VM121=-12. 6 VM122=-11. 4 VP121=1.1. 4 VP122 = 12. 6 Til, PNP, VB1, VCL VE11, CURVE 1,BETA1=30 TO 150 T12,PNP,VB2, VC2, VE12, CURVE 1,BETA2 = 30 TO 150 T21,NPN,VC1, VP121, VE21, CURVE 1,BETA21=30 TO 150 T22,NPN, VC2,VP122, VE22, CURVE 1,BETA22 = 30 TO 150 OUTPUTS ZETArO. , RANDOM, DIRE CT 52 VBE1=VB1-VE11 VBE2=VB2-VE12 VEE21=VC1 -VE21 VBE22 = VC2-VE22 1R11 JR12 IR21 IR22 IR31 IR32 JR41 IR42 IR51 IR52 IR71 IR72 VB1 VB2 VC1 VC2 VE11 VE12 VE21 VE22 CURVE 1 DONT PLOT -.001,-1. ,-1. , 0.,0.,0., . 002, . 56, . 611, , 015, . 61, . 67, 0.32, .63, .69 . 080, . 66, . 72, . 145, . 67, . 73, . 4, . 69, . 75, ,8, .71,. 77, 1.7, .73, .79, 2. 9, .75, .81, 4. 0, . 76, . 82, 6. 3, .77, .83, 11. 8, . 79, . 85, 16. 3, .80, .86 END 53 Z O H U W -1 w CO o Q Z < O u w H O « ro W > o I— I H < H CO o H <; PC! w H W Q I s - LA in m vX5 CM ^H OJ in oo CO « 00 o s i— i ^ LTl ^r 1— 1 i—i w ii CO < 0O U « o .-H s w o — < i — i o <* ^H oj vO v£> in 00 II ^r oo ii rt < H CO o I s - W vJO in N I s - £> oo i — i z 00 I s - o m o M H ^ N U ii II 2 P .— 1 I s - Un « cc oo oo ^r oo m oo OO ^ CO ro 00 O ^r « CO 00 ^H 00 r^ i— 1 OO CO CO w II CO < CO u tf o 1— 1 o OJ W co sO sO 1 — 1 oo ^r OJ ^r oo II rt < H I s - oo w LO i — 1 N o -r 00 »— i 2 o r- Lfl i — i •— i H c- CM U II II 2 D 1 — 1 I s - h « tf o oo o o o oo o ii in m -—i I s - CO o II m co OJ o I s - 00 ^r ^° W II CO < 0^ U tf o ^H CO ro w in o> in o co 00 in ^ oo II « <; H r— 1 I s - O CO W OO I s - N oo -H m .— 1 z in I s - . — i (\] H -tf o u ii II z S> i-H t» h « ti I s - H W N o H U D 00 oo m oo in I s - o s - oo o I s - ^ tf I s - o o co I — I CO w II CO < po U tf o ■—< co oo W in oo oo I— 1 sO o vD oo OJ ^D OJ OO lO OO oo o OJ o vO s OJ o I s - ^ II II —I I s - P4 P4 sO o CO in oo 00 oo < H W N z o H U z 13 00 in oo m P4 r- 00 in o o I s - CO ^r tm o s - CO 00 ^H o NO ■ 00 ■^ w II CO < co U rt CO CO v£> I s - oo ii OO CO n£) oo ^r oo ^r 00 -vO 00 o — < s m co ii ii -H I s - 54 o o (M .— t 00 (M o^ 00 00 oo o 00 f— i 00 m 00 in in IT) ID m co i— i ^r 00 (M II "tf « xO o ^r o CO r~ m in .— 1 f\j w ii CO o o W rM m vO o o fM 00 . 1 m in ^ co ii - 1 (M II « < H 00 1 — 1 o W m o N — ^ m r«- m z ^r 1 sO CO 00 1 — 1 H ^r in U ii ii Z |3 i — i r- h « pci (M O 00 o m r\i o ^ « m -^ CO o 00 oo r- v£> co w CO < U ^t 1 o 00 ^r 00 CO o> o (M oo 00 . — i 00 nO II ^-H 00 II tf < H CO m 00 CO W a~ r~- N o T o t> z in c) m oo 1 — 1 H CO CT^ U ii II 2 13 _H r^ tn « PC m oo CO 00 oo 00 00 o i— i r- co o 00 o co w CO < U m oo oo CO m • o sO i*- p- p- m .— i o CO ii ^h 00 II « < 00 -X) W 1 — 1 -O N 00 CO o N Z o ^J o •^ •X> 1— 1 H ^6 CO U II II 2 E3 r— I r~ h F4 CC co CO r- i—i oo o CO II CO oo 00 o 00 CO CO P4 w CO < U CO o O 00 vD r- O 00 m 00° CO in r- o ii ■ — i II 00 < a* -r sO CO W 00 OO N o CO ^r r^ z 00 T ^D O *— 1 H 00 O u II II 2 £ 1— 1 r- h « rt oo o 00 55 ii IT) ffj O < o H ^ W o N En 00 z It ^r 1 — 1 H Ph <1 N P-H 9 co o oo S X u ^H « < II w OO CO « H U w Ph 00 IT) 1 — 1 Q O « ro O W \0 00 (M o rt tM r- w 00 r- H ro O IT, W 2 oo r- <; ii II « < ^H f«- Ph « ptj 2 i— i H < EC U « < w CO H U w ps i — i Q W « J W h < CO « W H W S < rt Ph < w Ph H H W D S Ph < H p^ D < Ph oo N ooofMor-r^^o^^runvO r oCT s -Hr— ^rco-^ co^oor-JOooOun . .^HOOinooor^-inr^^LDLno OOOO^-^roOoONOLTiOJvDOO^ Oj^r— iLOOO^Hi-Hl^-r^ LDOOOoOsOcO^Dt^^H -h r^ r^ r- ro Tf O I o o o ro O-^POOOoOOOlTl-H^rOOO unLnoooxro^roo oovD-vTunoo^r^ o r^ lD t^- O I s - -— lOOOO^nr-rO ^inoooorooooor-oOvD — i r~ oo o ■^COOO^r^ooooOvOOOvOooO OOro^cO^rtMfNJ'-HOLn-^ 00 > > > •— I f\J ~H 00 ' — I 00 ' — I ^h ^h 00 00 ro co -^F r > > > 56 ^r o W nO r^ oo ro o^ .-H .-H o U"> o o r~ ^f r^ o m CO c~> (M r- N sO 00 sO i— i r^ o o O IT) ) ! H (M -H f\] H H N N w w w w > > > > 57 TOPOLOGICAL INPUT DATA NOVEMBER 30, 1966 12:57 AM 1000 CASES NO SENSITIVITIES DONT VERIFY INPUTS Rl,VATOVB = 2. , TOL. 05 R2, VB TO GND = 6.2, TOL . 05 R3, VP12 TO VE1 =1.6, TOL . 05 R4, VC TO VM12 = 3.9, TOL . 05 R5, VE2 TO VM12 = 4. 3 , TOL . 05 R7, VE2 TO VB = 7. 5 , TOL . 05 VA = 8. 1 TO 9. 9 VM12 = ~12. 6 TO -11. 4 VP12= 11. 4 TO 12. 6 Tl, PNP.VB, VC, VE1, CURVE 1,BETA1=30 TO 150 T2,NPN, VC, VP12, VE2, CURVE 1,BETA2 = 30 TO 150 OUTPUTS VBE1 =VB- VE1 , PLOT VBE2=VC-VE2, PLOT IR1, PLOT IR2, PLOT IR3, PLOT IR4, PLOT IR5, PLOT IR7, PLOT VB, PLOT VC, PLOT VE1, PLOT VE2, PLOT CURVE 1 PLOT -. 001, -1. , -1. , 0.,0.,0., . 002, . 56, . 611, .015, .61, .67 . 032, . 63, . 69, . 080, . 66, . 72, .145, .67, .73 . 4, . 69, . 75, .8, .71, .77, 1.7, .73, .79, 2. 9,. 75, .81, 4. 0, . 76, . 82, 6. 3, .77, .83, 11. 8, . 79, . 85, 16. 3, .80, .86 END 58 NOMINAL VALUE OF EACH OUTPUT PARAMETER (CALCULATED USING NOMINAL VALUE OF EACH INPUT PARAMETER) VBE1 = -0.784644 VBE2 = 0.767184 IR1 = 1.620232 1R2 = 0. 928957 IR3 = 3.409887 IR4 = 3.349002 IR5 = 2.859052 IR7 = -0.728749 VB = 5. 759536 VC = 1.061106 VE1 = 6.544180 VE2 = 0.293922 59 < < W u « o f*. « w ft En O O i— i H CQ H o in o o f\] o o* II > W Q Q H N f\J H O] CO O W co H (M CO O W II CO < U -1 < z o t— 1 o S o o r-H 25 « o O LTl 1*4 rr (M CM C\J w > CO II en w H W 2 2 < o ro fM ro CM II < o i — i CO z oo CO t— I CO W H S i— i Q « a o -1 o f*4 w K H « 1*4 o H U < t*4 w u CO W 1 Pi w u > I — I H < o z H I— I CO z w Q CO W CO U ■ft ft ft ft ft ft ft ft 45* ft ft * * ft -:;■ ft 45* 45- "/'" -.<■ ;; !) ■ ft ft ft ..;;- .y. -;;.. _;;. j-. _j;_ .JJ, .Jf. „«. .>;_ .;;. .«. ft 45- 45- ft 45- 45 45- 45 ft ft ft 45- ft C " S " " '» " " " " ',) .«. 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