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UNIVERSITY OF ILLINOIS 
 GRADUATE COLLEGE 
 DIGITAL COhPUfER LABORATORY 
 
 REPORT NO. 71 
 
 SPEED INDEPENDENT COUNTING CIRCUITS 
 
 James C. Nelson 
 July 1, 1956 
 
 This work has been supported in part by 
 the Office of Naval Research under 
 Contract NR 044 001 
 
SPEED INDEPENDENT COUNTING CIRCUITS 
 
 This paper is an extension of Report Number 66. It concerns itself 
 with the design of speed-independent counting circuits. Definitions of speed- 
 independent and totally-sequential circuits are taken as known and the reader is 
 referred to the above-mentioned report for the original development of these con- 
 cepts. 
 
 Counting circuits were chosen for the initial attempt of speed- 
 independent realization because of their basic importance in computer design, 
 and because of their abstract simplicity. 
 
 A speed-independent circuit is defined to be a counter with respect 
 to two nodes, i and j, if, in continuous operation for every change at node j , n 
 changes must occur at node i. Node j must again then change. The number n is 
 called the scale of the counter with respect to these two nodes, n (i,j). 
 
 Thus a counter is a speed-independent circuit with no inputs and no 
 outputs, having a repetitious mode of operation with respect to two of its nodes, 
 
 COUMTER 
 
 •M 
 
 COUWTER 
 
 Q 
 
 Figure 1. 
 
 We must show that this circuit can be made to count. To this end 
 we break the circuit at node i. Let i, be the line from node i to the counter 
 and i n the line from the counter to node i. 
 
 If we break the circuit at node i, retaining the value of node i 
 on the line i, , then after some time M, line i„ must change value, since node i 
 is constantly changing value. Furthermore, since the counter is assumed speed 
 independent, i fi can change value at most once after node i has been broken. Thus, 
 we may use i~ as an end signal to determine when the circuit has finished counting 
 and when we may again step the counter. 
 
 The counter is then properly stepped by making the value i, corre- 
 spond to the value i n , when i, f i~. 
 
 Let node j change value. If the counter is now stepped n times, 
 node j will again change value. This information may be transmitted to other 
 
 -1- 
 
circuitry by means of an output from node j . We therefore see that the counter 
 defined above agrees operationally with the usual concept of scale n counter, 
 except that in the speed-independent case, an end signal is available when the 
 count is completed. We note specifically that if node j fails to change value, 
 an end signal will not be received, and the stepping mechanism will be disabled. 
 
 Let us now connect two speed-independent counters of scales m(k,- ) 
 and n(i,j) in the manner shown in Figure 2. 
 
 T\ Cc,j] 
 
 j i r \ ko 
 
 NOT ' 
 
 Jo k, 
 
 m(k, <t) V 
 
 Figure 2. 
 
 Then by example 2, Report Number 66, the resulting circuit is speed- 
 independent. If j, and X have both just changed value, and if node i is again 
 broken as above, then after (m x n) steps at i, , node Si will again change value, 
 oince the combination circuit is speed-independent, the end signal is still avail- 
 able. Therefore, it is possible to produce a speed-independent scale (m x n) (i,iZ) 
 counter from a scale m(k,Jl) and scale n(i,j) counters. We now note that if either 
 node j n k, or node Si fail to change value, that an end signal will not be received. 
 
 r 
 
 We will return to this fact at a later point. 
 
 We see by the above construction of multiplying scales, that if we 
 can produce speed-independent counters of scales two and odd n, then we can pro- 
 duce any scale of n counter. 
 
 We shall give realizable designs for these two counters. In addi- 
 tion, several theorems on combination and division of decision elements in speed- 
 independent machines will be presented, and some light will be thrown on the 
 basic problems incident to speed-independent design. 
 
 PROBLEM OF SPEED-INDEPENDENT REALIZATION 
 
 The problem of directly designing speed-independent circuits has not 
 yet been solved. However, given a speed independent circuit, it is often possible 
 
 -2- 
 
to modify this circuit or combine it with other circuits in such a way as to obtain 
 other speed-independent circuits of greater or lesser complexity. 
 
 As will be shown, it is always possible to design a totally sequential 
 circuit for any scale of n counter. However, the complexity of the individual de- 
 cision elements necessary for realization of such a circuit is usually so great, 
 that the circuit is of no practical significance. 
 
 Nevertheless, since the more stringent property holds, one may use the 
 totally sequential circuit as a starting point, modifying it, so to speak, in an 
 attempt to trade the totally sequential property for more simple decision elements. 
 Since we are, in effect, replacing complex decision elements by circuits composed 
 of simpler decision elements, this process does not produce minimal circuits. 
 
 DECISION ELEMENTS: 
 
 The definition of decision element in Internal Report No. 66 is quite 
 broad. Several new decision elements which are used in the circuit examples are 
 defined below. Primed signals represent equilibrium values. 
 
 NAME SYMBOL EQUILIBRIUM EQUATION 
 
 3©" 
 
 Inhibit a b — °( d C = ab 
 
 C-element 
 
 a 
 b 
 
 JcJ d c' = ab v c (a v b) 
 
 F-flipflop a of r.) f f ' = ab v af 
 
 The C-element and F-element both are dependent upon their previous 
 state and hence involve memory and are similar in nature to flipflops. The 
 C-element corresponds to a majority element whose output has been fed back as one 
 of its inputs, while the F-element corresponds to a last moving point flipflop. 
 
 STATE DIAGRAM 
 
 The immediate state of a circuit was defined in Internal Report No. 66 
 as a vector, each component of which represents a node of the circuit, and has the 
 
 -3- 
 
value of the signal at the node. The relation "directly follows" and the concept 
 of initial state were also there defined. 
 
 The initial state, the set of all immediate states of a circuit and 
 the relation "directly follows" determine a state diagram of the circuit. For, 
 given an initial state we can determine all possible transitions, or states which 
 directly follow the initial state, and represent the transitions as lines drawn 
 from the initial state to the new state. We may now regard each new state as the 
 initial state and continue the process until either repetition occurs or no tran- 
 sitions occur. If the circuit has a finite number of nodes, it has a finite 
 number of states, a finite number of transitions, and hence the immediate state 
 diagram mast either repeat or terminate. 
 
 ..'e note that state transitions occur as certain nodes change value. 
 These nodal values are transmitted through the lines to the decision elements. 
 
 Consider the state diagram of a speed-independent circuit. No tran- 
 sition (nodal change) may occur which will place an excited decision element in 
 an equilibrium state (violates condition 4). 
 
 Theorem I . In a speed-independent circuit let any element D be specially desig- 
 nated. If when the circuit is in a state "a" in which D is excited the element 
 D is always assumed to act before any other excited element, there will be no 
 violation of the condition of speed independence. 
 
 We need only show that this constraint adds no new transition to the 
 state diagram. To this end let a speed independent circuit T be given with deci- 
 sion element D and corresponding node d. T has a set G of possible immediate 
 states. Divide G into two subsets A and B in the following manner. Let A be the 
 set of all states in which D is excited and B be the set of all states with D in 
 equilibrium. 
 
 Then for every state "a" in set H , there is a unique corresponding 
 state "b" in set B which directly follows "a", "b" is the state which is identical 
 to "a", except that the d'th component has been replaced by its complement, "b" 
 certainly exists and directly follows "a", for if D is excited it may be the next 
 element to change, changing the value at node d. 
 
 However, when we demand that D act first, this means that whenever 
 the circuit is in a state of a, that the corresponding state of B must directly 
 follow. ..'e have shown that this transition already exists in the state diagram 
 
 -4- 
 
of T. If T is in a state B, then the constraint has no effect on the circuits 
 operation. 
 
 Therefore, no new transitions have been introduced and the circuit 
 with constraint remains speed-independent. 
 
 Theorem II. A delay element (which does not feed itself) may be removed from any 
 point of a speed-independent circuit without destroying the speed-independent 
 property. 
 
 Let I be a speed independent machine with a delay element 13 fed by a 
 
 node m and feeding a node n. Construct the circuit T* identical to T except that 
 
 D has been removed and nodes m and n connected, 
 
 /* "\ ( <m*^a* ) 
 
 »>1 
 
 ■/^N) 
 
 T 
 
 T 
 
 Figure 3 • 
 
 Both T and T* have sets of I-states, call them G and G*, Divide the 
 set j into two subsets A and B. Again we let A contain those states in which D 
 is excited (the value of m/ the value of n) , and B contain the states in which 
 D is in equilibrium (the values at m and n are the same.) 
 
 If we now let the single node (m^n*) be represented by two separate 
 nodal components m* and n*, we see that the set G* is identical with the set B 
 (if the assignment of nodal components is the same) and that for every state of 
 set G* there corresponds a single state of B and vice-versa. 
 
 Furthermore, if n*, n* does not change value, any transition in T* 
 may also occur in T , and therefore cannot cause a violation of speed-independence, 
 
 We must show that the transition in T* in which m* , n* change value 
 cannot cause a violation. 
 
 By Theorem I, we may now let D act, first. Place T and T* in corre- 
 sponding states c of B and e* of G*. 
 
 -5- 
 
Then by identical construction, if node m changes 
 
 value in T, node m*, n* may change value in T*. Let 
 
 T make the transition to a state "a" of A. By 
 
 Theorem 1, the next transition must be to that unique 
 
 state "b" of B where the values of node m and node n 
 
 are the same. Meanwhile in T* the change in value at 
 
 m* immediately changed the value of n*, since these 
 
 nodes are identical. (See figure 4). Both circuits 
 
 are now again in corresponding states. 
 
 tie see that the transition of type c* — » b* can cause no violation, for 
 
 the decision elements which are excited in state b~ ;; " are also excited in state b, 
 
 since they are not perndtted to change until D has changed. The value at nodes 
 
 m and n are the same in b and b~ ;; ~. Therefore, if a violation were to occur in T* 
 
 at b*, it must also occur in T at b, which is impossible. 
 
 Theorem XII . j^very decision element output may be written as a function of its 
 
 inputs and its state, whether it is in equilibrium or non-equilibrium, i.e., an 
 
 n input decision element ouout may be written as a Boolean function of n+1 variables, 
 
 Let D be a general decision element as defined in Internal Report No. 66, 
 
 Then a set of equilibrium states of D is given by its specifications. The list has 
 
 the form x, x~ X f. where the values of the x. and f. are either zero or one 
 
 i i i v 
 
 and where the x. are the inputs of D and the f . the single output. 
 J v 
 
 There are precisely 2 possible combinations of the inputs of D. If 
 any of these combinations does not appear in the table of equilibrium states, then 
 this input combination can never lead to an equilibrium state. We have agreed in 
 the definition of decision element to then prevent such combinations from occurring,, 
 
 Define the equilibrium function g, where f = g(x.,Xp ...x ). The range 
 of the independent variables x. x» ... x is precisely those combinations which 
 appear in the list of equilibrium states. The dependent variable f has the value 
 (or values) associated with each combination in the list, g is a Boolean function 
 where all variables may have only the values zero or one. One sees that g may be 
 double valued. 
 
 -6- 
 
If D is in equilibrium, then certainly the value of the output of D is 
 given by the equilibrium function g. If, however, the decision element is excited, 
 then f f g(x-. Xp ... x ) , indeed, since g has only two possible values 
 
 f = g(x x x^ ... x K ). 
 
 One notes that if for some combination of inputs, g was double valued, 
 then D could not possiblv be excited when that combination of inputs occurred, for 
 the element would have been in equilibrium whether the output was one or zero. 
 
 Therefore, we now define the complete function 
 
 r 
 
 F = g(x, ,Xp,. . . ,x, ) if D is in equilibrium 
 
 \ 
 
 F = g^x, ,x ? , . . . ,x ) if D is excited 
 
 where F represents the value of the output of D in every case. Une sees that F is 
 really a Boolean function of k + 1 variables where the k + 1st variable V, may have 
 the value of 1 if the element is excited, and zero if it is in equilibrium, life 
 could then write it: F = h(x, x~ ... x, V) 
 
 This process may of course be reversed. Given the complete or equili- 
 brium function, one may write out all combinations for which the function is de- 
 fined, and obtain a table of equilibrium states which correspond to the element' s 
 specifications. Therefore, the specifications and the Boolean equilibrium function 
 of a decision element are equivalent. 
 
 Theorem IV . Let A be a speed-independent circuit. Let B be a copy of A, except 
 that a single element of A has been replaced by two elements, X and Y, in B 
 Then, if 3 is not a speed-independent circuit, a violation of speed-independent 
 criteria will be observed at X or Y. 
 
 une need only see that X and Y satisfy speed-independent criteria, 
 rather than again checking all elements. 
 
 Let a speed-independent circuits A with a decision element B, whose 
 
 outout node is d, be given. Then if B 1 s inouts are the set I = (i n i„, ... i, ) 
 
 12' k 
 
 one may write 
 
 -7- 
 
/~d = f(l) if D is in equilibrium 
 
 d = f(l) if D is excited. 
 
 livery input i. has the value of the single node to which it is connected. 
 
 Construct a circuit 13 which is identical to A except that D has been 
 replaced by two decision elements a and Y with the following properties: 
 
 1. x, the output node of X feeds only Y 
 
 2. The inouts of A are a subset I of 1 and 
 
 x 
 
 x = g(I ) if a is in equilibrium 
 
 2 
 
 '■«V 
 
 if X is excited 
 
 identical, 
 
 3. The inouts of Y are a subset I of I and the line fed by the 
 
 y 
 
 output node x, 
 
 y, tne output node of 
 
 Y = h(l ,x) if Y is in equilibrium 
 
 Y = h(I ,x) if Y is excited 
 7 
 
 4° The equilibrium functions: 
 
 f(D = h(l. 
 
 That is, the equilibrium functions of D and the complex (aY) are 
 
 f(l) -h(l , g(l x )). 
 
 A 
 
 D 
 
 Figure 5 
 
 -8- 
 
One may determine a set of immediate states for both circuits a and 
 B. une further notes that for each such state of circuit B, there exists a 
 unique corresponding state of ci.rc it a. Given the state a' = (a 1 ,b' ,c' ,y. . .n 1 ,x) 
 of circuit B we produce the state^' = (a, b, c, d, .... n) of circuit A. Such 
 a state must exist by the construction of 3 from A. 
 
 When circuits a and B are in corresponding states, the values of all 
 nodes of corresponding decision elements of A and B agree, and the value of y is 
 equal to the value of d. There is, of course, no corresponding node in A for 
 node x. 
 
 We now prove that if B violates the condition of speed-independence, 
 that this violation is detectable at the decision elements X and Y. We consider 
 four cases. 
 
 Case I and 11. 
 
 Let A and B be in corresponding states. 
 
 Let A and Y be in equilibrium 
 Then d = y 
 
 but y = h(l , x) for Y is in equilibrium 
 
 and x = g(l ) for A is in equilibrium 
 
 y = h(l , g(l )) = f(l) by property 4. 
 
 y - x - 
 
 d = f(l) and thus D is in equilibrium 
 
 Now let X. be in equilibrium and Y be excited with A and & in corre- 
 sponding states. 
 
 Again d = y 
 
 y = h(i y , x) 
 
 x = g(l x ) 
 
 y = h(i g (i x )) = firy 
 
 d = f (i) or D is excited. 
 In short, if X is in equilibrium, any change which occurs at node y 
 may also occur at node d. Any changes occurring in an element other than Y in B 
 will also occur in A since the inputs to all other elements are the same in both 
 circuits and since the nodes feeding these inputs have the same value because the 
 circuits are in corresponding states. Therefore, no violation can occur in B, or 
 else a violation must also occur in the speed indeoendent circuit A. 
 
 -9- 
 
Case III. 
 
 Let A and B be in corresponding states. 
 
 X is excited, Y is in equilibrium 
 
 Assume a changes first. Then X is in equilibrium, and we are still 
 in corresponding states, for the change in node x has no effect on the state 
 correspondence. :!e again have Case I or 11. 
 
 Assume some other element M of circuit B changes first. If the 
 output of M is an input of X and if that input is critical (its change would 
 place X in an equilibrium state without a change on the output node x violating 
 condition k) a violation occurs. 
 
 . is is the only possible violation, for Y in this case is in equi- 
 librium, and since A and B are in corresponding states, a violation at any other 
 element in B implies a violation at the corresponding element in A. 
 
 Case IV. 
 
 Let A and B be in corresponding states. X and Y are both excited. 
 
 One of three possibilities exists. 
 
 A. X changes first. Then if the input from node x to Y is critical, 
 a violation occurs at Y. If this input at node x does not affect 
 the state correspondence, we have Case II. 
 
 B. Y changes first. We will assume the input to Y from node x is 
 non-critical, for were it critical it could be detected at IV A 
 above. 
 
 Therefore, before the change, 
 
 y = h(l , x) and since the input from x to Y is non-critical, 
 the value of x has no affect upon the function. That is 
 
 y = h(l y , x) = h(I y , x) 
 and x = g(l ) that is X is excited. 
 It follows that 
 
 y = h(l y , g(I x )) = KJJ 
 
 and since the circuits are in corresponding states 
 
 d = fU7 
 Therefore D is excited. 
 
 -10- 
 
One sees as y changes value in circuit B, d changes value in 
 circuit a, and the circuits therefore are again in corre- 
 sponding states. X is still excited, and we have a^ain Case III. 
 G. X and Y change simultaneously. We may again assume that the 
 input from node x to Y is non-critical. Then by the argument 
 of IV 3 if Y changes D must also change. Since the change of 
 node x has no effect upon the state correspondence, both circuits 
 are again in corresponding states, and we have Case I. 
 It is clear that in any case a violation in B nay be detected 
 as a violation at the decision element X or Y. 
 
 EXAMPLES OF SPEED-INDEPENDENT COUNTERS 
 
 Scale of One Counter: 
 
 As seen from the definition, a scale of one counter is a trivial cir- 
 cuit, for any circuit having two nodes which alternately change value falls into 
 tnis classification. For the sake of completeness, an example of a totally- 
 sequential scale of one counter is given below. The cumulative states, shown 
 below the diagram, are vectors, each component representing one node of the cir- 
 cuit, whose elements are the positive integers which denote the number of changes 
 in signal occurring at the given node, since the circuit began operation in the 
 initial state. 
 
 NOT 
 
 Cumulative 
 
 a 
 
 b 
 
 
 
 
 
 1 
 
 
 
 1 
 
 1 
 
 2 
 
 1 
 
 2 
 
 2 
 
 / 
 
 * '\ 
 
 Figure 6. 
 
 Immediate 
 
 a 
 
 b 
 
 
 
 
 
 1 
 
 
 
 1 
 
 1 
 
 
 
 1 
 
 
 
 
 
 MDIIAY 
 
 Initial 
 a b 
 
 
 -11- 
 
Scale of Two Counter: 
 
 The scale of "two" counter is not so simply constructed as the trivial 
 scale of "one". One first notes that certain constraints are placed upon the 
 cumulative states by the definition of the counter. We know that the counter cir- 
 cuit must contain two nodes, say a and b, such that a changes value twice, for 
 every one change at b. Let us assume that these are the only nodes in the circuit. 
 Then we may write the following table of cumulative states. 
 
 If we choose (0,0) as 
 the initial state of 
 the circuit, the imme- 
 diate state diagram nay 
 be obtained from the 
 cumulative states taken 
 (mod 2) . 
 
 Cumulative 
 
 Immediate 
 
 Initial 
 
 a b 
 
 a 
 
 b 
 
 a b 
 
 
 
 
 
 
 
 
 
 1 
 
 1 
 
 
 
 
 2 
 
 
 
 
 
 
 2 1 
 
 
 
 1 
 
 
 3 1 
 
 1 
 
 1 
 
 
 4 1 
 
 
 
 1 
 
 
 4 2 
 
 
 
 
 
 
 One sees, by referring to the immediate state diagram, that there is not 
 a sufficient number of decision elements (we recall that every component of the 
 state diagram represents a node, and that each node is connected to a decision 
 element) to realize the assumed circuit. For one sees that if the circuit is in 
 state (0,0), first node a, and only then node b must change. This implies that 
 both elements must be excited in this state, but then either element may change 
 first. To differentiate one change from the other, we must add another decision 
 element, hence another node. Call the new node c and add it in the manner indicated, 
 
 Cumulative 
 
 Immediate 
 
 Initial 
 
 a c 
 
 b 
 
 a 
 
 c 
 
 b 
 
 a c b 
 
 
 
 
 
 
 
 
 
 
 
 
 
 1 
 
 
 
 1 
 
 
 
 
 
 
 1 1 
 
 
 
 1 
 
 1 
 
 
 
 
 2 1 
 
 
 
 
 
 1 
 
 
 
 
 2 1 
 
 1 
 
 
 
 1 
 
 1 
 
 
 3 1 
 
 1 
 
 1 
 
 1 
 
 1 
 
 
 3 2 
 
 1 
 
 1 
 
 
 
 1 
 
 
 4 2 
 
 1 
 
 
 
 
 
 1 
 
 
 4 2 
 
 2 
 
 
 
 
 
 
 
 
 -12- 
 
From the new immediate states we may now derive equilibrium equations for the 
 decision elements A, B, C* associated with nodes a, b, c. The equations are 
 
 a' = (b0c) 
 
 b' = ac v b(a v c) 
 
 c' =abvc(avb) 
 
 The totally sequential circuit appears in the figure below where the decision 
 
 elements are defined by the corresponding truth-tables. 
 
 c 
 
 j~*- 
 
 ® 
 
 i% 
 
 c» 
 
 b\° 1 
 
 1 
 
 
 
 
 
 1 
 
 a\ C 1 
 
 
 
 1 
 
 a\ b 1 
 
 
 
 1 
 
 b 
 
 b 
 
 
 
 II 1 
 
 Figure 7» 
 One sees that the elements B and C* are dependent upon their last 
 output, that is, they contain a certain amount of "memory". This suggests that 
 one replace them by either 'C or F elements in the sense of theorem 4. This can, 
 in fact, be done. One obtains the following C-element realization of a scale 
 2(a, b) counter 
 
 Figure 8. 
 
 -13- 
 
where the I elements are inhibit elements previously defined. The above circuit 
 is speed-independent. The element B has been replaced by the "inhibit", "or", 
 and "c-element" which has the same "combined" equilibrium equation, while a 
 similar substitution has been trade for the element C. The element A may be 
 replaced by the usual half -adder combination, inverted. 
 
 Now consider the single-ended, single-moving-point F-flipflop. If we 
 replace the elements B and C of the totally-sequential circuit by combinations 
 including these elements we obtain a simpler circuit. 
 
 Figure 9. 
 The above circuit we see is a scale of 2(a,b) counter, but is no longer speed- 
 independent. 
 
 If the not element is slow to act: 
 
 1. both gates may operate at the same time, and 
 
 2. if both F elements are sufficiently fast, the element A may 
 
 go from an excited to an equilibrium state due to only an input 
 change violating the condition of speed-independence. However, 
 by adding the circuitry indicated below, the speed-independent 
 property is preserved. 
 
 -14- 
 
a <> 
 
 Figure 10. 
 
 Scale of Three Counter: 
 
 One proceeds in the same manner as in the construction of the scale 
 of two counter, noting that the c-state values of two of the nodes, a and b, are 
 already determined. We again see that there are not sufficient elements to 
 determine these states. In fact, two more elements must be arbitrarily added. 
 
 C-State 
 
 I-State 
 
 a b 
 
 a b 
 
 
 
 
 
 1 
 
 1 
 
 2 
 
 
 
 3 
 
 1 
 
 3 1 
 
 1 1 
 
 U 1 
 
 1 
 
 5 1 
 
 1 1 
 
 6 1 
 
 1 
 
 6 2 
 
 
 
 We determine their operation (nodal values) as follows. 
 
 -15- 
 
J ,,: .. , -.i.v-- tate -. . ^" - bate Initial State 
 acdb acdb acdb 
 
 0000 0000 0000 
 
 1000 1000 
 
 1100 1100 
 
 2100 0100 
 
 2110 0110 
 
 3110 1110 
 
 3111 1111 
 4111 0111 
 4211 0011 
 5211 1011 
 5221 1001 
 
 6221 0001 
 
 6222 0000 
 
 Choosing the initial state as (0 0) we are again in a position to 
 derive circuit equations. They are: 
 
 a' = (b® c ©d) 
 b' = acd v b(a v c v d) 
 c 1 = abd v c(a v b v d) 
 d' = abc v d(a v b v c) 
 If one now considers each of the four equations as equilibrium equations 
 of four decision elements, one determines a totally sequential circuit of four de- 
 cision elements, the output of each connected as an input to the other three. The 
 circuit is a scale 3(a,b) counter. 
 
 Two c-element realizations are possible for this circuit. The first is 
 obtained by splitting up the lower elements in the sense of theorem 4. This may be 
 done in the manner shown on Page 17. The circuit on Page 17 retains the speed-in- 
 dependent property, however, multiply inhibited decision elements are necessary for 
 its realization and one would hope for a simpler circuit. 
 
 Such a circuit is given on Page 18. The initial state of the circuit 
 is (abed) = (0101), and its cumulative states correspond exactly with those given 
 above. 
 
 -16- 
 
Figure 11. 
 
 Circuit equations, written directly from the circuit of Figure 12, are: 
 
 a 1 = be v bd v cd 
 b' = ad v b(a v d) 
 c 1 = ab v c(a v b) 
 d 1 = ac v d(a v c) 
 
 -17- 
 
*/e note that this counter is totally-sequential. 
 
 Figure 12, 
 
 The Scale of "N" Counter (odd N) 
 
 It is always possible to construct a totally sequential scale of 
 N counter by suitably choosing the n-1 nodes not already defined. As in the 
 scale of tnree counter a circuit of n + 1 nodes may be constructed which runs 
 through 2n ♦ 2 immediate states. If one agrees to an initial state with all 
 nodes set to zero, one may derive circuit equations for each decision element 
 of the following form: 
 
 F.=F 2 ^F 3 0...0F n+1 
 
 F! = G.F^F n ... F. 
 
 i 2*3 
 
 P. - ... F v F.(G, v F_ v F_ v ... v F. . v F. . v 
 
 l-l l+l n+1 li 2 3 1-1 i + l 
 
 where i ^ 1 and 
 
 G. = 
 
 i 
 
 'F, if i is even 
 F~ if i is odd 
 
 F n*l> 
 
 In the example for Figure 11 we may equate corresponding symbols as: 
 a - F ± , b = F 4 , c = F 2 , d = F 3 
 
 One may now, just as in the scale of 3 design, break these decision 
 elements into less complex types, obtaining the circuit on Page 19. ./here the 
 
 -18- 
 
I elements shown are multiple inhibit elements. The number of decision elements is 
 Un * C, where C. may be realized either as n-1 exclusive or circuits or the analogue 
 to the majority element with n-inputs. The latter inay be constructed from C + 1 
 "and" and "or" elements. 2 
 
 . ftire 13. 
 (Connections not shown depend upon value of scale n.) 
 
 -19- 
 

Again, the totally sequential scale of 3 counter may also be 
 eralized to the scale of odd n(i,j) counter. The circuit appears below. 
 
 Figure 14. 
 
 The M element is again the n-input analogue of the iiiajority element and nay be 
 
 realized with C , + 1 "and" and "or" elements. The number of decision elements 
 n+1 
 
 2 
 
 in the entire circuit is therefore 2n+ C ,+ 1. 
 
 n-t-1 
 
 2 
 ..ith the scale of odd n-counter (Page 19) and the F-element scale of 
 two counter, speed-independent counting circuits from any scale n(i,j) may be 
 realized, 
 
 ■ -.-1 of the speed-independent counting circuits so far derived have 
 the following properties. 
 
 I. An end signal occurs after each count which may be used to 
 initiate the new count. 
 II. If any element of the circuit fails to function, the entire 
 circuit as a whole will stop . 
 
 It r. ay be noted that in a check of counting circuits actually in 
 operation, none with speed-independent properties were found. In these circuits 
 if a decision element failed to act, at least a portion of the circuit continued 
 to count. Such is the case for the Illiac counter shown below. 
 
 -20- 
 
DOWN 
 
 DOWN 
 
 Figure 15 
 
 ,1) 
 
 ~everal stages of this form are connected together in order to obtain a scale 2 
 counter. 
 
 If the "and" element designated by the asterisrc were slow to act 
 when this element became excited, its inputs might change placing the element in 
 equilibrium before the element acted, tnus violating the condition of speed- 
 independence and causing an error in the correct count „ 
 
 If the element failed to act, this would not affect any stages which 
 preceded that stage to which the element belonged . 
 
 one sees that this difficulty is completely avoided if speed-inde- 
 pendent equipment is used, 
 
 -21-