1 m LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAICN 5IO.S4 1461- no. 343-346 coip. 2 The person charging this ^^Z latest Date stamped below ■ ..—Jarlinina of L161 _O-10% 'TyuL-^&t REPORT WO. 3^5 COO-1U69-01U3 THE HARDWARE DESIGN OF A COGNITIVE MODEL DEMONSTRATOR by TIEN-REN RICHARD CHENG AUGUST, 1969 DEPARTMENT OF COMPUTER SCIENCE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS Digitized by the Internet Archive in 2013 http://archive.org/details/hardwaredesignof345chen Report No. 3^5 THE HARDWARE DESIGN OF A COGNITIVE MODEL DEMONSTRATOR* by TIEN-REN RICHARD CHENG August, 1969 Department of Computer Science University of Illinois Urbana, Illinois 618OI Supported in part by Contract Number U.S. AEC AT(ll-l) lh69 and submitted in partial fulfillment for the degree of Master of Science in Electrical Engineering, at the University of Illinois, August, 1969- 1X1 ACKNOWLEDGEMENT The author is very grateful to his advisor, Professor S. R. Ray, for suggesting the problem and for much guidance and encouragement. He •would also like to express appreciation to Miss Carla Donaldson for typing the manuscript. IV TABLE OF CONTENTS Page 1. INTRODUCTION 1 2. THE BLOCK DIAGRAM AND FUNCTIONS OF THE SYSTEM 5 2.1 The Overall System 5 2.2 The Functions and Block Diagram of the Block 8 2.3 The Functions and Block Diagram of the Front End ... 10 3. THE CIRCUITS AND FUNCTIONS OF THE BLOCK Ik 3.1 The Serial Number Detector and Trigger Circuit .... Ik 3.2 The Bandpass Filter Circuit 16 3.3 The Trigger Generator Circuit 16 3.4 The Attributes Encoder 16 3.5 The Infrared Transmitter 20 3.6 The Ultrasonic Locational Marker Generator and Transmitter 20 k. THE CIRCUITS AND FUNCTIONS OF THE FRONT END ......... 2k k.l The Ultrasonic Detector and Trigger Circuit 2k k.2 The Time Detector 2k U„3 The Serial Number Generator and Transmitter 27 k.k The Attributes Detector 27 4.5 The Threshold Detectors (A/D) and Digital Encoders . . 30 U.6 Pulse Time to Voltage Converters 30 4.7 The Locational Coordinate Computing Circuit 38 LIST OF REFERENCES ^3 LIST OF FIGURES Figure Page 1. Block Diagram of a Cognitive Model 2 2. The System Timing Diagram 6 3. Block Diagram of the Hardware Portion 7 k. The Block 9 5. The Overall Block Diagram of the Front End 11 6a. The Locational Computation System 12 b. The Locational Computing Subsystem for x Coordination . . 13 7« The Serial Number Detector Circuit 15 8. The Bandpass Filter Circuit 17 9. The Trigger Generator 18 10. The Attributes Encoder 19 11. The Multiple Coded Attributes Encoder 21 12. The Infrared Transmitter 22 13. The Locational Marker Generator 23 Ik. The Locational Marker Detector and Trigger Generator ... 25 15. The Time Detector 26 16. The Serial Number Generator and Transmitter 28 17. The Attributes Detector 29 l8a. A Basic Threshold Detector Circuit 31 b. The Threshold Detector Characteristics 31 19a. A Voltage Band Detector Circuit 32 b. A Version of a Voltage Band Detector Circuit 33 20a. Threshold Detector and Encoder 3^+ VI Figure Page b. A Version of a Threshold Detector and Encoder 35 21. The Time to Voltage Converter and the Characteristics . 36 22. The Ramp Generator and Holder 37 23. The Location Detection Arrangement 39 2k. The Determination of x ^-0 25. The Analog Computing Circuit k2 1. INTRODUCTION This study is concerned "with the development and design of the hardware portion of a hypothetical cognition system. One to two decades of experience with machine translation of languages and library information retrival have made it abundantly clear that the ultimate solution of these problems cannot be achieved by pure syntactic analysis, rewriting of constitutents and other related techniques . Completely satisfactory mechanical solution of these interhuman information transfer problems requires mechanical devices which form a representation of "meaning" of the communication -- that is, a more or less rudimentary "understanding" of a communication. There is substantial psychophysical evidence which supports the hypothesis that language is a particular coding of a more fundamental (probably largely non-linguistic) representation of relationships between physical sensations encountered in the environment. This latter repre- sentation is frequently called the "cognitive model" or the "world model". The author is thus motivated to explore a possible working model of the cognitive system. The hypothetical cognitive system is to be able to perceive (without a TV camera or other projection type of viewer) a scene, interpret the implicit meaning and react properly. In other words, the system is able to detect, discriminate, search file, compare the perceived information with the memorized information and decide how to react. Figure 1 is a simplified block diagram of a hypothetical cognitive system. n m S 1 UJ uj cr UJ z £ o V) 5 z < o cr z o 3 2 2 z o o t7. o 3 O •H -P •rH CI M O u o o o <-* The sensor represents a group of various types of devices which respond to various stimuli, e.g. visual, sonic, etc. The detectors detect the information and store it in a temporary storage register. The sorter catagorizes the new information with the assistance of the memory and then the search and comparison system will file the new information at the proper location in the memory and the results from the comparison action are stored in the memory also. A subsystem will decided what reaction should be taken upon the stored information from search and comparison. A communication subsystem will send questions or answers to a human operator by video, audio or other means. If the information being perceived is not complete, the reaction will be to order the sensors to sweep the areas about which more needs to be known. The operator may give instruction to the system by means of keyboard operation or through punched paper tapes. Although this model can be implemented by hardware alone, large portions of the system can be achieved by software (computer program) representation also. The hardware portion does the detection, encoding and some computation, and then provides the computer with highly pre- processed information. To study the problems contained in the hardware portion of the overall system, a test model system is designed to demonstrate the basic function. Data obtained will assist further investigation. The model system consists of two major parts: l) the "front end" of the cognitive system and 2) the scenary representation blocks. The scenary is formed by a group of blocks (e.g. 20 to 30 per scene) placed in a certain arrangement or formation. Each block is to represent a collection of cognitive information. Thus a group of blocks with significant locational arrangement will represent large amounts of information. From the human observer's view, the blocks are the same size and shape but painted in different colors to identify the attributes. This enables the demon- stration of the ability of the front end, i.e. 1) to identify the location of each block and 2) to read the attributes of each block. To demonstrate the information processing ability of the front end of the model, a control system is to react upon the perceived information and rearrange the blocks so the information can be typed out through a teletype console. 2. THE BLOCK DIAGRAMS AND FUNCTIONS OF THE SYSTEM The hardware portion of the demonstration model of the hypothetical cognitive model consists of two sets of subsystems as indicated in the previous chapter. In this chapter the author intends to introduce the overall system function and then the subsystems. The general function of each subsystem is discussed here and more detailed information is given in Chapters 3 and k. 2.1 The Overall System The front end and the blocks are designated as "F" and "B ". n The front end transmits periodically a coded signal which represents the serial numbers of each block. The block responds with the information of its location and the attributes it implements . The front end then codes the attribute information put in the register and then computes the location P (x,y) of the block and stores P (x,y) . The front end then acts upon the second block. All of the coded information in the temporary storage will be sorted and recoded ready for entry into a large scale digital computer. Figure 2 shows the timing of the inter- action between front end and the blocks. Figure 3 illustrates the over- all system function. The front end transmits the signal with RF modulated infrared, while the block transmits the locational marker in ultra-sonic energy and the attributes in infrared energy. These modes of transmission are chosen so that an observer will not sense that information has been transmitted from the blocks to the front end. This choice simulates the fact that an observer in a natural 1 1 i 1 1 1 1 1 i n C\J lE UJ CD 3 »- Z < DC 3 CD < 5 or S < QC UJ »- Si < z o CO 5 o 3 u faO •H Q W> C •d S •H EH -P W OJ tu •H UJ s o 5 UJ z o cr u. u. Q- o •H o S •P O •H Q O O H PQ en •H 8 situation is unaware that the information has been transmitted in the environment. 2.2 The Functions and Block Diagram of the Block The block consists of three subsystems: 1) the serial number detector and discriminator; 2) the locational marker generator; and 3) the attributes encoder and transmitter. Figure k is the overall block diagram of the complete ,r block". The IR detector senses the serial number transmission. If the frequency corresponds to the specific frequency, there will be an output ■which turns on the trigger generator and generates a pulse "P". "P" triggers monostable multivibrators "A" and "B", where "A" turns on the gate and gates the ultrasonic power into the ultrasonic transducer, "Tus", the transmitter of the locational marker. Since location is computed through time dealy of the ultrasonic signal, the time delay on each component of the system is needed for location computation. Fortunately, the propagation delay in each circuit here is in the range of tens of nano-seconds. The ultrasonic signal is traveling at a speed of around 0.3 meter per millisecond. Thus an average sum of time delay t n =t + t, + t + t, + t , as shown in Figure h, is accurate enough dabgknr for the computation. Monostable multivibrator "B" is used to gate the pulses to a ring counter. The ring counter distributes the pulse through a digital encoder which codes the attributes of this block. The digital codes are then transmitted by the infrared emitter. M o o H PQ 10 2.3 The Functions and Block Diagram of the Front End The front end consists of five major circuits: 1) the serial number generator and transmitter; 2) the ultrasonic detector and time detector; 3) location computer; k) the attributes detector; 5) threshold encoder. Due to the complexity of the system and the separability of the circuits, the overall block diagram is shown in Figure 5 in an over- simplified form and some more complicated subsystems will be shown independently . The clock pulse triggers the serial number generator and the time detector simultaneously. When the ultrasonic detector detects the responding locational markers from a block, a trigger pulse is generated which triggers the time detector to generate a pulse with width T seconds corresponding to the distance between the block and ultrasonic detector. The pulse width is converted into voltage amplitude and together with three other pulses is fed into the locational computer to find the coordinates x and y. The analog P(x,y) signal is digitized and coded through a threshold encoder. Simultaneously, the attribute detector senses the coded pulse and stores it in the register. After the completion of the information processing of a block, the information is fed to computer storage. The second clock pulse repeats the same cycle until the last serial number is addressed. A signal is sent to the computer indicating the completion of this "perception". Figure 6a shows the locational computation system and Figure 6b illustrates the locational computing subsystem for x coordination. INFRARED TRANSMITTER 0- ULTRASONIC DETECTORS > > ~> > INFRARED DETECTOR ~D- DRIVER TRIGGER TRIGGER * TRIGGER SERIAL NUMBER GENERATOR 8 h~ CONTROL I Jl MANUAL CONTROL TRIGGER JL ATTRIBUTES COOING TIME DETECTOR TIME DETECTOR TIME DETECTOR TIME DETECTOR REGISTER Jl CLOCK GENERATOR I MANUAL CONTROL TO DIGITAL COMPUTER LOCATION COMPUTER LOCATION COMPUTER t, t 2 11 Y 1L 1X THRESHOLD LOGIC ENCODER POC.Y) Figure 5. The Overall Block Diagram of the Front End. Q_ 5 12 St 5 : o X h- CL cc UJ K - > > z Z o o z b Z H o ?* O £ > — H >W^ ^ W Z> PtKQ. OKI H LLJ 2 HUJ5 K>0 -z o »->o o ^ o z. O Q o o z z .< or p < h- UJ h- UJ Q UJ c ) c! ) 1 - d s 02 (3 o •H 13 I f O ■d d o •H -P cd o o h3 M •H 13 X > N X > X a o IS a •H u o o o o (D -p w 02 CO a •H -p I o o cti o •H -P cti O o CD EH •H Ik 3. THE CIRCUITS AND FUNCTIONS OF THE BLOCK The Block contains three independent groups of circuits : 1) the serial number detector and trigger generator; 2) the locational marker generator and transmitter; 3) the attributes encoder and trans- mitter. The block has a size of k x h x 3 cm to contain all of the integrated circuits and a transistor. It is powered by two miniature batteries. The author intends to discuss the generally used circuit briefly and only give the detailed discussion to the specially developed circuits for this system. 3.1 The Serial Number Detector and Trigger Circuit This is an infrared (IR) detection circuit which detects and demodulates the frequency modulated infrared signal. A bandpass filter is used to discriminate the incoming frequencies. If the output of the filter reaches a defined voltage, the trigger circuit will generate a sharp pulse to start the sequential operation of the block. The IR Detector Circuit is shown in Figure "J. In the quiescent state, i.e. when there is no IR signal, R is adjusted to balance the bridge. A differential amplifier K, is used to amplify the signal level for the bandpass filter input. Since the differential amplifier has very high Z. , the IR diode is chosen to have high resistance, thus the detector portion power consumption is minimized. 15 Figure 7. The Serial Number Detector Circuit, 16 3.2 The Bandpass Filter Circuit Due to the possible frequency drifts in the frequency generator and in the tuned circuit in the block, each block is assigned a band of frequency instead of a single resonant frequency. Since low frequency RF is used in the system, an LC circuit would be too large to put in the block. An active RC filter is thus designed for this purpose. By using high Z. operational amplifiers the size of the filter is very small. The bandpass filter circuit is shown in Figure 8. 3-3 The Trigger Generator Circuit The trigger generator produces a sharp pulse upon the output from the bandpass filter. This pulse is to trigger the location mark generator and the attribute encoder. The trigger circuit is shown in Figure 9. It is essentially a Schmitt trigger circuit with D, and C to rectify and smooth the filter output. When T p is switched off, a positive pulse is emitted from the differentiator, C and R . 3.4 The Attributes Encoder The attributes encoder is shown in Figure 10. It is a programmable digital encoder which produces a serial six bit signal. The signal starts upon the trigger pulse. The coding programmer is a set of six junctions (simulation of switches) programmed by connecting with wires to obtain a "1" and disconnecting the junction to obtain a "0". The pulses are generated by a free running multivibrator and then distributed by a circular counter. UJ o < H CO CO CO 1 X 1 o - 1 -L- 17 +3 •H O •H O -p H •H pq w w cd FQ 00 •H P-4 18 UJ $S^ ||i u o -p u c 0) u V bD W> •H EH ON 0) •H Pn O iii 19 lu o O r n n;\\\\s: Ui Q O O AAA, ||l 0) •X3 O o a w w 0) -p ^2 •H Jh -P -P O H •H P>4 uj t- ° ? E2 20 If more words are needed to code the attributes, a version of the encoder is shown in Figure 11. 3.5 The Infrared Transmitter The IR transmitter is an infrared emitting diode which is driven by a transistor amplifier. The amplifier is a single stage emitter follower to match the characteristics of the IR emitting diode. The infrared transmitter is shown in Figure 12. 3.6 The Ultrasonic Locational Marker Generator and Transmitter The ultrasonic signal is generated by a simple Armstrong oscillator. To insure fast response to the trigger pulse, the oscillator is operating all the time on stand-by. When the circuit is triggered the ultrasonic signal is then gated into the transducer and the length of the transmission is controlled by a monostable multivibrator. The circuit is shown in Figure 13. o 9 21 r^\ an www w^]j_J\ r \^w" e°- tc. M tr. < _) o U a> -d o o W w U. h, 2 22 cd u -p -p •r) a 0) H •rl 23 o u CD a cu U P •rl EH H (L) •rl P"4 _-J o cr u. 27 4.3 The Serial Number Generator and Transmitter The generator generates frequencies which represent the serial number of a block. The frequency changes sequentially upon the clock triggering pulse. A BCD counter of 5 bit capacity is used to control high speed reed-relays which change the combination of capacitors to control the oscillation frequency. The frequency range is assumed to be 50 KC - 100 KC with a space of at least 1 KC apart between neighboring signals. Since the counter is a 5 bit BCD counter, a total of 32 serial numbers can be addressed. A monostable multivibrator is used to control the length of the transmission of serial numbers. Figure 16 illustrates the complete circuit diagram of the generator and transmitter. The delay time of the reed relay t is measured and used for locational computation. If manual control is desired, the frequency can be controlled by a set of switches. k.h The Attributes Detector The attributes detector is the simplest circuit of all since the signal was coded by the blocks. It is necessary only to detect the coded pulses and restore the signal level. The signal is then stored in a temporary storage register. The circuit is shown in Figure 17. The IR detector is a bridge circuit. When there is no signal, R is adjusted to null the bridge output. A high gain differential amplifier is used to amplify the signal. A Schmitt trigger restores the logic level and then stores the signal in a register. The attributes signal is coded in 6 bits. 28 O o CM ,. U. U- U- CVI IO * O O O I" o o a m O li m o o 1 1 i i c > < \ u u a j i j i c \ J J -p -p EH c CO o -p oj to a> a & to H a •H CO lj 29 O O g 4 q: lj (0 1- LaJ e> LJ LJ QC q: i i \-H J i *ty — Hh // LJ o -p o CD -P « W 0) •H -P 3 ^r •H 30 U.5 The Threshold Detector-s (A/P) and Digital Encoders This is the locational computation output section which converts the analog coordinator information in voltage level to digital form so that the location P(x,y) can be read as P. (0,4) or P. (12,17), etc, A basic threshold detector circuit is shown in Figure l8a. The characteristics of the circuit are shown in Figure l8b. A more sophisticated version is shown in Figures 19a and 19b. The overall detection and encoder circuit is shown in Figures 20a and 20b. h.6 Pulse Time to Voltage Converters To compute the location of the block, distances in between the block and ultrasonic microphones are measured by the propagation time T of the ultrasonic signal. T needs to be converted to voltage for analog computation. To convert the pulse time into voltage signal an integrator is used to generate the ramp voltage. The output of the ramp is deter- mined by the two pulses which mark the time T. Figure 21a illustrates the converter. Figure 21b is the characteristics of the time to voltage converter. Figure 22 shows the circuit of a ramp generator. The working principle of the T to V converter is as follows: The clock pulse triggers the time detector and generates a pulse T. T, together with a positive source, then turns on the ramp generator. Thus, the ramp function is started by the rise of pulse T. When T falls, the ramp function stops rising and a holding circuit arrangement, implemented in the integrator, will hold the peak ramp for many milliseconds to enable the computing of all converted voltages at the same instant. An electronic switch is used to discharge the capacitor of the integrator. 31 v IN o R 2 R3 -WAr €> /$V R4 *5 [ 8 /T«6 *z OVcc •ovo Figure l8a. A Basic Threshold Detector Circuit. E,>V,+V r E 2 >V 2 +V r + t,E Figure l8b. The Threshold Detector Characteristics, 32 v, N o I -^yy" ^D| ■ o -o Vcc w\^ SD 2 -. R, AD 3 o ■>> £d 4 ■o V fiA709 € E 2 >E E2 R 5 f -ovcc v 4 E| E 2 Vim Figure 19a. A Voltage Band Detector Circuit. 33 Vcc A v II *r V| N W *■ I OR 10 R — VSA, \o, 4 it Op AMP Vi Vcc E,"V r E 2 -V r J -OVoi ♦ ♦ *WV- E 2 «> T 2 ^ rrO C3 R 6 sr 7=RC 2 D 2 Vcc "cc E 2 >E, [b,V| N E 2 -V r Vin Figure 19b. A Version of a Voltage Band Detector Circuit 3k V| N ° OVoi O V02 OV 03 OVo4 Figure 20a. Threshold Detector and Encoder, 35 v, N o- RFC - nnrv> — +-A\ COUPLED BPF=BAND PASS FILTER ST-SCHMITT TRIGGER — ere- •V,n Figure 20b. A Version of a Threshold Detector and Encoder. 36 h-T -H FROM TIME DETECTOR AND MONOSTABLE MV $d NAND k-Tc R v C c + v cc " O Q RAMP GENERATOR A- B+ -OE Ts > Tx AND Ty Figure 21. The Time to Voltage Converter and the Characteristics. 37 E| N ° IOK Figure 22. The Ramp Generator and Holder, 38 The switch is controlled by a monostable multivibrator for the open time (it is a normally closed switch.) There are four identical units like this for the conversion of T .. T _, T _ and T „ to V ,, V A , V , and xl' x2' yl y2 xl' x2 5 yl V k.'J The Locational Coordinate Computing Circuit There are two sets of the computing circuit, one for the x-axis and the other one for the y-axis. This is an analog system which utilizes the availability of integrated circuit analog multipliers and operational amplifiers. To show the computation process, the algorithm which leads to the circuit design is as follows : Let the blocks be placed in an area W x W and enclosed by a wall. The four ultrasonic detectors are mounted on each wall and at the center of the walls. See Figure 23 for the arrangement. Assume a block B. is located at point P. (x,y) and is trans- mitting the ultrasonic marker. The time for the ultrasonic wave to travel from the block to the detectors DX, , DX ? , DY and DY ? are taken to be T , , T ~, T n and T ~. The x coordinate and y coordinate can- be xl' x2' yl y2 evaluated with the same arrangement. Figure 2h shows the determination of x. 39 W/2 W/2 X,,X 2 ,Y|aY 2 ARE MICROPHONES Figure 23. The Location Detection Arrangement. ko D(X,Y) Dx, Figure 2k. The Determination of x. 1+1 It is clear from Figure 2k that x can be found as follows: h 2 = T xl 2 - x 2 . T x2 2 - (W-X) 2 2 2 2 2 2 x = T xl - T x2 - W + 2WX + x 2 2 2 T . - T - + W • • x - 2W y can be found with the same manner as y = 2 2 2 T _ - T _ + ¥ _ yi y2 2W The computing circuit is shown in Figure 25. In order to do the computation after V , and V _ are all xl x2 obtained before the multiplier is operating, a control circuit is designed by using a monostable multivibrator which starts a pulse M by the main clock pulse and ends at t = T max. The multiplier operates at the end of the pulse M. The output V is then coded into digital form. 1+2 QC m m < z> o o s CO X >- CVJ X 5 2 z cr UJ cr < m in 3 o o to Z X >- X > x -p •H ?! O ^ •H O sd •H -P I O o bO O OJ bO •H ^3 LIST OF REFERENCES Amosov, N. Modeling of Thinking and the Mind . Macmillan, I967. Cox, J. R. and D. H. Glaeser. "A Quantizing Encoder", IEEE Transactions on Computer Electronics . June, 196^. pp. 250-25^o Crawford, A. Ultrasonic Engineering . Butterworth, 1955* Deutsch, S. Models of the Nervous System . Wiley, 1967. Flores, I. Computer Sorting . Prentice Hall, 1969. Gray, J. R. and S. Kitsoponos. "A Precision Sample and Hold Circuit with Subnanosecond Switching", IEEE Transactions on Circuit Theory . September, I96U. pp. 389-396. Light, L. , J. Badger and D. Barnes. "An Acustic Ray Tracing Computer", IEEE Transactions on Electronic Computer . October, I966. pp. 719-723. Riordan, R. H. and R. R. A. Morton. "The Use of Analog Techniques in Binary Arithmetic Units", IEEE Transactions on Electronic Computer . February, 1965. pp. 29-35. Singh, J. Great Ideas In Information Theory, Language and Cybernetics . Dover, 1966. Smith, F. "Coding Analog Variables for Threshold Logic Discrimination", IEEE Transactions on Electronic Computer . December, 1965- pp. 91+1- 9^3- Steiner, ¥. G. Potentiomatrix — A Novel Display System Possessing "Innate Intelligence" . Department of Computer Science Report 307, University of Illinois, Urbana, Illinois. February, I969. Form AEC-427 (6/68) AECM 3201 U.S. ATOMIC ENERGY COMMISSION UNIVERSITY-TYPE CONTRACTOR'S RECOMMENDATION FOR DISPOSITION OF SCIENTIF?- AND TECHNICAL DOCUMENT (' Sm Instructions on Rtwrse Side ) 1. AEC REPORT NO. COO-1U69-01U3 2. TITLE THE HARDWARE DESIGN OF A COGNITIVE MODEL DEMONSTRATOR 3. TYPE OF DOCUMENT (Check one): aI a. Scientific and technical report I I b. Conference paper not to be published in a journal: Title of conference Date of conference Exact location of conference. Sponsoring organization □ c. Other (Specify) 4. RECOMMENDED ANNOUNCEMENT AND DISTRIBUTION (Check one): Pm a. AEC's normal announcement and distribution procedures may be followed. ~~\ b. Make available only within AEC and to AEC contractors and other U.S. Government agencies and their contractors. 3 c. Make no announcement or distrubution. 5. REASON FOR RECOMMENDED RESTRICTIONS: 6. SUBMITTED BY: NAME AND POSITION (Please print or type) Tien-Ren Richard Cheng Research Assistant Organization Department of Computer Science University of Illinois Urbana, Illinois 6l801 Signature /^A***/ 77 ff % _ Date August 6, 1969 FOR AEC U9E/3NLY 7. AEC CONTRACT ADMINISTRATOR'S COMMENTS, IF ANY, Ojf A^OVE ANNOUNCE IISTRIBUTION RECOMMENDATION: 8. PATENT CLEARANCE: I I a. AEC patent clearance has been granted by responsible AEC patent group. I~l b. Report has been sent to responsible AEC patent group for clearance. I I c. Patent clearance not required. C5 C0 UNIVERSITY OF ILLINOIS-URBANA 510 84 IL6R no C002 no 343 348(1969 Internal report / 3 0112 088398653 ■ ft