LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.84 •P0 H COI Digitized by the Internet Archive in 2013 http://archive.org/details/staticmagneticme52wier UNIVERSITY OF ILLINOIS GRADUATE COLLEGE DIGITAL COMPUTER LABORATORY INTERNAL REPORT NO. 52 A STATIC MAGNETIC MEMORY J. M. Wier November 20, 1953 This work has been supported by Contract N6ori-71 Task XXIV United States Navy cm m 0^8 09^ ABSTRACT A digital computing laboratory has a library of routines and many of these routines are used over and over again. It is desirable for the com- puting machine to have a rapid access to these routines. This need can be supplied by a memory from which information can be read-out in a short time but which does not require that it be possible to read- in information in a short time. Such a memory has a rapid access for read-out but a slow access for read-in. Certain economies are possible in a memory of this type as compared to a memory which has rapid read-out and read-in rates. This report describes such a memory which uses magnetic cores. It is estimated that for a storage capacity of 3072 words of ^0 binary digits each, with read-out time of 10 microseconds and a very long read-in time, that 736 cores and about 500 tubes are required. Reading in requires the lacing of drive wires through selected magnetic cores. The principal studies necessary are those of a magnetic switch and of mult i secondary saturable transformers „ A STATIC MAGNETIC MEMORY I INTRODUCTION While there exists a primary need for a more ideal dynamic memory to be used with automatic digital computers, some of this need may be satisfied by the exploitation of a memory system which is not required to have a rapid access for writing, but which has a very short read-out time. Such a memory should be cheap, reliable, of relatively short access, and should be so con- structed as to make the insertion of information as simple as possible, even though it is not a rapid process. This report deals with a memory of the latter type and henceforth, this type memory will be referred to as a static memory. Some of the uses to which such a memory could be put would markedly improve the ease of use of a digital computer. There has been a large amount of effort directed toward the production of subroutine libraries both for the Illiac and for other machines. Further refinements have been added on some other machines in the form of assembling routines of various sorts . To speed this process, large quantities of information have been stored on slower access type memories such as magnetic tape, cards, perforated tape, and even on the relatively more rapid magnetic drum. It is suggested that the memory to be described could very profitably be used with the Illiac to expand on these methods to decrease the average access time, to decrease the coding problem, to decrease the amount of input material and to decrease the average number of coding errors due to the shorter codes possible „ The means for achieving these ends will be explored more completely after a description of the system has been given. -2- II MAGNETIC SWITCHES Saturable reactors of various sorts have been used as control devices operated at relatively low frequencies for some time. With the advent of magnetic materials with extremely rectangular hysteresis loops which are capable of rapid switching, it has become possible to design switching circuits using these devices which will operate at speeds consistent with those of other electronic switching devices. One of the more important applications of these switches in the computer field is their use as multiple "and" circuits. This has made it possible to build matrix decoding circuits utilizing magnetic cores as the switching elements. Since these devices are becoming cheap and since they are inherently very stable, extremely reliable and long lived circuits may be con- structed from them at a relatively low cost. Figure 1 shows a typical saturation hysteresis loop for a square hysteresis loop material. The ratio of the remanent flux density, B , to the saturation flux density. B , is from 0.9 to 0.95 with proper materials. The newer f errite materials are now made into toroids with corresponding ratios . The magnitudes of the quantities B and H differ considerably from metals to ferrites, the latter having lower values of B and higher values of H . ' r c The basic "and" circuit may be considered to be achieved in the following way. Referring to Figure 1, let it be assumed that current sources I.. , 1^, - - - I ., I exist and each assumes values of either or I, where I 1' 2' y n * is chosen such that if I is passed through a winding on the core, a magneto- motive force of -H. is produced. Wow let it be assumed that each of these currents drives or does not drive one of n identical windings on the core. -k- Let it be further assumed that one additional winding exists on the core with a drive which forces the core in the +H direction by +H . Now, the condition that there be a relatively large change in flux in the core when this latter drive is applied is that all of the currents I. be 0. Thus, if the change in J flux is sensed on an additional winding on the core, the advent of a coincidence of all currents and the driving pulse yields a much larger output than if any one of the -H windings is activated. This large pulse is then the output signal from a multiple input "and" circuit. The advantage of magnetic cores in this use is that they may have many inputs merely by winding on a large number of separate windings on the same core. A frequently used application for this type of circuit is in binary decoding matrices. Figure 2 shows schematically a typical device for decoding four outputs from two binary digits input. The connections to the flip-flops indicate that when the flip-flop is in the "l" state, the wire fastened to the "1" side carries a current I, capable of delivering -H to all the cores which are linked. When it is in the "0" state, the wire fastened to that side carries a like current. The common driver provides the -;-H pulse to be transmitted through the switch. Thus if we are in the state, neither saturation wire is energized in the left-hand core and the advent of the common driver pulse will turn over the core. All of the remaining cores are seen to be saturated so only very minor pulses pass through them in this case,, Corresponding events occur with the other states of the flip-flops. Certain variations on this particular switch may be used whereby the common driver pulse is one of the inputs from one of the flip-flops. Then one fewer winding is required. A more -6- complete review of magnetic switches may be found in a report by Olson A type of switch more conservative of current but less desirable if being used with a large number of coincidences per core has been described 2 by Rajchman . This switch is best used where only a two input "and" circuit is desired. Its operation may be understood by reference to Figure 3. The core is first biased back to -H . Then, for a reasonable output pulse to be observed, the core must be driven in the +H direction sufficiently to move the core to the +B saturation curve. It is to be noticed that both drives must be available to accomplish this end so the turning over of the core indicates the coincidence of the two inputs. At first sight this might not seem to save any current drive and this is true for one circuit, but when a large number of "and" circuits are to be formed and only one is to be activated at any time, the saving is considerable. This will be more evident from a description of the switch required for the static memory. Ill UTILIZATION OF MAGNETIC SWITCHES IN A STATIC MAGNETIC CORE MEMORY In order to perform the switching function, required with any memory device, a relatively large number of the "and" circuits may be used in a rectangular array. This array is illustrated In Figure h. There are m n cores in the set, each one being chosen by the activation of one horizontal and one vertical selection line. Thus each core Is an "and" circuit between one horizontal and one vertical line, operation being just like the "and" circuit just described. It is seen that the total current required to drive the array is merely the dc bias current plus two units of selection current, since this is the maximum required at any one time. The output from each core is taken _9- from an output winding wound on that core, as shown in the figure, In the proposed memory, that output is used to select the one word out of m n which is to be read. The information to be stored is recorded in the manner in which the output wire from a given core links or does not link a set of other cores, that being equal in number of digits in the words to be stored. As an illustration let us consider a simple case with five binary digit words. Figure 5 shows a set of five cores, each having magnetic hysteresis loops similar to those of the switching cores, that is, the BH characteristic is semirectangular in shape. Now, if a given core in the selection matrix is pulsed over, the induced voltage in the output winding causes a current to flow in that output wire through the linked cores and the terminating resistor R_ . Thus, if output 2 indicates the selected word, the number 01101 will appear across the resistors R in the form of the presence or absence of pulses, the presence or absence, of course, being determined by which of the cores are linked,, For the sake of later discussion, these cores which are linked or not linked will be called "storage cores", even though no information is actually stored on the core. The information is stored in the manner in which the cores are linked by the drive wires. As may simply be seen from Figure 5> it is possible to store many more digits than the number of cores used. In this example, 5 storage cores are used and 20 binary digits are stored. The dc bias winding is merely used to bias all of the cores more negatively than -H where H is the coercive D J c c magnetomotive force. This bias is placer on all of the cores so all start at the same place and pass completely around the hysteresis loop, even with a -11- unidlrectional driving pulse. If we were now to build an m times n digit selection switch, we could select m n words in this way. In practice, however, it is more desirable to reduce the number of driving cores at the expense of increasing the number of storage cores. This reduces the total number of cores required and also de- creases the number of tube drivers for the selection matrix. This may be done by driving more than one word with each selected driving core. The unwanted ones are eliminated by saturating all of the words in a given set which are not desired. This process may be understood by re- ferring to Figure 6. If a single driving winding drives two sets of five cores, one may be selected by driving the bias winding negative beyond -H and the other set unselected by driving the bias winding positive beyond +B before pulsing the selection matrix. Thus, if the top row of cores is driven beyond -H in the negative H direction by the tube driver and the lower row is driven beyond +H in the +H direction by the bias winding, applying a +H direction pulse to the selected output winding will turn over only the linked cores in the top row, those in the bottom row only making an excursion in H along the positive saturation portion of the hysteresis curve. Thus, the output signals will merely be a measure of the information in the top row of cores at the pulse time. Of course, this process can be utilized also with more rows of cores. The limit to this will occur when so many rows are added that the sum of the unselected signals in the unselected rows disturbs that from the selected row too much. Since the slope of the curves on the saturation region is very small, this limit will not be reached too soon. Certainly 10 or 15 rows are simply -13- feasible. A method for increasing this number still further will be presented later in a discussion of this problem. Drawing 535 illustrates schematically a design for a 3072 word static memory, each word being of k-0 binary digits length. In order to decode a given address the four most significant address digits are decoded to select one of twelve rows. The selection here indicated is one in which all of the unselected rows are biased toward +H past +H with a dc winding and then the drivers force one row back beyond -H previous to the pulsing of one of the 256 lines selected by the 16 x l6 matrix switch on the left. The output signals pass through an amplifier whose gain is here indicated as 1,000. Actually, since there are only h-0 pickup windings, these may be made multiple turn windings and the input signal made something like a volt quite simply thus lessening the amplifier requirements „ The configuration of the gates and temporary storage flip-flops may be some- what different in form but serves a function like that illustrated. It will be noted that a total of 736 cores is required. This is a total of 256 binary digits per storage core or 122,880/736 - 167 digits per core, including the selection matrix cores. Obviously, the cost per stored digit is very small. It has been calculated that from ^-00 to 500 tubes would be required for this memory. Most of these are the small tubes associated with the amplifiers, gates, and flip-flops. IV CHARACTERISTICS AND CONSIDERATIONS IN THE DESIGN OF THE PROPOSED STATIC MEMORY A number of test models of this device have been constructed to test the feasibility of the method. All of these tests ^ere made using steel driving -15- and storage cores since these were at hand. The different models varied principally in size and to a minor extent in amount of driving current so a discussion of the final test model only will "be presented. This model utilizes 10 storage cores. Since only one tube driving source was conveniently available the pulsed drive was passed through all 16 driving cores. These cores are 3/8 inch inside diameter and are made of 10 wraps of 0.0007 in. x l/8 in. Deltamax, The current from the pulsed drive is 150 ma in amplitude and passes through 150 turns linking all 16 driving cores. This yields a drive of 22.5 ampere turns. This is a unidirectional pulse. In order to select a given core of the l6, a dc magnetomotive bias in a direction opposite to that of the pulse is passed through the selected driving core. This bias is of magnitude 11,25 ampere turns. The unselected driving cores are dc biased in the same direction as the driving pulse to a magnitude of 11,25 ampere turns. Thus, when the driving pulse arrives, the selected core moves from the negative saturation region to the positive saturation region "by virtue of the excess 11,25 ampere turns in the driving pulse, Tae unselected driving cores merely travel along the relatively flat positive saturation curve. At this time a relatively large positive pulse is induced in the secondary winding of the selected core., This secondary winding has seven turns. The output wire from the winding is passed through all of the desired storage cores and terminated in a 3«3 onm resistor, A current on the order of an ampere flows in the selected line upon activation and. all of the linked storage cores are turned over, these inducing about 1 volt in the 10 turn pickup windings of the selected storage cores. The storage cores are l/k inch -16- inside diameter toroids made of 10 wraps of ^—79 Mo-Permalloy 0.000125 In. x l/8 in. wrapped on a ceramic Dobbin. The terminating resistor for the driving winding was chosen so as to take up most of the drop in voltage from the driver core so that changes in load do not affect the driving current much. The turns ratio which determined that 7 secondary turns should be used on the driving core was selected empirically as giving the largest secondary current into the load. This cut and try method was necessary since the cores are used in a highly nonlinear way, are very lossy, and have a high leakage inductance, so turns ratio calculations give the secondary current as a function of the primary current in only a very approximate way. The turnover time for the storage cores is 2 to 3 microseconds when used in this manner. Thus the access time, even with steel cores, may be very low. Since the time to obtain a given word from the static memory is made up of the time to decode the address, set up the selection pulses from this address, wait for the turnover and then feed this derived information back to the computer, it is fairly simple to achieve access time of the order of 5 to 10 microseconds, even with steel cores . Since the system is asynchronous in nature, this is a true access time and need not be added to some time to break into synchronism. The signals out of the selected cores in the storage array are compared with those from an unselected one in the sketch of P'igure .7. The presence of the negative signal from the unselected cores is due to the interaction of the driving windings used to turn over the storage cores. All of these are essentially one turn secondaries on the cores which they link and -18- have a 3°3 ohm resistor in a closed loop on that secondary, so the turning over of a core induces a voltage in each of the other windings linking that core. Because all of these windings link the cores in the same direction, by Lenz ' s law these voltages cause currents to flow in a direction opposite to that in the driving winding. These currents flow through their terminating resistors and tend to force all of the unselected cores along the saturation curves to some extent. Since the currents are small and the unselected cores operate on their saturation curves to induce opposing voltages the signals are small and in the opposite direction to those in the selected cores. This makes the choosing of a selected signal even simpler than it might at first seem. A further consideration is the effect of all of these secondaries on the primary driver and its coupling to the pickup winding. The storage cores are all linked by many driving windings as indicated above and therefore the secondary currents which flow in the various closed loops decrease the net magnetomotive force which tends to turn over the storage cores which are linked. As the number of secondaries approaches infinity, the effective impedance in the secondary as seen from the primary tends to approach zero. This, then, tends to reduce the net flux change in the linked storage cores. Since the pickup winding is linked by that flux, this decreases the output signal. Fortunately, the coupling between the drive winding arid the secondary windings is very loose until the steep portion of the core's hysteresis curve is reached so the effect lb not noticeable until that part of the curve is reached. Further, even during the high incremental permeability part of the -19- curve, the drive current is always larger than the sum of all the secondary contributions so an output signal of some reasonable size results. In order to show that the effect of adding more and more secondaries does not reduce the output signals to an unusably small value, a test was made using the same storage cores and driving circuitry as previously des- cribed . The part of the circuitry which is of interest is shown in Figure 8. There is one drive winding through the core which is driven from the word selection matrix. This winding is terminated in a 3°3 ohm resistor. Since many other driving cores also drive wires which are passed through the core, these all have closed loops through the different driving cores and their 3*3 ohm terminating resistances. The driving cores are saturated and contribute a negligible effect, so they are not shown on the drawing. In order that the memory operate properly, it is necessary that, regardless of the number of secondaries, the coupling from the driving v/indings to the pickup winding not be reduced to a point where it is not distinguishable from any possible unselected core output. As may be seen from the drawing, since all secondary windings are identical and link the same core in almost an identical manner, the voltage across each of the secondary terminating resistances is the same and so points x may be fastened together without affecting the result in any way. This being done, it is seen that this is the same as passing a single wire through the core and terminating it Is a resistance of a size equal to that of the single terminating resistor divided by the number of secondaries. This, of course, neglects the wire resistance,. Then, one could certainly test for a larger number of secondaries by passing a single turn of heavy wire -21- through and terminating it in a suitably small resistor* If the resistance of the wire be made negligibly small compared to that of the terminating resistor in every case, the effect should be the same as would be met with n terminating resistors, n times as large, each in one of n separate secondaries This was tested and found to be true as nearly as could be measured with n = 20. A test was then conducted using a single turn of #10 wire and a termination of size 0.02 ohm. This corresponds to an n of about 165° The output voltage was reduced by a factor of K from the unloaded case. It was still possible easily to distinguish the linked and unlinked cases. Of course, in the limit, one may short the secondary out with a low resistance wire and observe the effect on the coupling. This would in principle represent the infinite number of secondaries case. Practically, the wire has some little resistance and only some large number of secondaries is represented. When this was tried with one shorted turn of #10 wire, the signals to the pickup wire were re- duced by a factor of about 5. It was still possible to easily distinguish the selected signals from the unselected ones, even on a simple amplitude basis. An integration basis is theoretically even better and not much more difficult to apply, in at least an approximate manner. The size of the signals induced in the 10 turn pickup winding Is about 250 millivolts under these circumstances. The unwanted signals are from to 50 millivolts and of the opposite polarity to those from the selected cores. A further consideration to be viewed Is the effectiveness of the saturation which takes place to prevent signals from appearing from the unselected rows of storage cores. Since each drive winding links the cores -22- of several possible words and the corresponding digits of all of these words are connected to the output amplifier through a common pickup winding, there will he a possibility for all of the unselected cores to have some finite contribution which will mask the effect of the selected cores. The saturation effect not being perfect, the unselected cores will not have zero output and so, if the number of unselected rows grow very large, the selected signal to unselected signal ratio under some conditions may become less than unity. The point at which this occurs may be improved considerably by an integration sensing scheme and a mode of operation which takes advantage of this scheme. Consider the saturation hysteresis curve of Figure 9- If all of the core's in the storage matrix are operated with a dc bias of -H and if the line which is selected to drive the storage cores supplies H , then all linked cores in the selected row will pass from -B to -i-B in the driving process. The linked cores in the unselected rows will just move from -H. to -H ° dc u and back. The net change of flux is (2B ) (Area of the Core) in the selected case and is essentially in the others. Thus, all of the unselected cores can be made to yield essentially zero output and the selected one will give the only reasonably large signal on the common pickup winding if the output signal is integrated, this being a measure of the flux change. Since the selected driving core must transmit enough current to turn over all of the possible number of cores in addition to supplying the reactive drive to move the unselected cores along their saturation curves, certain minimum restrictions must be tnat by the driving core and its tube driver. The saturable core is a relatively inefficient device used in this -2k- circuit, and the following conditions which apply to perfect transformer coupling are idealized figures . Let us consider a driving core, with n primary turns and n secondary turns and a cross sectional area of A, to he driving N storage cores, each linked "by a single turn. The secondary driving wire is terminated in a resistor R. The cross sectional area of the storage cores is A . Then, taking voltages ahout the secondary loop, we have Since we require that the current i becomes large enough to turn over all of the linked cores, the current must become at least a certain minimum value for a reasonable time. Rearranging (l), n, M_ BA) _ f y^ 4J . p oijt Tn j -t A i (2) and d£ - K± dMi = j. (3) -25- if all the quantities B. are the same and are equal to B , Integrating, n±A B - Mj B> - X ^ (*0 But AB and A B are fluxes, say and 0, so n, 0- Af0, -- X^ Vy (5) Considering only changes and saying that at the start of any operation t - and the change in flux is at that time, we see that the equation of the reaction is n u A4 -aia0, -' f o foot* At the end of a given operation, the storage cores must have turned over so the change in flux in them must be at least 2B A n where B is the T T Z l 1 remanent flux density of the storage cores. Then (6) becomes 2An x 6 r -fBr, A,-- £* ^oft (7) -26- "■Pc/r where B is the driver core remanent flux density, and -^ ! \ r J ' J is the integral of the voltage pulse appearing across R. To observe the very Lxnimum drive, we may make R equal to in which case A n^ 6 r ■- A, N Br t (8) This is the usual condition conserving flux linkages which holds for re- actions of this type. It corresponds to the conservation of momentum condition in mechanics . In practice, these are very much idealized conditions for there are large leakage reactances associated with each of these cores. Thus the coupling is not ideal so more drive must be used. Further, since it is desirable to stabilize the current somewhat, the addition of the terminating resistor is desirable. From (7) this may be seen to give rise to a need for more driving flux linkages. In addition to these requirements, some in- efficiencies result from the inadequacies of the driving cores. Due to the leakage flux of these transformers and the nonlinearity encountered, more primary ampere turns are required than the simple turns ratio calculations of current conversion would indicate. In the case of the steel cores used here, the secondary current was measured to be about 1 ampere. The turns ratio is 75/7 ^ 11 • Since the primary current is 0.15 amps, the secondary current should be I.65 amperes. Most of the loss probably goes into eddy current losses because these are steel cores and are operated at a relatively high speed. -27- V PROPOSED WAYS OF USING THE STATIC MEMORY WITH THE ILLIAC Currently when it is desired to produce a program, almost every effort makes extensive use of the library of subroutines which has been compiled for the Illiac. The various subroutines are inserted into the different program tapes and are made use of at the convenience of the programmer. This means that some of the subroutines pass through the reader many times and occupy space in the Williams memory the same number of times. It further means that a considerable amount of tape preparation time is spent in re- perforating and checking these subroutine tapes. All of these operation cause a slow deterioration of the subroutine master tapes and allow possibilities for a considerable amount of human error. It would thus seem reasonably desirable to have such subroutines already permanently stored in the Illiac in a stable memory. This would be so even if this memory were used just as the library is now used, namely as a source from which to draw in assembling routines. A much more desirable possibility exists, however. It is found that those subroutines, even in use, are not markedly altered in the running process. In fact, it is seldom that even 20$ of the words are altered, and these are routines which were not specifically designed for use with a static memory. Then it seems possible to use the stored program in a more dynamic manner. Instead of transferring the stored routine and using it as is done with the present library subroutines, the routines can be altered so that they may be used directly out of the static memory during the running of the routine. Any operations requiring the changing of contents may be transferred to the dynamic memory at the start of the subroutine and used there. The -28- remaining routine may be used in place and full advantage taken of the inherent speed and stability of the static memory proposed here. Not only is storage space in the dynamic memory conserved but also less time is required for access to orders in the subroutine . Further, less material is required to pass through the tape reader and the shorter routines re- sulting will tend to decrease human assembling errors . Using a scheme for assembly similar to that previously illustrated in drawing 535> a 3072 word static memory may be constructed fairly cheaply as an addition to the present Illiac Relatively simple changes in the control would enable the use of both types of memory together. The two undecoded digits in each order pair may be used to define the addresses to be used. In fact, if it were desirable, the size of the static memory could be in- creased practically ad infinitum by installing switch orders to switch from one part of the static memory to the other, the switch determining the state of another address digit which would be left the same until the advent of another switch order. This switching process seems unnecessary at the moment, though, for the entire library of subroutines could be stored in the 3072 words currently available for direct decoding. It should be pointed out, moreover, that the addition of large amounts of extra storage in this manner does not add materially to the total number of tubes in the static memory since most of them are used in amplifier chassis which could also be used with the added memory capacity. II OTHER POSSIBLE IJSES FOR THE STATIC MAGNETIC MEMORY Since the static magnetic memory is a very stable device and is -29- relatively cheap per unit of storage, a number of other possibilities for its use exist. One of the more interesting uses for the static memory is in a machine -which is constructed on a microprogramming basis. By constructing words with the same number of digits as the number of elementary orders it is desirable to "be able to perform, this static memory may store the se- quencing information for using these microorders to produce the orders in the main order code. It then becomes necessary only to construct a circuit to sequence through the various memory positions to get out the sequenced microorders, Decoding of orders is merely a matter of selecting the point in the memory from which to start. The last microorder in any microorder sequence would indicate the end of the machine order, A technique like this would also make adding orders simple. The construction of complex order codes then becomes a relatively simple matter of complex microprogramming, all of which is stored in an inexpensive manner in the static memory. With regard to the functioning of the static memory in a micro- programming sense, it should be pointed out that to obtain a machine which loses essentially no time due to the need to extract microorders, the access time should be on. the order of the time needed to execute any given micro- order. Thus, if the next microorder is procured while the previous one is being obeyed, no net time is lost except at decision points in the micro- orders where the next order in sequence may not be the one it is desired to execute. This follows from the desirability of including micro transfer of control orders. -30- It should be mentioned that a system similar to this has been k used on the Bell Computer, Model VI. Wires threaded through large cores are used as storage for subroutines. Relays do the switching from wire to wire. Thus the multiple secondary coupling is avoided. Of course, tubes could be used here in the same way. The advantage of the core switching method proposed in this report is in the economy and relatively stable type of elements used in the switching process. It should further be pointed out that, used in this way, the static memory is a means for informational decoding and expansion of the decoded information. This means that the static memory is a useful device for making versatile fixed program or fixed function devices. These devices do not necessarily need to be computing machines, at least in that they do not need to treat numbers alone . An example is the storage of information to reproduce the shape of a letter, given a code word for this letter, such as is required in a high speed cathode ray tube output device. Of course, this method will be practical only in high speed applications where cheaper and slower devices might not be capable of operating. One final comment should be made about this static memory. Each of the storage cores is used as a multiple "OR" circuit, so a similar type device may be made using any of the many known means for building these circuits o As yet, however, no way which is so cheap or compact and at the same time capable of such a high operating speed is known to the author. -31- (l) Olson, K. H., "A Magnetic Matrix Switch and Its Incorporation into a Coincidence Current Memory". Massachusetts Institute of Technology Digital Computer Laboratory Report R-211. June 6, 1952. (2) Rajchman, J. A., "A Myriabit Magnetic Core Matrix Memory", Proceedings of the IRE, Vol. kl, 10. October 1953- (3) Wilkes, M. V., and Stringer, J. B., "Microprogramming and the Design of the Control Circuits in an Electronic Digital Computer, Proceedings Cambridge Phil. Soc. k9, Pt. 2, 230-238. (1953). (k) Andrews, E. C-., "The Bell Computer, Model VI". Proceedings of a Second Symposium on Large Scale Digital Calculating Machinery. Harvard University Press. 1951- Jhyi/'to. &* >}. November 23, 1953 /nrh isOUNO,