UNIVERSITY OF ILLINOIS LIBRARY A1 2WMH, Ala Digitized by the Internet Archive in 2013 http://archive.org/details/mpixmicroprocess971mcki n l'M'^ S at UIUCDCS-R-79-971 UILU-ENG 79 1718 June, 1979 MPIX: A MICROPROCESSOR-BASED SYSTEM FOR GRAPHICAL OUTPUT by Eric Wallace McKinlay *•■ ChCH H^O .<* * & s & o^ if* p DEPARTMENT OF COMPUTER SClEi UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS MPIX: A MICRO PROCESSOR- BASED SYSTEM FOR GRAPHICAL OUTPUT BY ERIC WALLACE tlCKINLAY A.B., Occidental College, 1977 B. S. , California Institute of Technology, 1 ill THESIS Submitted in partial fulfillment of the requirements for the deqree of Master of Science in Computer Science in the Graduate College of the University of Illinois at Urbana-Chairpaign, 1979 Urbana, Illinois Ill TABLE OF COMIENTS 1. Abstract-System Overview •••••• 1 1.1 General Description • 1 1.2 Design Goals ......••..............•.••..••.•... 3 2. Hardware Implementation • ••• 5 2.1 Basic System Blocks 5 2.2 Inter- Processor Communication .................. 7 2*3 Input/Output Formats •••• 12 2.4 Character Generation 12 2.5 The Screen Memory and CRT Controller ........... 14 2.6 The Video/RF Interface 17 2.7 Debugging Aids ••••••••••••••••••••••••••••••••.• 17 3. Software/Firmware Implementation 21 3.1 Comrand Processing ........ ................. .... 21 3.2 Line Generation 22 3.3 Line Clipping 23 3.3.1 Clipping and Drawing Algorithms 27 3.4 Line Transformations ........................... 23 3.5 Character Generation 23 3.5.1 Algorithm for Character Generation •••... 2 4 4. Device Usage 33 4.1 Device Commands 33 4.1.1 Initialization 33 4.1.2 Point Specification 3) 4.1.3 Window Definition .................. ....... 31 4.1.4 Transformation Commands 31 4*1.5 Line Drawing Commands •• 32 4.1.6 Character Commands 33 4.1.7 Region Processing Commands ............... 34 4.1.8 Status Bit Commands 35 4.1.9 Video Adjustment Command ................. 35 4.2 Reguirements for Main Processor ...••••...•..•.. 36 5. Software Tools • ••..••••....•..••..••• 33 List of References 39 Appendices ...........••............•.•••..••....•..•.•. 43 A. 1 MPIX Firmware Listing 43 A. 2 Main Processor Driver Listing 63 A. 3 Command Summary ...•...••...•..•....• >i^ A. 4 System Parameters and Timings ••.....«,.••...••. . 32 A. 5 Cost Summary •• 33 A.6 Hirelist for MPIX • 34 A. 7 Source Listing of the Hirelist Program ......... 115 A. 8 Suggestions for Enhancements . •• ••••••••••• 123 1. Abstract-System Overview 1.1 General Description The Micrographix System (MPIX) is designed to enabla tae microcomputer user to produce medium quality video graphics at modest cost. The graphics produced include simple line drawings and lines of text or combinations of both. Tbe output is produced on a standard television receiver. The MPIX system operates in parallel with its host computer as much as possible. This allows for maximum utilization of b:>ta the host processor and the graphics system. Communication between the host and MPI" is accomplished by way of three standard I/J ports. These ports are accessed in the usual manner by the hjst computer. Cnly a small driver need be resident in the main processor to format commands for MPIX. A more complex driver can provide the user with an advanced graphics facility. MPIX itself contains three basic functional olocks. Tae arrangement of these blocks is shown in figure 1. Ihe heact jl the system is the MPIX processor block.. This block contr>Li communication between MPIX and the host and performs all computation needed for graphical output. The processor alters the contents of the display screen by changing the bits stored i t tae screen memory. Since the contents of the screen memor/ are constantly displayed, changing a cit has the effect of lightening (or darkening) a particular point on the screen. The scanning af the screen memory is accomplished by the CHT controller sectioi. Figure I. S ystem Block Dioarom Host Processor Commands Data Status MPIX Processor Screen Memory DATA ADDRESS CRT Controller Video Out This section also generates the the horizontal and vertical synch pulses which are combined vith the output of memory to f jrra a composite video signal. This signal may the be sent to a video monitor or, by way of an BF modulator, to a television receiver. 1.2 Design Goals The following were used as design goals during the formulation of the MPIX system; 1) The MPIX system should be designed to provide a flexible, extensible, and affordable graphics system for secondary school and junior college courses using microcomputers . 2) The system should require a very small ammount of host computer overhead both in terms of time and memory space. To minimize space overhead, all routines which are solely concerned with graphics should be stored and executed by MPIX. To maximize speed, the MPIX system should operate in parallel with the host as much as possible. 3) Attaching the MPIX should require no hardware modifications of the host computer. 4) The MPIX should be flexible enough to allow for future expansion and improvement. 5) The cost of tbe .system should be low, enough . , .„ ,.. to allow its purchase by most of the target audience. 6) The system should be extensively documented to promote both learning from and modification of, the system. Figure 2. Sample Output from the MPIX. 2. Hardware Implementation 2.1 Basic System Blocks As shown in figure 3, the system is centered around an Intel 8085 microprocessor CPU. This CPU is connected to Random Access Heirory (BAH) , Bead Only Hemory (BOH) and various other devices. The 8085 was chosen largely because of its availability and use of a single, five volt, pover supply. Since a cross assembler was available on a large scale computer, this also positively influenced the decision to use the 808 5, Unlike many Jther processors, the 8085 does not have completely separate data and address busses. In order to save pin-outs, the low order address byte is time-multiplexed vith the data bus. To enable the processor to be used vith standard memory and I/O support chips the low order address byte is latched into the address latch (the 8212 just to the right of the CPU in figure 3) at the beginning of each instruction cycle. The 8155 chip vas designed specifically to be used with the 8085 and hence requires no demultiplexing. It provides the system with 256 bytes of BAH, 2 I/O ports, and an interval timer. Vith the exception of the 8155, all sections of the HPIX communicate with the CPU by way of normal (non-multiplexed) data and address busses. The BOH is a UV Erasable Intel 2716 which provides the system with 2K bytes of program memory. The X and Y ports are standard Intel 821 2 's. These ports were used solely to aid in debugging the systerr and they remain in the design to aid in fiture enhancements. The most unusual part of the system is the status port. This port is made up of 8 MSI chips and provides bi-directional communication between the processor and the host computer. It also holds status flaqs used oy tae software resident in the MPIX. This port is more fully described in section 2. 2. The character generator is simply two 64 character ROMS. The characters within these ROMs are row addressable and measura 6 points by 6 points. The C ET Controller and Screen Memory work together to generate the video signal as mentioned earlier. The JBI controller is a Motorola MC6845 containing a set of counters and registers allow all cf the screen parameters (width, height, etc.) to be changed under software control. The system memory mapping uses a 1 of 8 decoder attached to A11-A13 to generate the enable signals for the components attached to tne data bus. A high level on A 15 indicates an access ti the screen memory and disables the 1 of 8 decoder. All I/O is memory mapped. Table 1 gives a complete description of the msmjry mapping used. 2.2 Inter- Erocessor Communication Since the host processor and the MEIX are essentially separate processors, we must have some method for coordinitinj Table 1 Memory Mapping Locations Hex Select Usage Binary Address Address Value RCK RAM c COO 0000 0000 0000 COO 0111 1111 1111 0000 10C0 0000 0000 C000 1000 111 1 1111 NOT USED C0000 1001 0000 0000 (.0000 1111 1111 1111 Y Port 0001 oxxx xxxx xxxx X Fort 0001 1XXX xxxx xxxx Status Port C010 0XXX XXXX XXXX 8155 Status 0010 1XXX XXXX X000 Command In 0010 1XXX XXXX X001 Data In 0010 1XXX XXXX X010 Port C 0010 1XXX XXXX X011 Tiirer LOB 0010 1XXX XXXX X100 Timer HOB 0010 1XX2 XXXX X101 0C1 1 0000 X000 0000 0C11 0111 X11 11111 CFTC Addr. 0011 10XX XXXX XXXO CRTC Data 0011 10XX XXXX XXX1 Char. Gen. I Screen C 1C00 0000 X000 0000 Mem. j L1111 1111 X11 1 1111 0000 07FF 0800 1 08FF 1 0900 1 0FFF 1 1000 2 1800 3 2300 4 28 00 5 2801 5 2802 5 2803 5 2804 5 2805 5 3000 6 31FF 6 3800 7 3801 7 8000 - FFFF — them. One way would be for tne host to issue a command every time a task must be performed by MPIX and then simply to wait (i.e. lo nothinq) until the assigned task is completed. However, since most of the processing done by MPIX is independent of the uoit, this method would unnecessarily slow the operation of the aost. After the host issues a command, it should be free to do other useful work while MPIX performs the given task. Obviously this iirplies that the host and MPIX should operate in parallel. There must, however, be some communication between the two processors. For example, the host must make sure that a command has been fully received by MEIX before continuing and must not issue a command before the previous command has been completed. To accomplish this coordination, the lower four bits of the the status register are used as a set or 4 binary semaphores. For a complete discussion of parallel synchronization see Shaw£7J chapter 3. The status register actually contains two foiir bit registers. One set is used to coordinate with the host processor and oni sat is used for mode flags by the MPIX. The protocol for the MPIX to host communication is given in table 2. The three semaphores are BUSY,ta referring to the state of MPIX, CA1RDY. indicating that data is ready to be accepted by MPIX, and DATRCV indicating that data has been received by MPIX. A schematic view of the status port is given in figure U. 10 Table 2 Host-MPIX Communication Protocols Data Data MPIX State Peady Received Busy Processors Idle Command Ready 1-H Corrmand Received 0-M 1-M 1-M Host Continuing 0-H Data Ready 1-H Data Received 0-M 1-M Host Continuing 0-H Coirmand Finished 0-M M= Change of state due to action of MPIX. H= Change of state due to action of Host- 11 ^ D DRIVER V Jl? Hi INPUTS A B OUT ! 1 7 6 15 It 12 Figure 4 STATUS PORT CLKH 12 2. 3 Input/Output Formats In addition to status information, two other types of information must be sent from the host to MPIX. Pirst, coinaais are sent to indicate what action is to be taken oy MPIX. These commands are in the form of binary numbers between and 127. This provides a great deal of room for future commands to oe defined since, at present, only about 30 comnands are define! The second type of information sent to MPIX is data. Each command (with the exception of CHARS) requires from to ft bytes of lata. These bytes are sent immediately following the command itself. A separate port is used for data to avoid any possible conf jsion between commands and data. The command codes are given in Appendix 3. 2.4 Character Generation The generation of characters on the MPIX is accomplished either using a BOH standard character set or a user define! 3AM character set. The two types may be mixed freely within a string but are treated somewhat differently by the MPIX and will oa discussed separately. The ROM character generator provides 128 characters tj the user. This includes both upper and lower case as well as special characters. The addressing format is as folio *s; 13 II K 13 12 II '9 • • 7 ft 5 4 * .2 1 I I X X 7=r v. Char. Row Upper or Char. Code Lower Case Character Addrttting Since the ROW is row addressable the row number mast be incremented 7 times (for a total of 8 rows) to access a complete character. Each of the rows is 5 bits wide sc when a character is fetched only cits through 4 are defined. Because the address format does not match the ASCII character codes a mapping must oe performed by the HPIX software. Bit 6 of the address is used to enable one or the other of the two ROMs (for upper and lower case) . The user defined character set is stored in part of tha ikii contained in the 8155 chip mentioned earlier. Tne area between hex address 820 and the bottom of the stack is reserved for tUis purpose. The stack crigin is at hex address 8FA. If twenty jytAs are reserved for the stack (providing subroutine and tempjrary save nesting of up to ten levels) then there remains room e »oigu for 27 user defined characters. These characters are stored in 8 oyte blocks beginning at 820. They are stored by rows and only the first 5 bits are used to forn the character. For a complete description of the use of user defined characters see sections 3.5 and A. 3 of this document. It should be noted that the integrity of the MPIX stack is protected by software. It is therefor 3 not 14 possible to inadvertently define a character which overwrites the stack. 2.5 The Screen Memory and CRT Controller All of the information which is displayed on the screen (wita the exception of the cursor) is stored in th€ screen memory #hich is continually scanned by the CRT controller (CRTC) . He will now examine these two sections in some detail. Fefer to figure 5 for a schematic representation of these two sections. The screen memory is made up of 4 2114L static RAM chips wita access times or 450 nsecs. These are organized to form a 2S x 8 mefrory with the upper and lower halves of the screen being stored in separate pairs of chips. This memory must be accessible to both the CPU and the CFTC since it must be both manipulate i and displayed. To increase the speed of the KEIX, the CPU is alwiys given access priority over the CRTC. This causes some disturbance of the displayed image wnen the CPU is accessing the memory. The alternative would be to only allow the CPU to access the miiniry during vertical and horizontal retrace. This would eliminate the disturbance out would greatly slow the operation of the 1PIX. 15 CRT CONTROLLER (MC 6845) SAO-SAI SCREEN REFRESH ADDRESS MPIX ADDRESS BUS DATA SELECTOR SCREEN MEMORY MPIX DATA BUS Gu sa 4. Rd-Wr SHIFT REG. ca Video Data SCREEN DATA BUS FFER Fig ure 5 Screen Memor y 16 Access to the screen memory by the CPU is made by standard raid and write operations. The addressing format is qiten below; 15 14 13 12 II 10 i 8 7 • 5 4 3 2 I ' I I I I xl | | | | | n ■ li ■ — 1 — i 1 ■■■ i. ■■■■ ■ Jw. ■■ ■ ■ . .4 . — In -i * ■■ ■ 1 ■■ ■ ■■■ ,■ A. »■■■■ ■■■ —A 4 ■ V» J Y Position Byte Address Not Connected of X Position Scrttn Addrttting Generation or the video signal begins with the video zlacit (VIDCLK) produced r>y the voltage controlled oscillator (VCO) shown in the upper right corner of the system schematic (figure 3) . The frequency of this oscillator is about 3MHz . It is adjustable to allow tailoring the rtPIX to individual television receivers. Since the CfiTC requires a frequency of less than 2.5t1dz, VIDCLK is divided in halt before entering the CKTC. This secondary cIjcx (VIDCLK2) then increments all of the counters within the CRPC to provide the address scanning of the screen memory, as well as various other tunctions. Eleven address lines (CHIC lines 2 -> 12) are needs! to access the 2K tytes of screen memory. The regaining address lines (0 and 1) are combined with VIECLK2 to produce a load pulse Cor the video shift register (see figure 5). This load signil is generated every 8 cycles of VIuCLK, yielding a continuous straam of video data cut of the shift register. 17 The horizontal and vertical synch pulses are also generated by the CTBC along with the display and cursor enables. It saould be noted that the video data output lags the CBTC address by 3 bit ticres. This means that when the CBTC address is (3,8) , the data being output will be (0,0) • Due to this fact it is necessary to "shift" the display enable signal by 8 bit tines. This process is performed by the upper flip-flop in the video processing logic (figure 6). The lower flip-flop in figure 6 is used to eliminate a spike in the video signal produced by the parallel load of the shift register. 2.6 The Video/BF Interface The Video/BP interface is used to convert the composite video signal into a modulated BF carrier which can be fed into the antenna terminals of a standard television receiver. The interface used is the TV-1 manufactured by OHF Associates. 2.7 Debugging Aids The device shown schematically in figure 7 is used to cast and debug the HPIX hardware. It contains a display capable of indicating the values of 16 data lines along with 5 push button -WA, — ||l- 18 O c (/> 0> o o o il > 19 Display Driver Data Selector Display Driver Data Selector SYSCLK TIMCLK-*- Switches 3 Toggle 5 Push Button Flip-Flop Fig. 7 Debu g Board 2J switches, and 3 toqqle switches. The push button switches iro used to st-rooe the input and status ports. The toggle switcaes supply values for three of the semaphores in the status port* This device was used to great advantage during the testing and construction of the MP1X. The switches allowed testing to proceed without the presence or a host coirputer and the displi/ greatly sirrpliried the debugging of the systeir. The final version of the MPIX firmware includes code which displays ,on tae debugger, the contents of the 8155 timer at the completion of each coinmand. This allows commands to ue timed fcithin 5 microseconds (the period of the timer clock). 21 3. Software/Firmware Implementation The five major tasks performed by MPIX's resident program are described in the following sections. 3. 1 Command Processing The most basic function of MPIX is to receive and interpret commands from the host. This task is performed by the command processor. When MPIX is "idle" it is simply executing a snuil loop which reads the status port waiting for a data ready signal from the host. When this signal is received, HPIX .reads tue command, sets the command received and busy flags, and returns to the main body of the MPIX driver. Here the command processor must select one of the command processing routines to be executed. There is one processing routine for each of the possible commmls. Transfer to the proper routine is accomplished by making an indirect jump to an address given in a jump table. This taole contains the addresses of all the command routines. The displacement into the table is determined by the command recaived and in turn determines the address to which control is transferred. If data is needed it is requested by the processing routine by making a call to GETEAT. All communication between tae firmware and the host is accomplished by the routines GETCOH (jet a command) and GETDAT. Regardless of which routine is selected, 22 when the task is completed the MPIX returns to the idle state awaiting another command. 3.2 Line Generation The algorithm used for line generation is called the Symmetric Digital Differential Analyzer (DLA) . The method is so named because it is derived from the differential equation for a line. Since vie are dealing with a discrete approximation to the line, the differential eguation is; dX/dY = iiiLTAX/DELTAY We wish to treat the x and y components of the line separately so we can break this equation into two parts by using a variable N to denote the number of increments between point 1 and point 2. These two equations are; dX/dn = DELTAX/N and dY/dn = IEITAY/N . Note that D^LTAX/N indicates the length of eacn increment along the X axis (ar.d sinilarly for Y) . We must now decide how to choose the value for N and hence the length of the increments. The value chosen cannot, be so small that the increment beoo.nes greater than 1 since this would yield a line hho.cn contained japs. The value of N must also not oe so large that the resolution of the plotting device causes each point along the line to be displayed a larqe number of times. Another factor in the caoice of U is the fact that division of D.&L1AX by numbers which ara not even powers of 2 is difficult and time consuming. From thase 23 three constraints we want to choose H such that either; .5 <= DJsLTAVN < 1 or .5 <= OfiLTAI/M < 1 . ... r . t ■ These values give the increments which are added iterative!/ to the starting point (Point 1) of the line drattn. The complete set of eguations for the line is then; X(0) = XINITIAX ♦ .5; Y(0) = ^INITIAL ♦ .5; X(k) = X(k-1) + DELTAX/N; Y(k) ■ ¥(k-1) ♦ DBLTAY/rt; Xdisplayed = Floor(X(k)); Ydisplayed = Floor (Y (k) ) ; Using these eguations within a loop, points on the line ire generated until X (k) ■ XPINAL and Y(k) = YFINAL (i.e. Point 2 has been reached). As the points are generated they are placed in the screen memory The "color" (i.e. black or white) of the points is determined by the Field Mode flag contained in the status register. If the field mode is 1 the line will be drawn in white, if the field mode is the line will be drawn in black. 3.3 Line Clipping The aiir of this algorithm is to decide which points, if any, on a given line, fall within a specified window. It can easily be seen that there are basically 3 types of lines relative to the clipping window. These types are: 1) Lines which are completely inside the window (completely visible) . 2) Lines which are completely outside the window (completely invisible). 3) Lines which lie partially inside the window (partially visible). 24 Since type 1 and 2 lilies require no clipping, it would be nuca more efficient to detect these types of lines before the clipping process is initiated. The method used is due to Cohen lud Sutherland and is described in Sproull to J. The classification method divides the undipped picture into nine sectors. Each of these sectors is given a four-bit jole. The sectors are labeled in the following manner; * * * * 1001 * 1000 * 1 01 c ¥ * ******* ********** ******** ****** ********** * * * * 0001 * 0000 * 001C * (Window) * * * ********* ************** ****************** * * 0101 * 0100 * 0110 * * * * The four-bit code is interpreted so that a tit being set (=1) has the following meaning; BIT Meaning 1 The Point is on or above the top edge of the window. 2 The foint is on or below the lower edge of the window. 3 The Point is on or to the right of the rigat hand eiga of the window. 4 The point is on or to the left of the left hand edge if the window . We can now use these codes to great advantage in performing 2i> the line clipping. Clearly if the four-bit codes { or M KKY"s) f >r each of the lines endpoints are zero, the line is of typs 1 (completely visible). Less obvious is the fact that if tae logical "and" of KjsY1 and KEY2 is non-zero, the line is of t/pa 2 (completely invisible). Examples of these two types of lines ire given below. * * KEYC= 10J0 * C D KEYC= 1010 * * K£YC f AND» K£YD= 1033 *********************** ***************** * * * ..a * KIYA= 0000 * .. * KEYE= 0000 * .. * KEY A •AND' Ki2YB= 0)0 E. . . * A * ****** * t t # ****************** ************ * ... * Therefore line CD is invisible *...F * but line AB is fully visible. Having disposed of the two types of lines which require ,io clipping, we can now concentrate on type 2 lines, that is th>se lir.es which lie partly inside and partly outside the wind 3 4. Clipping the line requires finding the point nearest to point 1 at which the line intersects the window border- When this is completed, points 1 and 2 are interchanged and the other e.id 3f the line is clipped. After both ends are clipped the point? ire again interchanged and the DRAW routine is called. This insures that the draw routine will never have to be concerned ibout 26 whether a line is visible (inside the window) cr not. The irethod used to f ind the intersection point is simply a binary search cf the line. The program uses a "temporary" point (T) which is iToved along the line between points 1 and 2. The direction in which 1 moves xs determined by comparing the kay at the temporary point with KiiYl. If the 'AND' of tae two keys is nor. zero, T is moved away from point 1. If the • Atfi)' is equil to zero, T is moved toward Point 1. The magnitude of the distaace that T moves along the line is initially set to be one half the total difference between points 1 and 2. Each time T is novel this increment is divided in half. The process terminates vaiu either the proper intersection point is found, or tae magnitude >f the distance that 1 moves is egual to zero. After the process terminates it is necessary to check the point which has been found to make sure it lies within the window. Ihis test is necessary because some type 2 lines will not be classified as such bf tae process discussed earlier (see for exairple line £F in the preceding figure) . 27 3.3.1 Clipping and Drawing Algorithms PROCEDURE Main Clip the line. Reverse points 1 and 2. Clip the line. Reverse points 1 and 2. Draw the line. PROCEDURE Clip the line. Calculate the keys for points 1 and 2 (KEY1 and Ki2Y2) . IF KEY1 'OR 1 KEY2 <> (i.e. Line does not cross window). Return to calling program. ELSEIF KEY1 = OR B0RDERKEY1 'EXOR' KEY1 = Draw the line. Return to calling program. ENDIF Initialize BORLERKEY1 to egual B0RDERKEY1. Calculate DELTA" and DELTA Y along with their signs. DC FOREVER Divide DELTAX and DELTAY by 2. IF DEL "A? and DELTAY are both 0. IF the temporary point (T) is inside the window. Draw the line. ENDIF Return to calling program. ENDIF Add DELTAX and DELTAY to pointl (the temporary point). Calculate the keys for point T (i.e. KEYT) . Determine the sign of the next X and Y increments. IF BORDERKEYT <> (point T is on some border} IF BORbiRKEYT 'EXOR' KEYT =0 (T on inside aorder) . IF BORDERKEYT 'AND' KEY2 = (T on correct border). Draw the line. Return to calling program. ENDIF ENDIF ENDIF ENDDO PROCEDURE Determine the sign of the next X and Y increments. IF KEY1 ' AND' KEYT = IF S1GNK = SIGN(LELTAK) (make sure that T Negate DELTAX, DELTAY and DELTAK iroves toward 1) ENDIF ELSE IF S1GNK <> SIGN(EELTAK) (rrake sure that T Negate DLLTAX, DELTAY, and DELTAK moves away from 1) ENDIF ENDIF 23 PROCEDURE Draw the Line Calculate DELTJ.X and DELTAY. Output Point 1. IF DELTA" and DELTAY are both zero. Pe turn. iNDIF DC until DEI'lAX or DiLTAY contains no leading zeros. Shift DELATX and DELTAY to the left. ENDDO Initialize (x,y) to Eoint 1. Initialize fractional parts of x and y to . 5 . Increment (x,y) by D1LTAX and DELTAY respectively. DC FOREVER Output the point (x,y). IF (x,y) equals Point 2. Re turn. LNDIF Increment the fractional parts of (x,y) by DELTAX and DLLTAY. Hi DUO *****Note: 'OR', 'AND', and • EXCR' represent ritwise logical 3per ations. 3.4 Transformations The two endpoints of the current vector are proc»sjed according to the current shifting and scaling factors. The shift is performed oefore the scaling. The scaling is performed oy a standard multiplication routine. When the transformation is coirplete the altered line is stored as the new current vector. 3._ Character Generation Characters (ooth user defined and standard) are placed i» taa screen .r.emory cne row at a time. Upper case characters contii.i «3 2i rows and lower case contain 6. Since the character position nay be anywhere on the screen, the character row fetched from one of the generators will often need to be shifted before it is placed in *he screen memory. If this shift causes the character to cross a byte boundary then two bytes of the screen memory must be fetched and altered for each row of the character. 3.5.1 Algorithm for Character Generation IF output-ascii is a special character THEN CASE output-ascii OF BS: Subtract 6 from "X" character position. CF: Begin Set "X" character position to zero. Process a line feed. End. LF: Process a line teed. SP: Add 6 to the "X" character position. END CASE. ZLSE Map output-ascii into ilPIX-char. IF end of line THiiN Set "X" character position to zero. Process a line feed. END IF Calculate the character-row-address. IF character is upper case THEN ROWS = 8. ELSE ROWS = 6. END IF FCP each character row DO Shift row into correct position. Place character in screen memory. Increment character-row -address and screen-position, END FOR Add 6 to the "X H character position. Update the cursor position. END IF 30 4. Device Usage 4."!. Device Commands The following sections give a general description of the classes of commands available. Specific command codes and formats arc given in appendix 6.3. 4. i .1 Initialization The INIT command is used to reset the entire system to jejiu plotting. INIT performs the following functions: 1) Sets the internal stack pointer to a suitable location. 2) Initializes ill semaphore flags. 3) Initializes the 8155 including Doth ports and tiirer. 4) Sets the current vector (points 1 and 2) to (0. 0) -> (127. 127) . 5) Sets the window to be the full screen. 6) Sets the scaling and shifting factors to 1 and respectively. 7) Sets the cursor position to (0.0). 8) Initializes the ZRT controller . ^) Clears the screen. Pressing the reset switch on MPIX has the sane effect as executing the INIT command. 4.1.2 Point Specification At all times the endpoints to the "current vector" are hsld in a save area in the 8 155. The point specification conaands 31 alter the endpoints of this "current vector." The user may dsfme either a single coordinate of either end of the vector (requiring 1 data byte after the command), both coordinates of either e id of the vactor (2 data bytes needed), or both coordinates of both e.ids of the vector (4 data bytes needed). Point definitions remain in effect until either another point definition is given or the HIT command is executed. 4.1.3 Window Detiniticn The windowing ccmmands aefine the area of the screen in whlca lines will be displayed. Only those lines, or parts of linas, within the window are plotted. This has no effect on lines inwn before the window was specified. The two forms of this command allow the user to define the X (horizontal) window, and th-j If (vertical) window independently. The window deiinitions remain in efrect until either another windowing command or tne I NIT co.nmind is executed. 4.1.U Transformation Commands ""he scaling commands allow the user to scale all points sint to M?i:~ by an integer constant. The scaling of X aid I coordinates are done independently and need not ue egial. An expansion is accomplished by a positive scale factor (*hicn 32 follows the command) ; a reduction is indicated by a negative scale factor. It should te noted that no checking is performed for overflow of the screen so scale factors should he chosen with care. Shifting is performed in the same way as scaling. The anon it of shift can be either positive or negative. Wrap-around will occur for X and Y values greater than 127. Quitting and scaling factors are always applied to the current vector when a line drawing command is executed. Sinca tae transformations alter the current vector, their effects on successive vectors are cumulative. As with windowing transformations have no effect on lines which are already on the screen. 4.1.5 Line Drawing Commands The execution of the line drawing commands actually places the points along the currently defined line into the ssrean memory. The command reguires no data bytes since the points it uses (the current vector) are already in the flPIX memory. Two forms of the command determine whether the line will be clipped or not. If the line is clipped, the current vector will be altered to the clipped version of the vector. The current transformations are applied to the line just aefore it is drawn (i.e. after it is clipped) . 33 4.1.6 Character Commands The Character commands cause either alphanameric or user defined characters to ne piacea into screen memory. The i:>t patterns which form these characters are kept in memory so th sir generation is quite rapid. There are 5 commands available tor displaying characters. 1 he most basic of these are CrfAfi and CHARS. These commands oitpjt a single character and a string or cnaracters respectively. In either case the only difference net ween user defined and staidiri characters is Lit 7 cf the character code: standard characters ire assumed to have a high order Lit of while user defiaeu characters have a hiqh order bit of 1. In either case the use of CHAR or CHARS displays the character and updates the current cursor position. The CHARS command continues to accept data jytes iron the host until a termination character is received. This character is defaulted to ASCII NULL (00) , but may oe eisil/ change i. CHAR ana CHARS recognize several special characters. These special characters only affect the cursor position and are the standard ASCII codes for Line Feed, Carriage Return, Back Spice and Space. The Carriage Pet urn also perforns an automatic line feed. Sach time the cursor position is updated MPIX checks for end of Line and end of page. If an end of line is reach -il an 34 automatic carriage return is generated. If end of page is reiched the screen is scrolled up Jay one character height. The CHPO command is used to specify the cursor position. The two data bytes which follow the command give the upper left orner of the desired character position. The HCME command resets the character page and sets the character position to (0,0) . ilj screen clear is done when HOME is executed. The DSFUS command is used to define a new character. Its first data byte gives the character's nunber (0 -> 27). This number is followed by eigat bytes of data which specify the bit patterns for each of the rows of the character. Only the first 5 bits of these oytes are used when the character is printed. 4. ''.7 Region Processing Commands Four comirands are available for the processing of regio.is on the screen. Their effect is to clear or complement a rectangular area of the screen. COMP and COM PR complement the entire screen and a subarea of the screen respectively. COM PR reg aires 4 data bytes to specify the upper left and lower right corners of the region to be processed. When COMP is executed it also reverses the value or the character mode flag. CLER and CLE3H operate in the same way as CCMP and COMPR except that the screen, or ragion of it, is cleared to the current value of the field mode flag. 3d a . 1 . 8 Status iiit Commands Two commands tiro availaole to manipulate th* status flags (uits 4 and 5 of the status port). SCREV complements the £ield mode flag which complements the screen. Its effect is the sane as the CO.^f command except that it is must faster and the charictar mode flag is not altered. CHRHV reverses the character mode saica changes the color with which characters are drawn. <+ . " . 9 V iaeo \d justment Command The CRTAJ command is used to alter the contents of ta3 internal registers of the CRT Controller (CRTC) . This proviles a method of changing the default parameters for tiie video display. The default values should be adequate for most cases but use of this com it ana will be necessary for ncn-standard television receivers and monitors. CfiTAJ should be used witii care an i ;ia only be used after careful study of the CRTC (Motorola HC6845) speci f ic at. ions. 36 U.2 Requirement s for the Main Processor The iriniirum software requirements for the host are juite srrail. Only the routines which directly conirunicate with the MPIX are absolutely necessary. These routines actually send the commands and data to the MPIX and also rrust maintain proper synchronization between the processors. The routines given below maintain the synchronization and may be used as the basis for a more complicated driver on the host. Appendix 5.2 jives a listing of a driver which can conveniently be used to test most o£ the MPIX commands. Both of the routines given below accept thair inputs (commands or data) in the accunulator . Only the accumulator is altered by the operation of these routines. 37 STATU! C C M PT DATPT EQU ECU EQU 70h ; ADDRESS OF STATUS+2 ; ADDRESS OF STATUS+1 ; ADDRESS OF STATCS EORT. COfMAND PORT DATA PORT. SEf>DCOM: OUT A LUiinANU COMP1 IN STATUS OBI 01H OUT STATUS CMAIT: IN STATUS ANI 02H JZ CWAIT IN STATUS ANI OFEH OUT STATUS RET • DATA TO T SEND AT DwAI OUT IN OR I OUT IN ANI JZ IN AMI OUT RET DATPT STATUS 01 H STATUS STATUS 02H DWAIT STATUS OFDH STATUS ; SET DATA READY FLAG. ; LOOP UNTIL DATA RECEIVED FLAG I> SdT. ; CLEAR DATA RECEIVED FLAG. SET DATA READY FLAG. LOOP UNTIL DATA RECEIVED FLAG IS 3j$T, CLEAR DATA RECEIVED FLAG. 3d 5 . Soft ware Tools Several software tools were used for the construction of MPIX. The software for MPIX was developed using the 8080 cross assembler (an Intel product) on the Cyber 175- The 8080 simulator on the Cyber was also used for some preliminary debugging alttioijii it proved toe slow to be very useful. After the code was generated on the Cyber it was downloaded to a Nortn Star Horizon which contained a BCM programmer. This programmer was then used to transfer the MPIX software to a 2716. The Horizon also was the host processor for the MPIX during final testing. Due t3 toe existence of the debug board (see section 2.7), the vast majority of debugging was done with no host attached. The Wirelist program (see A. 5 and A. 6) was an extramely useful tool for keeping track of the hundreds of wires ii the MPIX. This program should De maintained and improved since it provides a very useful tool for hardware design. A possiole addition is a plotter driver which could provide the user wita a component layout (see figure 8) . 39 List of References 1. Intel Corporat ion. Interp/80 Users Manual. Intel Publication number 98-u37A. Intel Corporation. 1975. 2. Intel Corporation. MCS-85 Users Manual (Preliminary). Intel Publication number 98-3bbC. Intel Corporation. 1977. 3. Corporation. 6080 Assembly Language Programming ianual. Intel Publication number 98-004C. Ii.tel Corporation. 1976. 4. Jones, Vincent C. Graphics Software Standard for Sicrocomputer. Unpublished Paper. 3. HcKinlay, Eric. Documentation tor the Line Generation and Clipping System (LCGS) . Unpublished Paper. 1978. 6. Motorola Incorporated. WC6845 CRT Controler Data booklet (Advance Infocmat ion) . Puolication AD1-465. Motorola 1977. 7. Shaw, Alan c. The Logical Design of Operating Systems. Prentice-Hall 1 97<4. 8. Sproull, Robert ana Newman, William. Principles of Interactive Computer Graphics. McGraw-Hill 1973. UJ Appendices A.1 MPIX Firmware Listing srDis? MACEO L. V I MCV ENDM MACRO DEFINITIONS : LOAD REGISTER FROM 8155 LEDISP MACEO R1,DISP LXI H,EISP MOV R1,M ENDM STORE REGISTER IN 8155 R1,DISP H,LISP M, E1 SHIFT LEFT SHLF MACEC DUMY RLC ANI OFEH EN EM ROTATE ACC 4 BITS RIGHT BE CUR MACEO DUMY RRC RRC RRC REC ENDM 41 8155 RAM LOCATIONS X1 EQU OdOOH Y1 equ 0801H v 2 equ 0802H Y2 ECU 0803H LXLIM EQU 0804H RXLIM EQU 0605H BYIIM ECU 0806H IYLIH EQU 0807H KEY1 ECU 80 8EI KEY2 EQU 0809H KEYT EQU 08GAH DEITX EQU 0803H LEITY EQU ObOCH SIGNX lQV 080DH SIGNY EQU 080EH DE1TK EQU 6 0FH SIGNK EQU 0810H TOUT EQU 0811H LPCN1 EQU 0o12H LPCN2 EQU 081 3H CIIPOS EQU 0314H CHEOY EQU 0815H POL"* 1 EQU 081bH XOUT EQU 0816H YCUT ECU 0817H STERM EQU 081£H CICMP EQU 0819H ::sca EQU 8 1 A H YSCA EQU 081BH XSHF EQU 081CH YShF EQU 081DH SADD EQU 08 1LH SAEBH EQU 081FH UCHP EQU 0820H ST^CKT EQU 08FAH CETC REGISTER NUMBER OEH COESH EQU CURSL EQU OFH STARH EQU OCH 5TARL EQU ODK » MEMORY MAPPED I/O LOCATION STATUS SQU 20 OH XFCRT ECU 1800H YPCPT EQU 1000H CECR^' EQU 2801H upce: EQU 2802H 42 CSTAT EQU 2800H TIMLL eqo 2804H TIHEH EQU 2805H GRID EQU 38C1H CRTA ECU 3800H SCREN EQU 8000H t HANC3HAKI DATRCV ECU 02H DATRDY EQU 01H NREY EQU OFEH BUSY EQU 04H NBUSY EQU OFEH PGFHL EQU 40H FLfCD ECU 10H CHMOD t EQU 20H 18155 EQU 48H LCLN ECU 75H CHABH EQU 30H INITFL EQU 34H NCCMS ECO 1BH SI TIM EQU 18155 OR OCOH SPTIM EQU 18155 OR 40H DUKMY EC" INITIALIZE THE MPIX. 43 I NIT xNCPT HVI A,INITFL STA STATUS MVI A, STA X1 S T A Y1 STA LXLIM C T \ BYL1M STA STZRM XSHF STA YSIiF MVI A r 127 S I ft X2 STA Y2 STA TYLlrt STA RXLIM LXI SP, STACK MVI A, 1 STA XSCA ST? YSCA MVI A, 18155 STA CSTAT MVI A,QFFh STA TIMEL MVI A,3FH STA TIME1I TNI TTALIZE CRT C LXI B,00H LXI H,CRTTAB MOV A,C STA 3800H MOV A, M STA 3801H I NX h I NX B HGV A,C CP1 1011 JNZ IN CRT CALL HO ML CALL CLIR LDA STATUS ANI NBUSY STA STATUS ; CLEAR ALL HANDSbAKE FLAGS. ; INITIALIZE ALL LINE VARIABLES. INITIALIZE STACK POINTER. INIT SCALING FACTORS. INITIALIZE 8155 PGR1S AND TIMER, INITIALIZE TIKEE. ontroler ;;;;;;;;;;;;;;;;;; B-C <- REGISTER NUMBER. H-L <- ADDRESS INTO TABLE. GET REGISTER #. SET REGISTER JELRESS. FETCH DATA BYTE FRC1 TABLE. STORE DATA BYTE. INCREMENT TABLE ADDRESS. INCREMENT PEGISIER NU.1BER. CHECK FOR END OF INIT. 44 MAIN COMMAND EROCLSSING ROUTINE. DETERMINES THE CORRECT ADDRESS ; FOR THE COMMAND SELECTED. : PROCOM: CALL CPI JNC SHLF LX1 PUSH LXI MCV MVI DAD MCV I NX MOV XCHG PCHL JMPTAB: DW DW D« DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DW DCNCOM: LDA ANI STA MVI STA GETCOM NCCMS+1 DONCOM DUCMY H, DONCOM H H, JMPTAB E,A D,0 D E,« H D,M INIT DEFX1 DEFX2 DEFY1 DEFY2 DFPT1 DFFT2 DEEVEC WINuX WINDY DRAWL DRAWCL SCALX SCALY SHFTX StiFTY CHAR CHARS CHREV DLFUS SCBEV HCME CHPO CLER CLERR CCMP COMPR CETAJ STATUS N BUSY STATUS A, SPTIM CSTAT PROCESS THE NEXT COMMAND. MULTIPLY DISPLACEMENT INTO TABLE 3Y 2. SET UP RETURN ALDRESS FOR COMMANDS. PLACE RETURN ADDRESS ON STACK- LOAD BEGINNING ADDRESS OF JUMP TA3LE. CALCULATE THE DISPLACSMENT INTO THE JUMP TABLE. FETCH SECOND BYTE OF ROUTINE AJJRiSS. FETCH FIRST BYTE OF ROUTINE ADDRESS. LCAD PC WITH START INITIALIZE= {HEX DEFINE 71= 1 (HEX) DEFINE X2= 2 (HEX) DEFINE Y1= 3 (HEX) DEFINE Y2= 4 (HEX) DEFINE POINT 1= 5 DEFINE POINT 2= 6 DEFINE VECTOP= 7 ( DEFINE X WINDCW= 8 DEFINE Y WINDCW= 9 DRAW LINE UNCIIEPE DRAW LINE CLIFPED= SET X SCALING FACT SET Y SCALING FACT SET X SHIFT= OE (II SET Y SHIFT= OF (H PLOT A SINGLE CHAR PLOT A CHARACTER S REVERSE CHARACTER DEFINE A USER CHAR REVERSE FIELD MODE NEW CHARACTER PAGE DEFINE NEW CHAR PO CLEAR ENTIRE SCREE CLEAR REGION CF SC COMPLEMENT ENTIRE COMPLEMENT REGION ADJUST THE CRIC PA ADDtt OF ROUTINi. ). (HEX) . (HEX) . HEX) . (HEX) . (HEX). D = OA (HEX) . 3B (HEX). JC (HEX) 00 (HEX) OR = OR= EX) . EX) . ACTER= 10 (HEX). TRING= 11 (HEX) . M0Dfi= 12 (HEX) . ACTER= 13 (HEC) . = 14 (HEX). = 15 (HEX) . SITION= 16 (H3X) . N= 17 (HEX) . R£EN= 18 (HEX) . OP SC2EEN= 19 (diX) OF 5CREEN= 1A (J SX) RAMETERS= 1B (HSX) . ; TERMINATE COMMAND PROCESSING. : CLEAR BUSY FLAG. STOP THE TIMER 45 LEA TIMEL ; DISPLAY TIMER. CMA STA TPCRT IDA T1MEH CMA AHI 3FU ; CLEAR TIMER MGDfc BITS. STA YtCRT JMP PEOCOM THE FOLLOWING ARE THE ROUTINES FOR EACH OF THE COMMANDS ; DZFX1: CALI GETDAT ; SPECIFY THE X COORD OF POINT 1. STA X1 RET DhFX2: CALL GETDAT ; SPECIFY THE X CCORD OF POINT 2. STA X2 RET DEFY": CALL GE1DAT ; SPECIFY THi Y COOED OF POINT 1. STA Yl RET DEFY2: CALL GETDAT ; SPECIFY THE Y CCORD OF POINT 2. STA Yz RET DFPT1: CALL GEluAT ; SPECIFY DOTH COORDS OF POINT 1. STA X1 CALL GETDAT STA Y1 RET * f DFPT2: CALL G^TDAl ; SPECIFY BOTH COORDS OF POINT 2. STA X2 CALL GETDAT STA Y2 RET DEFVEC: CALL GETDAI ; SPECIFY ENDPOINTS OF SECTOR. STA X1 CALL GETDAT STA Y1 CALL GETDAT STA X2 CALL GETDAT STA Y2 RET WINDX: CALL GETDAT ; SPECIFY THE X LIMITS OF THE WINJ04. STA LXLIM CALL GETDAT 46 STA RXLIM RET • WINDY: CALL GETDAT ; SPECIFY THE Y LIMITS OF THE WINJOW. STA BYLIM CALL GETDAT STA TYLIH RET DF.AWCL: CALL DC IIP CALL EXCH12 CALL DCLIP CALL EXCH12 CALL CKEY12 ; RECALCULATE ENDPOINT KEYS. LDA KEY1 MCV B,A LDA KhY2 ANA B ; CHECK FOR LINE CUTSIDE WINDOW. RNZ CALL DRAWL RET SCALT: CALL GEIDAT ; SET X SCALING. STA XSCA RET SCALY: CALL GETDAT ; SET Y SCALING. STA YSCA RET SHF^X: CALL GETDAT ; SET X SHIFT. STA XSH? RET SHFTY: CALL GETDAT ; SET Y SHIFT. STA YSHF RET CHAR: CALL GETuAT ; GET CHARACTER TO BE PLOTTED. CALL CHARO ; OUTPUT CHARACTER. RET CHAPS: CALL GETDAT ; OUTPUT A STRING OF CHARACTERS. MCV B,A LDA STERM ; GET TERMINATOR CHARACTER. CMP B ; CHECK FOR END OF SIRING. JZ DCHS MOV A,B CALL CHARO JMP CHARS DCtlS: RET 47 chfev : MVI E,CHMCD LDA STATUS XRA B STA STATUS • RET D FJ F U 3 : CALL GLIDAT A N I 1FH HLC RLC RLC MCV E, A MVI D , H LXI h, UCKB LAD J XCHG LXI a,oon DAD SP MCV A,L SU1 OOfl MOV L, A MOV A,H CM? D JC OVFLS MCV A,L CMF E JC OVFLS JMP NOVFL OVFLS: LXI L, UCUB NOVFL: XCHG MVI a, can STA LPCN1 DUI? 4 * : CALL GF I DAT ANI 3FH MOV n, A INS L LCA LPCN1 DCR A SIA L P C N 1 JNZ LULP1 • RET • SCFEV: LJA SI AIDS XRI FLMOD STA STATUS » RET • f 1 C s E : LXI H f 80 30H SHLD CHIOS MVI A , H COMPLEMENT CHARACTER 10DS. ; UfiFINi A USEE CHARACTER. ; GET USER CHARACTER: NU33ER. ; GET DISPLACEMENT INTO USEE CH T\3^S. ; GitT LOWEST USER CHAR ADDRESS. ; ADD DISPLACEMENT TC BASE ADDRESS. ; CLEAR HL REGISTER. ; GET CURRENT VALUE OF STACK POIN TrSot. ; ul <- ma;-: b^gin char address. ; INSURE THAT CHA& WILL NOT OVERLY? ; THE STACK. ; ON ERROR PUT NEXT CHAR IN BASE ^DJR. ; HI <- CORRECTED BEGIN ADDRESS IS i\A, ; INITIALIZE LOCP COUNTER. ; GET NEXT BYTE OF CHARACTER. ; MCVe TO NEXT fiAfl POSITION. SET CURSOR ANL STJ.RX AjDRESS TO (0 , J) CHAR POS <- (C,0) 43 MOV H, A CALL PUTCUR MVI A,PGFUL CMA MOV B,A LDA STATUS ANA B STA STATUS MVi A, STARH STA CRTA XRA A STA CHID STA SADDH MVI A, STARL STA CRTA XRA A STA CRTD STA SADD RET CALL GfcTDAT MOV L,A CALL GETDAT ORI BOH MOV H,A SHLD CHFOS CALL PUTCUF RET LXI D, 7F7FH LXI H,Q000H MVI A,0FFH STA CLCMP CALL PRCREG RET CALL GETDAT MOV L,A CALL GETDAT MOV h, A CALL GETDAT MCV E, A CALL GIIDAT MCV D, A MVI A,0FFH STA CLCMP CALL PROREG RET SET PAGE FLAG TC NOT PULL. ; SET START ADDRESS (H) TO 0. ; SET START ADDRESS (L) TO 0. CHPO: CALL GfcTDAT ; DEFINE THE CHARACTER POSITION. ; L <- X POSITION. ; INSURE THAT CHPCS IS ACTUAL ADDS. : H <- Y POSITION. CLER: LXI D,7F7FH : CLEAR THE ENT IR I SCREEN. C1ERS: CALL GETDAT ; GET UPPER LEFT CORNER (X FIRST). ; GET LOWER RIGHT CORNER (X FIRST) 49 CC^P: LXI D,7F7FH LXI H,OQOOH MVI A,OOH STA CLCMP CALL ppoeeg LDA SI AT US XPI CHMCD STA STATUS t RET • cc;-:pk: CALL GirTDAT MCV L,A CALL GE1DAT 110V H r A CALL G LTD AT MOV i- $ A CALL GPTUAT II ov D,A MVI A, OOH STA CLCMP CALL PEOBEG • RET ; COMPLEMENT THE ENTIRE SCREEN. ; GET UPPER LEFT CORNER (X FIRST). ; GET LOWER RIGET CORNER (X FIRST) . GET COMMAND GETCOM: LDA STATUS AMI DATRDY JZ GET COM LPDISP B,CEORT LDA STATUS OF I BUSY OBI DATRCV ANI NKDY STA STAIUS MVI A, STTIM STA CSTAT MCV A, E RfcT LOOP IF NO COKMAND IS READY. CLEAR DATA READY FLAG. SET BUSY AND LATA RECEIVED. START TIMER. 30 GET DATA GITDAT: LDA STATUS ANI DATRDY JZ GETDAT PUSH H LED ISP B,DPORT POP H LDA STATUS OP I DATRCV ANI NRDY SIA STATUS MCV A, B LOOP IF NO DATA AVAILABLE. CLEAR DATA READY FLAG. SET DATA RECEIVED. RET LINE CLIPPING ROUTINE DCLIP: CALL CKEY12 LRDISP D,K£Y1 LDA KEY2 ANA D ANI OFH JNZ DONE .10 V A,D ADI JZ DONE RFOUR DUMMY XEA D ANI OFH JNZ ICLIP ICLIP: LDA KEY1 STA KEYT CALL DELXY CALL KYSGN CUP: LDA DELTX CALL DIV2 STA DE1TX LDA DEITY CALL LIV2 STA DELTY LRDISP D,EELTX ORA D JNZ SEARCH JMP DONE SEARCH: CALL ADDEL CALL CKEYT ; CALCULATE KEYS FOR POINTS 1 AND 2 ; TEST FOR LINE OUTSIDE WINDOW. TEST FOR POINT 1 INSIDE WINDOW. ; INITIALIZE TEMP KEY (TKEY) TO K4Y1 ; CALCULATE THE IIFF BETWBEN ENDS ; CALC THE CONTROL DELTA AND SIGS. ; DIVIDE DELTX BY 2. ; DIVIDE DELTY BY 2. ; TEST FOR BOTH DELTAS =0. ; CONTINUE BINARY SEARCH. ;CALC KEY FOR TEMP POINT. 51 EC NE CT V2 NEG: LAST: CALL CSIGN ; CALC LDA KEYT ; TEST ANI OFOH JZ CLIP LBDISF D,KEYT RFOUH DUMMY XRA D ; TEST ANI OFH JNZ CLIP LDA KEY2 ; TEST RFOUK DUMMY ANA D AMI OFOH JNZ CLIP PET SIGN OF THE TWO DELTAS. FOE BOUNDEY INTERSECTION. FOE INTERSEC WITH INSIDE JRJ3. FOR INTER W/CORitECT INSIDE 3 etui LI VIDE ACC BY TWO ACI JM NEG CPI 1 JZ LAST RRC ACI ANI 7FH RnT CPI -1 JZ LAST RRC ORI 8 OH SET MV1 A , \j PET ADD CAREY TO EOGND UPWARD. LINE DRAWING ROUTINE LBAWL: CALL TRANL : APPLY TRANSFORMATION 10 LINE. CALL TRANL CALL DELXY LEA V1 ST A XOUT LDA Y1 ST A YOUT CALL PTCUT LDA DELTX LRDISP L,CELTY OR A D RZ LEA D^LTX CALL MAG ; RETURN IF DOTH LELTAS=J (PT PLOT). ; FIND ADS (uELTX ) 52 CHEK NCR1 NXTPT PCSX ACDX POSY AEDY MOV LDA CALL MOV OPA ANI JNZ MCV 5HLF MOV MOV SHLF MCV JM? SPDISP SRDISP LRDISP MVI MVI PUSH LRDISP POP PUSH PUSH LRDISP MVI LDA ADI JP MOV CMA INB MCV JMP INB POP DAD MCV STA XTHL PUSH LRDISP MVI LDA ADI J? MOV CMA INR MOV JMP INR PCP D, A DELTY MAG E,A D 80H NORM A,B DUKMY D,A A,Z DUMMY E, A CHEK D,DELTX £,EELTY H,X1 L,80li F,80H H D,I1 H D H E,EELTX D,0FFH SIGNX POSX A, E A E, A ADLX D H D A,H XOUT H E, DELTY D, 0?FH SIGNY POSY A,i A E, A Ax;EY D H ; FIND ABS(DELTY ) ; CHECK FOE HOB SET (NORMALIZE) . ; SHIFT LEFT DELTX AND Y. CONTINUE SHIFTING UNTIL NORMALIZE,). THE DELTAS ARE NOW NORMALIZED. CUR X OR Y IN H-L, CUR DELTA I J J-E. INITIALIZE X AND Y. PUT INITIAL Y CN TOP OF STACK. ;S£T COND FLAGS ; COMPLEMENT ACC IF SIGN OF DELTAX ; IS NEGATIVE. ; CLEAR ALL BUS OF D.(SIGN OF DiLTAX ; IS POSITIVE) . ;EXCHANGE X FOB Y. ; S£.T CONDITION FLAGS. ; COMPLEMENT ACC IF D3LTAY IS NE5ITIVJ. ; CLEAR ALL BITS OF D (SIGN OF DiLTA ; IS POSITIVE) . 53 XCHK DAL D MOV A,H STA YOUT CALL PTOUT ; OUTPUT LDA Y2 ; :HJsCK c :\ ? H JZ XCHK XTHL JMP NXTPT XTHL PUSH H LD* X2 POP H CMP H JNZ NXTPT POP H ; RET TIB N BET POINT. FOR REACHING POINT 2 WHEN POINT 2 15 REACHED PERFORM Tiiii TFANSFuFMATlON DEFINED BY THE CURRENT SCALING AND SHIFTING COfcFIClENTS. A NEGATIVE SCALING FACTOR IN- DICATES A REDUCTION (DIVIDE) . ha?:l 8ANP L"I h , y 1 LDA XSCA MOV D , A LDA X S H ? CALL TRAMP I NX H I NX H LDA MS HP CALL T F. A N P LDA Y S C A MOV D,A LDA YSH? DC'C H CALL Tit AN P in:: H INX H LDA YSHF CALL TRAMP RET ADD H MCV C, A MOV A,E S'JI 8GH JC TMTJL MOV D # A CALL DIV MOV A,E OBI BOH D <- SCALING FACTOR. A <- SHIFT. TRANSFORM X1. ; TRANSFORM X2 . ; TRANSFORM Y1 . ; TRANSFORM Y2 . ; TRANSLATE POINT. ; C <- POINT. ; TEST FOR MULTIPLY 03 DIVIDE. ; PLACE MAG OF DIVISOR 18 D. ; RESTORE HOB. 54 MOV D,A JMP DTBAN TMOL: CALL MULT DTEAN: MOV M,C RET EXCHANGE POINTS 1 AND 2 E"CH12: LEDISP D,X1 LEDISP E,X2 SBDISP D,X2 SPDISP E,X1 LRDISP D,Y1 LEDISP £,,Y2 SRDISP fc,Yl SFDISP D,Y2 R£? CALCULATE KEYS FOE POINTS 1 AND 2 CKEY12: LEDISP D,X1 LRDISP E,Y1 CALL CKEY STA KEY1 LRDISP D,X2 LEDISP E,Y2 CALL CKEY STA KEY2 RET CALCULATE KEY FOR TEMPORARY POINT, CKEYT: LRDISP D,X1 LRDISP E,Y1 CALL CKEY STA KEYT RET CALCULATE KEY CKEY: MVI H,0 ; EOINT IS IN £-E KEY IN ACC. MVI L,0 ; KEY iILL QE FORMED IN L, THE B-K4Y ; WILL BE FORMED IN H. PUSH H LDA TYLIM ; TEST TOP LIMIT. POP H CMP E CALL INCHGH ; INCREMENT REG IF GREATER THAN LIJIT. DAD H ; SHIFT H-L LEFT. 3 3 PUSH ii LBA BYLIM POP H C*.P e CALL INCLOW DAD H PUSH H LDA hXLIM POP ii CUP D CALL * 1NCHGH DAD ii PUSH H LDA L X L I M POP H CMP D CALL INCLOW MOV A,H RFOUfc DUMMY OFA L RET ;T£ST FOB BOTTOM LIMIT. ; INCREMENT REG IF LaSS THAN LIMIT. ; TEST FOR RIGHT LIMIT. ; TEST FOR LEFT LIMIT. CilhRHINE Tfti. SIGN OF THE NE::T Y. INCF.SMEMI CSIGN TCWRD W A Y : CCMPI) LRDISP D,DhLIK LI A KEY1 LRUISP H, KEYT ANA ii ANI 4 OFH JMZ AWAY la Uii. 3 1 G N K X R A u ANI 8UH JZ CCMPD RET LEA S1GNK XRA J A.N I 80 ti JNZ CCKPD RET LCA DLLTX CMA i n a A STA DtLIX LDA DELTY CM A INR A STA DiiLI'Y LDA ULLTK CM A INF A STA DiLTK SEI SIGN SO THAT THE TEMP POINT MOVES CLOSER TO POINT 1. JUMP IF SIGN HITS =. SET SIGN SO THAT THE TiiMP POINT MOVES AWAY FROM POINT 1. JUMP IF SIGN BITS NOT =. COMPLEMENT ALL THREE DELTAS. 56 RET DELXY SEX: SFY CALCULATE DELTA X AND DELTA Y ;;;;;; ; CALCULATE DELTX LDA X2 LRDISP D,X1 SUB D STA DELTX MVI £,1 JP SPX MVI E,-1 SRDISP E,SIGNX LDA Y2 LRDISP D,Y1 SUB D STA DELTY MVI E, 1 JP SPY MVI £,-1 SRDISP E,SIGN Y RET DETERMINE THE SIGN OP DELTA X. CALCULATE DELTA Y. DETERMINE THE SIGN OP DELTA Y. CALC KEY SIGN AND CELT KYSGN XfcIGH SETK: LCA CALL MOV LDA CALL MVI CMP JC LDA A CI JP MVI J MP LDA ADI JP MVI SRDISP STA RET DELTX MAG D,A DELTY MAG E,1 D XHIGH DilLTY SETK E,-1 SETK DELTX SETK £,-1 E, SIGNK DELTK THE KEY SIGN AND DELIA ARE OSEJ TO INSURE THAT THE DIRECTIONS OP TH3 ORIGINAL DELTA AND THE MOST BECBSI DELTA ABE SAVED. ACDEL INCREMENT POINT 1 BY DELTA X AND DELTA Y LDA LRDISP ADD X1 D, DELTX D ST A X1 LJA Y1 LRD1SP U,DEL1'i ADD D S1A n R ET EAG ADI RP C . V JA INR R ET 7AKE ABSOLUTE VALU^ OF ACC ;SET COND FLAGS . ; RETURN IMMED IF ♦ OTHERWISE COMPL, NCHoti N: INCREMENT IF ABOVE LIMIT JNZ N INR H INR L RET RNC I NR T RET ; INCREMENT U IF ACC=R3G. ; INCREMENT L IF ACO=REG, INCREMENT IF BELOW LIMIT INC LOW: JNZ M ll M INR H INR L RET M a M : RC INR L RET ; INCREMENT H IF ACC=RciG. : INCREMENT L IF ACC<=REG. OUTPUT A POINT PTCUT PUSH PUSH PUSH LHLD M VI 0?A MOV MOV ANI MVI MCV LXI ; SAVii ALL EEGISTrRS. ; G£.T ADDRESS OF POINT TO 3E OUTPJT. H L B PC III A, BOH ii H, A ; CONVERT REL TC ACTUAL ADDRESS. A,L ; DETERMINE IriE MASK TO USE. 7H B , H C , A D,BTMSK ; GET ADDFESS OF MASK T\dLE. 3d XCHG DAD B ; COMPUTE ADDRESS IN MASK TABLE. MOV C,M ; C <- BIT MASK. XCHG MCV B, M ; B <- DATA BYTE. LDA STATUS ANI FLMOD ; TEST FOR NORM OF REV FIELD. JNZ REVPT MOV A,C OPA B JMP PT01 REVPT: MOV A,C CMA ; REVERSE THE MASK. ANA B PTC1: MCV M,A ; REPLACE BYTE. POP B ; RESTORE REGISTERS. POP D POP H RET BTKSK: DB 01H DB 02H DB 04 H DB 08H DB ''OH DB 20H DB UOh DB BOH t • ; ROUTINE TO OUTPUT A CHARACTER. THE CHARACTER TO 3E PRINTED ; ; SHOULD BL ELACED IN THE ACCUMULATOR BY THE CALLING PBOJ-; ; RAM. ALL REGISTERS ARE USED BY THIS ROUTINE AND SHOULD BE ; ; SAVED BY THE CALLING PROGRAM IF THEY ARE NIEDED. : CHARACTER POSITION ON SCREEN. FOR BACKSEACE- • CHARO: LHLD CHIOS ; HL <- CPI 08H ; CHECK JNZ NBS MOV A,L SOI 06H MCV L, A JMP DCHR1 NBS: CPI OEH ; CHECK JNZ NCF. XRA A MOV L, A CALL PBOLF JMP DCHR1 NCF: CPI OAH ; CHECK JNZ NLF CALL PROLF FOR CARR. RETURN. FOR LINE FEED. 5i J MP DCHF.1 NLF: CFI 20H ; JZ DCHB2 N3E: CALL CKKAP ; PUSH PSW ; MOV A,L CPI LOIN ; JC c h a a 1 ; M VI A , H ; MOV L, A CALL PROLF ; CH ^r 1 : HVI A,00H ST A LPCN1 ; CALL CliMSK ; POP PSW ; MOV c , A ANA A ; JP STCH ; ANI 7FH ; PLC PL~ P. I. C ANI OFtiii ; L V I 0,1101113 ; ADJ. e ; MOV E, A ; J MP LECW STCH: MVI D,CHARH ; CPI 40H JWC LROW MVI A , 2 ST A L PC N 1 ; IMP it I NB H LECW: LDAX D ; ANI VFn ; PUSH d ; CALL CUIRO ; POP D ; MOV A,D ; CPI OBIi ; JNZ STCH2 INR i ; JM? L R C W 2 SICH2: INF d ; LPCW2 : IMP h ; LEA LECN1 INR A STA LPCN1 ; CPI J8H ; J NZ LECH CHECK FOR SPACE. MAP ASCII VALUE TO CGEN ADDRESS. SAVE CHARACTER CODE. CHECK FOR NO MORE BOOM ON LINE. JUMP IF ACC<78. SET XPOS TO (CARRIGE RETURN) . PROCESS LINE FEjiD. ZERO LOOP COUNT Ea. 8C <- CHARACTER MASK. GET CHARACTER TO EE DISPLAYED. SiT FLAGS. I? HOB IS TKEt* STAND. CHAR. HOo WAS 1 SO CHAR IS USER DEFINED. MULTIPLY CHAR CODE BY 6 10 OBTAIN OFFSET INTO RA.1. GET BASE OF USEE CHAR AREA. AED OFFSET INTO USER SHAH AREA. 'i)L <- CHARACTER ADDRESS (USER DiF.) OE <- CHARACTER ADDRESS (STANDARD) JUMP IF CHAR. IS UPPER CASE. DECREASE ROWS IN CHAR 3Y 2. GET ROW OF CHARACTER. CLEAR HOE'S. SAVE CHARACTER ADDRESS. OUTPUT A ROW CF THE CHARACTER. RESTORE CHARACTER ADDRESS. GnT HOB OF CHAR ADDRESS. DETERMINE IF CHAR IS STAND. JUMP IF CHAR IS STANDARD. SET CHAR ADDRESS TO NEXT ROW OF CJAR. SET CHAR ADDRESS TO NEXT ROW OF C IAR. INCREMENT THE Y SCREEN POSITION. INCREMENT LOCE COUNTEd. CHECK FOR iiND OF LOOP. DCHR2 LflLE CHPOS ; OBTAIN CHARACTER POSITION, 60 DCHR1: MCV ADI ANI MOV SHLC CALL RET A,L 06H 7FH L, A CHEOS PU1CUR ; UPDATE CURSOR POSITION. ; UPDATE RAM CHAR POSITION. : UPDATE CRTC CURSOR. ou: BE PUT ONE ROW AS 70LLCWS- BC <- CHARACTER ACC <- OF A CHARACTER. ON ENTRY Tli E FEGISTERS SHOULD MASK. THr, ROW OF THE CHARACTER. HL <- SCREEN ADDRESS WHERE ROW IS TO BE PLACED. DE IS USED BY THIS ROUTINE SO ITS CONTENTS SHOULD BE SAVED BY THE CALLING PPOGRAE. OUIPO DRCW: DRCW2 MVI £,0 MOV 2, A ; LJA STATUS ANI CUMCD ; JZ DROW MOV k,c ; CMA ANI 1FH MCV E/A CALL SHCHR ; MOV A,M ; ANA c ; ORA E ; MOV M,A ; MOV A, E CMA ANA A ; JZ DECW2 ; MOV " A,L A CI 08H MOV L,A MCV A/ M ANA fl ; 03A D MOV M,A ; MCV A,L ; SUI 08H MOV L,A RET ; DE <- THE ROW OF THE CHARACTER. ; DETERMINE IF NORMAL OR REV- CHA3 SODS. ; IF REVERSE MODE, COMPLEMENT CHA1 104. SHIFT CHARACTER INTO POSITION. GET SCREEN BYTE. CUT WINDOW FOR CHARACTER. OR IN CHARACTER ROW. REPLACE SCREEN EYTE. TEST FOR X-ING EYTE BNDRY. ON SCH2EN, SET FLAGS. JUMP IF NO BOUNDRY CROSSED. FETCH NEXT BYTE FRC.1 SCREEN. CUT WINDOW FOB CHARACTER, OR IN REMAINDER OF CHARACTER. REPLACE SCREEN EYTE. GET SCREEN ADDRESS. 61 PROCESS ALDPESS. HOflTINii ALCNG LINE FEED. Oli tNTRY HL THE QUANTITY IS UPDATED WITH THE CtiAR CONTAINS THE CURSOR AS NECESSARY BY THIS POSITION AND THE CURSOR. P R C L F : H £ NOFG2 MOV ADI PUSH OPT MCV sued CALL POP JNC Luk on STA LDA AW I JZ M VI STA LEA ADI ANI STA STA R£T A,H OBE PSW BOH H, A CflPOS PUTCUR PSW NGPG STATUS PGFUL STATUS STATUS PGFUL HOEG2 A, STAPH CRTA SACDH 02H 1FH SALDH CRTD ; INCREASE Y POSITION. ; SAVE CY FLAG. UPDATE CHAR PCSITICN. UEDATE CURSOF. GET CY TO DEI. IF PGFJL SET. ; READ STATUS. ; SET PAGE FULL FLAG. ; CHECK PAGE FULL FLAG. ; JUMP IF END OF PAGE NOP YET REAJ.laD. GET HOB OF START ADDRESS. INSURE HO 3 BITS ARE CLEARED. UPDATE HOB OF START ADDRESS. MAP THE ASCII CHARACTER VALUE INTO THE CriA EACTER ADDRESS SPACi. ONLY IHE ACCUMULATOR IS ALTERED. C H f. A ; UPP A N A A R . v i CPI 60H JC UPP SUI 6 H RuT CPI 4GH RNC ADI UOH R ET SET FLAGS. RETURN IF USER DEFINED CHARACTER, ; RETURN FOR LOWER CASE. ; RETURN FOP UPPER CASE ALPHA. ; RETURN FOR UPEEE CASE #• S. o2 PLACE THE VALUE GIV£N BY HL I N 10 THE CBTC CUBSOB BiSG. IN ORDER TC DC THIS THE VALUE MUST BE PROPiBLY PACKbD. NO REGISTORS ARE CHANGED BY THIS ROUTINE 01HEB IdAN THE ACC. PU1CUR: PUSH H MOV A, I ADI 06H MOV L,A MOV A,H ADI 07H MOV H,A RAR ; LOB NOW IN MOV H, A MOV A, I JNC NOCY ORI 80H ; SET HOB. JMP PDT1 NCCY: ANI 7FH ; CLEAR HOB. P U 1 1 : MCV L,A MGV A,h ; SHIFT HL R RAR MOV H,A MOV A,L RAR MOV L,A MCV A,H ANI 1FH ; CLEAR 3 HO MOV H,A MVI A, CURSH STA CRTA MCV A, H STA CHID ; SET CURSOR MVI A,CURSL STA CRTA MCV A, I STA CRTD ; SET CURSOR POP H RET CY RIGHT ONE (H) (D 6J ; SET UP MASK ?CR CHARACTER. THE MASK (CORRECTIY SHIFTED) ; IS RETURNED IN DC. ALL OTHER REGISTERS (EXCEPT ACC) RJ2- ; MAIN UNCHANGED. • • • CHKSK MSK' PUSH a MOV A , L ANI 711 LXI H,CMSKI LLC MCV C,A MVI B , C H DAD D iiOV C,« I NX H MOV 3, M POP li RLT DW GFFEOH DW 0FFC1H DW 0FF83H D^ 0FF07H DW OFEOFh DW 0FC1FH D* 0F83Fti DW 0?C7FH SAVE SCREEN AEDBESS. OETAIN POSITION WITHIN SCREEN BMi. STARTING ADDRESS OF TA3LE. 2X BYTE POS. TO OBTAIN TABLE OP?3JT. ; AED OFFSET TO STARTING ADDRESS. ; FETCH LOB OF f!ASK. ; FETCH HOE OF P.ASK. : RESTORE SCREEN ADDBES3. • t 1 SHIFT THE IN SCREEN ALTERED. CHAR ACT MEMORY. EF fa OK NO h IN DE IN AGISTERS ITO 07 POSITION HER THAN FOR ACC PLACING IT a:id je ARE • • » SilCllP ROLP: curs' GOV A, I ANI o7H STA LPCN2 JZ CHM51 MOV A, E RIC MCV E,A MOV A , Z RAL MOV D, A MOV A,E ANI 0FF.H MCV E f A LEA LPCN2 DCR A SI?, LPCN2 JMP PC IP Rr,T GET CHAR SHIFT AMOUNT. INITIALIZE LOCP COUNTER. ROTATE CHARACTER 1 POSITION. DECREMENT LOOF COUNTER. 64 ROUTINE FOE PROCESSING ALL THE BYTES IN A GIVEN REC- TANGULAR AREA OF THE SCREEN. THIS ROUTINE IS OSED BY THE CLEAR AND COMPLEMENT ROUTINES. THE ONLY EESTRIC- HON IS THAI THE AREA TO BE PROCESSED MUST CEOSS A BYTE BOUNDRY. ON ENTRY: LE <- THJ: LOfiER RIGHT CORNER OF THE RECTANGLE. HL <- THE UPPEh LEFT CORNER OF THE RECTANGLE. CLCUP <- CONTAINS FF FOR CLEAR OR 00 FOR COMPLEMENT. REGISTERS £ AND C ARE USED BY THIS ROUTINE AND SHOULD BE SAVED EY Itic. CALLING PROGRAM. PRCREG: MOV C,L ft E E 1 : MOV A,C ANI 0711 MOV B,A JZ REP2 MVI A,0dH SUB B MCV B, A STC HCT1: RAR DCR B STC JKZ BOT1 MCV B,A CALL PROBYT MOV A,L ANI 0F8H AD1 08 H MCV L, A REE2: MVI 3,0FFh KEF3: MOV A,L ADI 07H CMP E JP E F C W 1 CALL PSCBYT MOV A,L ADI 06H MCV L, n JMP REP3 LRCW1 : MOV ?.,L ANI 07H I MR A MCV B,A STC MVI A,00H ROT2: PAL DCS E STC J N Z R 1 2 MCV B,A ; C <- LEFT EDGE OF RECTANGLE. ; DETERMINE POS WITHIN BYTE. ; JUMP IF LEFT EDGE ON EVEN BYTE JNJRY. ; FIND NUMBER CF EITS TO PUT IN M\SK. ; INSURE THAT 1 IS SHIFTED INTO B*T<2. ; ROTATE 1 INTO HOB. ; INSURE THAT 1 IS SHIFTED INTO B'fTi. ; LOOP UNTIL MASK IS FINISHED. ; B <- MASK. ; PROCESS EYTE. ; CLEAR THREE LCB'S. ; MOVE ^0 NEXT EYTE. : SET MASK FOR TREATMENT OF FULL 3YT3. ; SEE IF ENTIRE BYTE 13 TO BE PRO:. ; TERMINATE LOOE IS ACC >= E. ; MOVE TC NEXT X EOSITION (BYTE) . ; PROCESS PARTIAL BYTcI AT END OF 104. ; ACC HAS * OF BIT TO PUT IN MASK. ; ROTATE 1 INTO LCB. ; LOOP UNTIL MASK FINISHED. 6j CALL PBOBY' 1 3 C W 2 MCV L,C 1KB ii MOV A,H CMP D JM 6 E E 1 JZ R£P1 RE" RESET X POS TC EEGIN NEW BOM. INCREASE Y POSITION. CHECK FOE LASI ROW. PROCESS A BYT]-. ACCORDING TO THE VALUE OF THE FLAG IN ; LOCATION CLOMP. I 17 -HE FLAG IS FF THEN (til) IS TO ; BE CLEARED (TO ZERC 01 1 DEPENDING ON THE FIELD MODS.).; r THE FLAG IS ZERO, (IIL) IS TO BE COMPLE KE ST ED . THE ; PAFT OF THL BYTE TC BE PROCESSED IS GIVEN BY THE POS- : 1TI0N OF THi. 1'S IB B. NO ALTERED BY THIS ROUTINE. REGISTERS OTHER THAN ACT ARE P R E Y T CLE 1 F L C : DPROB PUSH MCV OBI MCV Lu? ANA JNZ MOV XRA CMP LCA ANT JZ MOV 0R1 J MP MOV CM A ANA MOV POP RET H A,H BOH H, A CL C H P A CLR1 A,E M DPROB STATUS FLMOD FLDO A,M B DFR03 A, E A K,A H ; SAVE SCREEN PCSITIGJ. CONVEFT REL TC ACTUAL ADDRESS. READ CLEAR/CCKPLEMENT FLAG. SET FLAGS. Ci^AR BYTE IF FLAG IS NON-ZERO. COMPLEMENT THE BYTE. XOR MASK WITH MEMORY. ; CHIiCK FIELE MODE. ; SlT DESIRED BITS TC 1 COMPLEMENT MASK. CLEAR D^JIRLD BITS. REPLACE BYTE. 66 MULTIPLY ROUTINE. MULTIPLIES THE CONTENTS OF C BY TUB ; CONTENTS OF D. THE RESULT IS RETURNED IN BC. E IS USED; AS A LOOP COUNTER, HL IS UNCHANGED. PROGRA K USED IS ; TAKEN PRCM INTEL BOfaO ASSEMBLY LANGUAGE MANUAL. : M 1 T : MVI MVI MULT ): MOV RAR MOV DCR JZ MOV JNC ADD H U L z 1 : RAR MOV J1P J M U L : RiT B,C E,9 ?-,C C,A E DhUL A,B MULT1 D L, A MULTO E1VIJE RCUT1NE. DIVIDES THE CONTENTS OF C EY THE CON- TENTS OF J. THE: FUSULT COMES BACK IN C. E IS USED ?OR A LOJ? COUNTS. I1L ARE NOT CHANGED. uIV: DIVO: DIV1 MVI 3,0 MOV A,E MVI E,S SUB D JC DIV1 MOV 3, A CMC MOV A,C RAL MCV C t A MOV A,E RAL MCV 3, A DCR E JNZ DIVO RiiT 67 CPTC ADJUSTMENT ROUTINE CKTAJ: CALL GETDAT STA CRIA CALL GEIDAT STA CRTD HET f ; CRT INIT CRT TAB: DB 5211 DP 4 H DB 4bH DB 06H DE 7FH DP 10 H DB 7FH Db 7Fh D3 00h D3 01H DB 40H DB 0111 DB OOH DB OOH DB OOH D3 OuH ; SPECIFY THE REG TO BE CHANGED. ; SPECIFY THE NfcW VALUE. ialization table ;;;;;;;;;;;;;;;; HORIZ TOTAL. HORIZ DISPLAYED. HORIZ SYNC POSITION. HORIZ SYNC WIDTH. VERT TCTAL. VERT TOTAL ADJUST. VERT DISPLAYED. VERT SYNC POSITION . INTERLACE MODE. MAX SCAN LINE IN CHARACTER. CURSOR ENABLE AND CURSOR END WITHIN McM START ADDRESS MEM START ADDRESS 3T WITHIN CHAR. (H). (E). CHAi. CURSOR CURSOR ADDRESS ADDRESS (H) (L) ~NE 6d A.Z idin Processor Stiver Listiny STATUS EC" 7 OH ditpt E2H STATUS+1 CO MPT EQU STATUS+2 NCCM EQU 22 TABLN EQU Neon*: CCMLN EQU Ob IST3 ECU UF90H LPCN 1 EQU U L' b ? H LPCN2 EQU 4F8lH STACK EQU 4 F 8 H £ X A D D • • EQU 380 OH • ORG 5000H LXI SP, STACK SLOOP: CALL CEIF LXI H,COMD CALL PTSTR CALL 1NSTR M VI A, CO STA LPCN2 LXI li , S T LG C LXI B,CCMLN+1 SEARCH: CALL CKPST ANA A JZ MATCH DAD B LDA LPCN2 ADI 02a ST 7. L P C N 2 CPI TABLN JNZ SEARCH LXI H,UNDEF CALL PTSTR CALL CRLF JMP MLCOP MATCi : LDA LPCN2 MOV I!i f A MVI 0,0 LXI H, TITL DAD D MCV C, M i i-j :<: H MOV H,M MCV L,C CALL PTSTR C ALL CFLF LXI u, JMPTAB BcGIN ASSEMBLY AT 5J0JH INITIALIZE STACK POINTER. REQUEST COMMAND. FLTCH INPUT STRING. HL <- LOCATION CF COM1AND STRINJS. BC <- LENGTH CF A COM1AN0 STHINJ. COMPARE IN STB. WITH NEXT COM. 3Ti. INPUT STRING NOT A COrtdAND STRING. ; Dr <- OFFSET INTO TABLES. ; OBTAIN ADDR CF CCMdAND TITLE. ; PBINT COMMAND TITLE. ; OBTAIN CCMMANC ROUTINE ADDR. 69 DAD D MOV E, M ISX 11 MCV D, M XCHG LXI 3,MLOGP PUSH 3 ; PLACE RETURN AEIR • PCHI • T fTur n rr > t r l. ; JUMP THROUGH HL. ; JUMP IAL.LE JMPTA3: DW INIT DW DVEC Dh WINX DW WINY DW DRAW DW DRAC DW SCAX DW SC.AY DW SHPX DW SHFY DW CHRS DW SCFV DW UCtfE DW CUFP JW CLiK DW CLrZ DW CGMP DW CUMZ DW ur.il DW Hi IP DW DLFCH t DW CRT A J •iftttif • t » » t i f INIT: MVI A , 00 OUT COMPT a vi A , 1 OUT STATUS I WAIT: IN STATUS ; WAIT FOR INITAI1I ANI 07H JNZ I WAIT RET DVEC: MVI A,07H CALI SiNDCCM CALL XYCOR CALL XYCOH RET WINX: MVI A , C 6 H CALL SENDCOM CALL RANGE R^T ON STACK. 70 WINY: MVI A,09H CALL SENDCGM CALL RANGE KET DRAW: MVI A,0AEJ CALL SENDCGM RET DRAC: MVI A,0BH CALL SENDCGM RET SCAX: MVI A, OCH CALL SENDCGM CALL FACTOE RET SCAY: MVI A, ODH CALL S 1 N D CO M CALL FACTOE PET S H F X : MVI A, OEH CALL SENDCOM CALL FACTOE RET S H F Y : MVI A,0FH CALL SiHDCOM CALL FACTOE SET CUES: MVI A, 1 1H CALL SENDCOJ3 CLP: CALL CHIN CFI 00H JZ DCh CPI 1iih JZ USDF MOV B,A CALL ChOOT MOV A,E CALL SENDA1 J MP CLP OSDF: CALL GETDIG OBI 80H CALL 5ENJAT J MP CLE ECH: CALL SEN DAI CALL CELF re: CHECK FOE USEE CHAE 71 SCEV: a c m E : CUEP: CLER CLLZ: C C f! P : COM2: EXIT: DEFCH : ULP1 MVI CALL RET MVI CALL RET MVI CALL CALL RET MVI CALL RET MVI CALL CALL CALL RET MVI CALL RET MVI CALL CALL CALL RET CALL CALL CALL JMP MVI CALL LXI CALL CALL CALL C ?■ L L LXI CALL CALL MVI STA MVI STA A, 1 ^H SENDCOM a, 15a SENDCCM A , 1 6 a SiNDCCM XYCOR A, 17H SiNDCCM A, 1311 SENDCCM XYCOR XYCOR A, 19H SjiNDCCM A, 1AH SENDCOM XYCOR XYCOR CtiL? crap CP.LF EXADD A, 13,1 SiNDCCM H/CHHS PI SIR GETDIG Sr.NDA'1 CLEF H,CHBS P1STR CHEF A , 8 H LPCM1 A , 5 H LPCN2 n UIP2 RCT1 : MVI CALL STC JNZ CMC MCV RAR MCV LDA DCR STA JNZ MOV RRC RFC RRC CALL CALL LDA DCR STA JNZ PLT D,0 GETJIG ROT1 A,D D, A LPCN2 A LPCN2 ULP2 A,D 'HE CHARACTER. SENDAT CRLF LPCN1 A LPCN1 ULE1 HELP: MVI A, CO STA LPCN1 LXI H,STLCC LXI D,TITL HLOP: CALL PISTE PUSH ti LXI H,ELANK CALL PTSTR LDAX b MOV L,A I NX D lla:: D MOV a, a INX D CALL PTSTR CALL CRLF PCP H LDA LPCN1 ADI 02 STA LPCN1 CPI TABLN JZ DHELP MVI B,0 MVI C, CCMLN+ DAD B J M ? HLOP DIIELP: RET ; GET A ROW OF THE CHARACTER, ; ROTATE 1 INTO D. ; ROTATE INTO D. INITIALIZE LOCP COUdTSa hL <- COMMAND NAME STRING LOC . DE <- COMMAND DESCRIPTION LOC. PBINT BLANKS CRTAJ: MVI A, 1bH 73 CALL CALL CALL CALL CALL CALL CALL RET 5ENDC0M GL1HEX SENDAT CELF GETHEX SENDAT CRLF ; SPECIFY EEGIS1EB TO BE CHANGED. ; SPECIFY NEW VALUE. XYCOR XCK: YCOE YCK ; ; e LXI CALL CALL JP C AL L JP.P CALL LXI CALL CALL JP CALL LSI CALL J HP CALL CALL EET EC.UE5T XY COOP H, XMES PI SIS GETHEX XOK EREOR XYCOE SEN DAT H,YM£S PTSTR GET HE}! YOK BREOfi H,BL17 PISTE YCCH SENDA1 CRLF PAIS CHECK FOE LEGAL VALUE, CHECK FOE LEGAL VALUE. RANG.,: XEOK YEAN YPOK ; BEQUEST LXI C A L L C Al,L JP CALL J MP CALL LXI CALL CALL JP CALL LXI CALL J. -IP CALL CALL RE- RANGE H, BRANG PTSIE GET HEX X E C K EEEOE RANGE SEN DAT 11, ERANG PTSTR GET HEX YEOK EL EOS !i,BL23 PTSTR YEAN SLNDAT CRLF • t ? i t t * i CHECK FOE LEGAL VALUE. CHECK FOE LEGAL VALUE. FACTO? ; RtgUtST FACTOR LXI H,FACT CALL PTSTR CALL GET HEX 74 CALL CALL RET SENDAT CRLF ;;;;;;;;;; phint a string ;;;;;;:;;; hl changed, ptstr: push b PUSH H PTLP: MOV b,M MCV A,B CPI •$• JZ DNFTL CALL CHOUT INX H JMP P1LP DNPTL: PO? H POP D RET BEGINNING AT ADDR . HL ;;;;;;;;;; in ;;;;;;;;;; si INSTR: PUSH PUSH LXI MVI STA CLRS: MVI MOV INX LDA DCF S^A JNZ LXI ISLP: CALL CPI JZ MOV CALL MOV MCV INX JMP DINS: CALL POP POP RET ;;;;;;;;;; cc ;;;;;;;;;; cc CMFST: PUSH PUSH PUSH LXI PUT A SIRING OF CHARS RING IS PLACED AT LOC ri B H,ISTR A,COMLN LPCN1 A , 2 OH M, A H LPCN1 A LPCN1 CLBS H,ISTR CHIN ODH DINS B,A CriOUT A # B M,A a ISLP CfiLF B H ISTR, CLEAR STRING AREA, SPARE TWO CHARACTER STRINGS NSTANT STRING ADDR IN DE B D H D,ISTR 75 MVI C, 11 VI A,COMLN STA LPCN1 cclp: MCV 3,M LEAX D CMP B JNZ RFAIL LCA LPCN1 INX D INX H DCB A STA LPCN1 JNZ COLP JMP BSUC RFAIL: HVI C,-1 B S IIC : MOV A,C PUP U POP D POP B • f RET VALUE OUT jjESOR: LXI ti, ERRS CALL PTSTR CALL CLEF RET GETUF.X: PUSH B CALL GtTDIG RLC BLC RLC RLC MCV C, A CALL GETDIG ORA C POP B RET t GETDIG : CALL CHIN MOV fi,A CALL CHCUT MCV A,B CPI 4 OH JNC HCHR ANI OEH RET HCHR: A 131 OSH ANI OFH RE 1 : 0U7HEX: PUSH D MCV D, A OF RANGE 76 ANI REC ERC RhC REC CALL MOV ANI CALL MOV POP RET OF OH OUTDIG A,D OFH OITDIG A,L D OUTDIG DOUT: DOfT2: JC ADI J MP A 01 MOV CALL RET OAH DOUT 37H D0UT2 30H B,A CHOUT SEND A COWHAND TO TriE MP IX f NECOM CM A IT OUT IN OKI OUT IN ANI JZ IN ANI OUT RrT CCPPT STATUS 0111 STATUS STATUS 02H CWAIT STATUS OFLH STATUS SENDAT DWAIT ; ; s OUT IN ORI OUT IN ANI JZ IN ANI OUT RET END DATA TO THi DATPT STATUS 01 H STATUS STATUS 02 H DWAIT STATUS OFLH STATUS BPIX CRLF: MVI CALL MVI CALL RET B, ODH CHCUT B, CAH CHOUT 77 :KCU" IN ANI JZ MOV OUT RET chou: A,B 2 CHIN IN ANI JZ IN ANI RET 3 02H CHIN 2 7FH D I £ PA PUSH PUSH MCV CALI C AL I CM.L MCV POP POP R£T D E D, A OU1HEX CHIN CI IF A, L B D CO TIOv DB DB DB D3 D3 DB DB DP DB DJ DB DB DB DB DB dt DB DB DB DB DB DB MM AND ST •IN ' VL •HI Vvl DF LR SC SC • SH 'SH •CH 'SC »HC ' CU ■CI ■CI •CO • CO 'EX • H£ CR KINGS IT • CTOR' NDX NDY AW AWC ALIX' ALLY' 1F1X' 1FTY' ARS • RLV • ME ' a pes' EAR ' E AR k ' MP • MP! • IT ' LP ' FCH ' TAD J' 78 XMFS: YMES: COKD: UNEE P BRANG ERANG FACT: LRFS: C HNS: CHBS: LL17: 3L2 3: BLANK: DD DE DB DB DB DB DB EB DB D3 DB DB DB ->$' TRY AGAIN. $' ->$' RANGE ->$' message TABLE ;;;;;;;;;; X COORDINATE ->$' Y COORDINATE ENTER COMMANL ->$' UNDEFINED COMMAND, LOWER LND OF RANGE UPPER £ND OF FACTOR ->$' <- TOO LARGE, TRY AGAIN. $' ENTER THE CHARACTER NUMEF.fi ->$' ENTER THE 8 ROWS OF THE CHARACTER $' $' $' BELOW. ..$' TITL: DW DW DW DW DW DW DW DW DW DM DW DW DW DW DW DW DW DW DW DW DW DW TITLE INI DV£ WIN WIN DP A DPA SCA SCA SHF SHF CHE SCR HOM CUF CLE CLE COM COM EXI Hr,L DEF CRT TABLE IS CS XS YS WS CS XS YS XS YS SS VS £S PS as zs PS zs TS PS CS AS i • i t » » « t i i INITS DVICS WINXS WINYS DRAWS DRACS SCAXS SCAY5 5HFXS SHFYS CHRSS SCFVS HOMES DB DE DB DB DB DE DB DB DB DB DB DB D3 TITLE STRINGS •INI II •DEF IN •nEFIN • ELFIF ' D1SPL •CLIP •DEFIN • DfcFIN • i>£FIN ' DJsFIK •iiNTER ' 8 E V Eh • RESET ALIZE M E A VEC E THE W E THE W AY THE AND DIS E THii X E THE Y £ THE A E THE A CIIARAC SE THE CHAHAC PIX$ f TOR $' INDOW IN THx X D1RECTI0N$' INDOW IN THE Y DIRECIION$' CURRENTLY DEFINED VECTOR$' PLAY THE CURRENTLY DEFINED ?ECIOa$' FACTOE$' FACTOfl$' SHIFT IN SHIFT IN SCALING SCALING MOUNT OF MOUNT OF TER MODE$ f SCREEN AND CHAEACTEfi MODES$' TER PAGE PARAMETERS$' THE THE DIRECT LOi$' DIRECTION' 7* C U F P 3 : Dd CLERS : DU C L £ Z S : DB CCKPS : D3 C G fl Z S : DD EXITS : Di3 HELPS: : DD JEFCS DB CRTAS" DB ENE •DEFINE CURSOR POSITION$' •CLEAR THE SCRE£N$' 'CLEAR A REGION OF THjl SCREEN$' •COMPLEMENT THE SCREEN $ ' ♦CCMPIEMENT A REGION OF THE SCREEM$' •EXIT THE DRIVER. CONTROL PASSED TO AMS$' •PRINT THE COMMAND LISTING$' •DEFINE A USER CHARACTER$ f •CHANbE THE CRT CONTROLLER £AR AflETERS $' 8J A. 3 Command Summary Code Name Parameters Purpose I NIT Initialize the MPIX system. 1 DEF"1 x1 Define the X coordinate of the starting point of the current vector. 2 DEFX2 >2 Define the X coordinate of the terminal point of the current vector. 3 DEFY 1 yl Define the Y coordinate of the stirtinj point of the current vector. 4 Di-' ? Y2 y2 Define the Y coordinate of the terminal point of the current vector. DFP^I x 1 , v1 Define both coordinates of the stirting point of the current vector. t DFPT2 x2,y2 Define both coordinates of the terminal point of the current vector. 7 DEFVE'C x1,y1,x2,y2 Define both enapoints of the currant vector. 8 WINDX x1,x2 Define the clipping window in the X direction. 9 WINDY > 1 , y2 Define the clipping window in the Y. direction. A DEAWL Draw current vector witnout clipping. E DRAWCL Draw current vector after clippinj. C SCALX xfactor Define scaling factor in X direction . C SCALY y factor Define scaling factor in Y direct ion. E SHFTX xfactor Define shifting factor in the X direction. I SH^TY yfactor Define shifting factor in the Y direction. 10 CilAR ch Plot a single character at the currant cursor position. 11 CHARS ch, ch. . ch, tr m Plot a string of characters. 12 CilR ZV Reverse the character mode flag. 13 DF.FU3 cnum,cdef Define a new character. 14 SCR*,V Reverse the field mode flag. 15 HOME Begin new character page. 16 CHPC x1,y1 Change the current cursor position. 17 CLER Clear the screen to tne value of taa field mode flag. 18 CLEER reqior, Clear the given region to the valie of the field mode flag. 19 COHP Complement the entire screen. 1A COM PR region Con pie men t the given region of tha screen. 1E C?TAJ ieg,rval Set the CRTC register reg to rval. 31 x1,y1,x2 r y2 Screen Coordinates. 00 -> 7FH. xf actor , yf actor Iransr ormation factors. 8 bit 2's complement number . ch A character code. Standard chars. 00 -> 3?d. User defined characters 8QH -> 9dH. Terminator character. OOH. User defined character number. 00 -> 1BH. 8 bytes which define a user caaracter bit pattern. Two x, y pairs which give the upper left a.id lower right corners of a region of the screen. A CfcTC register number. 00 -> OFfl. Value to oe placed in the CRTC. 8 oit unsijied, trm cnum cdef region reg rval 32 A.U System Parameters and Timings Supply Voltage: Single 5 volt DC Supply. Supply Current: 1.7 Amps. Processor: Intel 8085. Host Interrace: Standard S100 Bus. Uses the DO0-DO3, DIJ-DI7, A0-A7, SINP, SOUT, PWR, aad PJ3IN signals frcir the bus. Port Addressing: Selectaole via switch to any group 3f three contiguous ports which begin at at an address which is a multiple :>f 3. System Clock: Fully tested at 5.7MHz. Jesigned tj operate at full 8085 speed (6 MHz) . Screen Resolution: 128 x 1 28 points. Individually addressable. Character Capasity: Full ASCII character set. Maximum jf 12 lines of 20 characters each. Output: Standard composite video or, throujh a converter, standard television carrier. Timings: Screen Clear: 50.1 msec. Screen Complement 32.8 msec. Screen Reverse: 50.0 iricsec. Home: 170.0 nricsec. Lines: (0,0) -> (7FH,7FH) 21.9 msec (unclippel) 27.8 msec (clippei) (0,0) -> (40H,40H) 21.7 mse: (unclippel) A. 5 Cost Summary 33 PART NUMBER ITEM QUANTITY PBICE EA. TOT. P3ICE - 8 Position DIP Switch 1 2.30 2.03 MC6345 CRT Controller 1 35.00 35.03 2114 Static RAM (14) 4 3.50 3*. 03 2513 Character Generator 2 10.00 2 J. 00 2716 Erasable ROM (2k x i 3) 1 38.30 3i.O ) - 32 Pin Connector (pair) 1 5.50 3.5 3 - 40 Pin connector (pair) 1 8.50 3.5) 7UL302 Quad NOR 2 .29 .53 74LS04 Hex Inverter 2 .29 .53 74L308 Quad NAND 1 .29 .29 74LS"38 3 to 8 Lecoder 2 2.50 2.50 74L314 Ilex Schmitt Inverters 1 1.70 1.70 7ULS157 Quad 2 to 1 Data Sel. 3 1.50 4.53 7UL320 4 Input NAND 1 .29 .24 74LS245 8 ui* iius Driver 2 2.50 5.00 74LS266 Quad EX-NOR 2 .63 1. 36 74LS279 Quad SR latch 1 .79 .73 7UL3298 Quad 2 Input Mux. 2 2.00 4.0) 74LS32 Quad OR Gates 3 .39 1.17 74LS365 4 tit Tri-state Drivers 4 .87 3.43 74LS74 Dual D Flip-Flop 3 .49 1,47 7US^24 Dual VCO 2.35 2.33 74S86 Quad EX OR 1.10 1.1) 74 122 One Shot .45 . 45 7416b 8 Lit Shift Register 1 .40 1.40 8085 8 tit CPU (o MHz) 23.00 2 3.30 8 1 55 RAM, I/O, Timer 27.00 27.0) 8212 8 i-it I/O Port 2.90 3.70 - Hire and Misc. - J.0) - Vector Board 1 7.50 7. 5) - dice Wrap Socs. (40 Pin) 3 1.50 4.50 - wire Wrap Socs. (24 Pin) 5 .90 4. >0 - Sire Wrap Socs. (20 Pin) 2 .80 1.6) - Wire Wrap Socs. (18 Pin) 4 .t>3 2.32 - Hire Wrap Socs. (16 Pin) 15 .43 5.6 3 — Wire Wrap Socs. (14 Pin) 17 .39 6» 5 1 Grar.d Total $281.64 84 A. 6 Wirelist for MPIX A*****.**************** WIRELIST - VERSIGN 1.0 ********************* THE NUMBER CF CHIPS IS 50. THE NUMBER CF DISTINCT LABELS IS 205. INTlL PROCESSOR 6C85 4C PIN 1 ::tal 40 5V 2 XTAL 39 GROUND 3 RESET 38 NC a nc 37 SYSCLK 5 GROUND 3b (RS1-IN) 6 GROUND 35 RfcADY 7 GROUND 34 NC & GROUND 33 CPUST1 S GROUND 32 (BD) 1C GROUND 31 (Wfi) 11 NC 30 ALE 12 A DO 29 NC 13 AD 1 28 A15 14 AD2 27 A14 15 AD3 26 A13 lb AD4 25 A12 17 AD5 24 A11 18 AD6 23 A10 *9 AD7 22 Ab9 2C GROUND 21 A08 AEDR BUS CEMUX 32^2 2U pin 1 GROUND 24 5V 2 GROUND 23 NC 3 ADO 22 AD7 u A 21 A07 5 AD1 20 AD6 6 AO 1 19 A06 7 AD2 18 AD5 8 A 02 17 A05 9 AD3 16 ?.D4 10 A03 15 A 04 11 ALi 14 5V 12 GROUND 13 5V UTIIITY RAM AND I/O 815! 40 PIN 1 NC 40 5V 2 NC 39 (COlStB) 3 NC 38 fC 4 RESET 37 ac 5 (CATASTB) 36 dDJl 6 NC 35 1DJ6 7 PCRTS 34 IDJi 6 (CERAM) 33 iDJ4 9 (BD) 32 J DO 3 10 (HR) 31 AD) 2 11 ALE 30 JD31 12 ACO 29 100 3 13 AC1 28 30 37 14 AL2 27 iD06 15 AC3 26 3DJ5 16 AE4 25 3004 17 AC5 24 d00 3 18 AD6 23 ADO 2 19 AE7 22 iDOl 20 GBCUND 21 iflOO DEVICE SEL DECODER 74L! 5138 16 I EIN 1 A11 16 5? 2 A12 15 (BO 13 1) 3 A13 14 (RASS) 4 A15 13 {XSiu) 5 GBOUND 12 (X33u) 6 5V 11 (SrATi) 7 (CRTS) 10 (PORTS) 8 GROUND 9 (Ci Ui) 85 00 or o o or o "ar Q. 3 U. i o > o z < UJ CO a. Q »- O X CO C3 Ul or X" CO O Q. CD J UJ CO CD 2 UJ 2 2 UJ o o > CJ UJ CO 2 UJ 2 UJ 0T o 2 3 >> S! O o a. co g u UJ o o CO o X m GO O CD oo or o X u 1- < -J < or o < or a Q < a or a X CJ < -1 o or o O o o CD CD CD > Z < CD or o h- 2 O or or Ico o a. Kr X < < or o a z < or o 36 PROGRAM ROM 2716 2 tt PIN 1 A07 24 5V 2 A 06 23 A08 ? A05 22 AC9 a aou 21 5V 5 A0 3 20 (ROMS) 6 A02 19 A10 7 A01 18 GROUND B AGO 17 C7 9 DO 16 D6 1C D1 15 L5 11 D2 14 L4 *2 GROUND 13 E3 INVERTERS (B) 74LS04 14 PIN 1 (PORTS) 14 5V 2 PORTS 1J ROMS 3 (>:SEL) 12 (ROMS) 4 XSEL 1 1 A 06 5 (YSEL) U (A06) 6 YSEL 9 HRD 7 GECUND 8 (HBD) DATA SEE. LATCH (U) 7HLS298 1 6 PIN 1 UD01 16 5V 2 HDOO 15 QA1 3 DO 14 CE1 U D1 13 gd 5 HD02 12 QD1 6 HD03 11 CLKI 7 D3 10 (SEL) 6 GROUND 9 12 AND GATES (A) 74LS08 14 PIN 1 (PORTS) 14 5? 2 (FAM3) 13 1C 3 (CEEAM) 12 SC 4 (ED) 11 SC 5 (1R) 10 (CiMAIT) 6 (BDHR) 9 (CitfllT) 7 GEOUND 8 iEAO* NOR GATES (A) 74LS02 14 PIN 1 BCMS 14 5? 2 (BE) 13 SC 3 (EOMS1) 12 SC 4 (HINOUT) 11 SC 5 SINP 10 SC 6 SCUT 9 SC 7 GBOUND 8 HZ DATA SEL. LATCH (M 74LS298 16 PIN 1 NC 16 5V 2 NC 15 iJOi-aiv 3 D4 14 jB2 4 D5 13 g:2 5 NC 12 JD2 6 NC 11 CLKZ 7 D7 10 (SiiL) 8 GROUND 9 J6 87 BUS DRIVE* (B) 7<4I5365 16 PIN 1 (KD) 16 5V 2 QA1 15 (STATS) 2 DO 14 KC 4 QB1 13 NC 5 31 12 NC 6 yd 11 NC 7 D2 10 OD1 6 GROUND 9 L3 BUS DRIVER (A) 7ULS365 16 PIN 1 (H3EL) 16 5V 2 NC 15 (HRD) 3 NC 14 £A1 U NC 13 HDIO 5 NC 12 CB1 6 OD1 11 HDI1 7 1IDI3 10 QC1 6 GROUND 9 HDI2 (R) (S) LATCHES 74LS279 16 PIN 1 NC 16 5V 2 NC 15 NC 3 NC 14 NC 4 NC 13 NC 5 (ALL) 12 NC 6 (WRS1) 11 NC 7 SEL 10 NC 8 GROUND 9 NC BUS DRIVEN 74LS365 16 EIN (D) 1 (ED) 16 5 V 2 QA2 15 (s:at3) 3 D4 14 iC 4 QE2 13 NC 5 D5 12 ac 6 gc2 11 ac 7 D6 10 JD2 8 GROUND 9 J7 BUS DFIVER (C) 74LS365 16 EIN 1 (HSEL) 16 5V 2 NC 15 (aaj) 3 NC 14 M2 4 NC 13 MC 5 NC 12 JB2 6 QE2 11 AC 7 NC 10 JC2 8 GROUND 9 SC INVERTERS (A) 74LS04 14 PIN WRSl (WRS1) ALE (ftLE) (CLKI) CLKI GROUND 14 5V 13 (CLKV) 12 CLKV 11 SBi. 10 (SiL) 9 DC 8 ac 33 HOB GATES (R) 74LS02 1U PIN 1 HRS1 14 5V 2 (STATS) 13 (CLKI) 3 (WD) 12 WRSI 4 WRS1 11 fcRSI 5 (HHR) 13 (CLKV) 6 (HSEL) 9 WRSI 1 G BOUND 8 GROUND "7" OUTPUT 8212 24 PIN PORT 8 9 10 11 12 (MR) 5V CO TXO D1 TX1 D2 TX2 D3 TX3 GROUND GROUND 24 23 22 21 20 19 18 17 16 15 14 13 37 *>7 1X7 06 PX5 J5 T15 D4 T*4 57 XSiSL ii Y m OUTPUT PORT DATA EUS DRIVER 8212 74LS245 24 PIN 20 I EIN 1 (WR) 24 5V 1 (WR) 20 57 2 5V 23 NC 2 DO 19 JBitf 3 JO 22 L7 3 D1 18 AD J U TYO 21 TY7 4 D2 17 AD1 5 1 20 Do 5 D3 16 \J2 6 tyi 19 TY6 6 D4 15 \03 7 D2 18 L5 7 D5 14 *D4 8 TY2 17 TY5 8 Do 13 AJ5 9 D3 16 D4 9 D7 12 IDS 1C IY3 15 TY4 10 GFOUND 11 AJ7 11 GROUND 14 5V 12 GROUND 13 XSEL IN7ERTZRS (C) OR i 3ATES (C) 7 MLS 14 74L! B32 14 ?I M 14 ; FIN 1 (CEhAM) 14 5V 1 (CRD) 14 37 2 CERAM 13 VSYNC 2 A06 13 SC 3 SA1Q 12 (VSYNC) 3 (ICEN) 12 tie a (SA10) 11 HSYNC 4 (CRD) 11 JC 5 (RDWF.) 10 (riSYNC) 5 (A06) 10 (CrtTS) 6 RDWR 9 VIDOUT 6 (UCEN) 9 (ROY) 1 GROUND 8 (VIDOUT) 7 GtOUND 8 (CRWAIT) 8J OR GATES (B) DUAL C FLOPS (B) 74LS32 74LJ 574 14 PIN 14 FIN 1 (RDY) 14 5V 1 (EDY) 14 5V 2 (CGENS) 13 (5ELSC) 2 5V 13 5V 3 (CGWAIT) 12 (WR) 3 ALE 12 JU4P1 4 (ED) 11 DIR 4 5V 11 3Y3CLK 5 (CG£NS) 10 (RDWR) 5 JGHP1 10 57 t (CRD) 9 CERAM 6 NC 9 SC 1 GROUND 6 DBEN 7 GROUND 8 (RDY) CHARACTER GxN. (U) CHAEACTER G^N . (L) 2513 251 : 3 24 PIN 24 i FIN 1 NC 24 5V 1 NC 24 5V 2 NC 23 NC 2 NC 23 ac 3 NC 22 A05 3 NC 22 \)i U DU 21 A04 4 D4 21 \04 5 D3 20 A03 5 D3 20 40 3 t D2 19 A02 6 D2 19 \02 7 Dl 18 A01 7 D1 18 \01 e do 17 A30 8 CO 17 A3) 9 NC 16 A10 9 NC 16 \1J 1C GROUND 15 A09 10 GFCUND 15 A 09 11 (UCEN) 14 A08 11 (LCLN) 14 \08 12 NC 1J NC 12 NC 13 iC 90 CPT CONTROLLER SCREEN BOS DRIVER MC68ft5 7ftLS2ft5 ftO PIN 20 FIN 1 GROUND ftO V3YNC 1 DIR 20 5V 2 (R5T-IN) 39 HSYNC 2 DSO 19 (SiLSJ) 3 GROUND 38 NC 3 CS1 18 DO 4 VAOO 37 NC ft DS2 17 )1 5 VA01 36 NC 5 DS3 16 J2 6 VA02 35 NC 6 DSft 15 03 7 VA0 3 3ft NC 7 DS5 1ft Jft 8 VAOU 33 DO 8 DS6 13 05 9 VA05 32 D1 9 DS7 12 06 1C VA36 31 12 10 GFOUND 11 J7 11 VA07 30 D3 12 VA08 29 14 13 VA09 28 Lb 1ft VA10 27 D6 15 VA11 26 E7 U VA<2 25 (CRTS) 17 VA13 2ft AGO 18 LISPEN 23 RDWR 19 CURSOR 22 CPUST1 2C 5 V 21 VIDCLK2 SCREEN ADD. StL. (A) SCREEN ADD. SEL. (B) 7ftIS157 7ftLSl57 16 PIN 16 PIN 1 (SELSC) 16 5V 1 (SELSC) 16 3V 2 A03 15 GROUND 2 A08 15 Gaojyj 2 VA02 1ft A06 3 VA06 1ft A11 ft SAGO 13 VA05 ft SAOft 13 VA09 5 A Oft 12 SA03 5 A09 12 3AJ7 6 VA0 3 11 A05 6 VA07 11 UJ 7 SA01 10 VAOft 7 SA05 10 7AJ3 8 GROUND 9 SAD2 8 GEOUND 9 3AJ6 SCREEN ADR. S£L. (C) DUAL D FLOP (A) 74L3157 7ftLS74 16 PIN 1ft FIN 1 (SELSC) 16 5V 1 5V 1ft 5V 2 A12 15 GROUND 2 A15 13 5V 2 VA'O 1ft KC 3 (ALE) 12 /IJCL*2 ft SA08 13 NC ft 5V 11 VX0CLC 5 A13 12 NC 5 NC 10 5? e VA11 11 Alft 6 (SELSC) 9 sc 7 SA09 10 VA12 7 GROUND 8 /IOO.X2 8 GROUND 9 SA10 91 SCREEN RAM (A) SCREEN RAM (3) 2114 2114 1 8 PIN 18 PIN 1 SA06 18 5V 1 SA06 18 5V 2 S?05 17 SA07 2 SA05 17 3A}7 2 SA04 16 SA08 3 SA04 16 3AJ8 4 SAO? 15 SA09 4 SA03 15 SAO 9 5 5A00 14 ISO 5 SAOO 14 i)S0 i sacp 1 3 £51 6 S&01 13 JS1 7 S?.02 12 DS2 7 SA02 12 JS2 8 SA10 11 ES3 8 (SA10) 11 0S3 9 GROUND 10 LIB 9 GROUND 10 Jia SCREEN RAM (C) SCREEN RAM (D) 2 114 2114 18 PIN 18 PIN 1 SA36 1b 5V 1 SA06 18 5V 2 S.tt.35 17 SA07 2 SA05 17 5AJ7 3 SA04 16 SAOb 3 SA04 16 SAJd 4 SAO 3 15 SA09 4 SA03 . 15 3A J9 5 5A00 14 £54 5 SAOO 14 034 e saoi 1 3 £S5 6 SA01 13 JS5 7 SA02 12 DS6 7 SA02 12 0S6 8 SA10 11 DS7 8 (SA10) 11 3S7 9 GROUND 10 DIR 9 GRCUND 10 oia VIDEO SHIFT REGISTER NAN£ GATES (4 INPUT) 74165 74ES20 16 PIN 14 PIN 1 (PLOAD) 16 5V 1 VIDCEK2 14 5V 2 VIDCLK 15 GROUND 2 VAOO 13 3C 2 DS3 14 ES4 3 NC 12 JC 4 DS2 13 ES5 4 5V 11 HC 5 DS1 12 ES6 5 VA01 10 ic 6 DSO 11 DS7 6 (EOAO) 9 AC 7 NC 10 NC 7 GROUND 8 a: 8 GROUND 9 VIDfcO 92 DUAL VCO (3 MHZ) 742124 16 PIN 1 NC 16 5V 2 POT 15 5 V 3 5V 14 NO 4 C130PP 1 3 NC 3 C130PF 12 NC t GROUND 11 NC 7 VIDCLK 10 NC 8 GROUND 9 GROUND SXCL. OE-NOF ! GATKS 7 4S86 14 PIN 1 VIDLO 14 5V 7 NOR-REV 13 NC ? jump: 1 o NC 4 JUMP 2 H NC 5 5V 10 CURSOR 6 VID01 9 VID0 1 7 GROUND 8 VID02 COINCIDENCE GATE (A) 74LS266 14 PIN 1 HA2 14 5V 2 ADDS 2 13 ADDS 5 ? ADD= 12 HA 5 4 ADD = "1 ADD= 5 HA3 10 ADD= e ADDS? 9 ADDS4 7 GROUND 8 HA4 ONE ShOT (1 JO NSEC) 74122 14 PIN 1 (LOAD) 14 3V 2 5V 13 izaz 3 5V 12 IC 4 5V 11 C2 7PF 5 5V 10 sc 6 (ELOAD) 9 IC 7 GROUND 8 $z 3 TO 8 DECODER 74LS138 16 EIN 1 HAO 16 5V 2 HA1 15 (f!3EL) 3 GROUND 14 (JiTdS) 4 GROUND 13 (C3T5 2) 5 (HINOUT) 12 5lC 6 AED= 11 iZ 7 NC 10 IC 8 GRCUND 9 hi COIKCIDEKCE GATE (B) 74LS266 14 PIN 1 II A6 14 sv 2 ALDS6 13 1C 3 ADD = 12 MC 4 ALD= 11 JC 5 HA7 10 ^C 6 ALDS7 9 8C 7 GROUND 8 1C 93 OF GATES (A) DUAL D FLOP (C) 74LS32 74LS74 14 PIN 14 I EIN 1 (HWR) 14 5V 1 5V 14 5/ 2 (CSIBE) 13 (11SEL) 2 DISPEN 13 sc 3 (COMSTB) 12 (HRD) 3 (LOAD) 12 /IJ02 4 (HWR) 11 (SUFFEN) 4 5V 11 7IJCi,K 5 (DSTBE) 10 (VIDEN) 5 NC 10 *C 6 (DATASTP) 9 VID03 6 (VIDEN) 9 VID03 7 GROUND 8 VIDOUT 7 GROUND 8 SC HCST CONNECTOR TEST CONNECTOR 40P CON. 32P CCN. 40 PIN 34 I EIN - HRD 40 GROUND 1 GROUND 34 5V 2 (IIWR) 39 5V 2 NC 33 3YSCl.< 2 5INP 38 (BUFFEN) 3 1Y6 32 M7 a SHUT 37 NC 4 TY4 31 IY5 5 HA7 36 NC 5 TY2 30 IY* 6 HA 6 35 NC 6 TYO 29 TY1 7 HAS 34 NC 7 TX6 28 1X7 £ HA4 33 NC 8 1X4 27 rx5 9 HA3 32 NC 9 TX2 26 rxi 1C HA2 31 NC 10 TXO 25 TX1 11 HA1 30 NC 11 NC 24 (HST-IN) 12 HAG 29 NC 12 NC 23 SC 13 HD07 28 HDI7 13 NC 22 SC 1 4 HD06 27 HDI6 14 NC 21 SC 15 H DO 26 HDI5 15 NC 20 SC ^6 HD04 25 HDI4 16 NC 19 SC 17 HD03 24 HDI3 17 NC 18 s: 18 HD02 23 HDI2 19 HD01 22 HDI1 20 HDOO 21 HDI0 PCR^ ADDR. SELEC n DIP SW. 16 PIN 1 N'C 16 5V 2 SC 15 5V 3 ADDS2 14 5V 4 ADDS3 13 5V 5 ADDS4 12 5V 6 ADDS5 11 5V 7 ADDS 6 10 5V 8 ADDS7 9 5V 94 ************************ CROSS REFERENCE LISTING ****************** AEDS2 A EDS 2 AEDS3 A CDS? COINCIDENCE GATE (A) 74lS266 PORT ADDR. Sr.Lr.CT DIP SW. COINCIDENCE GATE (A) 74LS266 PORT A DDR. SELECT DIP SW. 2 3 6 4 ACDS4 COINCIDENCE GATE (A) 74LS266 AEDS4 PORT ADDR. SELECT DIP SW. ACDS5 COINCIDENCE GATE (A) 74LS266 ACDS5 FORT ADDR. SELECT DIP SW. 9 5 13 6 AEDS6 COINCIDENCE GATi, (D) 74LS266 ADDS6 PORT ADDR. SELECT DIP SW. ACDS7 COINCIDENCE GATE (t>) 74LS266 A2DS7 PORT ADDR. SELECT DIP SW. 6 3 ACD- acd^ ACD= AIT): A E D ' A E D- ACD^ ADO ADO AEO ADO 3 TO 8 DECODER COINCIDENCE GATE (A) COINCIDENCE GATE (A) COINCIDENCE GAT^ (A) COINCIDENCE GATE (A) COINCIDENCE GATE (B) COINCIDENCE GATE (B) 1NTFL PROCESSOR UTILITY RAM AND I/O AEEF BUS DEMUX DATA BUS EEIVER 74LS138 74LS266 74LS26B 74LS266 74L5266 74LS266 74L3266 B085 8155 8212 74LS245 6 3 4 10 11 3 4 12 12 3 18 AE1 AC* AE1 AE1 I NT 1:1 PROCESSOR UTILITY RAM AND 3.EER BUS LEMOX DATA BOS DRIVER I/O 8085 8155 8212 74LS245 13 13 3 17 AE2 AD2 AE2 AC2 INTEL PROCESSOR UTILITY EAB AND ACDR BUS DEM [IX CA~A 3US DRIVER I/O 8085 8155 8212 74LS245 14 14 7 1o AC3 At 3 AD3 AC3 AC 4 AC 4 AC4 AC4 INTEL PROCESSOR UTILITY RAM AND ACDR BUS DEMUX DATA 3US DEIVER I/O INTEL PROCESSOR UTILITY RAM AND I/O ACDR 3 US CEMUX DATA BUS E RIVER 8085 6155 6212 74LS245 8085 8155 8212 74LS245 15 15 3 15 16 16 16 14 93 AE5 INTEL PROCESSOR 8085 17 ACS UTILITY RAK AND I/O 8155 17 AD5 AEDR BUS DEMUX 8212 18 AE5 u.ATA BUS ERIVER 74LS245 13 AD6 INTEL PROCESSOR 8085 18 AE6 UTILITY RAM AND I/O 8155 18 AE6 AEDR BUS DEMUX 8212 20 hze DATA BUS DRIVER 74LS245 12 AE7 INT£L PROCtSSCR 8085 19 AE7 UTILITY RAM AND I/O 8155 19 AE7 ADDR BUS DEMUX 8212 22 AB7 DATA BUS DRIVLR 74LS245 11 AL£ INTEL PROCESSOR 8085 30 ALL UTILITY RAM AND I/O 8155 11 ALE AEDR BUS DEMUI 8212 11 ALE INVtETLES (A) 74LS04 3 ».LE DUAL D FLOPS (B; I 74LS74 3 AOO ADDR BUS DEMUX 8212 4 ACO PPOGHAM ROM 2716 8 ACO CHARACTER GEN. (U) 2513 17 AOO CHARACTER GEN. (L) 2513 17 ACO CRT CONTROLLER MC6845 24 AC1 ADDR BUS DEMUX 8212 6 AC1 PROGRAM ROM 2716 7 AO" CHARACTER G.iN. (U) 2513 13 A 01 CHARACTER GEN. (L) 2513 13 A02 AEDR BUS DEMUX 8212 3 AC2 PROGRAM ROM 2716 6 A02 CHARACTER GEN. (U) 2 513 19 A02 CHARACTER GEN. (L) 2513 19 A0 3 ACER BUS EEMJX 8212 13 A03 PROGRAM ROM 2716 5 A 3 CHARACTER GEN. (U) 2513 20 A03 CHARACTER GEN. (L) 2513 20 A03 SCREEN ADD. SEL . (A) 74LS157 2 A04 AEER BUS DEMUX 8212 15 AOU PROGRAM ROM 2716 4 A04 CHARACTER GEN. (0) 2 513 21 AOa CHARACTER GEN. (L) 2513 21 Aca SCREEN AoD. StL . (A) 7 4LS157 5 A0 C ADDR BUS DEMUX 8212 17 AC5 PROGRAM RCM 2716 3 A05 CHAhACTER GEN. (U) 2513 22 96 A05 A05 A 06 A06 A06 a.Cb AC6 AC7 A07 AC8 AJ8 AC8 A08 A08 A09 AC9 AC 9 AU9 AC9 A10 Al A 10 A 10 A10 A11 A 11 Ml A12 A12 A12 A13 A1? A13 R1U A14 A 15 A15 A15 CERAM CERAM CHARACTER GEN. ( L) SCREEN ADD. SEL. (A) A DDR BUS DEMUX PROGRAM RCM INVEETEfiS (B) OR GATES (C) SCREEN ADC. SEL. (A) AEDfi BUS DEMUX P FOG SAM ROM INTEL PROCESSOR PPOGFAM RCM CHARACTER GEN. (U) CHARACTER GEN. ( L) SCREEN ADD. SEL. ( B) INTEL PROCESSOR PROGRAM ROM CHARACTER GEN. ( U) CHARACTER GEN. (L) SCREEN ADD. SEL. (B) INTEL PROCESSOR PROGRAM ROM CHARACTER GEN. ( U) CHARACTER GEN. (L) SCREEN ADD. SEL. (B) INTEL PROCESSOR DEVICE SEL DECODER SCREEN ADD. SEL. (B) INTEL PROCESSOR DEVICE 5i,L DECODER SCREES ADD. SEL. (C) INTEL PROCESSOR DEVICE SEL DECODER SCREEN ADD. SEL. (C) INTEL PROCESSOR SCREEN ADD. SEL. (C) INTEL PROCESSOR DEVICE St,L DECODER DUAL D FLOP (A) INVERTERS (C) OF GATES (B) 2513 74LS157 8212 2716 7 4LS 4 74LS32 74LS157 8212 2716 8085 2716 2513 2513 7 ULS 157 8085 2716 2513 2513 74LS157 8085 2716 2513 2513 74LS157 8085 74LS138 74LS157 8085 74LS138 74LS157 8085 74LS138 74LS157 8085 74LS157 8085 74LS138 74LS74 74LS14 74LS32 22 11 19 2 11 2 14 21 1 21 23 14 14 2 22 22 15 15 5 23 19 16 15 11 24 1 14 25 -> 26 3 5 27 11 23 4 2 2 9 CLKI DATA SEL. LATCH (U) 74LS296 11 n 74LS04 6 74LS298 11 74LS04 12 8085 33 MC6845 22 MC68U5 19 74S86 13 7 4S124 4 74S124 5 CLKI INVESTORS (A) CLKV DATA S EL . LATCH (L) CLKV INVERTERS (A) CFUST1 INTEL PROCESSOR CFUST1 CRT CONTROLLER CURSOR CRT CONTROLLER ClIPSOR £?CL. OR-NOR GATES C130P* DUAL VCO (3 MUZ) C130PF DUAL VCO (3 MHZ) C27PF ONE SHOT (130 NSEC) 74122 11 DEEN DATA BUS DRIVER 74LS245 19 EEEN OP GATES (S) 74LS32 8 DIR OR GATiiS (E) 74LS32 11 DIP SCREEN EUS DRIVER 74LS245 1 DIR SCREEN RAM (A) 2114 13 DIR SCREEN RAM ( 8) 2114 13 DIE SCREEN RAM (C) 2114 13 DIR SCREEN RAM (D) 2114 13 DISPEN CRT CONTROLLER MC6845 18 DISPEN DUAL D FLOP (C) 74LS74 2 ESQ SCREEN BUS DRIVER 74LS245 2 DSO SCREEN RAM (A) 2114 14 £?0 SCREEN RAM (B) 2114 14 DSO VIDEC SHIFT REGISTER 74165 ■ 6 DS1 SCREEN BUS CRIVER 74LS245 3 DS1 SCREEN RAM (A) 2114 13 CS1 SCREEN RAM (B) 2114 13 DS1 VIDEC SHIFT REGISTER 74165 5 EF2 SCREEN BUS DRIVER 74LS245 4 ES2 SCREEN RAM (A) 2114 12 DS2 SCREEN RAM { B) 2114 12 ES2 VIDEC SHIFT REGISTER 74165 4 DS3 SCREEN BUS DRIVER 74LS245 5 DS3 SCREEN RAM (A) 2114 11 DS3 SCREEN RAM (B) 2114 11 ES3 VIDEO SHIFT REGISTER 74165 3 DS4 SCREEN BUS DRIVER 74LS245 6 DS4 SCREEN RAM (C) 2114 14 ES4 SCREEN RAM (D) 2114 14 USti VIDLC SHIFT REGISTER 74165 14 93 E55 SCREEN BUS DRIVER DS5 SCREEN RAM (C) C£5 SCRfcEN RAM (D) DS5 VIDEO SHIFT REGI STER CS6 SCREEN BUS DRIVER DS6 SCREIN RAM (C) D£6 SCHEiiN RAM (D) DS6 VIDEO SHIFT REGISTER CS7 SCREEN BUS DRIVER DS7 SCREEN RAM (C) DS7 SCREEN RAM (D) C£7 VIDEO SHIFT REGISTER DO FROG FA M ROM EC DATA SEL. LATCH (U) DO BUS DRIVER (B) DO "X" OUTPUT PORT DO "Y" OUTPUT POFT DO DATA BUS DFIVrR CO CHARACTER GEN. (U) DC CHARACTER GEN. ( L) DO CRT CONTROLLER DC SCREEN BUS DRIVER D1 fEOGEAM ROM D1 DATA SEL. LATCH (U) D1 BUS DRIVER ( B) D1 "X" OUTPUT POFT D1 "Y" CUTPUT POFT D" DATA BUS „F1VER CI CHARACTER GEN. ( U) D1 CHARACTER GEN. ( L) 01 GET CONTROLLER D1 SCREEN BUS DRIVER D2 PRGGfAM ROM D2 DATA SEL. LATlH (U) D2 BUS LRIV^R (B) C2 n 7. n OUTPUT POFT D2 "Y" CUTPUT POFT D2 DATA BUS DRIVER D2 CHARACTER GEN. (U) C2 CHARACTER GEN. ( L) C2 CRT CONTROLLER D2 SCREEN BUS ERIVER D3 PROGBAH ROM C2 DATA SEL. LATCH (U) D.: BUS DRIVER ( B) D? H X W CUTPUT POKT 74LS245 7 2114 13 2114 13 74165 13 74LS245 3 2114 12 2114 12 74165 12 7 4LS245 9 2114 11 2114 11 74165 11 2716 9 74LS298 3 74LS365 3 8212 3 8212 3 74LS245 2 2513 8 2513 3 MC6845 33 74LS245 18 2716 10 74LS298 4 74LS365 5 8212 5 8212 5 74LS245 3 2513 7 2513 7 MC6345 32 74LS245 17 2716 11 74LS298 9 74LS365 7 8212 7 8212 7 74LS245 4 2513 6 2513 6 MC6845 31 74LS245 16 2716 13 74LS298 7 74LS365 9 6212 9 99 D2 "Y" OUTPUT PORT 8212 9 C3 DATA BUS DRIVER 74LS245 5 E3 CHARACTER GEN. ( U) 2513 5 D3 CHARACTER GEN. ( L) 2513 5 D3 CRT CONTROLLER MC6845 30 E3 SCREEN BUS DRIVER 74LS245 15 D4 PROGRAM ROM 2716 14 D4 DATA SEL. LATCH (L) 74LS298 3 EU BUS LRIVER (D) 74LS365 3 D<4 "X" OUTPUT POET 8212 16 DU iiyn CUTPU1 PORT 8212 16 D4 DATA 3US DRIVER 74LS245 6 cu CHARACTER GEN. ( U) 2513 4 D4 CHARACTER GEN. ( L) 2513 4 D4 CFT CONTROILER MC6845 29 ca SCREEN BUS DRIVER 74LS245 14 E5 PPCGIAM iOM 2716 15 D5 DATA SEL. LATCH (L) 74LS298 4 D5 BUS DRIVER (D) 74LS365 5 E5 ii vm OUTPUT PORT 8212 18 D5 "Y" OUTPUT PORT 8212 18 D5 DATA BUS DRIVER 74LS245 7 D5 CRT CONTROLLER MC6845 23 D5 SCREEN BUS DRIVER 74LS245 • 13 E6 PROGRAM ROM 2716 16 D6 DATA SEL. LATCH (L) 74LS298 9 D6 EUS DRIVER (D) 74LS365 7 D6 "X" OUTPUT PORT 8212 20 DC »Y" CUTPUT EOET 8212 2J D6 DATA BUS DRIVER 74LS245 • 3 E6 CRT CONTROLLED MC6845 27 E6 SCREEN BUS DRIVER 74LS245 12 E7 PROGRAM ROM 2716 17 D7 DATA SEL. IATCH ( L) 74LS298 7 D7 BUS DRIVER (D) 74LS365 9 E7 "Y" OUTPUT PORT 8212 22 D7 nyii OUTPUT PORT 8212 22 D7 DATA BUS DRIVER 74LS245 9 D7 CRT CONTROLLER MC684o 26 E7 SCREEN BUS DRIVER 74LS245 11 GROUND INTEL PROCESSOR 8065 5 GROUND INTEL PROCESSOR 8085 6 GROUND INTEL PROCESSOR 8085 7 GROUND INTEL PROCESSOR 8085 8 GROUND INTEL PROCESSOR 8085 9 GROUND INTEL PROCESSOR 8085 10 GFOUND INTEL PROCESSOR 8085 20 GROUND INTEL PROCESSOR 8085 39 100 GROUND UTILITY RAM AND I/O 8155 20 GROUND ILLS BUS demuj: 8212 1 G FOUND ADLR BUS CEMUX 8212 2 G BOUND ADDR BUS DEMUX 8212 12 GROUND DliVICt SEL DECODER 74LS158 5 GROUND u£VICE ShL DECODER 74LS138 a G FOUND PPOGRAK ROM 2716 12 GROUND PROGRAM ROM 2716 13 GROUND AND GATES (A) 74LS0U 7 GROUND INVERTERS (D) 74LS04 7 GROUND NCR GATES (A) 74LS02 7 GROUND data see. latch (U) 74LS298 8 GROUND DATA SEL. LATCH (L) 74LS298 a GROUND BUS LRIVIR (3) 74LS365 8 GROUND BUS LRIVER (D) 74LS365 a GROUND BUS DRIVER (A) 7ULS365 a GROUND BUS LRIVER (C) 7 4LS3 65 8 GROUND (R) (S) LA1CHES 74LS279 a GROUND INVERTERS (A) 74LS04 7 G FOUND NCR GATES (D) 74LS02 7 GROUND NOR GATiS (0) 74ES02 8 GROUND iiyii OUTPUT PORT 8212 11 GPOUND "X" CUTPU1 PORT 8212 12 GROUND "Y" OUTPUT PORT 8212 11 GROUND "Y" OUTPUT PORT 8212 12 GROUND DAI A BUS i)FIVER 74LS245 10 GROUND INVERTERS (C) 7 4LS14 7 GPOUND OR GATES (C) 74LS32 7 GROUND OR GATES (£) 74LS32 7 GROUND DUAL D FLOPS (B) 74LS74 7 GROUND CHARACTER GEN. ( U) 2513 10 GROUND CHARACTER G5N. ( L) 2513 1J GROUND CR7 CONTROLLER MC6845 1 GROUND CRT CONTROLLER MC6845 3 G FOUND SCREEN BUS DRIVji R 74LS245 10 GROUND SCRELN ADD. SEL. (A) 74LS157 a GROUND SCREEN ADC. SEE. (A) 74LS157 15 GROUND SCREEN ALL. SEL. (B) 74LS157 a GROUND SCREEN ADD. SEL. (B) 74LS157 15 GROUND SCFEEN ADC. SEL. (C) 74LS157 a GROUND SCBExN ADD. S^L. (C) 74LS157 15 GROUND CCAL D FLOE (A) 74LS74 7 GROUND SCRLiiN RAM (A) 2114 9 GROUND SCREEN RAM (3) 2114 9 GROUND SCREEN RAM (C) 2114 9 GROUND SCREEN RAM (D) 2114 9 GROUND VIDEO SHIFT REGI ST£.R 74165 8 GROUND VIDEC SHIF1 REGI STER 74165 15 GROUND NAND GATES (4 INPUT) 74LS20 7 G R CU H D DUAL VCO (3 MHZ) 74S124 5 GROUND DUAL VCO (3 MLZ) 74S124 a GROUND uUAL VCO (3 MHZ) 7US124 9 GROUND ONE SHO" (100 NSEC) 74122 7 101 GROUND EXCL. OR-NCR GATES GROUND 3 TO 8 DECODER GROUND 3 TC 8 DECODER GROUND 3 TO 8 DECODER GROUND COINCIDENCE GATE (A) GROUND COINCIDENCE GATE (B) G FOUND OR GATES (A) GROUND DUAE D FECE (C) GROUND HOST CONNECTOR GEOUND TEST CCNNECTOR HAO 3 TO 8 DECODER HAO HCST CCNNECTOR HA1 3 TO 8 DECODER HA1 HCST CCNNECTOR HA2 COINCIDENCE GATE (A) HA2 HCST CCNNECTOR HA3 COINCIDENCE GATE (A) HA3 HCST CCNNECTOR HA4 COINCIDENCE GATE (A) HA4 HCST CONNECTOR HAS COINCIDENCE GATE (A) HA5 HCST CCNNECTOR HA6 COINCIDENCE GATE (D) HA6 HCST CCNNECTOR HA7 COINCIDENCE GATt (B) HA7 HOST CCNNECTOR HEI3 BUS DRIVER (A) HCIO HCST CCNNECTOR HCI1 BUS DRIVER (A) HDI1 HOST CCNNECTOR HEI2 BUS DRIVER (A) HEI2 HCST CCNNECTOR HEI3 BUS LRIVER (A) HDI3 HOST CCNNECTOR HEI4 HOST CONNECTOR HEI5 HOST CCNNECTOR HDIb HCST CONNECTOR 74S86 74LS138 74LS138 74ES138 7 4ES266 74LS266 74LS32 74ES74 40? CON. 32? CON. 7 3 4 8 7 7 7 7 40 1 74LS138 40P CON. 1 12 7 4LS138 40P CON. 2 11 7 4E£ 40P •266 CCN. 1 13 7 4L< 40P !266 CCN. 5 9 7 4L£ 40P ;266 CCN. 6 8 7 4LS 40P !266 CON. 12 7 74ES266 40P CCN. 1 6 74LS266 40P CON. 5 5 7 4E£ 40P ;365 CCN. 13 21 74LS365 40P CON. 11 22 74LS365 40P CON. 9 23 74LS365 40P CON. 7 24 40P CON. 25 40P CON. 26 4 OP CON. 27 102 HEI7 HOST CONNECTOR 40P CON. 28 HEOO UTILITY RAM AND I/O 6155 21 HIOO UTILITY RAM AND 1/0 8155 29 HEOO l)ATA SSL. LATCH (0) 74LS298 2 UEOO HOST CONNECTOR 40P CON. 2J HE01 UTILITY HAM AND I/O 8155 22 HE01 UTILITY RAM AND I/O 8155 30 HE01 DATA SEL. LATCH («) 74LS298 1 HE01 HOST CONNECTOR 4 OP CON. 19 HE 02 UTILITY SAM AND I/O 8155 23 HE02 UTILITY RAM AND I/O 8155 31 HC02 DATA SEL. IATCH (U) 74LS298 5 HE02 HOST CONNECTOR 40P CON. 18 HDO? UTILITY RAM AND I/O 8155 24 H L ?. UTILITY RAM AND I/O 8 155 32 HD0 3 DATA SEL. LATCH (U) 74LS298 6 H E 03 HCbT CCNNECTOfc 40P CON. 17 HD04 UTILITY RAM AND I/O 8155 25 HEOU UTILITY RAM AND I/O 8155 33 HE0 4 HOST CONNECTOfc 40P CCN. 16 HE 05 UTILITY RAM AND I/O 8155 26 HE05 UTILITY RAW AND I/O 8*155 34 HDO c HCST CCNNECTOR 4 OP CON. 15 HD06 UTILITY RAK AND I/O 8155 27 HEC6 UTILITY RAM AND I/O 8155 35 HEOb HCST CCNNECTOK 4 OP CCN. 14 HE07 UTILITY RAM AND I/O 8155 23 HD07 UTILITY RAM AND I/O 8155 36 HE 07 HCST CONNECTOR UOP CON. 13 HRD INVERTERS (B) 74LS04 9 HRD HCST CCNNECTOR 4 OP CON. 1 HSYNC INVERTERS (C) 74LS14 11 II SYNC CBT CONTROLLER MC6845 39 JUMP"! DUAL D FLOPS ( B) 74LS74 5 JUMP1 DUAL u FLOPS (B) 74LS74 12 JUMP2 EXCL. OR- NOR GATES 74S86 3 JDMP2 E"CL. OR-NOR GATES 74S86 4 NCR-REV DMA SEL. LATCH (E) 74LS298 15 NCR-REV e::cl. or-ncr gat^s 74S86 2 103 PCETS PCETS PCT QA1 CM QA1 QA2 UA2 QE1 QE 1 QB1 QE2 QE2 QE2 QC1 QC1 QC1 gc2 QC2 QC2 Q£1 QE1 C.D1 QE2 QE2 QE2 EC EXT UTILITY RAM AND I/O 8155 7 INVERTERS (3) 74LS04 2 DUAL VCO (3 MHZ) 74S124 2 DATA SEL. LATCH (U) 74LS298 15 BUS LEIVER (B) 74LS365 2 BUS DRIVEb (A) 74LS365 14 BUS LRIVlR (D) 74LS365 2 BUS CRIVEE (C) 74LS365 14 DATA SEL. LATCH (U) 74LS298 14 BUS DRIVER (3) 74LS365 4 BUS DRIVER (A) 74LS365 12 DATA SEL. LATCH (L) 74LS298 14 BUS DRIVER (D) 74LS365 4 BUS DRIVER (C) 74LS365 12 DAI A SEL. LATCH (U) 74LS298 13 BUS I RIVER (3) 74LS365 6 BUS DRIVER (A) 74LS365 13 DATA SEL. LATCH (L) 74LS298 13 BUS ERIVER (D) 74LS365 6 BUS ERIVER (C) 74LS365 10 DA m A SEL. LATCH (") 74LS298 12 BUS DRIVER (B) 74LS265 10 BUS DRIVER (A) 74LS365 6 DATA SEL. LATCH (D 74LS298 12 BUS DRIVES (D) 74LS365 10 BUS DRIVER (C) 74LS365 6 ONE SHOT (100 NSEC) 74122 13 RDWR INVERTERS (C) 74LS14 6 EEWR CRT CONTROLLER MC68 4 5 23 READY INTEL PROCESSOR 8085 35 READY ANE GATES (A) 74LS08 3 RESET INTEL PROCESSOR 8085 3 RESET UTILITY RAM AND I/O 8155 4 RCMS INVERTERS ( B) 74LS04 13 EC MS NCR GATES (A) 74LS02 1 SAOO SCREEN ADD. SEL. (A) 74LS-I57 4 SAOO SCREEN RAfri (A) 2114 5 SAOO SCREEN RAH (B) 2114 5 1 34 SAOO SCREEN RAM (C) 2114 5 SAOO SCREEN RAW (D) 2114 5 SA01 SCREEN ADD. SEL. (A) 74LS157 7 SA01 3CRDEN RAM (A) 21 14 6 SJ 01 SCREEN RAM (3) 2114 6 SA01 SCREEN RAM (C) 2114 D SA01 SCREEN RAM (D) 2114 6 sag: SCREEN ADD. SEL. (A) 74LS157 y SS 02 SCREEN R AM (A) 2114 7 SA02 SCt EEN RAM (B) 2114 7 SA02 SCREEN RAM (C) 2114 7 SA02 SCI; tiN RAM (D) 2114 7 5? 03 SCREEN ADD . SEL. (A) 74LS157 12 5A.03 5 C P t E N RAM (A) 2114 4 SAOJ S C 5 E I N RAM (13) 2114 4 s? cn SCREEN r a a (C) 2114 4 S A 3 S C P . E £. N BAM (D) 2114 4 s; Qu SCREr-N ADD. SEL. (B) 74LS157 4 SAD 4 S Call hi! 6 A M (A) 2114 3 SAOfc S C t £. E R RAM (3) 2114 3 SAC4 SCRtrN RAM (C) 21 14 3 SAO 4 SCRiiiiN SAM (D) 2114 3 SA05 screen ADL. SEL. (B) 74LS157 7 SA05 scsuen RAM (A) 2114 2 SA05 SCREEN RAM (3) 2114 2 S A 5 SCREEN RAM (C) 2114 2 SAOS SCREEN RAD (D) 2114 2 SAOO SCRLEN ADi . SEL • (B) 74LS*57 9 SA06 SCREEN RAH I A) 2114 1 SAOb sett EN RAM (B) 2114 1 SAOo SCREES RAM (C) 2114 1 SA06 set EL N RAM (D) 2H4 1 SA07 SCREEN \uD . S r, L . (3) 7 4LS157 12 SA07 SCREEN RAM (A) 2V4 17 5A07 SCREEN RAM (B) 2114 1 7 SA07 SCREEN RAM (C) 2114 11 3A07 SCREEN RAM (0) 2114 17 SAOS SCREEN ADD . SEL. (C) 74LS157 4 SAO 3 SCREEN RAM (A) 2114 16 SA 08 SCE EEN RAM (B) 2114 1G SAOO SCREEN t A M (C) 2114 1o SAOS SCt I EN RAP (0) 2114 16 SA09 SCREEN ADi;. SuL. (C) 74LS*57 7 SA09 SCREEN P. A M (A) 2114 1b 105 SA09 SCREEN RAM (d) SA09 SCREEN RAM (C) SA09 SCREEN RAM (D) SA^O INVERTERS (C) SA10 SCREEN hDQ. SEE. (C) SA"0 SCRiEN RAM (A) SA10 SCREEN RAM (C) SLL (R) (S) LATCHES SrL INVERTERS (A) SINP NCR GATES (A) SINP HOST CONNECTOR SCUT NCR GATES (A) SOW. HOST CONNECTOR SYSCLK INTEL PROCESSOR SISCLK DUAL D FLOPS (B) SYSCLK TEST CONNECTOR TXO "X" OUTPUT PORT TXO TEST CONNECTOR T71 "X" OUTPUT PORT IX 1 TEST CONNECTOR IX 2 "X M OUTPUT PORT TX2 TEST CONNECTOR TX3 "X" OUTPUT FORT TX3 TEST CONNECTOR TX4 "X" OUTPUT PORT TX4 TEST CONNECTOR 1X5 ••::" GUT PUT PORT TX5 TEST CONNECTOR TX6 M X" OUTPUT FORT TX6 TEST CONNECTOR TX7 "X" OUTPUT PORT TX7 TEST CONNECTOR TYO "Y" OUTPUT POR ,T, TYO TEST CONNECTOR TY1 "Y" CUTPUT FORT TY1 TEST CONNECTOR 2 114 15 2114 15 2114 15 74LS14 3 74LS157 9 2114 d 2114 3 74LS279 7 7 4LS04 11 74LS02 5 40P CON. 3 74LS02 6 40P CON. 4 6085 37 74LS74 11 32P CON. 33 8212 4 3 2P CON. 10 8212 6 32P CON. 25 8212 8 3 2P CON. 9 8212 10 32P CON. 25 8212 15 32P CON. 8 8212 17 3 2P CON. 27 8212 19 32P CON. 7 8212 21 3 2P CON. 23 8212 4 32P CON. 6 8212 6 3 2P CON. 29 TY2 CUTPUT PORT 8212 1)6 TY2 TEST CONNECTOR 1Y3 "Y" OUTPUT PORT TY3 TEST CCNNtXTOR TY4 "Y" OUTPUT POET TY4 "EST CONNECTOR TY5 "Y M OUTPUT PORT TY5 TEST CONNECTOR TY6 »Y" OUTPUT POET 1Y6 TEST CCNNECTOE TY7 " Y" OUTPUT POET TY7 TEST CONNECTOR VAOO CFT CONTROLLEF VAOO NAND GATES (4 INPUT) V*01 CPT CONTBCIEEE VA01 NAND GATES (U INPUT) VA02 CRT CONTROLLER VA02 SCREEN ADD. SEL. (A) VA03 CRT CONTROLLER VA03 SCREEN ADD. SEL. (A) VA04 CFT CONTROILER VA04 SCREEN ADD. SEL. (A) VA05 CET CONTROLLER VA05 SCRfciN ADD. SEL. (A) VA06 CET CONTROLLER VA06 SCREEN ADD. SEL. (5) VA07 CRT CONTROLLER VA07 SCREEN ADD. SEL. (a) VA08 CFT CONTROLLER VA08 SCREEN ADD. SEL. (B) VA09 CRT CONTROLLER VA09 SCFEEN ADD. SEL. (b) VA 1 CFT CONTROLLER VA10 SCFEEN ADD. SEL. (C) VA11 CRT CONTROLLER VA11 SCREEN ADD. SEL. (C) 32P CON. 5 8212 10 32P CON. 30 8212 15 32P CON. 4 8212 17 32P CON. 31 8212 19 32P CON. 3 8212 21 3 2P CON. 32 MC6845 4 7ULS20 2 MC6845 5 74LS20 5 MC6845 6 74LS157 3 MC6845 7 7ULS157 6 MC6845 3 74LS157 10 MC6845 9 74LS157 13 MC6845 10 74LS157 3 MC6845 11 74LS157 6 MC6845 12 74LS157 10 MC6845 13 74LS157 13 MC6845 14 74LS157 3 KC6845 15 74LS157 6 1 J7 VA12 CET CONTROLLER MC6845 16 VA12 SCREEN ADD. SEL. (C) 74LS157 10 VA13 CRT CONTROLLER MC6645 17 VIDCLK2 CRT CONTROLLER MC6845 21 VIDCLK2 DUAL D FLOP (A) 74LS74 8 VIDCLK2 DUAL D FLOE (A) 74LS74 12 VIDCLK2 NANE GATES (4 INPUT) 74LS20 1 VIDCLK DUAL D FLOP (A) 74LS74 11 VIDCLK VIDEO SHIF1 REGISTER 74165 2 VIDCLK DUAL VCO (3 MHZ) 74S124 7 VIDCLK DUAL D FLOP (C ) 74LS74 11 VIDEO VIDEO SHIFT R.LGI STER 74165 9 VIDEO E?CL. OR- NCR GATES 74S86 1 VIDOUT INVERTERS (C) 74LS14 9 VIDOUT OR GATES (A) 7 4LS3 2 8 VID01 EXCL. OR- NCR GAT ES 74S86 6 VID01 EXCL. OR- NCR GAT ES 74S86 9 V1D02 EXCL. OE-EOR GAT ES 74S86 8 VI DO 2 DUAL D FLOE (C) 74LS74 12 VI DO 3 OR GATES (A) 74LS32 9 VID03 DUAL D FLOE (C) 74LS74 9 VSYNC INVERTERS (C) 74LS14 13 VSYNC CRT CONTROLLER MC6845 40 HRSI NCR GATES (B) 74LS02 4 HE SI NCR GALES ( B) 74LS02 11 WESI NCR GATES (B) 74LS02 12 WRS1 INVERTERS (A) 74LS04 1 WES1 NCR GATES (B) 74LS02 1 WB31 NOB GALES (3) 7 4LS02 9 XSEL INVERTERS (B) 74LS04 4 XSEL "X" OUTPUT PORT 8212 13 XTAL INTEL PROCESSOR 8085 1 ::tal INTEL PROCESSOR 8085 2 YSEL INVERTERS ( B) 74LS04 6 YSEL ityn OUTPUT PORT 8212 13 SV INTEL PROCESSOR 8085 40 5V UTILITY RAM AND I/O 8155 4) 5V ALDR BUS EEMUX 8212 13 133 5V AIDE BUS DEMUX 8212 14 5V ALDR BUS DEMUX 8212 24 5V DEVICE SEL DECODER 74LS138 b 5V DEVICE SEL DECODER 74LS138 16 5V PEOGEAM RCM 2716 21 5V PROGRAM ROM 2716 24 5V AND GATES (A) 74LS08 14 5V INVrRTEES (3) 74LS04 14 5V NOR GATES (A) 74LS02 14 5V DATA SEL. LATCH (U) 74LS298 16 5V DATA SEL. LATCH (L) 74LS298 16 5V BUS DRIVER (B) 74LS365 16 5V BUS DRIVER (D) 74LS365 16 5V BUS DRIVER (A) 74LS365 16 5V BUS DRIVER (C) 74LS365 16 5V (R) (S) LATCHES 74LS279 16 5V INVERTERS (A) 74LS04 14 5V NCR GA"ES (B) 74LS02 14 5V "X" CUTPUT PORT 8212 2 5V "X" CUTPUT PORT 8212 14 5V "X" CUTPUT PORT 8212 24 5V it y" OUTPUT POET 8212 2 5V nyn CUTPUT PORT 8212 14 5V ii Y " CUTPUT PORT 8212 24 5V DATA BUS LB1VER 74LS245 20 5V INVERTERS (C) 7 4LS14 14 5V OE GATES (C) 7 4LS32 14 5 V OB GATES (B) 7 4LS32 14 5V DUAL D FLOPS (B) 74LS74 2 5V DUAL D FLOPS (B) 7 4LS74 4 5V DUAL D FLOPS ( B) 74LS74 10 5V DUAL D FLCFS (B) 74LS74 13 5 V DUAL D FLOPS ( B) 7ULS74 14 5V CHARACTER GEN. (U) 2513 24 5V CHARACTER GEN. (L) 2513 24 5V CRT CONTROLLER MC6845 20 5V SCREEN BUS DRIVER 74LS245 20 5V SCREEN ADL. SLL. (A) 74LS157 16 5V SCRIEN ADD. SEL. (B) 74LS157 16 5V SCREEN ADD. SEL. (C) 74LS157 16 5V DUAL D FLCP (A) 74LS74 1 5V DUAL D FLOE (A) 74LS74 4 5V DUAL D FLCE (A) 74LS74 10 5V DUAL D FLOE (A) 74LS74 13 5V DUAL D FLOP (A) 74LS74 14 5V SCREEN RAM (A) 2114 18 5V SCREEN RAM (3) 2114 18 5V SCREEN RAM (C) 2H4 13 5V SCE-SN RAM (D) 2114 13 5V VIDEO SHIFT REGISTER 74165 16 5V NAtfD GATES (4 INPUT) 7 4LS2 4 5V NAUE GATES (4 INPUT) 74LS20 14 5V DUAL VCO (3 MHZ) 74S124 3 109 5V DUAL VCO (3 MHZ) 74S124 15 5V DUAL VCO (3 MHZ) 74S124 16 5V ONE SHOT (100 NSEC) 7U122 2 5V ONI SHOT (100 NSEC) 74122 3 5V ONE SHOT (100 NSEC) 74122 4 5V ONE SHOT (100 NSEC) 74122 5 5V ONE SHOT (100 NSEC) 74122 14 5V EXCL. OR-NOR GATES 74S86 5 5V E?CL. Ofi-NOR GATES 74S86 14 5V 3 TO 8 DECCDEF 74LS13 8 16 5V COINCIDENCE GATE (A) 74LS266 14 5V COINCIDENCE GATE (B) 74LS266 14 5V OP GATES (A) 74LS32 14 5V DUAL D FLOP (C) 74LS74 1 5V DUAL D FLOE (C) 74LS74 4 5V DUAL D FLOP (C) 74LS74 14 5V HOST CCNNECTOh 40P CON. 39 5V TEST CONNECTOR 32P CON. 34 5V POST AEDR. SELECT DIP SW. 9 5V PORT ADDS. SELECT DIP SW. 10 5V PORT AC DR. SELECT DIP SW. 11 5V PORT ADDR. SELECT DIP SW. 12 5V PORT ADDR. SELECT DIP SW. 13 5V PORT ADDR. SELECT DIP SW. 14 C V PORT ADDR. SELECT DIP SW. 15 5V PCRT ADDR. SELECT DIP SW. 16 (ALE) (R) (S) LATCHES 7 4LS27y 5 (ALE) INVERTERS (A) 74LS04 4 (ALE) DUAL D FLOP (A) 74LS74 3 (A 06) INVERTERS (B) 74LS04 10 (AOc) OR GATES (C) 74LS32 5 (BtJFFEN) OR GATES (A) 74LS32 11 (EUFFEN) HOST CONNECT05 40P CON. 38 (CERAH) UTILITY RAM AND I/O 8155 3 (CERAM) AND GATES (A) 74LS08 3 (CERAM) INVERTERS (C) 74LS14 1 (CGENS) DEVICE SEL DECODER 74LS138 9 (CGENS) OR GATES (E) 74LS32 2 (CGENS) OR GATES (E) 74LS32 5 (CGWAIT) AND GATES (A) 74LS08 9 (CGWAIT) OS GATES (E) 74LS32 3 (CLKI) INVERTERS (A) 74LS04 5 (CLKI) NCR GATES (B) 74LS02 13 (CLKV) INVERTERS (A) 74LS04 13 (CLKV) NCR GATES (B) 74LS02 10 110 (COHSTB) UTILITY RAM AND I/O 8 155 39 (COMSTB) OR GATES (A) 74LS32 3 (CRD) OP GATES (C) 74LS32 1 (CRD) OR GATES (C) 74LS32 4 (CRD) OR GATiS (E) 74LS32 b (CRTS) DEVICE SEL DECODER 74LS138 7 (CRTS) OR GATES (C) 74LS32 U (CRTS) CRT CONTROLLER MC6845 25 (CRWAIT) AND GATES (A) 74LS08 10 (CKWAIT) OR GATES (C) 74LS32 8 (CSTBE) 3 TO 8 DECCDER 74LS138 13 (CSTBE) OF GATES (A) 74LS32 2 (EATAST8) UTILITY RAM AND I/O 8155 5 (EATASTB) OR GATES (A) 74LS32 6 (ESTBE) 3 TO 8 DECODER 74LS138 14 (ESTBiO OR GAT£S (A) 74LS32 5 (HINOUT) NCR GAT£,S (A) 74LS02 4 (UINODT) ? TO 8 DECODE* 74LS138 5 (HRD) INVERTERS (3) 74LS04 8 (HRD) BUS IhlVER (A) 74LS365 15 (HRD) BUS DRIVER (C) 74LS365 15 (HRD) OR GATES (A) 74LS32 12 (HSEL) BUS DRIVER (A) 74LS365 1 (HSEL) BOS ERIVER (C) 74LS365 1 (HSEL) NCR GATES (3) 74LS02 6 (HSEL) 3 TO 8 DECODER 74LS138 15 (HSEL) OR GATES (A) 74LS32 13 (HSYNC) INVERTERS (C) 7HLS14 10 (HWE) NCR GATES (3) 74LS02 5 (HWR) OR GATES (A) 74LS32 1 (HHR) OR GATES (A) 74LS32 4 (HWE) HOST CONNtCTOR 40P CON. 2 (ECEN) OR GAI^S (C) 74LS32 3 (LCEN) CHARACTER GEN. (L) 2513 11 (ECAD) NAND GATES (4 INPUT) 74LS20 6 (LOAD) ONE SHOT (100 NSEC) 74122 1 (LOAD) DUAL D FLOE (C) 74LS74 3 (PLOAD) VIDEO SHEFT REGISTER 74165 1 111 (FLOAD) ONE SHOT (100 NSEC) 74122 6 TORTS) DEVICE SiL DECODER 74LS138 10 FORTS) AND GATES (A) 74LS08 1 PORTS) INVERTERS (B) 74LS04 1 RAMS) D£VIC£ SEL DECODER 74LS138 14 BAMS) AND GATES (A) 74LS08 2 BBWR) AND GATES (A) 74LS08 6 BDWR) INVrETERS (C) 7 4LS14 5 FDWR) OR GAT£S (B) 74LS32 10 EDY) OR GATES (C) 74LS32 9 RDY) OR GATES (D) 74LS32 1 RDK) DUAL D FLOPS (B) 74LS74 1 FDY) DUAL D FLOPS (B) 74LS74 d IBD) INTh-L PROCESSOR 8085 32 ED) UTILITY RAM AND I/O 8155 9 IBD) AND GATES (A) 74LS08 4 FD) NOR GATES (A) 74LS02 2 ;RD) BUS DRIVER (B) 74LS3b5 1 ;FD) BUS DRIVER (D) 74LS365 1 [ED) OR GATES (B) 74LS32 4 EOMS1) DIVICx S£L DECODER 74LS138 15 ROMS'!) NOR GATES (A) 74LS02 3 ROMS) PROGRAM ROM 2716 20 ;RCM3) INVEETERS (3) 74LS04 12 TiST-IN) INTfcL FROCESSOR 8085 36 RST-IN) CRT CONTROLLER MC68U5 2 ESI-IN) T£ST CONNECTOR 32P CON. 24 ;S»10) INVEETERS (C) 74LS14 4 ;SA10) SCREEN RAM (B) 2114 8 ;SA10) SCREEN RAM ( D) 2 114 8 ;SELSC) OR GATES (E) 74LS32 13 iSELSC) SCREEN BUS DRIVER 74LS245 19 SELSC) SCREiN ADL . SEL. (A) 74LS157 1 SlLSC) SCREtN ADD. SEL. (B) 74LS157 1 SELSC) SCREEN ADL. SEL. (C) 74LS157 1 [SELSC) DUAL D FLOP (A) 74LS74 6 ;SEL) DATA SEL. LATCH (U) 74LS298 10 |SEL) DATA SEL. LATCH (L) 74LS298 10 EEL) INVERTERS (A) 74LS04 10 STA"S) DEVICE S£.L DECODER 74LS138 11 STATS) BUS DRIVER (B) 74LS365 15 1 12 (STATS) BUS DRIVER (D) 74LS365 1d (STATS) NOR GATES (B) 74LS02 2 (UCEN) OR GATES (C) 74LS32 6 (UCEN) CHAEACTER GEN. | ;u) 2513 11 (VIDEN) OR GATES (A) 74LS32 10 (VIDEN) DUAL D FLOP (C) 74LS74 t> (VIDOUT) INVERTERS (C) 74LS14 3 (VSYNC) INVERTERS (C) 7 4LS14 12 (WRS1) (R) (S) LATCHES 74LS27* 6 (WHS1) INVERTERS (A) 74LS04 2 (WR) INTEL PROCESSOR 8085 31 (WR) UTILITY RAM AND I/O 8155 10 (WR) AND GATr-S (A) 74LS08 5 (WR) NOR GATES (3) 74LS02 3 (KR) "X" OUTPUT PORT 8212 1 (WR) "Y" CUTPUT PORT 8212 1 (WR) DATA bUS LPIVrR 74LS245 1 (WR) OR GATES (E) 74LS32 12 (XS2L) DtVIC£. SEL DECODER 74LS138 12 (7SEL) INVERTERS (B) 74LS04 3 (YSEL) DEVICE SLL DECODER 74LS138 13 (YSEL) INVERTERS (B) 74LS04 5 113 THE FOLLOWING LABELS ARE JSEJ ONLY ONCE, C27EF HDI4 HEI5 HDI6 HDI7 PCT RCEXT VA13 (HSYNC) (VIDOWT) (VSYNC) 114 *:**#************ PARTS LIST *******♦**#*** FART NUMBjsR QUANTITY DIP SW . n C 6 8 4 5 21 14 2513 2 716 40 p CON. 74LS02 7HLS0 4 74LS08 74LS1 38 74LS 14 74LS157 74LS20 74LS245 74L5266 74LS279 7MLS298 74LS32 74LS365 7HI.S74 74S124 7aS86 74122 74165 8085 8155 8212 1 15 A. 7 Source Listing of the Wirelist Program PROGRAM WIEELISI (INPUT, OUTPUT) ; (* WIRELIST- THE PURPOSE OF TrilS PROGRAM IS TO PRODUCE A *) (* LISTING OF ALL THE WIRES USED IN THE REALIZATION OP A *) (* DIGITAL DESIGN. *) (* *) (* INPUT- A CHIP-BY-CHIP LISTING OF THE DEVICES USED. EACH *) (* CHIP IS DESCRIBED BY THE FOLLOWING (TYPED ONE TO *) (* A LINE) : *) (* 1 ) CHIP TYPE (UP TO 20 CHARACTERS) *) (* 2) CHIP NUMBER (UP TO 10 CHARACTERS) *) (* 3) NUMBER OF PINS (INTEGER) *) (* U-?) 1112 NAME OF THE WIRE CChNECTED TO EACH *) (* PIN (UP TO 10 CHARACTERS) . INVERTED *) (* SIGNALS ARE ENCLOSED IN PARENTHESIS. *) (* IHE END OF THE DATA IS SIGNALED BY A *) (* CARD CONTAINING THE WORD 'DONE'. *) (* *) (* OUTPUT- ~tfE PROGRAM PRODUCES THREE SEPARATE LISTINGS: *) (* 1) A LIST SHOWING EACH CHIP WITH ALL OF THE WIRES *) (* WHICH CONNECT TO IT. ♦) (* 2) A CROSS REFERENCE LISTING. THIS IS AN ALPHA- *) (* BETIZED LIST SHOWING THE POINTS TO AHLZH EACH *) (* SIRE IS CONNECTED. *) (* 2) A PARIS LIST GIVING THE QUANTITIES OF EACH *) (* CHIP USED IN THE DESIGN. *) (* *) (* NOTES- *) (* 1) MRES LABELED ■ NC ■ ARE NOT LISTED IN THE CROSS *) (* EEFERENCE. *) (* 2) DURING THE CONTRUCTION OF A PROJECT IT MAY 3E *) (* USEFUL TO DISTINGUISH THOSE WIRES WHICH ARE *) (* NOT YET CONNECTED. THIS MAY BE CONE BY PLACING *) (* A •*• AFTER A WIRE LABEL. THIS ASTERISK IS *) (* IGNORED BY THE CROSS REFERENCER. *) (* *) (* AUTHOR- ERIC MCKINLAY ♦) (* DATE- SPRING 1979 *) (* ' *) (**«************** ***************** *********4****************«*t) CONST CHIPCOUNT = 100; PAGELEN = 60; MAXPINS = 40; MAXLABS = 400; LABELLENGTH = 10; NAMELENGTH = 20; BLANKS = • ' ; ^CONNECTED = ' NC •; 116 LBLANKS = • DONE = 'DONE MOVE = -3; DRAW - -2; t * . t TYPE LINELABEL = PACKED ARR A Y[ 1 . . LA BELLENGTH ] CF CHA8; NAMELABEL = PACKED ARR AY[ 1 . . NA MELENGTH ] OF CHAH; SOCKET = RECORD END NAME: NAMELABEL; CHIPTYPE: LINELABEL; PINS: INTEGER; CONNECT: ARRAYP ..MAXPINS J OF LINELABEL; VAF, CHIP: AhRAYH . .CHIPCOUNT J OF SOCKET; NCHIP,MAXX,MAXY: INTEGER; LABLIST, SINGLELABS: AR RAY[ 1 . .M AXL ABS ] OF IINELA3EL; NL\BS, SINGLECOUNT: INTEGER; LINESPRINTiE: INTEGER; PARTS: ARRAY}] 1.. CHIPCOUNT j OF LINELABEL; (A********************** INITIALIZATION ***********************) FROCjiDURn INITIALIZE; VAR I: INTEGfcR; BEGIN LINESPRINTED := 0; WRITE (' 1 ',' ******************************* WIRELIST -• ) ; WRITELN (' VERSION 1.0 *******************************•); LINELIMIT (CUT?UT,50Q0) ; SINGLECOUNT := 0; FND; (************************** ****** ** ********* ******** ***********) (* IF THE WIRE LABEL ENDS WITH A STAR (INDICATING THAT THE *) (* WIRE IS NOT YET CONNECTED) DELETE THE STAR EEFORE INSERTING*) (* THE LABEL IN THE LIST OF DISTINCT LABELS. *) ( ******************************** ***************************** «) PROCEDURE DELETESTAES (VAR TEXTSTRING: LINEIAEEL); VAR I: INTEGER; USTRING: ARRAYj. 1 . . L ABELLENGTH j OF CHAR; BEGIN IF TEXTSTEING <> BLANKS THEN BEGIN UNPACK (TEMTSTRING, USTRING, 1) ; I := LAEELLENGTH; WHILE USTEING£I] = • ' DO I : = 1-1; IF USTRING£I] = »*• THEN BEGIN ustring£i] := ' ' ; pack (ustring, 1, textsteing) j r,ND; 117 END; END; ^ ***** (* ADD (* NOT ( ***** FROC VAP OEGI I B E END; ****** A HIE ALREA ****** EDURE I: int N F (LAB EGIN DELE IF N BEGI I W I P E ENC ELSE BEGI N L END ; ND; A**************************************************) E LABEL TC THE LIST OF DISTINCT LAEELS IF IT IS *) DY IN THE LIST. *) ********************************** *****************) ADDNAME(LABELNAME: LINELABEL); EGER; ELNAME <> BLANKS) AND (LABELNAME <> NCCNNECTED) TH i S If STARS (LABELNAME) ; LABS <> THEN N := 1; MILE (KNLABS) AND (LABLIST£ I ]<> LAEELNAME) DO I := 1*1; ? LA5LIST£I] <> LABELNAME THEN EG IN NLABS := NLAbS+1; LABLISTi'NLABS J := LABELNAME; ND; N LAES := 1 ; ABLISTLNLABS] = LABELNAME; FUNCTION MAX(A,B: INTEGER) BEGIN IF A>B THEN MAX := A ELSE MAX := E; END; INTEGER; ( ************************** ********** ***************** *********j (* READ IN A IEXT STLING OF MAXIMUM LENGTH 10. *) (******************* ******************************** ***********) PROCEDURE EEADSHORT (VAR P ARRAY: LINELA3EL); VAR I: INTEGER; CARRAY: AERAY L 1. ,LAB£.LLENGTH J OF CHAR; BEGIN I :■= 0; WHILE (KLABELLLNGTH) AND (NOT EOLN) DO BEGIN I: =1 + 1 ; READ (CARRAYfl ]) ; 1 1d ENl); FOR I:=I+1 ~0 LABELLENGTH DO CARRAY L Ij PACK (CASH AY, 1, PA b RAY) ; R^ADLN; Nu; (* Kl.AU IN A TEXT STRING OF HAXIflUM LENGTH 2 0. *) Jr'EOCiiDTJRr REAELONG(VAR PARRAY: NAMELABEL); VAR I: INTEGEfc; CAS3AY: ARR'AY[1 . .NAMEL2NGTH J OF CHAR; 13 EG i N T := 0; WHILE (KNAMEEENGTH) AND (NOl LOLN) EO B EGI N I:=I+1 ; READ (CAfiRAYfl ]) ; ISND; FOR 1: = I + 1 TO NAWELr.NGTH DO CARRAY^lJ := * '; PACK(CAFFAY, 1, PAERAY) ; R I A DL N ; END; (* READ IN ALL Ili£ SOCKETS AND MAINTAIN THE PAFTS LIST. *) A BRAY l '..LABELLENGTH ] OF C1AR; FROOLD'JRF REAESOCKEIS; VAF I, J: INTfcGER; INAM E: a/ 1ELABEL; rJCHIPTYPE,UCQNNECT BEGIN NCHIP := C; NLABS : = 0; HEADLONG (TNAME) ; WHILE TKAMi <> LCNL DO BEGIN i>; C H I P := NCMIF+1; WITH CHIPf NCHIP ] vO BEGIN N A 1 1 : = TNAME; RIADSIiORl (CHIt-TYPE) ; PAPISLIJCHIF ] := CHIPTYPE; READEN (PINS) ; FCb l: = 1 TC PINS DO BLGIN RlADSnORT (CONNECT L I J) ; ?,DL'NAtti (COKNECT£I ]) ; &ND; r CR I:=PINS+1 TO HAXPINS DO CONNECT[IJ := JLANKS; 119 END; PEADLONG (TNAME) ; END; WRITELN(* ' #*TH£ NUMBER OF CHIPS IS • ,NC HIE: 4, • . • ) ; WRITELN(' ' ,'IHE NUMBER Of DISTINCT LABELS IS • , NLABS: 4 , • . • ) ; £ND; ( ********* ( * PRINT ( * SOCKETS ( * NUMBER ( * LABELS. ( ********* EROCEDUR VAR I,SU BEGIN WRITE FOP I BEGIN SU SU PI PI IF BE EN WR WR WR WR WR **************************** TWO COLUMNS. IF THE TWO * Y-SIDE HAVE AN UNEQUAL * IS PADDED WITH BLANK * ¥ **************************** WR FO BE *********** ****** ******** UT THE LIST OF SOCKETS IN WHICH ARE PRINTED SIDE-B G* PINS, THE SHORTER ON* ***************** ******** E LIS1SOCKE1S; E1,SUE2,J,PIN1 ,PIN2,LOC: INTEGER; LN ;WRITELN; :=1 IC NCH1P DIV 2 DO B2 :=■ 2*1; D1 := SUB2-1; N1 := CHIP[ SUB1 J. PINS DIV 2; N2 := CHIP£SUB2]. PINS DIV 2; (LINnSPRINIED+8+IUX (PINl r PIN2)) > PAGELEN THEN GIN LINESPRINTID := 0; WRIIELN ('1 * ) ; D; ITELN;WRITELN; ITELN(' ' ,' ',» »:10, 1 --') ; ITiLN(* • ,CBiPi.SUBl J. NAME,' ' : 20, CHI Pi SUB2 \, NAME) ; ITELNC ',CHIP£5UB1 J. CHIPTYPE, ' ' : 30 ,CHIP£ 3UB2 J.CHI Pl?jf ?E) ; ITELN(' »,CHIP£SUB1 J. PIMS:2, • PIN*,' ':34, CH1P£SU32 J. PINS:2,' PIN'); ITELNC ',' ',' *:10, , .j . P J:=1 TO MAX (PIN1,PIN2) DO GIN IF J<=PIN1 THEN BEGIN LCC WEI' WEI HRI 1 WEI END EISE WEI IF J <= PIN2 THEN BEGIN LCC '.= PIN1*2 .TEC ',J:2 tec ':<*); T£(LOC:2,' TEC • : 1 0) TEC ' :40) ;= PIN2 THE - (J-1) « • ,CHI P[SUB1 J.CCNNECIi J J) ; ,CHIP[ SUB1 ].CGNNECTiLOC J) ; • .r := PIN2*2 - (J-1) 120 W.HTE(' ',J:2,' ',CHIPC SUb2 J.CCNNECTl J J) ; W is I ? E ( ■ ' : 4 ) ; WRITE (LOC:2, ' «,CHIPl SUB2 J. CON NECTL LOC J) ; cND; WI.ITELN; END; LINESPkIN7LD := L1NESPRINTED ♦ MAX ( PIN 1, PIN2) ♦ 8; END; fcND; / it* ***>»*»****:*♦»** » * Jk * at * at at •; * * W at at v ** * * an * * *****-*** + *«»*K****»:*»Ik * \ (* PRODUCE AMD ALPHABETIZED CROSS REFERENCE LISTING OF ALL OF *) (* THE HIRE LAEELS. *) I A***:* V-m** ***^* * * v ^**^^***^ *********************************** *) PROCEDURE LIS1XR£F; VAR LABELNAME,TEMPSTRING: LINhlABEL; ILAB ,ICiiIP,IPIN, OCCURS: INTEGER; PROCEDURE SORTLAEELS; VAR I,J,SH: INTEGER; TUMP: LINELAcEL; B2GIN FOR It=1 TO (NLAbS-1) JO BEGIN SM : = i; FOR J:=I+1 TO NLADS DO I? LABLISTlJJ < LAEL1ST£SMJ THEN Stf : TEME := LAELISIl I J; L?.BLIST£l] := LABLIST£SMJ; LAELIST[Sfl ] : = TEMP; END; EN D ; = J; BEGIN WRIT2LN; WRITELN; WRIT EL N; WRITELN; K RITELN (' 1 ' , ' ************** *«c***.******* CROSS REFERENCE' / ' LISTING *************************•) j WRITELN;WHITjlLN ; SORTLAEELS; FOR ILAB: = 1 TC MAtiS DO BEGIN LABELNAME := LA3LIST[ILAb J; OCCURS := 'J; WRITELN; WRITELN; FOR ICHIP:=1 10 NCHIP DO FOR IPIN:=1 TO CHIP£ICHIP J.PINS DC 3LG-IN IuMPSTRING := CiIIP£ICHIP J.CC NN EC1£ I PI N J; LELETESTARS(TEMPSTBING) ; IF LAorLNAKE = T^MPSTRING THEN 121 BrGIN WRITELN (' ' ,CHIP£ICHIP ]. CONNECT£ IPIH J,CHIP[ IC II? J. NAME,' ' :5,CHIP£ICHIP ]. C HIPT YPE, I PIN: 7) ; OCCURS := OCCURS+1; END; END; IF OCCURS = 1 THEN BEGIN SINGLECOUNT := SINGLECOUNT+1; SINGL£LABS[SINGLECOUNT J := LABELNAME; END; END; END; /**************************************************************) (* PRINT A LIST OF THOSE LABELS WHICH ARE USiD ONLY ONCE. *) /**************************************************************) PROCEDURE PRIHTSINGLES; VAR I: INTEGER; EEGIN WRITELN; WRITELN; WRITx.L N ; WRITELN; IF SINGLECOUNT <> J THEN BEGIN WRITELN ('1 ' , 'THE FOLLOWING LABELS ARE USED CSLY ONCE.'); WRITELN (' ' , ' *) ; WRITELN; FOR l:=1 TO SINGLECOUNT CO WRITELN (• • ,SINGL£LABS£I J: 20) ; END ELSE WRITELN (' 1 ', 'ALL LABELS WERE USED AT LEAST ONCE. 1 ); END; /****w**** *********************** ********************** ********j (* PRINT A LIST OF THE PARTS USED IN THE DESIGN. *) { ************************************************************* «) PROCEDURE PRINTPARTSLIST; VAR TEMP, CLETY: LIKELAbEL; I, EACH, £11, J: INTEGER; BEGIN FOP l:=1 TO (NCHIP-1) DO BEGIN SN := I; FOR J :=I+1 TO NCH1P DO IF PARTS[J] < PAHTS£SM] THEN SM := J; TEMP := PAr.TSj.Ij; PARTS£I ] := PARTS£SM ]; ?ARTS£SM J := TEMP; END; WRITE { M ' , •*************#** ************** pftRXS LIST*); WRITELN ('******************************•) j 122 WRITE! WRITJL WRITEL EACH : = OLDTY : = PAETS[ NC FCR I:=1 IF (CL EA ELSE BrGIN IF EA CL END ; QUANTITY') ; •); N;ViRITzLN;WRITELN; N (' ' ,'PART NUMBER NC «,•- 1; LLANKS ; HIP + 1 ] := ELANKS; (* SENTINEL *) 10 NCHIP+1 DO DTY = FARIS[I J) THEN CK := EACH+1 (OLD^Y <> ELANKS) THLN WR1TELN(» • , OLDTY : 1 0, ^ACH : 1 3) ; Cii := 1 ; l:y := PARTSl 1 J; END; BEGIN (* TINY MAI! INITIALIZE; BisADSOCKZTS; LIST'S OCKETS; LISTXREF; ERI NT SINGLES; ERINTFARTSLIST; L'NL. PROGRAM *) 123 A. 8 Suggestions for Enhancements The following are suggestions for future improvements to the ilPIX System. It is relieved by the author that the s/stem provides a solid uasis for a more complete graphics system. 1) Interactive Capabilities. The current system was designed to act only as an output device. However, with fairly ainjr changes, the system can provide a moderate ammount of interaction. In particular the light pen register within the CfiTC (currently unused) makes addition of a pointing device, such as a light pen or cross hairs, fairly simple. The only major Hardware chinje would be the addition of one or more output ports to send information to the nest. 2) Display Files. The current system is only capaole of handling a single vector at a time. A more useful system would allow the user to define graphical oojects. This could aa implemented with a considerably more complex program resident oa the MPIX, reguiring the use of more BOM and restructuring the _1?IX address space. 3) Status Port. At the time the KP1X was designed the aithor could find no single chip which could te used for toe status port. It therefore was constructed using t separate chips. It is Holy that with currently available chips, the task of the status pjrt could be done with a single device. The author oelieves that tne 7*4172 (dual port memory) would be a reasonable choice for tais register. BIBLIOGRAPHIC DATA SHEET 1. Report No. UIUCSCS-R-79-971 3. Recipient's Accession No. 4. Title and Subtitle MPIX: A MICROPROCESSOR-BASED SYSTEM FOR GRAPHICAL OUTPUT 5. Report Date June. 1979 7. Author(s) Eric Wallace McKlnlay 8. Performing Organization Rept. No. 9. Performing Organization Name and Address Department of Computer Science University of Illinois Urbana, IL 61801 10. Project/Task/Work Unit No. 11. Contract /Grant No. 12. Sponsoring Organization Name and Address 13. Type of Report & Period Covered Thesis 14. 15. Supplementary Notes 16. Abstracts This paper contains a complete description of the design, implementation and realization of a microprocessor graphics processor. The processor (called MPIX) operates in parallel with a host processor and produces output on a television receiver. The paper contains complete listings of all software for the MPIX as well as descriptions of several novel tools used in the system design. 17. Key Words and Document Analysis. 17o. Descriptors Computer graphics, microprocessor, video, system design 17b. Identifiers/Open-Ended Terms 17c. COSAT1 Field/Group 18. Availability Statement FORM NTIS-35 ( 10-70) 19. Security Class (This Report) UNCLASSIFIED 20. Security Class (This Page UNCLASSIFIED 21. No. of Pages 123 22. Price USCOMM-DC 40329-P7 1 F£B 2