LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.84 ho.44 5-450 The person charging this material is re- sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAIGN F£S i 9 197 FEB i , L161 — O-1096 Digitized by the Internet Archive in 2013 http://archive.org/details/eidolyzerhardwar448simo Report No. ¥+8 ~??uU£st June, 1971 EIDOLYZER: A HARDWARE REALIZATION OF CONTEXT-GUIDED PICTURE INTERPRETATION by ARTHUR SIMONS ERRATA to Report No. 448 Report No. kkQ EIDOLYZER: A HARDWARE REALIZATION OF CONTEXT-GUIDED PICTURE INTERPRETATION by ARTHUR SIMONS June, I97I Department of Computer Science University of Illinois Urbana, Illinois 6l8oi This work was supported in part by Contract No. N000 14-67-A-0305-0007 and was submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical Engineering, June, 1971 EIDOLYZER: A HARDWARE REALIZATION OF CONTEXT-GUIDED PICTURE INTERPRETATION Arthur Simons, Ph.D Department of Electrical Engineering University of Illinois at- TTr-k^o nu ■ j wj. ij.j.xnois at urbana -Champaign, 1971 EIDOLYZER, proposed by Professor W. J. P p pelbaum as a practical realization of the "world model" ideas of Professor S. R. R ay , ls . -chine which is capable of analyzing iandscapes. it does this by deterging the colors of large areas in the picture-regions-and the colors of the smaller, enclosed areas-details-and choosing a description which reasonably fits the presented data. When scanning a landscape a human being woold account for colors, shapes, textures, climate and .any other features in deciding what he' is seeing. EID0LYZE R perform an interpretation ma inly on the basis of the coiors presented in the scene and, therefore, its answer cannot be thought of as a "solution", ideally this analysis should be viewed as a process whereby .any possible answers are reduced to a probable few on the basis of color data; further analyses performed by other machines with respect to shapes, etc. would finally produce an answer with a reasonably high degree of credibility. The significance of the decision making apparatus-the "world model" - is twofold. First, by building lnto lt a crude knowledge of ^ ^ scapes most probably look, it can infer a great deal from the relatively small amount of information presented. Secondly, the "world model" works on a hierarchal or layered basis. It first considers that all input slides are of landscapes. Then it deals with only the regions in this context. Then, on the basis of what regions are selected, it decides what details are present. At this point, importantly, the choice of the details affects the previous choices of the regions - reinforcing those preliminary decisions or indicating that a new region hypothesis should be made . In summary, by inferring a limited knowledge about probable colors in landscapes, EIDOLYZER is capable of reducing the large amount of data presented to it to a workable amount of information. This informati, is displayed as a listing of regions and details. .on Ill ACKNOWLEDGMENT The author wishes to express his gratitude to Professor W. J. Poppelbaum for suggesting this thesis topic and for his oontinued friendship, guidance, and support. He is also grateful to Professor S. R. Ray for providing considerable aid, both in the theory and construction phases, from start to finish of the project. The author is indebted to all the men in the fabrication group and machine shop for the work they contributed toward the building of EIDOLYZER. Special thanks are extended to Frank Serio, Jerry Fiscus, Sam McDowell and Ralph Rivera for their excellent support. Thanks are also due Carla Donaldson for typing the thesis, Barbara Weeks for typing the rough draft, and Was Gibbs for drafting the figures. AH of the members of the Circuit Research Group have earned thanks from the author for their friendship and support, particularly his office mates, Larry Wallman and Pete Oberbeck. Most importantly, the author thanks his wife, Janet, for making all the hard work seem like fun and all the happiness plentiful. IV TABLE OF CONTENTS Page 1. INTRODUCTION 1 1.1 Artificial Intelligence 1 1.2 Co-lderations in Design of Pattern Recognitlon 1.3 Readable Solutions to S y ste m Design P roblem . 1Q 2. SYSTEM DESIGN 13 2.1 Operation of Subsystems 13 2.1.1 Slide Display 2.1.2 Scan Array . 18 2.1.3 Color Detector . I 8 2.1.4 Row Analyzer . 20 2.1.5 Region Analyzer ' 22 2.1.6 Detail Analyzer .' 24 2.1.7 World Model . 26 2.1.8 Output Display 30 34 3. HARDWARE DESIGN 35 3.1 Hardware Considerations 35 3.1.1 Large Printed Circuit Board . J. 1.2 Region Analyzer . 35 3.1.3 Detail Analyzer .* 41 3.1.4 World Model . 49 3.1.5 Output Display 55 57 4. CONCLUSION 59 APPENDIX . 64 LIST OF REFERENCES 93 VITA 94 V LIST OF FIGURES Figure Page 1. Cognitive System 2. Photograph of Front of EIDOLYZER 14 3. Photograph of Back of EIDOLYZER 15 4. EIDOLYZER: Block Diagram 16 5. Input Display .... 6. Photograph of Large Printed Circuit Board 19 21 7. Color Detector Operation 23 8. Region Analyzer: Block Diagram 25 9. Sample Landscape I F 28 10. Sample Landscape II 11. Circuit Diagram of Large Printed Circuit Board . . 36 12. Circuit Diagram of Region Analyzer 42 13. DATA SHIFT #1 . 44 14. DATA SHIFT #2 46 15. DATA SHIFT #3 48 16. DATA SHIFT #4 17. Circuit Diagram of Detail Analyzer 51 18. DETAIL SORTER 19. DETAIL ADDER . . 54 20. Circuit Diagram of World Model 56 21. Lamp Drivers .... 58 1 . INTRODUCTION 1 - 1 Artificial Intelli flgnrP As a consequence of the burgeoning technology of the computer age, much attention is currently being given to the problem of handling large amounts of data at accelerating rates. No t to be overlooked in this headiong dash for bigger and faster computers is the need to more efficiently handle the available information and the need to develop unusual processing techniques, obviating the necessity of even trans- mitting so much data. This last desire has led researchers of varied disciplines into investigating the human brain, attempting to discover the mechanisms of human problem-solving, and perhaps, then gaining insights into their own particular problem. It does not necessarily follow that an understanding of the human brain and its associated functions will facilitate the construction of an artificial intelligence system, or vice versa. Even though Marvin Minsky (1) suggested this same thought in 1961 while surveying the field of feature extraction, there has been no let-up since in the search for information about the human brain - information that could possibly relate to the building of an artificial intelligence system. EIDOLYZER (Eidon is greek for "picture", contracted with "analyzer") is an artificial intelligence system proposed by Professor W. J. Poppelbaum as a practical realization of the "world model" ideas of Professor S. R. R ay . It performs . ^ ^^ ^ ^^ ^ tofore done by human beings. This interpretation can be viewed as the Unking of properties of the received stimulus to a representation of the "past experience" of the machine. This representation is what is usually referred to as the semantic way or cognitive structure. However, satisfactory mechanical solution of the modeling problem requires mechanical devices which form a representation of the meaning of communication - that is, a more or less rudimentary understanding of a communication. This latter representation is frequently called the "world model" . The existence of a "world model" can be inferred from the classical research of Jean Piaget (2) . More recent evidence has been presented by Eric Lenneberg (3) . He concludes that the basis of human communication is a model of the constraints and relationships among perceived elements in the sensory environment. Lenneberg hypothesizes the world model to process a sensory input from the general (i.e., gross context) to the specific (i.e., toward more minute detail) by stimulating successive states corresponding to inferred conditions and relationships. Furthermore, experimental evidence supporting this viewpoint is offered by Arthur Guyton (4): Area 17 (refers to drawing in Guyton' s text) is the primary visual cortex, which lies almost entirely on the medial aspect of the cerebral hemisphere but extends out of the longitudinal fissure onto the outer surface of the occipital pole . . . Area 18 lies immediately above and lateral to the visual cortex, and area 19 lies still farther above and lateral to area 18. Electrical stimulation in the primary visual cortex, area 18, or area 19 causes a person to have optic auras - that is, flashes of light, colors, or simple forms such as stars, disks, triangles and so forth - but he does not see complicated forms. Stimulation of the temporal cortex, on the other hand, often elicits complicated visual perceptions, sometimes causing the person to "see" a scene that he had known many years before. At the least, this evidence supplies a general impetus to the work in this area. One example of how insight into the nature of human sensory data processing might be of benefit is in the area of extending the capabil- ities of computers to the processing and controlling of information , where information is defined as the combination of data plus interpretation . The critical lack of knowledge of human sensory data processing is perhaps the limiting factor. Present semiconductor technology has made it very possible to construct computer systems of great complexity, high reliability and phenomenal speed but only in manipulating data which has been first analyzed, then interpreted by human operators. It would be in the mainstream of technological advance if the human being could be relieved of the mundane task of data interpretation by mechanical means. The time has come for hardware implementations of one of the interesting ideas being investigated in this area. Our goal then is to efficiently apply some of the assumed attributes of human information processing to the construction of a machine, which could then demonstrate some of the properties of a cognitive model . As is customary in a problem of this nature, the practical realization falls to the engineer, resulting in the building of models. The accuracy of the model is measured by how closely its interpretation comes to one which a human being could reasonably produce. By building a specified and working model, utilizing both the theories of human problem-solving techniques and commercially available hardware, new areas of research might evolve which could eventually shed some light on the overall problem. Furthermore, it is important to demonstrate that such a machine, exhibiting some of the basic properties of a cognitive model, can be constructed with a relatively modest amount of hardware . By commercially available hardware is meant any fast, yet economical circuitry. This latter becomes a dominanting factor when the scope of the problem is at all significant. The large amounts of circuitry needed to solve unusual problems (in a way which is not at all congruent with the original design of the circuits involved'.) makes cost consid- erations mandatory. With manufacturing techniques progressing rapidly toward efficient processing of Large Scale Integration (LSI) very workable solutions can be found nowadays. Difficulties arise, naturally, in the intelligent application of these logic devices to the problem at hand. In EIDOLYZER the 7400 series (transistor-transistor logic) widely used and, therefore, easily available was employed almost exclusively. In addition to the standard AND, NAND, FLIP-FLOP, and SHIFT REGISTER packages, much worth was derived from the newly created DATA MULTIPLEXER and AND-OR-INVERT gate and, also, the MONOSTABLE MULTIVIBRATOR. Greater attention will be given this matter in a later chapter . It must be emphasized, however, that EIDOLYZER in no way represents the embodiment of experimentation and observations on living organisms but rather the construction of a system demonstrating a hypothesis. Further, the worth of the project lies in the techniques developed for actually implementing the theories, rather than in the demonstration of any actual mechanisms of the brain. The techniques include, for example, the use of pre-set flip-flops to indicate "knowledge" inherent in the world model and the use of and-or-invert gates as simple, digital majority logic. What it really comes to is this: taking some of the existing signal processing knowledge, hopefully improving upon it, and applying it efficiently to this new area. It has been argued that, at this time, devices do not even exist (or could even be created in the foreseeable future) which could be used to simulate the human problem-solving process. However, this is the ultimate goal - for the present, it is imperative to at least begin work in constructing machines with as sophisticated devices and ideas as now exist. The crux of the problem is how to arrange the elements in the model so that by their interaction the model would more or less functionally simulate some aspects of human information processing. The importance of building a machine, embodying some of the abstract ideas previously mentioned, that actually works cannot be understated. Using the overall design proposed by Professor Poppelbaum, we arrived reasonably quickly at a working model and later a complete machine. The crux of Professor Poppelbaum' s idea was to analyze a landscape as a sequence of color-bands and to make use of a world model which associated with regions (adjacent bands of the same majority color) the common notion of "sky", "grass", etc. 1.2 Considerations in Design of Pattern Recognition System In order that an operator perform in a purposeful manner, he must both receive and process information in such a way that he can effect control of the presented holistic situation. This functioning may be described in terms of a number of information processing operations: reception, perception, and cognition. Reception is defined as the process of accepting an energy stimulus from the real world (through the eyes, ears, touch, etc.) and transforming this signal into a neural message, i.e., perception. This message is then transferred to the appropriate brain center which can achieve cognition - the assimilation of the information contained in the neural message with respect to data extracted from the memory, thus achieving interpretation based upon the context of some aspect of past experience. Basically, the objective one strives for in a "cognitive system" is to issue a communication of non-deterministic information, by means of brief codes, and have an analysis made with a reasonably high probability of successful interpretation. One such system is illustrated in Figure 1. By utilizing a store of information intrinsically associated with both the transmitter and the receiver, a brief message can be sent, with much more than the inherent information inferred from it. First, however, these information stores must have a model associated with each, encompassing a large environment, and these stores must have a degree of commonality. Second, the receiver needs the ability to infer in order to supplement the basic transmission. TRANSMITTER BRIEF MESSAGE INFORMATION RECEIVER INFORMATION Figure 1. Cognitive System 8 For example, were a knowledgeable baseball fan to hear this short report on the radio, there is a considerable amount of information he could derive: "The New York Mets won the first game of the World Series today, 11-0." He might assume that, since it is the first game of the World Series, the Mets 1 best pitcher started the game. Further, since the Mets 1 opposition scored no runs while the Mets' lead was mounting, he probably pitched the entire game, and very well at that. Also, since the Mets scored 11 runs, their best hitter probably contributed his usual large share. Note that more information might contradict these cursory formulations, but, for the present, they have to be accepted for what they are: mere hypotheses probably containing a large amount of fact. What, then, are some of the attributes considered important in identifying a picture? Among the perceivable characteristics which aid an observer are: color, position, shapes, aspect ratio and texture These elements are unary - they are pertinent to one region of the picture; elements with a "paired" relationship include: enclosures (e.g., cloud in sky) and adjacencies (e.g., leaves on tree trunk). There also exist imperceivable elements, such as ambient temperature, humidity, and location that can be derived from clues contained in a picture (e.g., a lightly clad human). The theoretical identification of a picture would consist of a searching out of the aforementioned attributes and a comparison of them to a model or map internal to the device. This map would be a combination of those characteristics consistent with the past experiences the devices may have encountered. The mapping between the detected attributes and the world model can be continuously checked at varying levels of information content so that the final hypothesis offered represents the most probable inter- pretation of the pictures in view of the predetermined world model. If at any point an examination of new data strongly contradicts an interpretation, the device would retreat to an earlier level and construct a new hypothesis. What eventually evolved was a picture analysis system based upon the idea, implicit in the concept of a world model, that each level of context, proceeding from more general to specific, is used to constrain the inferences made concerning the identity of objects and conditions. In the present case, four levels of context are considered. The gross context, level 1, is assumed, arbitrarily, to be landscape scenes. (At this point, one could consider that this assumption was arrived at by a higher level decision - making process, similar in nature to the process used in EIDOLYZER.) The machine determines the colors of large areas - regions - and the smaller areas enclosed by them - details - in the presented landscape. The color plus region data then provide sufficient information to hypothesize the nature of the regions (level 2). This decision is subject to change if subsequent data - details (level 3) or imperceived conditions like temperature and humidity (level 4) - is strongly contradictory. Finally, hypothesized conditions are presented as labels of regions and details on a display panel . 10 Economics, however, must play an important role in any design problem. Bearing in mind that, in essence, our goal is an autonomous machine, complete with demonstrable sensory inputs, and containing a world model (however emasculated), one quickly arrives at the conclusion that this could be an expensive proposition. For every attribute to be considered there must be a facility for detection and a portion of the world model set aside to account for that data. Ideally, one would like a color-detecting, texture-sensing, temperature-measuring, etc. device with a correspondingly large world model to take advantage of the plethora of acquired data. Practical considerations require an ordering of priorities. 1 -3 Realizable Solutions to System Design Problem While it is clear that EIDOLYZER had to be self-contained and had to analyze pictures with a world model influencing its decisions, what is not so obvious, but also of importance, is the need to strikingly display the system to an observer. This can best be accomplished by allowing the observer to perform his own analysis along with the machine; ergo, the decision to display the input picture for the observer. This led naturally to choosing a visual stimulation as the main attribute to be considered by the machine, requiring an observer only to look at the picture and have the identical information being presented to the world model. While it could be argued that humans probably use other attributes more often in identifying objects, it was decided to use color as the primary attribute for a variety of reasons . 11 First, a display system and input sensors had to be chosen. This choice would depend primarily on the resolution desired and the cost. To have any realistic amount of data accumulated on the shape, size, orientation, etc. of objects in order to distinguish between them would require a considerable amount of resolution, on the order of TV line resolution. Detecting the color of a few shape-independent areas, on the other hand, can be accomplished easily and economically with a matrix of photocells. Furthermore, a slide projector makes a far less expensive input device than a TV camera and the projected displays are only slightly less impressive. Second, just as the resolution required to identify objects on the basis of their shapes versus their colors is increased, so is the size of the world model and the system needed to transfer all the data from the sensory inputs to the world model. This overall increase in system size and cost really adds nothing new to the basic techniques and philosophies of the project. Those priorities can be served adequately by choosing to interpret pictures on the basis of the colors contained therein. Finally, many of the projects of Professor Poppelbaum's Hardware Research Group in the Department of Computer Science at the University of Illinois utilize color analysis techniques and, by choosing color as the primary attribute to be considered in the world model, two purposes are served: past accomplishments of the group could be used as guidelines, and new ideas discovered in the construction of EIDOLYZER could be added to the group's knowledge in this area. 12 In order to exercise the machine further (i.e., provide an additional level of context for the world model), it was decided to allow the observer to artifically inject data about temperature and humidity directly into the world model. Furthermore, by permitting the observer to insert this data another favorable situation was created, namely that, by his choice of temperature and humidity (or lack of it), the observer is reflecting his own particular state of mind, in part, into the world model which increases the likelihood of EIDOLYZER' s analysis matching his own. .13 2. SYSTEM DESIGN 2-1 Operation of Subsystems A picture analysis system was constructed based upon the idea that each level of context guides the interpretations made concerning the identity of various objects. (See Figures 2 and 3 . ) A block diagram of the system appears in Figure 4. In EIDOLYZER four levels of context are considered. The gross context, level 1, is that only landscape scenes are considered. It is desired to project a slide of the desired scene onto a 16 x 16 array of groups of photocells, the scan array (see Figure 4). At each of the 256 points of the scan array, three photocells, reacting only to red, green, or blue respectively, decode the color of the slide at that point. A total of five colors are used to make the slides: red, green, blue, brown, and white. The next step in the process is to determine the "color" of each of the 16 rows. It was decided that if any row has a definite majority color (at least 9 out of 16), the row shall be assigned that color (color detector and row analyzer). Simultaneous with the determination of the colors of the rows, the colors of the details in the rows are determined. The region analyzer then divides the rows into contiguous blocks of the same predominant color while the detail analyzer determines the colors of the different details of the various regions. A small area of one color along a row qualifies as a detail if it appears at a minimum of three points out of the sixteen. 14 Figure 2. Photograph of Front of EIDOLYZER 15 Figure 3. Photograph of Back of EIDOLYZER 16 INPUT SLIDE COLOR DETECTOR DETAIL ANALYZER SLIDE DISPLAY ROW ANALYZER REGION ANALYZER WORLD MODEL OUTPUT DISPLAY Figure 4. EIDOLYZER: Block Diagram 17 The color-plus-region information provides sufficient date to hypothesize the nature of the regions (level 2). This decision is subject to change if subsequent data - details (level 3) or perceived conditions like temperature and humidity (level 4) - are strongly contradictory. This entire interpretation takes place in the world model Finally, hypothesized conditons are presented as labels of regions and details on a display panel. The region assignments are guided by a threshold logic array which is a very small hardware mapping of a complete world model. For example, a slide with three regions - blue at the top, green in the middle, and brown at the bottom - could be hypothesized to be sky, grass, and dirt. A green detail in the blue region, however, could more likely be called a grassy island in a pond than a green UFO (an object in the sky whose exact nature is uninterpretable) and would, therefore, influence the decision made on the previous level of context. (Something to be remembered here is that the world model reflects what the author considers to be a likely environment. What might appear to someone else to be correct, just could be - to him. In fact, there really is no unique solution, but only personal interpretations. However, the claim for E1D0LYZER is only that its answer is one which a human being could possibly deduce.) Similarly, if lt were determlned that „ „ as cold or very dry, then one could rule out the hypothesis of pond and grass and return to the original idea of sky - pl us UF0 . 18 2.1.1 Slide Display The landscape scenes used in EIDOLYZER were first constructed from colored paper and then photographed. Since EIDOLYZER bases its decisions on the colors of the scenes and their positions relative to each other, the shapes of the regions and details are not considered. The slides, therefore, are more abstract than landscapes usually are, in order to place the human observer on an equal footing with the machine. The type of paper used (Color -Aid paper) was chosen for two reasons. First, many colors with different shades and tints were readily available and, second, the results are reproduceable simply by buying the same Color-Aid paper as before. No special precautions were taken in the photographic process. In order to project an 8" square picture over a distance of about 14", a special lens with a short focal length was used. The scene is projected through a 6" square piece of glass, coated with aluminum, which serves as a half -silvered mirror. The scene, therefore, impinges on both a rear-projection screen and the photocell array (see Figure 5). The screen is mounted on the front of the cabinet, and it, therefore, acts as an input display medium for the human observer. 2.1.2 Scan Array The scan array consists of a 16 x 16 matrix of groups of photocells The total of 768 photocells are mounted along the top edge of sixteen large circuit boards, sixteen groups of three photocells to a board. By making the distance from the array to the projection lens equal to z UJ 19 y o \ / I— I a •H a 3 a c m ■ Z o UJ a: ir. UJ N O o UJ B 00 to J*5 O O i—l PQ M OJ N (0 < c o •r-< 00 /p\ » ^ JjAJ >.A.A.A Mi i er T5 CO O P2 3 O l-l •H a - c u - 0) 60 H CO o = CO M 60 CO •r-l Q 4J •H 3 O U •r4 O 1 A > II M ~ I' r.i L T 37 filters. The Wratten filters are available in the form of a thin, gelatin film. They can be obtained with several spectral properties: 1) "sharp cutting" - filters which have an abrupt transition between regions of high and low transmittance , 2) "short-wavelength" or "long- wavelength" - filters which transmit the shorter but reject the longer wavelengths, or vice versa, and 3) "bandpass" - filters which transmit or reject only a limited band of wavelengths. Immediate difficulties were encountered because the lamps used in slide projectors emit considerably more energy (about 10 times more ...) at the "red" end of the visible spectrum than at the "blue" end. By employing combinations of band-pass Wratten filters, neutral density attenuators, and color compensating filters it was possible to differentiate between the various colors, but only after reducing the level of light intensity to such a small fraction of the original projected light that ambient light in the cabinet became a major concern. Furthermore, this solution required a different type photocell for each point of the triad. By changing the manner in which the information from the photocells is decoded, however, (see Figure 7), it was possible to find a unique decoding matrix utilizing only one Wratten filter per photocell and similar photocells throughout. The filters were punched out in the form of discs and inserted inside the photocell-can by the manufacturer and then hermetically sealed. The filters chosen were: 1) Blue - #47 Wratten filter-peak transmittance at 4500 R; band-pass from about 4-5000 R. 38 2) Green - #58 Wratten filter-peak transmittance at 5300 A; band-pass from about 5-6000 A. 3) Red - #70 Wratten filter-peak transmittance at wave- lengths longer than 7000 A; long-wavelength from about 6600 A and higher. The photocells selected have a typical response of 6.8KQ to 2 foot-candles of impinging light, but with a tolerance of +33 l/37o. This tolerance figure led to the necessity of handpicking all 768 resistors in Figure 11 labeled "R" which, together with the photocells, provide resistive voltage dividers at the input to the Darlington transistor pairs. If one wants a transistor to turn ON for red light and OFF for another light, it is a matter of choosing the unknown resistor so that, in combination with the resistance of the photocell with red light impinging, the voltage at the input base to the Darlington pair is high enough to turn it ON (larger than -3.8V), but that, in combination with the photocell resistance with the other light impinging, the base voltage is low enough to keep the Darlington pair turned OFF. However, with the resistance of a photocell varying from 10 to 20KQ or 33 to 67KQ , for example, it is impossible to specify beforehand the value of the other half of the divider. The outputs from the Darlingtons are taken from the collectors - with values of -5 volts ("0") and ground ("1") being TTL compatible - and immediately inverted. The inverted and non-inverted signals then provide sufficient information to a matrix of NAND gates to decode the color of each of the sixteen points along a given row. 39 M 1 I! The outputs of the NAND gates are either -5 volts for a logical •1" or floating for a logical "0". The sixteen outputs for each color are then connected to input resistors of five sunning amplifiers, one for each color. The ration of feedback resistor to input resistor, 1.24K/20.0K, provides an amplifier gain of approximately -1/16 to each output of a NAND gate. Therefore, if no point is decoded as red, all sixteen NAND gates representing red will be floating and the output of the red summing amplifier will be at ground level. Conversely, if all points are red, all sixteen input resistors will be tied to -5V, each with a gain of -1/16, and the output of the red summing amplifier' will be + 5V. The same operation is true for all five su M ing amplifiers their outputs swing between ground and +5 V. One problem that arose was that a finite current actually flowed through the reverse-biased collector-base junction of the output transistor of the NAND gate (ideally, this current should have been zero). This caused a small negative voltage at the output of the NAND gate (which should have been floating). Fortunately, the reverse current was so sm.ll for most of the circuits that the total error introduced proved to be insignificant. However, the problem meant that a large group of integrated circuits had to be tested! The output voltage of the sum m ing amplifiers, proportional to the number of times a color appears along a row, is fed into two groups of voltage comparators. The voltages are simultaneously compared to +2. 533V by one group and to 4-0.750V by the other. The former value represents the theoretical halfway point between the amplifier outputs 40 for eight and nine appearances of one color, the latter represents the value for two and three appearances. Therefore, if the output voltage of one of the five summing amplifiers is greater than +2. 533V, there are at least nine points along the row of that color and the corresponding "row" comparator output gives a logical "1". If an amplifier voltage is greater than +0.750V, there are at least three points along the row of that color and the corresponding "detail" comparator output gives a logical "1". The outputs from the four "row" comparators are stored in registers by a clock pulse which appears 100ns after the START button on the front panel is pushed. When all four "row" comparators are "0", and there- fore the row is "colorless", a NAND gate (output called "RC") has a logical "0" output. This signal, RC , is used then to suppress any details which might be present (no information is collected from a colorless row) and is also used in the region analyzer. The outputs from the five "detail" comparators are gated through AND gates and any detail may be eliminated by either of two sources . One source is the aforementioned signal, RC, and the other the row output of the same color - i.e., a blue detail in a blue row is impossible . The ten outputs from each large printed circuit board consist of four outputs from the registers containing the row color information, five outputs from the AND gates passing the detail color information, and the RC signal . 41 There are three tabs located on the edges of the Urge board (see "gure 6), i.e., two «.U tabs on the side and one large tab on the bottom The large tab pings into a board with sixteen connectors (one for each large board) which conduct the power, the register clock pulses, and the two reference voltages, +2.533V and +0.750V. This power board also serves to keep the sixteen large printed circnit boards 1/2" apart . „,. t „ reference ^^ ^ ^ ^ ^ regulator located in the rank ti« i m the rack. The lower small tab provides the out- puts to the cable which is wired to the rack and *h» racK, and the upper small tab has the same outputs available - for testing purposes. 3.1.2 Region Analyzer A circuit diagram of the region analyzer appears in Figure 12. The simplest way te understand the operation of this subsystem is to realize that the four timing sections, DATA SHIFTS #1, #2, #3, and #4, -rely control the flow of information through banks of gates and registers from input to output. This control of information is necessary for the timing of operations to be performed, and for choosing the directions in which the information travels. The inputs to the region analyzer are one of five possible signals from all sixteen rows: either the row is green, blue, white, brown, or colorless. Upon receipt of these signals each row color is compared to the color of both adjacent rows by a group of fifteen 4-bit comparators. Approximately 100ns after the information is clocked into the registers on the large board the timing sequence is started in 1_ 42 1 tttt JL1JL1 JLUA AtWi u OJ N >> .— I co c < c o •1-1 00 (1) as 2 (0 '- 00 CO 3 o •1-1 o 0) 3 60 •H 43 DATA SHIFT « (see Flgure u) fay . ^ ^ ^^ ^ ^^ allowing the 25 KHz system dock to be gated into a 4-bit counter. The output of this counter drives a DATA MULTIPLEXER which in turn examines the output of each of the fifteen comparators se q uentiall y and simpl y lnverts £he partlcuUr lnp ^ u is iQoking ^ ^ ^ «ay, a "0" output on the multiplexer denotes a "1" lnput , Khlch shows that two touching rows are the same color - and form a region. To eliminate the possibility of creating regions from odorless rows, the RC signals are used to suppress any "1" outputs from „ ^ comparator which happens to be comparing two colorless rows. Therefore as soon as the multiplexer has a "«,' output this signifies the start of a region ; furthermore, as long as "0- S continue to appear at the outputs, the region is expanding. When . ,. r , u flnaUy obtained ^ ^e output of the multiplexer, the boundary of the region is reached. While the multiplexer is examining each of the comparator outputs DATA SHIFT #1 ls gatlng the c(jlor me lower row of the comparison into four l 5 - lnput 0R gates . Hhenever a boMdary ^ a ^^^ ^ cached the color of the preceding row, still in the 15-i„put ORs, is gated into a bank of registers if h, registers. At the same time, the size of the region, compiled in DATA SHIFT #1 by a counter which starts at the inception of a "0" output of the multiplexer and stops at a "1", is gated into a bank of registers associated with the registers ' containing the color information. At the end of the DATA SHIFT #1 stored in registers, the top register for the first region, the second 44 X FOUR > YOSO" > "O'OSO > CLK > -< TWO" < THREE FIVE ^M* SEVEN Q 1 12 3 4 5 6 7 1 |0 I 2 3 4 5 6 ' -^ "£ J J ^ T^ J T^ T^ ^, ^ ♦ V V Y 12 3 4 5 6 7 8 9 O II 12 13 14 15 PARTS 2- SN7495N 3- SN7404N I- SN7400N 1- SN74HIIN I-SN7402N 2- SN7442N 2- SN7493N 2- SN7474N NOTES ON SN7493N-VCC = PIN5. GND= PINIO. TIE PIN 12 TO PIN I. TIE PIN2 TO PIN5 ON SN7442N-VCC-PINI6. GND=PIN8 ON SN7495N- TIE PIN7 TO PINS 2-5. LEAVE PIN-A OPEN. Figure 13. DATA SHIFT #1 45 for the second, and so on, and a timing signal is then sent to DATA SHIFT #2. When the timing signal from DATA SHIFT #1 reaches DATA SHIFT #2 (see Figure 14) the system clock is gated through to a 4-bit downward counting counter. The output of this counter is simultaneously compared to the count in the eight registers representing the sizes of the various regions. By using a counter set originally at 1111 which counts down to 0000, the comparators which first have "1" outputs will correspond to the registers with the largest count. The "1" output of the comparator is used to gate the color information of the corresponding register into the next bank of registers, maintaining the same vertical orientation as before. The clock pulses for this next bank of registers came from a group of MONOSTABLE MULTIVIBRATORS (one- shots) which are energized by the "I" outputs from the comparators after passing through a time delay. The length of the time delay is proportional to the distance away from the center of the picture of a particular region. For example, the time delay for region 4 is zero, for region 5 las, for region 3 2us, . . . for region 1 7us . The reason for this is apparent as follows. Each time a comparator has a "1" output, denoting a region, this output is used to trigger a counter, the output of which is compared to the number 5. When the fifth region is found (only the four largest are desired), this 3-bit comparator outputs a "1", which is used to immediately prevent any further information from being transferred from the one bank of registers to the other. In the case of ties, however, (five, six, seven, or eight regions could all be the 46 1 lo o * o ® = <=> k -l~ e I 8 | -♦cm. IO o A 6 < CD O Q V XV, ♦ ♦ ♦ iHMHiif iii i i i i i i i eg — M — — — * ■ a .. . , Put register 2, or shift to output register 2 if the same. Once in output reeister 7 i+ P register 2, it can remain there, if different from input register i, or shlft t0 output reglster ^ ±f ^ ^ ^ type of operation is also performed Qn ^ ^^ ? ^ ^ ^ shifts ere a l„ ays to the next highest output register), but input register ! naturally stays in the same relative position. The output registers, at this point, provide information direct!, to the world model . 3-1.3 Detail Analvz er A circuit diagram of the detail a n=i cne detail analyzer appears in Figure 17 « is apparent from a comparison of this figure with Fi gU re 12 that t^re is a gre at deal of similarity between the operations of the detail analyzer and region analyzer. First of all K «, u J nrsc or all, both subsystems share the timing sections, DATA SHIFT #1, #2 , #3, and #4, so that -en an operation is performed in the r eglo n anaiyzer, the correspond! operation is simultaneously performed in the detail analyZ er 50 H ft. h-i X in < 3 vO u 3 60 •H A A A A A A A A A A doooooo o good o ooo g - s 1 9 .. T t t T t E j u T ! T t r jj J t t 1 t T Ik I 1 8 " IU r t T t t i, J. J-JL t , t , t . T t -L_l .ft fJ.l f.W fjj f.ft i i US s » I 1* I m ra Rq ,?« LI.] Lii [.ft f.i. m ] im MfiSB . i— I CO c < •H cC 4J cu Q 6 CO n •H o 4-) •H 3 O u •H a) u 3 &0 Pn 52 The inputs to the detail analyzer are one or two of five possible signals from all sixteen rows - the details in a row being any two of the colors red, green, blue, white, and brown. As each row in the region analyzer is added to an expanding region, the details in that row are gated through five 16-input ORs to a group of latches. Once a detail is found, and the appropriate signal is clocked into a latch, the latch is disengaged from any further inputs until the boundary of the region is found. At this point, the information in the latches is transferred to eight groups of registers (completely analogous to the way the colors and sizes of regions are transferred simultaneously in the region analyzer), and the latches reset, ready to accept detail information for the next region. From this point DATA SHIFTS #2 and #3 transfer the information all the way to four groups of registers, representing all the details found in the four regions chosen by the region analyzer . The information from these registers then enters the DETAIL SORTER (see Figure 18) which simply takes the region color information just alluded to, and suppresses any details in a region found to be the same color as an adjacent region. This is done by a straight-forward gating procedure. The outputs from the DETAIL SORTER are then clocked into the next bank of registers minus the unwanted information. These registers then provide information to the DETAIL ADDER (see Figure 19) , which takes the details of all regions that are being combined by DATA SHIFT #4, and adds them to the newly formed region. The results of this operation are stored in a bank of registers and provide information directly to the world model. IQ,>- IQ 2 >- IQ 4 ^ 2Q,^ 2Q 2 ^ 2Q 3 >- 2Q 4 >- 3Q,^ 3Q ? ^ 3Q,^ 3> -o- ■> £> {> 3Q 4 ^ M> ->2T5 2 -»2T5 S ->ZU 4 ^2T5 8 ->TT5 2 ->TE 3 ->Td" 4 ->4T5 2 ^^n 3 ->4"D" 4 ■>4D 5 53 4Q,> 4Q 2 ^ 4Q 3 ^ 4Q 4 ^ GND >. 22 T^ jAMP o r> r> T T -® 47 UF 25 V -® ■>3D 9 »3D, »3D. >3D. NOTES LEAVE PIN-A OPEN. Figure 18. DETAIL SORTER PARTS 2-SN7404N 2-SN7402N 54 » 2Q,v3Q,v4Q, ♦ 2Q 2 v3Q 2 v4Q 2 » 2Q 3 v303v4Q 3 » 2Q 4 v3Q 4 v4Q 4 > 2Q 5 v3Q s v4Q 9 » IQ|V2Q,v3Q,v4Q, » IQ 2 v2Q 2 v3Q 2 v4Q 2 * IQ 3 v2Q 3 v3Q 3 v4Q 3 * IQ 4 v2Q 4 v3Q 4 v4Q 4 > IQ 5 v2Q 5 v3Q 5 v4Q 5 8- SN7400N 3-SN7404N Figure 19. DETAIL ADDER 55 3.1.4 World Model The circuit diagram for the world model for one region appears in Figure 20. At the conclusion of the operations in the region and detail analyzers there is information from these latter two (plus the temperature/humidity switches) all waiting to be used in the picture interpretation. Approximately 100ns after the START button is pushed all the flip-flops in the world model are cleared. A first hypothesis is formed by allowing the region color information to flow through selected gates (selected by a presupposed knowledge of landscapes). Approximately 300ns after this clear pulse, timing signal THIRTEEN clocks the flip-flops and takes the detail color information into account. Between the clear pulse and THIRTEEN the preliminary picture hypothesis is combined with the detail color information in an array of AND and OR gates. Then it is fed back to the flip-flops directly or through AND-OR-INVERT gates. Timing signal FOURTEEN occurs 100ns after THIRTEEN and resets the fl-in n„«o • a u resets the flip-flops in order to take the temperature and humidity conditions into account. Meanwhile, the secondary region hypothesis plus the detail hypothesis is interacting with the temperature and humidity information in an array of AND and OR gates and those outputs are also fed back directly and through AND-OR-INVERT gates to the flip-flops. Timing signal FIFTEEN, 300ns after FOURTEEN, clocks this information into the flip-flops with the result being the final interpretation. This information filters down through the logic array and determines a final interpretation for details also. These results are then fed into lamps which are displayed as a listing of words on the front panel . m '. i 6 5 5 as M IE I ^-^ 3>o- l^rCHI w r. r> n r\ r> J S S S I t 56 o 57 3 - 1 - 5 Output Disp lay The re S u lts of the world model are taken ^^ ^ Qrder ^ ^ capable of drlving 150ma lamps , are fed lnto DarUngton ampufiers (see F lgure 21 ). „,... outputs then drlve the umps iocated ^^^ the fxla plane with the words listed on it. 58 INI> A+5V Nl NETEEN IDENTICAL CIRCUITS > OUT I INI9> GND> 22 47UF@25V \ AMP > + > OUT 19 Figure 21 . Lamp Drivers 59 4. CONCLUSION The construction of EIDOLYZER proved to be a successful venture. It was demonstrated that, utilizing a modest amount of hardware to apply some of the presumed attributes of human information processing, a machine could be built which demonstrates some of the properties of a cognitive model. Furthermore, several results were obtained, during the actual design and construction and from an overall review of the completed machine, which are noteworthy. The first conclusion that can be drawn is that it is possible to build a decision-making apparatus (the world model) which uses a limited amount of presupposed knowledge to aid it in reducing a large amount of data to a usable amount of information . The problem of having to search through all possible paths in a decision-process was discussed by Marvin Minsky (1) with respect to a game of chess. To explore the more than l l2 ° choices in a game of chess is an over- whelming task, and requires an efficient method of limiting the number of practical choices. This is precisely what was done in the world model, and the data reduction performed by EIDOLYZER in interpreting landscapes bears out the technique. To compute the number of input bits, we take the 256 points in the machine, 5 possible colors at each point, and 25 different states of temperature and humidity. Therefore, # INPUT BITS = log (5 256 x 25) * 575 bits. '2 Furthermore, (since there are 70 possible answers in each of the 4 regions) 60 4 # OUTPUT BITS = log 2 (70 ) « 25 bits. Therefore, we can see that, in interpreting a landscape, EIDOLYZER reduces the data approximately 23:1 in order to present it in a practical form. Most of this data reduction occurs in the processing of the input data into regions and details, but a large number of output possibilities are eliminated by the presupposed knowledge of landscapes built into the world model. Another result which comes from the building of EIDOLYZER is based on the experience which comes from the designing and construction of the world model -- it is possible to draw some conclusions which could be of significant value in constructing a larger model, i.e., one with more levels of context and more inputs. In general, the basic form to be taken is as follows. The first level, made up mostly of storage elements containing the presupposed knowledge, is the level on which the overall decisions should be made. In EIDOLYZER, this meant the nature of the regions chosen. Any changes in context coming from lower level data are fed back to the storage elements on the first level where new hypotheses are formed. These new hypotheses are then allowed to filter down through logic arrays to the lower levels where they interact with the incoming data once more. By using timing signals, which sequentially gate in the data on each succeeding lower level, the more general data can be examined first (this data would tend to have the largest effect on the overall hypotheses), and the data which describes the finer details later. In summary, this 61 type of layered decisio„- M ker consist, of a bank of storage events containing the presupposed knowledge (the way in which it is originally biased accomplishes this) representing the first level of context, and succeeding levels of logic arrays which allow the conclusions of the first level to combine with incoming data. Timing signals are used to gate only the data of the desired lower level into its corresponding logic array. Finally, there is continuous interaction between the various levels of logic arrays in addition to the interaction between each level and the first level. The final hypothesis is taken from the first level and the lowest level utilized. Since the crux of the problem in constructing EIDOLYZER was the world model, it is instructive to restate significant conclusions concerning it which have appeared previously. By considering only certain information at certain times, a preliminary hypothels could be constructed solely on that information that could be modified later due to newly-arrived information TU-t„ information. This process can be repeated as many times as the decision-maker finds necessarv h,« Ub necessary - the more iterations, the more information considered an H i-u^ considered, and the more accurate the answer. Depending on what accuracy is desired, the decision-maker is free to accept an answer at any point in the process. It is this very technique which is the realization of the layered, hlerarchal type structure and which distinguishes the world model from a simple read-only-memory. Whereas, in read-only-memories, all parts of the memory are considered In each access with the particular address used determining the particular set of bits read out, in the world model, many choices 62 are eliminated on an n5 level decision by utilizing the results of the previous level decisions. In this way the interpretation has been guided along the most probable paths at each step of the process, until the final interpretation represents the most probable decision based upon the information presented. The only errors which occurred, in the final analysis, were due to the poor resolution of the photocell matrix: Certain combinations of colors bisecting the photocell triads (each triad was approximately a 1/2" equilateral triangle) caused incorrect interpretations at those points. However, these errors occurred infrequently and the overall results were excellent. The operation of the machine is very straight-forward. After turning the power on, one simply has to scan through a pre-arranged slide show. The first slide briefly explains the nature of the machine and is followed by two landscapes. Following this there are six explanatory slides, each describing a particular facet of EIDOLYZER, and landscapes serving as examples for the explanatory slides. After these landscapes (approximately 15-20), there are fifteen landscapes, prepared randomly, which can be interpreted. The explanatory slides demonstrate EIDOLYZER 1 s technique of shape- independent inter- pretation, the function of the temperature and humidity switches on the front panel, the choosing of the four largest regions in a picture, and other techniques discussed in Chapters 2 and 3. The most difficult section of the machine to construct also offers an area for suggested improvement. This is the photocell matrix 63 input. Although it performed well, and was an exceptional bargain, the difficulties in choosing resistors to form voltage dividers with each photocell and the poor resolution offered suggest that a new method be utilized in the future. Furthermore, many of the blue Photocells failed to register lower resistance to blue light than to red light (a problem from the project's inception) and had to be replaced This was probably due to poor fitting of the Wratten filters inside the Photocell-can, allowing some white light to come through. Since white light has approximately ten times the energy at the "red" end of the visible spectrum than at the "blue" end when it comes from the slide projector lamp, such light leaks were serious in consequence'. A more expensive light source with a more even energy distribution would quickly solve this problem. 64 APPENDIX 65 A1.0 CARDRACK LISTS Al.l TOP RACK 1) 2) - 3) 4-Bit Comparator 4) Data Multiplexer 5) - 6) 4-Bit Comparator 7) • - ID 5-Bit Nand 12) - 15) 4-Bit Nand 16) - 17) 16-Input Or 18) Clock - Regulator 19) Data Shift #1 20) - 24) 5-Bit And 25) SECOND RACK 1) 2) - 5) 7-Input Or 6 ) Data Shift #3 7 ) 5-Bit Detail Latch 8) - 10) 16-Input Or 11) - 12) 4-Bit Nand 13) - 14) 4-Bit Latched - Or 1 5 ) Pulse Delays 16) Data Shift #2 17) - 18) 4-Bit Comparator 66 19) - 22) 8-Bit Clock-Anded Latch 23) - 24) 5-Bit And 25) A1.3 THIRD RACK 1) 2) 4-Bit Latched - Or 3) Data Shift #4 4) - 8) 5-Bit And 9) - 15) 5-Bit Clock-Anded Latch 16) - 18) 5-Bit Nand 19) - 23) 7-Input Ors 24) Detail Adder 25) BOTTOM RACK 1) 2) 3) Temperature/Humidity Logic 4) Timing 100 5) Timing 350 6) - 9) Lamp Drivers 10), 12), 14), 16) World Model II 11), 13), 15), 17) World Model I 18) - 19) And Gates 20) Detail Sorter 67 21) - 23) 5-Bit Clock Anded Latch 24) 5-Bit And 25) 68 A2.0 CIRCUIT DESCRIPTIONS In this section a brief circuit description will be given for each printed board not described in the text. A 2.1 Circuit Boards The circuit boards are discussed in the order in which they are listed in the previous section. The schematics are given at the end of this section. All digital integrated circuits are Texas Instruments Series 74N 1) 4- BIT COMPARATOR This circuit examines two 4-bit numbers and outputs a "1" when the numbers are identical . 2) DATA MULTIPLEXER This circuit examines sequentially 15 different inputs, and its output is the inversion of the particular input it is examining. 3) 5 -BIT NAND This circuit gates 5 inputs into 5 inverters simultaneously, with one signal controlling flow. 4) 4-BIT NAND The same as 3) with one less input. 5) 16- INPUT OR This circuit gives a "1" output if any of 16 inputs is "0". 6) CLOCK -REGULATOR This card contains a 25 KHz, discrete component, clock and a single-unit voltage regulator for the two reference voltages, +2. 533V and +0.750V. 69 7) 5-BIT AND This circuit gates 5 inputs through a non-inverting gate simultaneously, with two signals controlling flow. 8) 7-INPUT OR The same as 5) with only 7 inputs 9) 4- BIT LATCHED OR This circuit stores 4 signals and also "ors" them after they are stored. 10) PULSE DELAYS This card has 7 pulse delay circuits of varying lengths. 11) 8 -BIT CLOCK -ANDED LATCH This circuit stores 8 signals, but clock pulse must pass through gating logic. 12) 5 -BIT CLOCK -ADDED LATCH '.np The same as 11) with only 5 inputs 13) TEMPERATURE/HUMIDITY LOGIC This card contains 8 RC low pass filters for the TEMPERATURE/ HUMIDITY switches on the front panel pl us l ogic to find any significanfc combinations of these. 14) TIMING 100 This card contains 12 one-shots whose outputs are 100ns pulses; 8 are triggered on positive edges of pulses, 4 on negative edges. 15) TIMING 350 The same as 14) with 4 positive edge triggered one-shots whose outputs are 350ns pulses. 70 16) AND GATES This circuit is just an array of AND gates with all pins brought out . IAI > IBI > IA2>- IB2>- IA3>- IB3>- IA4>- IB4>- ® 71 CI FOUR IDENTICAL CIRCUITS 4AI> 4BI> 4A2> 4B2> 4A3>- 4B3>- 4B4> 4B4> GND> + 5V> © OtzDtU-) O^L> J-® -r- .47UF025V J \j- yAMP O Figure A2.1 Four Bit Comparator ->C4 PARTS 4- SN7486N 2-SN7402N 2-SN74HIIN NOTES LEAVE PIN-A OPEN 72 RC2> OUT PARTS I-SN74I50N 5-SN74HIIN NOTES LEAVE PIN-A OPEN. £ AMP Figure A2.2 Data Multiplexer 73 Al> Bl> Cl> Dl> El> Xl> A3> B3> C3> D3> E3> X3> GND> + 5V> 22 ->IQ, ■>IQ 2 THREE IDENTICAL CIRCUITS :=T> ;=r> >3Q, ^3Q 2 >3Q 3 >3Q 4 to >3Q. yAMP T X <2) 47UF®25V -® PARTS 4-SN7400N NOTES LEAVE PIN-A OPEN. Figure A2.3 Five Bit Nand Gate! 74 Al> " Bl > CI > Dl> XI > A4> B4> C4> D4> X4> FOUR IDENTICAL CIRCUITS B*RTS 4- SN7400N NOTES LEAVE P1N-A OPEN. GND> -® -Lamp =p.47UF€ AMP Figure A2.4 Four Bit Nand Gates GND>^ + 5V ^ 75 » XO > YO PARTS 4-SN7430N 2-SN7400N NQIES. LEAVE PIN-A OPEN. yAMP Figure A2.5 Sixteen Input Ors 76 ♦5V CLK« + I2V> GND> + 5V > »CLK >+ 2.533 V :o.oft > + 0.750 V 0.1 UF "TO" { AMP -t-.47UF@25V LEAVE PIN-A OPEN. ALL PARTS WILL BE SUPPLIED. Figure A2.6 Clock-Regulator 77 Al > Bl> Cl> Dl> El> XI > Yl > A3> B3> C3> D3> E3> X3> Y3> O ;0 »IQ, »IQi >IQi o >IQ< ■>IQ, THREE IDENTICAL CIRCUITS I> n> PARTS 6-SN74HIIN NOTES LEAVE PIN-A OPEN. ->ZI ->zir ->zm GND> + 5V> I <§> .47UFG25V jAMP Figure A2.7 Five Bit And Gate* 78 ->A0 FOUR IDENTICAL CIRCUITS ID>- 2D>- 3D>- 4D> 6D> 7D> ->DO GND> 22 + 5V> ■® rAMP -.47UFG25V PARTS 4-SN7430N NOTES - ID 4 >- CL CLKI >■ CLK4 >- JZ SS 74 40 b Q 4D,^ 4D A >- 0) m CL S- CL i C, FOUR IDENTICAL CIRCUITS a 0) rz CL GND >* + 5V £ -r\s- -T-© j 47UF 47UF®25V JAMP LEAVE PIN-A OPFM C,= C 2 =A; C S =C 4 =B. ■* 10, O ->iq 4 -» Gl PARTS 2-SN7420N 8-SN7474N I-SN7440N ■-> 40, 40. -> G4 Figure A2.9 Four Bit Latched-Or 80 Hh3900PF ~9" iOif 1300 PF Cl> C2 > C3 > C5 > C6> C7> "9 16 II B 3 Al A2 a (p r| h 360 PF <§E 9 10 II Al A2 B Q a i f* C4 > i T7C »CL7 »CL4 GND^ 22 + 5V> T -<§> .47 UF®25V 4- AMP PARTS I9-SN74I2IN 19 -CAPACITORS NOTES LEAVE PIN-A OPEN. ALL CAPACITORS ±5%, SILVERED MICA, WILL BE SUPPLIED. THERE IS NO OUTPUT "T45". Figure A2.10 Pulse Delays 81 SRI >- CLK>- SR2^ T fO ^DS ^=D w- ^o xss>- ID, >- CL I -> IQ, 2D, >■ CL 1 ■* 2Q EIGHT IDENTICAL CIRCUITS EIGHT IDENTICAL CIRCUITS ? ID " D P Q -> J 8 CL C K, ? 2D ^ D P Q > L. CL C 5 K 2 »2Q, GND^ + 5V > 2a - / \, — XAMP -J-.47UF8 25V SR2> SR3> CLK> GND> ♦ 5V> 22 -*\s- -® rb.47UF*25V AMP -CD ID,> ID«> 9 9 i D P Q EH D P Q ; E- CL C Q CL C Q & i \k THREE IDENTICAL CIRCUITS ♦ 10, >IQ« 3D,> 3D B > 0-CL D £ Q E] D [c}-CL £ Q El »3Q, *3Q. NOTES LEAVE PIN-A OPEN. D,-D 3 «X-, D 4 »D 9 «Y. fttRTS 8- SN7474N I-SN74HIIN I-SN7440N Figure A2.12 Five Bit Clock-Anded Latches 83 I* * 666 <§>:© Hh' 0000 £ ■HHi' HHi' HHi A 0000 S HHi- HHi' HHi' A « OD < 03 (MM fl PO AAA logo ¥ aA ■HHi- HH' o •t-l bO o ■u z 2Zz 5 § f NN K^ ~-^ zzz ZZ 0) (/)"> 1, 3 « M 0) * -t**S. 5^ ro CM < a; u 3 too •H 84 In 75 PF ®" 9 10 II Q > Al A2 7T ,_> B > BIO > BIO" B6>- Al>- EI6HT IDENTICAL CIRCUITS la 75 PF ©" ©" 9 10 II Al A2 B In 75 PF 9 10 II Al A2 B FOUR IDENTICAL CIRCUITS -> B8Q -> B8Q ■> AIQ -> Al5 MDg kzg; ® » xls » 55 - xss *• ss -- GND >- + 5V > 22 ®— *-B n 75 PF 9 10 II Al A2 -r^r- -© .47UF0 25V -© ■» A4Q ■> A40" NOTES LEAVE PIN-A OPEN. ALL CAPACITOR ±5%, SILVERED MICA, WILL BE SUPPLIED. PARTS I2-SN74I2IN 12- CAPACITORS 2-SN7440N Figure A2.14 Timing 100 85 TENX ELEVEN > )URTEEN> FOUR> FOUR •* GND >- + 5V >-22_ 1 Tn 33 PF 9 10 II Al A2 B dy^- Q !— <2> ±.47UF®25V i AMP W NOTES THREE -> THREE PARTS LEAVE PIN-AOPEN. 9- SN74I2.N ALL CAPACITORS t 5%, SILVERED 9-CAWCIT0RS MICA, WILL BE SUPPLIED. I-SN7440N Figure A2.15 Timing 350 86 B > E >■ G > H > J > K > M>- N> P>- Q> T> U2- X> GND> + 5V> 22 I> G> G> G> G> ^O 2ED ^3 W=T~) <§> .47UF:±@25V yAMP >M ->C -> F ->l ->L ->0 ->R ->V ->Y PARTS 3-SN74HIIN NOTES LEAVE PIN-A OPEN. Figure A2.16 And Gates w >- FIVE^ D5^ 35^ Dl >-J- DZ>- D3>- 04 >- : ^> CL CL CL -=^y CL o CL 0" — | 87 03 k 04 » 05 GND^ ♦ 5v£ -L y«-T| IC 47UF@> 25V -r\j ^AMP ^D PARTS: 3- SN7474N 2-SN74HIIN I-SN7440N NOTES: LEAVE PIN-A OPEN. ON SN7474N-TIE ALL PRESETS TO Q Figure A2.17 Five Bit Detail Latch 88 O u o 00 r-l < 0) »-i 3 too •H 89 HW > 6o>- SKY >- WATER >- Ro>- 5UH«f BARN * 5 >- AOIB -6 CLOUD * m ^> cw > ICE <■ W D > BL > GRASS > DIRT > 4> —a ROCt C/W > GND>— k>- — r>o- + 5V > TAMP T 1 -® 47UF€»25V -© :^3 ^S 4 » GRASS ^o ■> SN/SA » DIRT » ROCK *■ SNOW -< WARM ,pCt?n ■> SAND : THIRTEEN IFTEEN * CLI3I5 NOTE: LEAVE PIN -A OPEN. PARTS 6- SN74HIIN 5-SN7400N 2-SN7404N I-SN745IN Figure A2.19 World Model II 90 A3.0 SYSTEM PARTS LIST In this section a list is provided of those major parts of EIDOLYZER not defined in the text. A3.1 SLIDE PROJECTOR Kodak Carousel 750 Slide Projector - with remote control and remote focusing - without lens • A3. 2 PROJECTOR LENS Buhl Optical Co. lens - Catalog Number 475-60 - 1.4" focal length - f:3.0. A3. 3 SCREEN Polacoat, Inc. plastic, rear-projection screen - Catalog Number LS 40 PL 116. A3. 4 POWER SUPPLIES Lamba Electronics Corp. - (Catalog Number LM-CC-12 - 12 volt supply with maximum amperage of 7 . 3A at 40°C) - (Catalog Number LM-F-5M - 5-volt metered supply with maximum amperage of 48. 0A at 40 C). A3. 5 CONSTRUCTION PAPER Color-Aid paper - Brown = "RO Shade 3" - Green = "GYG" Hue - Blue = "BT1" - Red = "RO Hue". (White can be any white paper.) A3. 6 OUTPUT DISPLAY Industrial Electronic Engineers, Inc. - Catalog Number 280 - Series 280. Status Indicator - common ground - #47 lamps. 91 A4.0 TESTING PROCEDURES The design of EIDOLYZER incorporated severe! ideas which have direct and indirect effect on testing possibilities. For example, the upper small tab on the large (9 1/2 „ x u „ ) pr . nced ^^^^ ^ ^ only has the same outputs as the other small tab (which connects via a cable to the rack), but also + 5V and ground. This means that a small card with lamp drivers and lamps can be connected to the board "hile it is in operation, and a simple visual check of the outputs of testing of the large boards and remains a valuable diagnostic tool. Another testing device which was used in the construction of EIDOLYZER is a large switch box which was initially used to simulate the outputs of the sixteen large boards. The box contains sixteen tabs onto which the cables fro, the rack can connect and a simulated land- scape can be obtained by setting the various switches to + 5V or ground This box would also be a powerful diagnostic tool in helping to isolate any potential problems with minimum searching. As mentioned in ChaDtpr ? -n- „-, ^napter 3, it was necessary to handpick each resistor which formed voltage dividers with aach of the 768 photocells The values of these resistors are a direct function of the resistance of the photocells with various lights impi„ g i ng> so that reslstance readings on every photocell must be taken to compute the corresponding resistors. To expedite this process test pins were inserted on the large board to allow one to connect an alligator clip of a lead from an ohmeter. The other lead is connected to ground. 92 One final facet of this testing problem is in the overall approach to the problem of dividing the large subsystem into printed circuit boards. Major emphasis was placed on alleviating diagnostic routines and repair procedures. For example, a number of flip-flops could have been eliminated from the design (albeit a small percentage of the total), but their presence served to isolate one data processing section from another. Furthermore, in the interests of simplifying the system, whenever possible the same circuit cards were used in different places. This resulted in a very few wasted circuits but proved worthwhile in view of the much easier fabrication techniques required in the printed circuit facility and repetitive wiring which resulted - this latter is a positive factor because it reduces the number of different instructions needed to have the racks wired. 93 LIST OF REFERENCES 8 9 10 11. 1. Mintek ^ M '_ 3 ;;Steps toward Artificial Intelligence," 1961, IRE, ^ ^^lutlWI^d^ul 01 ^ ° f ^^-c-." 1950, London: " "ew^: "££*£ *XT - — " 1967, 4 ' GUyt0 phit de i T h eXtb0 °" ° f , Medical Physiology," 3rd Edition, 1966 Philadelphia: Saunders. *■*«"> , 5. Schroder, Harold M., Driver, Michael J. and Streufert Siesfried ^S rt "^^JTS^ 1967 ' NewYorkf «°" ^ Reitm Wi{ey'and SonT^ " "* Th *" ^> New York: John 7 ' ^^oh/wil^td^ols^ 6 NerV ° US SyStem '" 1967 ' "* *«* Poppelbaum, W. J. AEC Proposal. 1 469-Po PPfi lhp„ m 1969. Ray, S. R. and Preparata, F. P. "An Approach to Artificial Nonsymbolic Cognition," CSL Report^ R-478, July, WyS. QUiU S i ^'l M ;- R - p" The Teachable language Comprehender: A Vol 12 10 No « 8 T 3nd T ^ 0ry ° f Lan ««a8e,« Conun. of th. ACM Vol. 12, No. 8, August, 1969, pp. 459-476. '""v^-S^No'TT^^ 10 " AS —y," Proc. IEEE . Vol. 57, No. 8, August, 1969, pp. 1408-1418."" 94 VITA Arthur Simons was born in Philadelphia, Pennsylvania on May 29, 1944. He graduated from Central High School, Philadelphia, Pennsylvania in 1962. In 1966 he received his B.S. in Electrical Engineering from the University of Pennsylvania. Mr. Simons continued his education at the University of Illinois in September of 1966. At that time he joined the Circuit and Hardware Systems Research Group of the Department of Computer Science under Professor W. J. Poppelbaum. He has been employed by the Department of Computer Science as a Research Assistant in that group since September of 1966. He received his M.S. in Electrical Engineering in June of 1968 and since then has continued to work under Professor W. J. Poppelbaum toward a Ph.D. degree. During the summers of 1968 and 1969 he was employed by the Radio Corporation of America as a member of their summer intern program. He is a member of Eta Kappa Nu and Sigma Tau. Unclassified Security Classi fication DOCUMENT CONTROL DATA - R&D (Security classification o f Mil,, body „/ mbmlrmet and indexing annotation mu „ b . entered „*,.„ eh. overall report I. classified) 1 ORIGINATING ACTIVITY (Corporate author) ' Department of Computer University of Illinois Urbana, Illinois 61801 3 REPORT TITLE 2a. REPORT SECURITY C L ASSIFIC A TION Unclassified 26 GROUP EIDOLYZER: A Hardware Realization of Context -Guided Picture Interpretation 4 DESCRIPTIVE NOTES (Type ol report and Inclusive dates) Technical Report, Ph.D. Thesis 5 AUTHORfS; (Last name, first name, Initial) Simons, Arthur i REPORT DATE June, 1971 >•• CONTRACT OR G.RA.N,T N US Navy 6. PROJECT NO. US Navy* 5o611-o7-A-0305-0007 0. A VA ILABILITY/LIMITATION NOTICES June, 1971 7» TOTAL NO. OF PACES 97 76. NO. OF REFS 10 9a. ORIGINATOR'S REPORT NUMBERfSj 96 thla"*** rtf PORT NO(S) (Any other numbers that may be assigned I. SUPPLEMENTARY NOTES 1 ABSTRACT t2. SPONSORING MILITARY ACTIVITY Office of Naval Research 219 South Dearborn Street Chicago, Illinois 6060h The completion of EIDOLYZER is considered a major breakthrough in the use of a simplified world model" to the recognition of colored landscapes. The idea is to decompose the incoming picture into a series (16:) horizontal bands and to determine for each one of the majority color . Adjacent bands having the same majority color are collapsed into regions and a "world model" (in the form of a dictionary") contains such information as "if the top region is blue, humans call that "sky". After assigning names to the regions, interruptions are analyzed. A white interruption of the sky is called cloud , etc.: The operator can dial- in his personal prejudices by pushing buttons marked "hot" and "cold" and the like. What is called "sand" when hot , might be called "snow" when "cold". In actual operation the "intelligence" of EIDOLYZER is absolutely uncanny. aij. that proves, of course, is that humans use very simple clues when they interpret picture postcards of landscapes: FORM 1 JAN 64 1473 Unclassified Security Classification Unclassified Security Classification 14. KEY WORDS Pattern Recognition Cognitive System Picture Interpretation LINK A ROLI *T LINK C INSTRUCTIONS \. ORIGINATING ACTIVITY: Enter the name and address of the contractor, subcontractor, grantee, Department of De- fense activity or other organization (corporate author) issuing the report. 2a. REPORT SECURITY CLASSIFICATION: Enter the over- all security classification of the report. Indicate whether "Restricted Data" is included. Marking is to be in accord- ance with appropriate security regulations. 26. GROUP: Automatic downgrading is specified in DoD Di- rective 5200. 10 and Armed Forces Industrial Manual. Enter the group number. Also, when applicable, show that optional markings have been used for Group 3 and Group 4 as author- ized. 3. REPORT TITLE: Enter the complete report title in all capital letters. Titles in all cases should be unclassified. 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