DOC. P 207. 208/ j 026/2/985/' v.1 DEPOSITORY! DATA SYSTEMS TECHNICIAN 3&2 VOL. Wsowd UNivttxo. 1 1 or iLUNl NAVAL EDUCATION AND TRAINING COMMAND RATE TRAINING MANUAL AND NONRESIDENT CAREER COURSE NAVEDTRA 1 0201 -B 2 Although the words "he", "him", and "his", are used sparingly in this manual to enhance communication, they are not intended to be gender driven nor to affront or discriminate against anyone reading Data Systems Technician 3 &2 Volume 1, NAVEDTRA 10201 -B2. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAICN STACKS PREFACE This Rate Training Manual and Nonresident Career Course (RTM/NRCC), \Data Systems Technician 3 & 2, NAVEDTRA 10201-B2 (of which this is volume 1 of two volumes), is intended to serve as an aid for personnel who are seeking to acquire the theoretical knowledge and operational skills required of candidates for advancement to the rate of Data Systems Technician Third and Second Class. This volume contains information on security, general maintenance, test equipment, the NTDS Unit Computer (CP-642-B/USQ-20(V)), and NTDS Peripheral Equipment. Volume 2, NAVEDTRA 10201-C, is classified CONFIDENTIAL and contains information on NTDS Display (AN/UYA-4), NTDS Transmission Equipment, NTDS Interface and Conversion Equipment, NTDS System Operation and Testing, Basic Data Processing Systems, and the NTDS Model IV Conversion. This training manual and nonresident career course was prepared by the Naval Education and Training Program Development Center, Pensacola, Florida, for the Naval Education and Training Command. Special credit is given to the following commands for their reviews during the preparation of the manual: Fleet Combat Direction System Training Center, Pacific; Fleet Combat Direction System Training Center, Atlantic; Naval Sea System Command, Washington, D.C.; Combat Systems Technical Schools Command, Mare Island; U.S.S. America (CV-66); U.S.S. Ranger (CVA-61); and U.S.S. Dalhgren (DDG-43). Revised 1978 Updated 1982 Reprinted 1985 Stock Ordering No. 0502-LP-05 1-0060 Published by NAVAL EDUCATION AND TRAINING PROGRAM DEVELOPMENT CENTER UNITED STATES GOVERNMENT PRINTING OFFICE WASHINGTON, D.C.: 1978 THE UNITED STATES NAVY GUARDIAN OF OUR COUNTRY The United States Navy is responsible for maintaining control of the sea and is a ready force on watch at home and overseas, capable of strong action to preserve the peace or of instant offensive action to win in war. It is upon the maintenance of this control that our country's glorious future depends; the United States Navy exists to make it so. WE SERVE WITH HONOR Tradition, valor, and victory are the Navy's heritage from the past. To these may be added dedication, discipline, and vigilance as the watchwords of the present and the future. At home or on distant stations we serve with pride, confident in the respect of our country, our shipmates, and our families. Our responsibilities sober us; our adversities strengthen us. Service to God and Country is our special privilege. We serve with honor. THE FUTURE OF THE NAVY The Navy will always employ new weapons, new techniques, and greater power to protect and defend the United States on the sea, under the sea, and in the air. Now and in the future, control of the sea gives the United States her greatest advantage for the maintenance of peace and for victory in war. Mobility, surprise, dispersal, and offensive power are the keynotes of the new Navy. The roots of the Navy lie in a strong belief in the future, in continued dedication to our tasks, and in reflection on our heritage from the past. Never have our opportunities and our responsibilities been greater. u CONTENTS CHAPTER Page 1 . Advancement and Security 1 2. Maintenance 14 3. Test Equipment 48 4. NTDS Unit Computer (CP-642B/USQ-20(V)) 79 5. NTDS Peripheral Equipment 142 APPENDIX I. An Abbreviated Guide to Electronics Abbreviations 230 II. Introduction to the Navy Electricity and Electronics Training Series (NEETS) 233 III. Partial Listing of Positive and Negative Powers of Two 235 INDEX 236 Nonresident Career Course follows Index in CREDITS Preparation of this manual was aided by the cooperation and courtesy of McGraw-Hill, Inc. This company furnished the Glossary of Terms appearing in Appendix I. AMP and TERMI-POINT are trademarks of AMP Incorporated, Harrisburg, Pennsylvania, U.S.A. Permission to reproduce written material should be requested from AMP Incorporated, P.O. Box 3608, Harrisburg, PA 17105. IV CHAPTER 1 ADVANCEMENT AND SECURITY This training manual has been prepared for military personnel of the regular Navy and the Naval Reserve. It is intended as an aid to advancement in rating, and as a source of information on the various aspects of the Data Systems Technician (DS) rating. The professional standards used in the preparation of this manual are contained in NAVPERS 18068 (series), Manual of Navy Enlisted Manpower and Personnel Classifications and Occupational Standards. It is recommended that the Data Systems Technician Section of Occupational Field 12, Data Systems, NAVPERS 18068, be studied for an understanding of the various skills and knowledge required of a technician in the DS rating. This manual systematically covers several digital systems maintained by the DS rating. The Data Systems Technician is normally assigned to the role of performing intermediate level maintenance within his assigned system. In this way he supports the activities of the operator ratings working with the same equipment, notably the Data Processing Technicians (DPs), Operations Specialists (OSs), Intelligence Specialists (ISs), and Radiomen (RMs). In some cases, the DS may also be assigned to operator duties and even assist programmers or perform programing duties as part of his job. This manual is too limited to deal with all aspects of the DS rating. Of the many data processing systems in use by the Navy, only a comparatively few can be presented in sufficient detail to be instructive. The Data Systems Technician is responsible for more than the individual equipment that make up his system. He is responsible for the various equipment interfaces that exist when these different units of equipment are combined into a single system. It is essential that the DS become aware of these system concepts and learn to identify the individual equipment that may be responsible for abnormal system performance. Naturally, system concepts vary from one system to another. Most details of system operation come only from long experience with an individual system. Yet this is still a key area that has to be touched on in some detail. As a result, this manual will cover systems, the equipment in several systems, and the interface (system concepts) that should be apparent in most of the installations of those systems. In order to thoroughly understand this material, the DS must already be familiar with the contents of the Navy Electricity Electronics Training Series (NEETS), NAVEDTRA 10087 (series) Basic Electronics, Volumes I and II, and NAVEDTRA 10088 (series) Digital Computer Basics. Refer to NAVEDTRA 10052 (series) Bibliography for Advancement Examination Study for the applicable NEETS modules and Basic Electronics chapters for paygrades E-4 and E-5. SECURITY Security is a general term that covers such things as barring unauthorized personnel from access to restricted areas, preventing information of a classified or restricted nature from finding its way into unfriendly hands, and being able to account for the storage, movement, and receipt of material of a classified or restricted nature. Most individuals in the technical ratings, such as Data Systems Technicians, are conscious of security in terms of classified written data that must be maintained under lock and key when not in use. All classified material will fall into one of three groups: Confidential, Secret, or Top Secret. Equipment, or portions of equipment, or applications of equipment may DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 also be classified as Confidential or higher, though, in general, most of the equipment covered by the DS is considered unclassified. A rule of thumb is that the equipment itself and the existence of programs for certain applications are generally unclassified unless noted otherwise. The exact nature of operational programs, their past, current, and future use in terms of scheduling or situation response, and the contents of the data base (retained data) and the data inputs and outputs are all generally regarded as classified unless noted otherwise. The Data Systems Technician can talk about what he does as part of his job, but he cannot talk about what his system does when it is doing its job, unless the system application is unclassified, or the listeners are cleared for and have a need for that information. Handling of Classified Material All classified documents must be handled according to the highest classification of their contents. Frequently, documents will be composed of paragraphs of different classifications. A preceding letter in parentheses indicates the highest level of classification for the contents of that paragraph, i.e., (U) for unclassified, (C) for Confidential, (S) for Secret, and (T) for Top Secret. Classified documents also require a stamp at the top and bottom of each page showing the highest classification for the contents of that page. The entire document must be stamped on both the front and back covers, (top and bottom) with the highest classification in the contents. A lower classified portion that is removed from a text containing information of a higher classification can be restamped to the lower classification. Figures and tables have a preceding ( ) containing a classification marking to indicate the classification of the contents, and a trailing ( ) containing a classification marking to indicate the title classification. Burning and powdering of the ashes, or mulching are accepted ways of disposing of Confidential material. This material is not singled out in this text. A determination of which material does not require Confidential handling can usually be made by referring back to the appropriate technical manual, or by consulting with the division officer or security officer. The rule-of-thumb given previously generally applies. Other Types of Security Security should also have another meaning to the DS. As a maintenance technician, he has access to equipment valued at many thousands of dollars. His system may be valued at upward to several million dollars. It is his responsibility to provide a reasonable amount of assurance that his equipment is not tampered with by unqualified personnel. He should safeguard his spaces and only allow visitors who are escorted, and then only when the nature of the visit is clearly understood. The DS also has the responsibility of safeguarding his tools and test equipment. These items were assigned to his care and responsibility, and the frequent loss, theft, misplacement, and abuse of tools clearly suggests that too many technicians are not doing their part in safeguarding and preserving tools for future use. In an effort to improve the safeguarding of tools and test equipment, a system of accountability should be instituted where the responsible individual is is clearly identified. Tools that are borrowed or loaned should be signed for, and signed for again on their return. In this manner it is always possible to trace the movement of missing tools and test equipment, and, hopefully, to secure their return. When not in use, tools and test equipment should be locked up. Chapter 1 -ADVANCEMENT AND SECURITY SYSTEM COVERAGE Over half of the DSs in the Navy are assigned to NECs (Navy Enlisted Classifications) associated with the NTDS (Naval Tactical Data System). Not all of these DSs are actually working with the NTDS, but they are at least familiar with some of the equipment used in NTDS. This is the largest single grouping by systems that exists for the DS rating at present. To cover system concepts, it is necessary to cover a system, and NTDS is the logical choice for that system. There are several other reasons for selecting NTDS as a representative system, and these include: (1) NTDS is a system of considerable importance in the Navy, (2) NTDS is a large system in which many individual equipment units and system concepts can be covered, (3) NTDS is a real-time system, one of two primary system distinctions covered in this text, and (4) NTDS is a valid concept, so much so that the equipment in the system installations are being refurbished for an anticipated additional lifetime often years or more. It is realized that individuals working with the equipment and systems covered in this text have an additional advantage over individuals who do not. This is unfortunate, yet unavoidable. The only way this situation could be avoided entirely would be to develop and work with a hypothetical system. Even if this approach could be used, some individuals would protest that it is pointless to cover a system in detail that they would never see, never work on, because it simply does not exist. In itself, NTDS does not represent the whole world of data processing. Chapter 5 of Vol. 2 will deal with other equipment and systems of the Navy that receive DS support. The coverage in this area is not as extensive as that given to NTDS. One reason is that many of the concepts covered in the earlier chapters are still valid, and do not require repeating. Another reason is that some details have been sacrificed in order to permit a broader field coverage. Some systems could not be covered at this time because the information was not available within the time span required for preparing this manual. Other systems were not covered because the percentage of DSs providing support was considered too low, or the system appeared on the verge of a major change with no concrete details of what the final status would be. CHAPTER CONTENTS A brief summary of the contents and an explanation of why that material is included is presented for each chapter. VOLUME 1 CHAPTER 2. -This is the maintenance chap- ter. There are certain things that become gener- alized (troubleshooting, repair, etc.) which can then be considered apart from their source. An effort is made to collect a representative group of these generalities, which can then be used to fur- ther analyze the maintenance role of the Data System Technician. Troubleshooting, for instance, is usually either tracing malfunction symptoms back to their probable causes, or attempting to change those symptoms by physical changes in the circuitry. Repair involves the development of a number of skills, and the use of these skills vary from one repair job to another. The factors that govern these decisions are discussed in chapter 2. CHAPTER 3. -This is the test equipment chapter. A number of test equipment types have been firmly adopted into the DS field, and this chapter deals with these. A number of newer equipment types have also made their appearance in the civilian world, but have not been accepted into the Navy community at this time. While these may be mentioned at different points in this text in terms of their capabilities, they are not included as a part of this chapter, since their use at present is confined to the civilian world. CHAPTER 4. -The heart of every computerized system is the computer, processor, central processor, or whatever it may be called. The NTDS, which has been selected as the vehicle by which system concepts will be taught in this text, is built up around one of a number of computers. These include the CP-642A, the CP-642B, and the newest computer, the UYK-7(V). This text concentrates on the CP-642B computer rather than dealing with the DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 redundant features of the several computer types. Nearly all computer types are broken down into five main functional groups as covered in NAVEDTRA 10088 (series) Digital Computer Basics. The CP-642B computer is being covered in addition to the CP-789 com- puter that is covered in NAVEDTRA 10088 (series), because, first, the CP-642B has many times the processing capabilities of the CP-789, and second, the CP-642B computer is also the central computer of several other systems covered in the final chapters of this manual. CHAPTER 5. -Peripheral ("side") equipment is that equipment used to extend the basic capabilities of the computer. Peripheral equipment includes a wide range of equipment types, such as keyboards, displays, paper tape readers and punches, magnetic storage devices, optical readers, printers, and many others. In this text, for NTDS, a restricted definition of peripheral and input/output (I/O) devices is introduced, because the peripheral equipment provided for NTDS does not include equipment covered in chapters 1 through 3 of Vol. 2. VOLUME 2 CHAPTER l.-The display equipment covered in this chapter includes the most common equipment found in the NTDS system, but each NTDS installation is tailored to meet the needs and capabilities of the ship that it is situated aboard. As a result, the presence and quantities of each type of display device on each installation are beyond the scope of this manual. In some cases, older or more recent versions of display devices will appear in various installations in place of the equipment covered here. CHAPTER 2. -NTDS transmission equipment is an area of equipment coverage that in many cases is being handled more by ETs (electronic technicians) than by DSs. However, DSs continue to have responsibilities in this area, and the concept of several systems linked together by the transfer from one system to another is an important system concept in the NTDS world. Therefore, one chapter of this manual is devoted to transmission equipment and transmission principles. CHAPTER 3. -NTDS is not a "stand alone" system, but has numerous tie-ins with surveillance and weapon systems aboard each craft. The interconnection of equipment built to different standards is often accomplished by interface equipment designed for that purpose. The conversion of data from one form to another is often involved, so this chapter is referred to as NTDS Interface/Conversion Equipment. CHAPTER 4. -Programs written for digital systems generally fall into one of two categories. Operational programs are intended to make the computerized system perform some task, other than self-maintenance. Maintenance programs direct system operations inward to checking and analyzing equipment performance against predetermined standards. These programs include methods of communicating the results to operator and maintenance personnel, so that problem areas can be traced quickly and corrected. This chapter discusses some of the program conventions used in NTDS. CHAPTER 5. -NTDS is a real-time system, a term that will be explained in more detail later. Basically it means that the system is designed to provide responses to a situation that is in the process of occurring. In this chapter, the equipment required of a nonreal-time system will be discussed. A nonreal-time system acts on accumulated data, some of which may be taken from a real-time situation, but its responses are more in terms of analyzing, organizing, and simplifying the structure of the accumulated data for increased human comprehension. The features of a nonreal-time system vs. a real-time system are discussed in more detail in both chapters 5 and 6. CHAPTER 6. -This chapter covers the NTDS MODEL IV conversion. Only a few of the major changes are mentioned. All functions of the NTDS are now incorporated in core memory and can be activated simply by placing the consoles in the desired mode. The identification (ID) portion of MODEL IV has many more capabilities than MODEL III. Chapter 1 -ADVANCEMENT AND SECURITY Comments on the scope of this text and the materia] covered can be sent directly to the writers by using the mailing address provided with the correspondence course (NRCC). These comments are read and retained on file. If they include suggestions on areas of the rating that need better coverage, they should also mention document sources for necessary details. If this is done, future errata sheets and revisions will be able to incorporate these suggestions into an improved manual. ADVANCEMENT As the DS advances from one paygrade to another, his responsibilities change. Third class petty officers are considered to be equipment-oriented in their understanding. By the time they have advanced to second class petty officer, they are expected to have absorbed enough system concepts to be true system technicians. Advancement will also bring on certain military responsibilities, such as providing leadership, making essential decisions, planning ahead for contingencies, and coping with personnel problems instead of just equipment problems. As further advancement follows, many technicians find that the areas of management and administration become their full-time jobs, and equipment maintenance is performed by junior technicians. Senior technicians are still able to provide training, advice, and technical assistance when it is required, but the junior technician will find that once he has proven his ability, he will have a great deal of independence and responsibility in his daily work. Good leadership results in team effort. Team effort is the key to good maintenance; so it is essential that leadership qualities be developed along with technical competence. Most technicians find that working together in pairs produces excellent results. Different ideas can be exchanged and improved. One technician can be working at the equipment itself while the other follows his progress in the technical manuals and offers advice. Several of the more difficult processes are simplified by having two pair of eyes to observe and two pair of hands to assist. Then once the problem is corrected, which usually involves gaining a greater insight into the equipment behavior, the technicians involved should share their new understanding with others. A discussion of the entire problem and the various steps taken in finding a solution would act to improve the general background each technician needs to be efficient in. Leadership is not just the ability to lead others, but also to accept the leadership of others and to contribute to the total effort. Good leadership can be found where the individuals accept their roles as part of a team and work together to the same ends. ENLISTED RATING STRUCTURE The two main types of ratings in the present enlisted rating structure are general ratings and service ratings. GENERAL RATINGS identify broad occupational fields of related duties and functions. Some general ratings include service ratings; others do not. Both Regular Navy and Naval Reserve personnel may hold general ratings. SERVICE RATINGS identify subdivisions or specialties within a general rating. Although service ratings can exist at any petty officer level, they are most common at the P03 and P02 levels. Both Regular Navy and Naval Reserve personnel may hold service ratings. THE NAVY ENLISTED ADVANCEMENT SYSTEM Many of the rewards of Navy life are earned through the advancement system. The basic ideas behind the system have remained stable for many years, but specific portions may change rather rapidly. It is important to understand the system and follow changes carefully. NAVMIL- PERSCOM Notices 1418 will normally record any changes that occur. The normal system of advancement may be easier to understand if it is broken down into two parts: 1. Those requirements that must be met before an individual may be considered for advancement. 2. Those factors that actually determine whether or not that individual will be advanced. DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Qualifying for Advancement In general, to QUALIFY (be considered) for advancement, the individual must first: 1. Have a certain amount of time in pay grade. 2. Demonstrate an adequate knowledge of the material in any mandatory rate training manuals. This may be determined by successfully completing the appropriate NRCCs or, in some cases, by successfully completing an appropriate Navy school. 3. Demonstrate the ability to perform all the task requirements for advancement by completing the Personnel Advancement Requirement (PAR) Program, NAVPERS 1414/4. 4. Be recommended for advancement by the commanding officer. 5. Petty officer third and second candidates must also demonstrate knowledge of military subjects by passing a locally administered MILITARY/LEADERSHIP examination based on the naval standards for advancement (from NAVPERS 18068 series). 6. Demonstrate knowledge of the technical aspects of the rate by passing a Navywide advancement examination based on the occupational standards applicable to the DS rate (from NAVPERS 18068 series, those standards listed at and below the sought-for rate level). Figure 1-1 gives a detailed view of the require- ments for advancement of active duty personnel; figure 1-2 gives this information for inactive duty personnel. Remember that the occupational standards are subject to frequent change. Check with the division officer or training officer to be sure that the most recent standards are used. If an individual can meet all of the above requirements satisfactorily, he becomes a member of the group from which advancements in rate will be made. Who Will Be Advanced? Advancement is not automatic. Meeting all of the requirements makes an individual eligible, but does not guarantee his advancement. Some of the factors that determine which persons, out of all those QUALIFIED, will actually be advanced in rate are the score made on the advancement examination, the length of time in service, the performance marks earned, and the number of vacancies being filled in a given rate. If the number of vacancies in a given rate exceed the number of qualified personnel, then ALL of those qualified will be advanced. More often the number of qualified people exceeds the vacancies. When this happens, the Navy has devised a procedure for advancing those who are BEST qualified. This procedure is based on combining three personnel evaluation systems: Merit rating system (annual evaluation and CO recommendation) Personnel testing system (advancement examination score -with some credit for passing previous advancement exams) Longevity (seniority) system (time in rate) Simply, credit is given for how much the individual has achieved in the three areas of performance, knowledge, and seniority. A composite, known as the final multiple score, is generated from these three factors. All of the qualified candidates from a given advancement examination population are then placed on one list, based on this composite figure, the highest achiever first, and so on down to the last qualified person in the population. For candidates for E4, E5, and E6, advancement authorizations are then issued, beginning at the top of the list, for the number of persons needed to fill the existing vacancies. Candidates for E7 whose final multiple scores are high enough will be designated PASS SELBD ELIG (Pass Selection Board Eligible). This means that their names will be placed before the Chief Petty Officer Selection Board, a NMPC board charged with considering all so-designated eligible candidates for advancement to CPO. Advancement authorizations for those being advanced to CPO are issued by this board. Who, then, are the individuals who are advanced? Basically, they are the ones who achieved the most in preparing for advancement. Chapter 1 -ADVANCEMENT AND SECURITY Requirements E-l to E-2 E-2 to E-3 E-3 to E-4 E-4 to E-5 E-5 to E-6 E-6 to E-7 E-7 to E-8 E-8 to E-9 Time in Rate 6 mos. 6 mos. as E-2 9 mos. as E-3 12 mos. as E-4 36 mos. as E-5 36 mos. as E-6 36 mos. as E-7 36 mos. as E-8 School RTC (CO none may advance up to 10% of company) Class "A" for AME, BU, CE, CM, CTA, CTI, CTM, CTO, CTR, CTT, DT, EA, EO, EW, FTB, GSE, GSM, HM, IS, JO, MN, MT, MU, PR, RP, SW, UT Naval none Navy Navy Justice School School School for AGC, for MUCS for LN2 MUC PAR NAVPERS 1414/4 PAR (Personnel Advancement Requirement) must be completed for advancement to E-4 through E-7 none Performance Test Specified ratings must complete applicable performance tests before taking Navywide advancement examination none none Nonresident Career Course and RTM none Required for E-3 and all petty officer advancements unless waived because of completion of Navy school. Courses need not be completed but once; i.e., those who complete the 3 & 2 course for P03 need not com- plete same course again for advancement to P02. Nonresident Career Courses and recommended reading. See NAVED- TRA 10052 (series) Military/ Leadership Examination none none Must be passed before advancement exams for E-4 and E-5 candidates none none none none Examinations Locally prepared tests NETPDC exams or locally prepared test Navywide advancement examinations required for advancement to E-4 through E-7 none Selection Board none none none none Navywide CPO or SCPO/MCPO Selection Board Obligated Service Required There is no set amount of obligated service required either to take the Navywide advancement examination or to accept advancement to paygrades E-l through E-6 All CPO candidates must have two years remaining obligated service to accept appointment to a CPO paygrade Enlisted Performance Evaluation As used by CO when approving advancements Counts toward performance factor credit in advancement final multiple for all E-4 through E-9 candidates CO recom- mendation All Navy advancements require the commanding officer's recommendation for advancement Authorization for advancement Commanding Officer Naval Education and Training Program Development Center authorization required for advancement to E-4 through E-9 in addition to command approval Figure 1-1. — Active duty advancement requirements. 7 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 REQUIREMENTS* El to E2 E2 to E3 E3 toE4 E4 to E5 E5 to E6 E6 to E7 E7 to E8 E8 to E9 TOTAL TIME IN GRADE 6 mos. 6 mos. 9 mos. 12 mos. 36 mos. 36 mos. 36 mos. 36 mos. TOTAL TRAINING DUTY IN GRADEt 14 days 14 days 14 days 14 days 42 days 42 days 42 days 42 days PERFORMANCE TESTS Specified ratings must complete applicable performance tests before taking examination. DRILL PARTICIPATION Satisfactory participation as a member of a drill unit in accordance with NAVMILPERSCOMINST 5400.42 series. PERSONNEL ADVANCEMENT REQUIREMENT (PAR) NAVPERS 1414/4 Personnel Advancement Require- ments (PAR) NAVPERS 1414/4 must be completed for advancement to E4 through E7 •;•■• ••:■:•';:; : : ' ' . rr>W- RATE TRAINING MANUAL (INCLUDING MILITARY REQUIREMENTS) Completion of applicable course or courses must be entered in service record. EXAMINATIONS** Locally prepared tests. See below Navywide examinations required for all E4 through E7 advancements. Military leadership exam required for E4 and E5. , » ^x-;-x-Xv;vx-;-x*x-x-x*x"x*X\-"'"*' :: : x'vx£:£:£xx'£:>£# ■X*X*X\*X*X*'*"-'*'-'*"*'"''**"*""''*'"'""*-*XvX SELECTION BOARD yssri'\'\\\\'y.''\' t ^ Navywide CPO or SCPO/MCPO Selection Board AUTHORIZATION Commanding Officer NA VEDTRAP RODE VCEN •Recommendation by Commanding officer required for all advancements. tActive duty periods may be substituted for training duty. **For E3, NAVEDTRAPRODEVCEN exams or locally prepared tests may be used. Figure 1-2. — Inactive duty advancement requirements. 8 Chapter 1 -AD VANCEMENT AND SECURITY They were not content to just qualify; they went the extra mile in their training, and through that training and their work experience they developed greater skills, learned more, and accepted more responsibility. While it cannot guarantee that any one person will be advanced, the advancement system does guarantee that all persons within a particular rate will compete equally for the vacancies that exist. How to Prepare for Advancement What must a person do to prepare for advancement? Study the occupational standards, work on the task requirements, study the required rate training manuals, and study other material that is required for advancement in the DS rate. To prepare for advancement, the individual will need to be familiar with: (1) the Manual of Navy Enlisted Manpower and Personnel Classifications and Occupational Standards, (2) the Personnel Advancement Requirement (PAR) Program, (3) a publication called Bibliography for Advancement Examina- tion Study, NAVEDTRA 10052 and (4) applica- ble rate training manuals. The following sections describe them and give some practical sugges- tions on how to use them in preparing for advancement. OCCUPATIONAL STANDARDS The Manual of Navy Enlisted Manpower and Personnel Classifications and Occupational Standards, NAVPERS 18068 series, contains the rating occupational and naval standards for advancement to each pay grade in section I. Contained in section II are the Navy Enlisted Classification Codes. This manual replaces the "quals manual" and the NEC manual. NAVAL STANDARDS are requirements that apply to all ratings rather than to any one particular rating. Naval requirements for advancement to third class and second class petty officer rates deal with military conduct, naval organization, military justice, security, watch standing, and other subjects which are required of petty officers in all ratings. OCCUPATIONAL STANDARDS are requirements that are directly related to the work of each rating. Both the naval requirements and the occupational standards are divided into subject matter groups. The candidate is required to pass a Navywide military /leadership examination for E-4 or E-5, as appropriate, before he takes the occupational examinations. The military/leadership examinations are administered on a schedule determined by the commanding officer. Candidates are required to pass the applicable military /leadership examination only once. Each of these examinations consists of 100 questions based on information contained in Military Requirements for Petty Officers 3 & 2, NAVEDTRA 10056 (series), and in other publications listed in Bibliography for Advance- ment Examination Study, NAVEDTRA 10052 (series). The Navywide occupational examinations for pay grades E-4 and E-5 contain 150 questions related to occupational areas of the DS rating. If the candidate is working for advancement to second class, he should also remember that he may be examined on third class standards as well as on second class standards. NAVPERS 18068 series is kept current by means of any necessary changes. The occupational standards for the DS rating, which are covered in this training manual, were current at the time the manual was printed. By the time this manual is studied, however, the standards for the DS rating may have been changed. Never trust any set of standards until it has been checked against an UP-TO-DATE copy in the NAVPERS 18068 series. Personnel Advancement Requirement (PAR) Program NAVPERS 1414/4 The Personnel Advancement Requirement (PAR) Program is a new program initiated to replace the Record of Practical Factors (NAVEDTRA 1414/1). The former "quals" were stated in terms of practical factors and knowledge factors. The DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 new occupational standards, are presented only as task statements. This new format of the occupational standards does not lend itself to the practical factor checkoff list concept of the Record of Practical Factors. As a result, a new form and new concept of determining eligibility for advancement has been developed. The Personnel Advancement Requirement (PAR) (NAVPERS 1414/4) will replace the Record of Practical Factors. This new system allows a command to evaluate the overall abilities of an individual in a day-to-day work situation and eliminates the need to complete a mandatory, lengthy, and detailed checkoff list. The E-8 and E-9 are exempted from the program as there are other means of selection for advancement to these paygrades. The E-3 apprenticeships are so broad as to make the development of a single PAR impractical. Each rating PAR lists the requirements for advancement to paygrades E-4 through E-7 in one pamphlet. It contains descriptive information, instructions for administration, special rating requirements, and advancement requirements in the following sections: Section I — Administration Requirements Section II — Formal School and Training Requirements Section III — Occupational and Military Ability Requirements Section I contains the individuals length of service, time in rate, and a checkoff for the individual having passed the E-4/E-5 Military Leadership Examination. Section II contains a checkoff entry for the individual having completed the Military Requirements Navy Training Course and the applicable Navy Training Course for the rating. Section III is a checkoff list of task statements. Items in this section are to be interpreted broadly and do not demand actual demonstration of the item, or completion of alternate local examination, although demonstration is a command prerogative. Individuals are evaluated on their ability to perform the task whether it be by observation of ability in related areas, training received or, if desired, by dem- onstration. PAR forms are stocked in the Navy Supply System, and listed in NAVSUP publication 2002. Until completed, the NAVPERS 1414/4 is usually held by the division officer. After completion, it is forwarded to the personnel office for insertion in the in- dividual's service record. If personnel are transferred before qualifying in all task requirements, the incomplete form should be forwarded with their service record to their next duty station. They can save themselves a lot of trouble by making sure that this form is actually inserted in their service record before being transferred. If the form is not in their service record, they may be required to start all over again and requalify in the task requirements which have already been checked off. NAVEDTRA 10052 Bibliography for Advancement Examination Study, NAVEDTRA 10052, is a very important publication for any enlisted person preparing for advancement. This bibliography lists required and recommended rate training manuals and other reference material to be used by personnel working for advance- ment. NAVEDTRA 10052 is revised and issued once each year by the Chief of Naval Education and Training. Each revised edition is identified by a letter following the NAVEDTRA number. When using this publication, be SURE it is the most recent edition. 10 Chapter 1 -ADVANCEMENT AND SECURITY If extensive changes in standards occur in any rating between the annual revisions of NAVEDTRA 10052, a supplementary list of study material may be issued in TIPs (Training Information Procedures for E.S.O.'s). When preparing for advancement, check to see whether changes have been made in the standards for the DS rating. If changes have been made, see if a TIPs has been issued to supplement NAVEDTRA 10052 for the DS rating. The required and recommended references are listed by pay grade in NAVEDTRA 10052. If working for advancement to third class, study the material that is listed for third class. If working for advancement to second class, study the material that is listed for second class; but remember that the references listed in the third class level are still testable at the second class level. In using NAVEDTRA 10052, notice that some rate training manuals are marked with an asterisk (*). Any manual marked in this way is MANDATORY-that is, it must be completed at the indicated rate level before an individual is eligible to take the Navywide examination for advancement. Each mandatory manual may be completed by (1) passing the appropriate nonresident career course that is based on the mandatory training manual; (2) passing locally prepared tests based on the information given in the training manual; or (3) in some cases, successfully completing an appropriate Navy school. Do not overlook the section of NAVEDTRA 10052 which lists the required and recommended references relating to the naval standards for advancement. Personnel of ALL ratings must complete the mandatory military requirements training manual for the appropriate rate level before they can be eligible to advance. The references in NAVEDTRA 10052 which are recommended but not mandatory should also be studied carefully. ALL references listed in NAVEDTRA 10052 may be used as source material for the written examinations, at the appropriate rate levels. Rate Training Manuals There are two general types of rate training manuals. RATING manuals (such as this one) are prepared for most enlisted ratings. A rating manual gives information that is directly related to the occupational standards of ONE rating. SUBJECT MATTER manuals or BASIC manuals give information that applies to more than one rating. Rate training manuals are revised from time to time to keep them up-to-date technically. The revision of a rate training manual is identified by a letter following the NAVEDTRA number. A particular edition of a training manual can be identified by checking the NAVEDTRA number and the letter following this number in the most recent edition of List of Training Manuals and Correspondence Courses, NAVEDTRA 10061 (series). (NAVEDTRA 10061 is actually a catalog that lists all current training manuals and courses. This catalog is useful when planning a study program.) Each time a rate training manual is revised, it is brought into conformance with the official publications and directives on which it is based; but during the life of any edition, discrepancies between the manual and the official sources are almost certain to arise because of changes to the latter which are issued in the interim. Always refer to the appropriate official publication or directive. If the official source is listed in NAVEDTRA 10052, the Naval Education and Training Program Development Center uses it as a source of questions in preparing the Fleetwide examinations for advancement. In case of discrepancy between any publications listed in NAVEDTRA 10052 for a given rate, the examination writers will use the most recent material. Rate training manuals are designed to help individuals prepare for advancement. The following suggestions may help in making the best use of this manual and other Navy training publications when preparing for advancement: 1 . Study the naval standards and the occupational standards for the DS rating before studying the training manual, and refer to the standards frequently while studying. Remember, 11 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 the manual is studied primarily in order to meet these standards. 2. Set up a regular study plan. It will probably be easier to stick to a schedule by studying at the same time each day. If possible, schedule all studies for a time of day when interruptions or distractions can be avoided. 3. Before beginning to study any part of the manual intensively, become familiar with the entire book. Read the preface and the table of contents. Check through the index. Thumb through the book without any particular plan, looking at the illustrations and reading bits here and there that appear interesting. 4. Look at the training manual in more detail, to see how it is organized. Look at the table of contents again. Then, chapter by chapter, read the introduction, the headings, and the subheadings. This will present a pretty clear picture of the scope and content of the book. While looking through the book in this way, ask some questions: • What do I need to learn about this? • What do I already know about this? • How is this information related to information given in other chapters? • How is this information related to the occupational standards? 5. Get a general idea of what is in the training manual and how it is organized, then fill in the details by intensive study. In each study period, try to cover a complete unit— it may be a chapter, a section of a chapter, or a subsection. The amount of material that can be covered at one time will vary. If the subject is well known, or if the material is easy, quite a lot can be covered at one time. Difficult or unfamiliar material will require more study time. 6. In studying any one unit— chapter, section, or subsection— write down the questions that occur during study. Many people find it helpful to make a written outline of the unit as they study, or at least to write down the most important ideas. 7. Relate the information in the training manual to knowledge already acquired. When reading about a process, a skill, or a situation, try to see how this information ties in with past experience. 8. When a unit is finished, take time out to see what has been learned. Look back over notes and questions. Maybe some of those questions have been answered. There still may be some that are not answered. Without looking at the training manual, write down the main ideas gotten from studying this unit. Don't just quote the book. If these ideas cannot be expressed in an individual's own words, the chances are he has not really mastered the information. 9. Use nonresident career courses whenever possible. The courses are based on rate training manuals or on other appropriate texts. As mentioned before, completion of a mandatory rate training manual can be accomplished by passing a nonresident career course based on the rate training manual. It may be helpful to take other courses, as well as those based on mandatory manuals. Taking a course helps a person master the information given in the training manual, and it also helps him see how much he has learned. 10. Think of the future while studying the rate training manuals. Work is being done for advancement to third class or second class right now, but some day the effort will be toward higher rates. Anything extra that can be learned now will help both now and later. SOURCES OF INFORMATION Besides training manuals, NAVEDTRA 10052 lists official publications which may be examined. Do not try studying just the sections required, but become as familiar as possible with all publications used. One of the most useful things that can be learned about a subject is how to find out more about it. No single publication can provide all the information needed to perform the duties of the DS rating. Learn where to look for accurate, authoritative, up-to-date information on all subjects related to the naval requirements for 12 Chapter 1 -ADVANCEMENT AND SECURITY advancement and the occupational standards of the DS rating. PUBLICATIONS YOU SHOULD KNOW The detailed information you need for advancement and for everyday work is contained in sources mentioned throughout this text and in a bibliography in the rear section of this manual. Some are subject to change or revision from time to time, some at regular intervals, others as the need arises. When using any publication that is subject to change or revision, be sure to get the latest edition. When using any publication that is kept current by means of changes, be sure to get a copy in which all official changes have been made. Studying canceled or obsolete information will not help. Instead, it is likely to be a waste of time, and may even be seriously misleading. NAVY ELECTRICITY AND ELECTRONICS TRAINING SERIES (NEETS) Of special interest to personnel of electronic ratings (DS, ET, FT, etc.) are the self-study modules of the Navy Electricity and Electronics Training Series (NEETS). Appendix II provides a complete introduction to NEETS. TECHNICAL PUBLICATIONS In addition to the publications mentioned here that would directly assist the candidate seeking advancement, the DSs are required to become familiar with a great many technical documents, including 3M manuals, COSALs, COSBALs, equipment technical manuals, EIMBs, EIBs, Manuals), etc. SOMs (System Operations Equipment technical manuals, PODs, COSALs, and COSBALs are unique to each command. Because of this, DSs up for advancement will not be required to know them in detail in preparing for the advancement exam, except where material from these sources appears in this manual. EIMBs, EIBs, 3M documentation, and manuals or portions of manuals referenced by this text, or given in the bibliography for DSs are valid sources for material used in the preparation of the advancement exams. TRAINING FILMS Training films available to Naval Personnel are a valuable source of supplementary informa- tion on many technical subjects. Training films are listed in OPNAVINST 3157.1 Catalog of Audiovisual Production Products or may be iden- tified using the Defense Audiovisual Information System (DAVIS). DAVIS is a computerized file of Department of Defense (DOD) adopted films. All Installation Audiovisual Centers (IAVC) have access to DAVIS. Copies of training films may be ordered in accordance with the Navy Stock List of Forms and Publications, NAVSUP 2002. When selecting a film, note its date of issue. Procedures sometimes change rapidly, thus, some films become obsolete rapidly. If a film is obsolete only in part, it may sometimes be shown effec- tively if the trainees are shown the changed pro- cedures during or after its showing. 13 CHAPTER 2 MAINTENANCE This chapter is a debarkation point for data systems. In effect, it is like the swimming coach who said, "All right; you were just told how easy it is to learn to swim. Now it is time to get your feet wet." This chapter contains general maintenance information which may not always match up to a given situation. Data systems will be covered in terms of specific equipment and specific applications. It is realized that technicians who have been trained in the areas to be covered have an advantage, but there are enough areas covered that no one has a total advantage. The importance of stressing specifics is well-known. This text must commit itself to one system in order to reach a level where both specifics and generalities can be stressed. The logical choice is the Naval Tactical Data System (NTDS), with emphasis on the AN/UYA-4(V) display subsystem of NTDS, rather than the older equipment of the AN/SYA-KV), AN/SYA-4(V), and AN/UYA-1 (V) display subsystems. The NTDS is the primary computerized system supported by the DS rate. It is the data system involving the most DS NECs, the system the Navy has the greatest commitment to, and the system with the greatest percentage of DSs assigned. It is also a system that provides a sufficient variety of equipment types so that a thorough exposure to the data systems field is possible. To round out the subject area, the text will depart from NTDS in the final chapters of Vol. 2 to provide a glimpse of the non-NTDS equipment and systems. The remainder of this chapter will deal with the additional skills and knowledge required by the technician. It will also mention source material that is available to the technician. Many technicians carry a pocketsized note book into which they enter bits of information they may need later. It might be a good idea to begin one at this point if one has not already been started. However, do not attempt to copy information from sources where it can be easily located again. Useful types of information include people's AUTOVON numbers and commercial telephone numbers, equipment designations, hard-to-find stock numbers, where assistance can be found for specific situations, a quarterly ship schedule, a quick reference guide to the contents of various publications, and so on. Transition The Navy is committed to the system concept. Therefore, all equipment must be system orientated. .As new equipment is developed that will perform more efficiently in the system, the less efficient equipment will be replaced, or a new system will be phased in. Integrated Circuits (IC) The integrated circuit is small, fast, long lasting, reliable, with low power requirements, high current capacity (with proper heat dissipation), high temperature stability, and very little heat dissipation. ICs are less expensive to produce than a comparable circuit of discrete components. To the maintenance technician, the arrival of ICs (integrated circuits) means a change in the emphasis on his training and maintenance role. Many of these changes have already begun to be felt. 14 Chapter 2-MAINTENANCE Integrated circuits come in various sizes, shapes, and appearances. They can have any number of pins, and may even have a metal case that is used on some of them as a connector. Some of them dissipate a great deal of heat, and require heat sinks (large finned metal areas) to aid in cooling. ICs with similar appearances often involve entirely different circuits, and must be identified by the numbers printed on them. ICs which appear different may sometimes have the same function, and in some cases one can even substitute for the other. There are tube substitution and transistor substitution handbooks to identify many of the tubes or transistors for which a reasonable substitute exists. The transistor handbook would include all solid-state devices in mass production. Tube and transistor circuits are not compatible, and with only a few exceptions, tubes and transistors are not interchangeable. These few exceptions involve solid-state devices that are designed to replace specific tubes, such as high voltage rectifiers, and require that the solid-state device be designed to be physically and electrically compatible with the tube being replaced. IC "packages" or "chips," as the complete IC with leads attached is usually called, are identified by purpose, method of construction, number of pins, and basic shape, among other ways. Some of the terms associated with the basic shape are flat packs, dual in-line, and TO-5. These shapes and terms were usually introduced by one major manufacturer or another, and have since become standards by which a number of manufacturers have designed their own devices. More and more standardization is coming into the area of packaging, but there are already a large number of styles involved. Problems involving ICs are usually centered around the power supply. Transient voltage spikes, current surges, poor regulation, and voltage variations can cause problem symptoms or actual damage to the circuitry. The use of test equipment, test lead lengths, impedance of test equipment, and added lengths of card extenders may induce secondary symptoms that are not consistent with the actual behavior of the equipment when it is not being tested. These problems increase substantially as switching speeds become faster in the design of certain equipment. When removing and replacing integrated devices, only the proper miniature component repair equipment should be used. Without proper care , there is a strong possibility of damage to the IC device. In handling unmounted chips, care should be taken to avoid differences in voltage potential, as even the slightest static charge could ruin some IC devices. Contact with your hands or tools which are magnetized is an example. A conductive carrier, or a carrier having a conductive overlay, would be used to protect voltage-sensitive ICs. Another important consideration when replacing ICs is the sequence in which the connections are made. The V^ (device supply) connection should always be made before the V ss (ground) is attached. ELECTRONIC SOLDERING One of the problem areas that has surfaced with the widespread introduction of transistor circuits, and the more recent arrival of integrated circuits, has been in regard to the repair or replacement of these much smaller scale components. All factors related to the soldering of solid-state circuitry have much more critical tolerances. Not only are the circuit elements smaller, but the time element has changed. Small circuits heat faster, cool faster, and require an increased speed of work in order to prevent exposure to excessive heat. Improved illumination is required, and often some form of magnification is essential when performing repairs. An increased amount of coordination between the scale of work as viewed under magnification and the hands is a necessary part of miniaturized repair. The technician requires both extreme patience and a strong sense of perfection in order to perform well in this area. He must take great pains to learn to do this work right. Emphasis on Microelectronic Soldering In 1964, the demand for improved electronic maintenance support for aircraft systems led to the establishment of miniature circuit repair training for Aircraft Intermediate Maintenance Departments. By 1969, a second 15 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 program involving a four-week course in miniature and microelectronic repair techniques known as AMRIP (Avionic Module Repair Improvement Program) was established. The Naval air arm had excellent results following the implementation of these programs, with increased aircraft availability and substantial dollar savings. In 1973, the Chief of Naval Material was directed by the CNO to establish a similar program for the remainder of the Naval community. This led to the establishment of the Miniature Electronics Repair Program (MERP) in 1974. In turn the MERP program was replaced by the NAVSEA (Naval Sea Systems Command) Miniature/Microminiature (2M) Electronics Repair Program. Responsibilities and procedures for the 2M program are contained in NAVSEA Instruction 4790.17 (Series). Satisfactory repair of electronic circuits/components under the NAVSEA 2M Program requires approved 2M electronic training, parts, and equipment. The 2M program is designed to provide the fleet with a miniature electronic repair capability, ashore and afloat. Training is provided for two electronic repair skill levels, the 2M miniature elec- tronic repair technician and 2M microminiature electronic repair technician. Members of various electronic ratings (DS, ET, FT, etc.) may be selected as 2M technicians. Successful completion of the applicable train- ing course will result in the certification of the 2M technician for a one year period. 2M inspectors, usually provided from a MOTU (Mobile Technical Unit), provide annual recertification performance testing and training. In addition, sites of the 2M repair station must be certified annually. They must have the proper equipment available in the proper condition and must meet facility requirements (lighting, ventila- tion, noise level, work surface, etc.). SOLDERING COMMON METALS FOUND IN ELECTRONICS.-Copper is the most common metal for conductors, though some demand exists for silver, which is a slightly superior conductor, or for gold, which is more resistive to corrosion, easier to form, and which can be drawn into extremely small diameter wire. Solder can be used on all of these metals. Brass and tin alloys are often used as terminals and connectors and are easily soldered, but steel and aluminum are perhaps the two most common materials used in chassis construction. Steel does not solder well unless properly coated or "plated" with another metal, such as cadmium, and it is virtually impossible to solder aluminum with a tin-lead alloy. Other alloys and fluxes are sometimes available for these and other soldering applications. A different soldering technique and temperature range may also be required. One industrial technique frequently employed is the electrolytic plating of one metal over another, to form a thin outer shell. The results can overcome disadvantages inherent in either metal alone. The outer shell, or "plating," might be a better electrical conductor, more resistive to corrosion, or provide a more durable surface. The inner metal might be a "base" (more common, cheaper) metal, or offer greater strength or ease of forming. In general, electrolytic plating is done for one or more of the following reasons: (1) economic, (2) 16 Chapter 2 -MAINTENANCE endurance, (3) improved electrical characteristics, (4) corrosion resistance, or (5) appearance. With plated metals, it is sometimes possible to provide a satisfactory electrical connection based on the characteristics of the outer metal shell only. In other instances, this may not be sufficient. Cadmium-plated steel (identified by a yellow tint) is frequently found aboard ship, since the cadmium offers good corrosion resistance to a salt-laden atmosphere. FLUXES.— Rosin is a mild, nonconductive salt flux commonly used in soldering electronic circuits. Acid or strong salt fluxes should not be used with electronic circuits since corrosion is sure to continue following the soldering process. Exposed acid can be neutralized, but any absorbed acid, or acid contained in pockets in the solder, will continue to work at bordering surfaces. Even rosin flux should be removed after soldering by wiping tacky or stained surfaces with isopropyl alcohol. Solid solder is solder without a flux core. Flux core solder has a hollow center in which the flux is located in semisolid or paste form. When heat is applied, the paste becomes liquid and flows over the area to which the solder is being applied. Multicore solders are superior to single-core solders since the smaller diameter cores restrict the flux flow and prevent an uneven flow rate, or the draining of flux from a solder length. Five-core rosin solder is usually preferred in electronics. As a general rule, do not attempt to use any single core solder in electronics work if its composition is uncertain, since it is probably an acid core solder. A clean cut through the solder will show what type of core it has. Fluxes also come in liquid, paste, powder, or solid form. The choice of flux depends upon the size of the job and the soldering technique being used. Basic Steps in Soldering The first step in soldering is to determine exactly what the specific soldering job involves. From this, the soldering technique, the soldering compound, the type of flux, the amount of heat, the choice of soldering aids, and other necessary tools must be determined. The technician is taught how to recognize features of a task that indicate a certain technique is best; then, he is given rule of thumb procedures to follow when using that technique. The second step is to prepare the surface for soldering. This includes removing paint or insulation, any oxidation, and forming a strong mechanical link between the surfaces being joined. This mechanical link increases the life of a solder connection and reduces the possibility of fractures which may occur during the plastic stage while cooling. It also provides better heat conduction and distribution via surface conduction which is important in forming a good solder connection. The third step is to apply heat. In electronics, the heated tip of a soldering iron is most frequently used to transfer heat to the prepared surfaces. When this is done, the tip will cool slightly as the surface heats. The length of time it takes to heat the surfaces to be soldered is controlled by a number of physical conditions : (1) Ratio of physical sizes between tip and area to be soldered (2) Initial temperature of the tip (3) Contact surface area through which the heat transfer will occur (size, contour, and cleanliness) (4) Ability of the iron to supply more heat to the tip as the tip begins to cool (measured in watts) (5) Ability of the metal surface to dissipate the heat applied through itself, or to radiate it away The size of the job determines the size of the iron. Also, the size and shape of the tip are determined by the size of the job and the degree of heat transfer efficiency required. Very large soldering irons and all soldering guns have wattage ratings in the hundreds of watts. Very few of these are found around the Data Systems shops, since they are far too large for most applications. Most electrical and electronic soldering is performed with soldering irons rated at about 15-35 watts. Many very small electronic circuits such as integrated circuits and 17 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 some transistorized circuit boards might required soldering irons rated as low as 3 - 6 watts. NOTE: Even small soldering irons will reach temperatures of several hundred degrees, and can inflict painful and even serious burns on unwary individuals. Use extreme care in handling even a supposedly "cold" soldering iron— always hold it by its handle. If the flux is to be applied to the surfaces separately, on large soldering jobs, it is usually applied while heating the surfaces. The flux should liquefy as the surface heats and coat it smoothly. The rosin does not give a clear indication of the heat involved, but when it begins to smoke, this is usually an indication that too much heat is being applied. Another indication is shown when the metal surfaces where the heat is being applied begins to darken, and if the application of heat continues, even for a short period, these areas may turn blue. Care should be taken to prevent this from happening, as the changing color indicates rapid oxidation from extreme heat, and this will hamper the joining process. Overheating is a critical problem with microelectronic circuit repairs. The fourth step in soldering is applying flux and solder. The solder will melt from contact with the tip, but will not flow properly until the surface to be soldered has also reached the right temperature. As soon as sufficient solder is applied, the solder junction should be left to cool slowly. Keeping the iron applied longer than necessary will not harm the solder connection itself, but the heat being dissipated along a wire could alter the electrical characteristics of the insulation, or eventually reach and destroy a heat sensitive component, such as a diode, transistor, or IC. Heat sinks are used to "soak off" (draw off) some of the unwanted heat, and are placed between heat sensitive components and the soldering point. Beeswax-is sometimes applied as an indicator of potential overheating at critical points. The beeswax would be applied to the metal surfaces where heat conduction would most likely occur, and in front of components which could be damaged by heat. The beeswax will melt when temperatures rise at that point, giving a visible warning which must be heeded before further heat conduction affects the components in question. If the melted solder is applied for too long, it will "wick" (act with capillary attraction) its way along the stranded wire, which is widely used in electronic circuits for its flexibility. This wicking action will harden the flexible wire, making it more likely to break. The solder wicking action will also cause heat to flow along that wire. A solder flow running up under the insulation could expose the insulation to high temperature. The insulation may melt, lose its resistance, or end up hiding a break in the hardened wire which can not be seen. Heat sinks are also used in controlling this wicking action. Another technique frequently employed with stranded wire to reduce "wicking" (and to some extent, overheating from prolonged heat application) is a process called "tinning." Tinning involves applying solder separately to the wire and to the area to which it is to be joined. Immediately after being tinned, each is allowed to cool. When brought into direct metal contact, heat is again applied until the solder surfaces melt and flow together, at which point the heat is immediately removed again. Without proper care and properly designed connections, tinning can result in poor mechanical linkages and a large number of fractured solder connections. Sometimes "wicking" is used deliberately as a means to draw excessive solder away from a junction, out along a scrap piece of stranded wire or copper braiding placed there for that purpose. Blowing air on a solder connection to speed its cooling can result in a fracture of the solder caused by the metal contraction of the rapidly cooling exterior shell while the inner portion of the solder is still in an expanded plastic state. While cooling, all components must be held rigidly in place to prevent fractures. The various stages of cooling are noted visually in the following order : (1) "quicksilver"— solder in liquid state (2) "shiny"— outer shell in plastic state (3) "skinned over"— Transformation of outer shell from plastic to solid state (4) "dull"— outer shell in solid state 18 Chapter 2-MAINTENANCE The inner core can generally be assumed to have reached its solid state in about the same length of time as it would take to repeat these four steps. Analysis of the final appearance of a solder connection can disclose the nature of the junction achieved, and details of this analytical process are shown in Module 4 of the Navy Electricity-Electronics Training Series (NEETS). The fifth step in electrical soldering is a visual, then an electrical inspection. The area has to be cleaned of excess flux and excess solder. The solder junction must be inspected carefully for a proper finish. Stranded wires must still be flexible and not stiff. The solder flow must be checked to be sure it covers the area adequately. Then after all this, insulation must be replaced and a resistance check of the circuit made. Finally, the entire circuit should be checked under normal or simulated operating conditions. GENERAL SOLDERING FOOTNOTES.-The probable cause of most soldering failures involves either improper surface preparation or improper heat application. There are many ways to classify soldering techniques. This text refers to only three. These are (1) nonelectrical soldering, (2) general electrical and electronic soldering, and (3) microelectronic soldering techniques. Only microelectronic soldering will be covered by this text, although data systems technicians must know the other areas also. Military Specification Soldering Process, General Specification for, MIL-S-6872B of 14 June 1968, deals with a wide range of soldering applications, most of which are nonelectrical. However, it refers frequently to the specific electrical characteristics of the various solders and fluxes used by the military. The specifications given are mandatory within the Department of Defense, and are very helpful to the technician when attempting an unfamiliar soldering task. MICROELECTRONIC SOLDERING TECHNIQUE REFERENCE.— The document that establishes uniform standards and procedures for the repair of miniature and microminiature electronic components is the Technical Manual Miniature/Microminiature (2M) Electronic Repair Program, NAVSEA TE000-AA-HBK-010/2M (VOL I) Repair Handbook, NAVSEA TE000- AA-HBK-020/2M (VOL II) Workmanship Standards, and NAVSEA TE000-AA-HBK- 030/2M (VOL III) Reference Data. Although this technical manual is intended for 2M repair techni- cians, supervisors, and quality control personnel, it contains valuable information that applies to soldering, PCB's, etc. Soldering Alternatives Despite its several advantages, soldering is not the only means of joining metals together. Reliance on temporary connections using male and female connectors continues, and alternative ways of forming permanent wire junctions in equipment are on the increase. The chief advantage of these alternate methods is the increased use of automated equipment during assembly stages. The technician may also find that he receives several advantages in trying to maintain equipment with solderless techniques. These will be pointed out at the appropriate time. Only two alternate methods, wire wrapping and crimping, will be discussed here. Wire wrapping is the technique most frequently employed in electronic equipment that is not dependent upon solder connections. It is highly regarded for the ease with which the basic technique can be learned and used. It is often considered superior to soldering when in-cquipment repairs or modifications (field changes) are required. In the electrical field and in some electronic areas, the process of crimping has become widely used. It is also somewhat easier to use than soldering. WIRE WRAPPING. -Basically, wire wrapping is simply winding a solid wire tightly 19 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 around a stiff pin to provide a good junction. Equipment using the wirewrap technique have long square pins at the rear of the female connectors used for logic card inserts. These pins are long enough to allow one, two, or even three wires to be wrapped on them individually in separate wraps. (A "wrap" is defined here as a series of turns of a single solid wire about a post.) The female connectors are then interconnected from pin to pin by a small, solid, insulated wire. This insulated wire may or may not be color coded. Machine-wrapped assemblies usually do not contain color coded wiring, while hand-wired assemblies do. (Color coded wire is an advantage in hand-wired assemblies, since each wire becomes more distinctive and fewer errors are likely to result.) In addition, machine-wired assemblies are usually distinctive in their layouts. Wires do not always run point-to-point as usually occurs in hand-wired assemblies. The insulation used on some of the wiring is Teflon, which has the undesirable trait of gradually flowing away from any point of continued pressure— a process described as "cold flow." Teflon -insulated wire in contact with a pin may eventually result in an intermittent short occurring at that point. Meline (another insulating material which is more resistive to cold flow, but which does not have the very high temperature characteristics of Teflon) has become more widely used because of the cold flow problem. The principle behind wire wraps is a simple one. In order for proper conduction to occur between two metals, it is first necessary to penetrate the oxide coating that has formed on both surfaces. The pins used in the wire wraps are squared off, with corner edges that will penetrate the oxide coating of the wire when it is properly wound on the pin. The edges will also lose their oxide coating when they penetrate into the surface of the wire. The junction that is formed is strong, gas-tight (tight enough to seal out gasses, in addition to liquids), and resistive to corrosion. The technique in doing wire wraps is also fairly simple. First, a special solid conductor insulated wire is required. The wire is a composition of a silver alloy with a copper coating, and the insulation is usually either Teflon or Meline. Silver offers an advantage in that its oxide is almost as conductive as the pure metal. Teflon offers an advantage of very high temperature stability and ease of cutting (for stripping by automatic machinery). Meline withstands continued exposure to pressure much better than Teflon. The use of solid conductor wire insures that the coil will form tightly about the pin and remain that way without appreciable slippage. A simple hand tool is required to coil the wire on the pin. A specific length of wire is first stripped of its insulation. The end of the wire is then placed in either a long shallow groove along the barrel of the wire-wrap tool, or inserted in the smaller of the two holes that appear at the end of the barrel (fig. 2-1). The center hole at the end of the barrel is next slipped down over the pin. When the barrel is rotated about the pin, the wire will twist about the pin. As the wire twists about the pin, the stripped portion of the wire that is being held in the groove (or in the other base hole) will next be drawn down to twist and coil around the pin. The barrel of the wire-wrap tool rotates as a result of finger, hand, or motor action, depending upon the tool's design. The coiling action of the wire on the pin automatically lifts the tool sufficiently to continue the wire coil up the pin, provided pressure on the tool is not excessive, as this would cause the coils to "bunch," or overlap. The size of the pin and the size of the wire used require proper size holds (or hole and groove). Wires used in wire-wraps can range from 18 gauge to 30 gauge in size, with pin sizes varying accordingly. The groove (or hole) for the wire is carefully sized to provide the exact amount of tension needed to form a secure wrap when the tool is used properly. The number of turns required to form a satisfactory wrap varies, from four complete turns for 18-gauge wire, to seven and a half complete turns for 30-gauge wire. Wire wraps are normally removed with a wire-wrap removal tool (fig. 2-2). This prevents 20 Chapter 2-MAINTENANCE WIRE ANCHORING NOTCH- WIRE FEED SLOT- STATIONARY SLEEVE ROTATING SPINDLE 4bC3^i TOOL TIP Step 1: STRIPPED WIRE IS INSERTED IN THE FEED SLOT. Step 2: WIRE ANCHORED IN NOTCH PROVIDED. Step 3: WIRE-WRAP TOOL PLACED OVER WIRE-WRAP POST. INSULATED WIRE — | (t! TAIL END- Step 4: SPINDLE ROTATES TO WRAP WIRE ON POST. WRAP- THE COMPLETED WRAP 124.529 Figure 2-1.— Basic Wire-Wrap Procedure. stress and possible damage to the wire-wrap post. However, if it is necessary to remove the wire by hand, the important thing to remember is to unwrap the wire without applying stress to the post. This can best be accomplished by gently uncoiling the wire with a slight rotating movement over the point of the post, and insuring that the manner in which the wire is removed does not cause movement of the post itself (fig. 2-3). If a post is bent, it will probably break when an effort is made to straighten it. If a post breaks, it is necessary first to make sure that the broken length is not left in the wiring to cause possible shorts, and then to take the necessary steps to install a new post. Normally, inner wire wraps are placed near the bottom of 21 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 ■WIRE-WRAP POST ■JAW OPENING WIRE-WRAP NOTES: 1. STRIPPER (WIRE-WRAP REMOVAL TOOL) IS INSERTED WITH JAW OPENING UNDER WIRE-WRAP, AND BASE OF TOOL IS ALIGNED WITH POST HEAD. 2. STRIPPER ACTION CAUSES STRIPPING JAW TO MOVE TOWARD TOOL BASE. 3. TAPER AT END OP WIRE-WRAP POST CAUSES WRAP TO LOOSEN AS WRAP IS FORCED UP THE WIRE-WRAP POST. 4. STRIPPER WILL NOT DAMAGE POST, IF STRIPPER IS KEPT ALI6NED TO THE POST DURING STRIPPER ACTION. 5. WRAP CAN BE REMOVED INTACT WITHOUT NEED OF UNWRAPPING, TO PREVENT POSSIBLE DAMAGE TO THE POST BY UNCOILING ACTION IF OONE MANUALLY. 124.530 Figure 2-2.— Wire- Wrap Removal with Wire-Wrap Removal Tool. the post to insure that additional wraps can be added easily as future needs dictate. If a lower wire wrap must be removed, each wrap above it must be removed first. At no time should a wire wrap be removed by attempting to pull it along its axis (see figure 2-3). Remember, each wrap is easily identified because it is formed from the multiple turns of a single solid wire. However, it is possible to place a number of wraps on a single pin, the number of wraps depending upon the wrap lengths and the pin length. At no time would one wrap be wound directly over another wrap, or would two wires be twisted together and used to form a single wrap. The first method might loosen the gas-tight seal of the inner wrap; while at the same time, the outer wrap would not form a gas-tight seal since there are no sharp angles to break through the oxide coatings on both wires. The second method cannot succeed, since wire-wrap tools cannot maintain proper tension on the twisted wire. Wire- wrap pins can RIGHT WAY TO REMOVE WIRE-WRAP BY UNCOILING IN ACIRCULAR.UPWARD MOTION. WRONG WAY TO REMOVE WIRE-WRAP BY PULLING f 124.531 Figure 2-3.— Method of Removing a Wire Wrap Manually. also be pulled loose in their mounting, causing poor continuity or an open circuit. Personnel must exercise some care when making wire-wrap repairs or changes. When wrapping a wire, a machine or handtool should be used. Figure 2-4 shows some of the types of handtools currently available for this purpose. There are several ways in which wire wraps can be done INCORRECTLY. Here is a list of the most common, which can only be identified visually (figure 2-5): (1) Insufficient tension on wire-results in loose connection (detected by open spaces between adjacent turns) (2) Overtension on wire— results in loose connection (detected by turn overlaps and insufficient surface contact with the pin) (3) Insufficient number of turns (less than five)— poor contact (insufficient wire was stripped first) (4) Insulation does not extend to pin-increased chances of shorts or wire breaks (too much wire was stripped) 22 Chapter 2-MAINTENANCE mm m ■ A. D. PMEt :u 124.532 Figure 2-4.— Examples of Wire-Wrap Tools. (5) Reuse of an uncoiled wrap— each reuse increases likelihood of wire breaks (6) Attempts to wrap by hand— insufficient and uneven tension results in poor contact. A good wire wrap can be identified (fig. 2-5) by four to seven and a half snug turns of wire with the insulation about the bottommost one or two turns, no spacing between adjacent turns, no bunching as one turn attempts to cover another, and no observable nicks in the wire. The number of turns is determined by the wire gauge. Larger diameter wires and pins require fewer turns, and smaller diameters mean more turns. In some equipment, such as the RD-281 Disk File (covered later), the techniques of wire 23 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 A. CORRECT WRAP B. INCORRECT WRAPS INSUFFICIENT TENSION » o> 3 Cft 26 Chapter 2-MAINTENANCE INTEGRATED CIRCUITS EYELET TYPE TEST POINTS DISCRETE COMPONENTS. ,— ADJUSTABLE POTENTIOMETERS. SOME RIBBON RUNS MAY APPEAR ON FRONT FACE. KEY SLOT.WHEN USED, PREVENTS IMPROPER CARD REPLACEMENT. KEY WOULD BE SITUATED AT A DIFFERENT POINT FOR DIFFERENT TYPE LOGIC CARDS. MOST RIBBON RUNS APPEAR ON REVERSE FACE (Not Shown). TERMINAL TYPE REPLACEABLE HOOK TIP USUALLY WORKS WELL ON MOST TEST POINTS SPECIAL PROBE TIPS CAN USUALLY BE SHAPEO FROM PAPER CLIPS OR OTHER SUITABLE MATERIAL CONNECTORS APPEAR IN TWO STAGGERED ROWS. MALE CONNECTOR INSERT. SOME CARDS HAVE INDIVIDUAL TIEDOWN FEATURES. LAST FOUR DIGITS OF CARD TYPE MAY BE PAINTED IN RESISTIVE COLOR CODE FOR EASY IDENTIFICATION (White, Brown, Blue, Yellow For 9)64 At Shown Here). E33> Figure 2-7.— Examples of Logic (Printed Circuit) Cards. 124.535 Some high power transistors require chemical bonding to their heat sinks in order to improve the heat transfer that occurs between them. Special chemicals are required to form these bonds, and other chemicals may be required to remove them. The technician has a responsibility for the equipment that he supports. This includes insuring that these special considerations are understood, that whatever may be required is close at hand, and that the work is adequately performed. Many microelectronic circuits function at extremely high speeds, or utilize square wave pulses which have high frequency components. The high frequency characteristics of these circuits can be seriously affected by either improper component replacement, or improper printed-circuit card repairs. Improper handling or repairs may also permanently damage PCs. A large number of repaired printed circuit boards fail on the first try when reinstalled in the equipment, after having already been passed as being serviceable by poor postrepair testing techniques. Often, such techniques involve resistive or passive (d.c.) voltage checks, and do not check high frequency 27 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 characteristics of the circuit board's components. These must be checked under in-circuit conditions. Others fail very rapidly in service when subjected to environmental stress. The biggest single cause of failures in most cases is an improper soldering technique. Poor testing techniques are the principal reason marginal or bad cards go back into the equipment to create further problems. PRINTED CIRCUIT BOARDS.-The art of developing printed circuit boards has gone in several directions at once. As a result, the data system technician will have to know many types of printed circuit board assemblies. Some boards are soldered into their final connections, while others rely on multipin connectors to complete the hookup. Some boards are single-layered, meaning only one side of the board has a developed pattern of ribbon runs. Others may have their components assembled at such a high density that multilayered boards must be assem- bled together with two or more layered ribbon run patterns cross-connected at different points. In general, the state of microelectronic circuit board repair has advanced sufficiently that a high percentage of any of these circuit boards can be repaired. However, a large number of these boards are thrown away, possibly for lack of training, tools, or both. In some cases, replacing a part in a PC assembly can be more expensive than replacing the entire PC assembly. In other cases, an inefficient repair rate would appear not to justify the replacement cost. Some circuit cards are turned in to a repair facility for repairs, and many of these are done on a direct exchange basis. As the cards are repaired, they are added to the pool that is used to support the exchange system. A limited number of boards are considered classified. These must be handled, stored, and disposed of accordingly. The procedures for disposing of damaged boards should be established by senior personnel according to the guidelines passed down to them. Once these procedures are in force, they should be understood and adhered to by all DS personnel. CARDS.— A card (also printed circuit card or logic card) is a form of printed circuit board with male or female connectors at one end so that the entire board acts as a single plug-in module (see figure 2-7). Equipment requiring a number of cards group the cards together into an orderly arrangement. Each card type is identified by a number, and some cards even show this number in colored bands using the resistive color code (figure 2-8 and table 2-1). This technique makes 2n() l COLOR-COOED 3l(1 >SIGNIFICANT 4|h I FIGURES IMAMMJUUUUUUUU NOTE: THE MOST SIGNIFICANT DIGIT MAT BE DOUBLE WIDTH TO INSURE A PROPER ORDER OF IDENTIFICATION. 124.536 Figure 2-8.— Logic Card Identification by Color Code. Table 2-1.— Color Code Values (Adapted from Standard Color Code) SIGNIFICANT FI6URE COLOR BLACK 1 BROWN 2 RED 3 0RAN6E 4 YELLOW 5 GREEN 6 BLUE 7 VIOLET 8 GREY 9 WHITE 124.537 28 Chapter 2-MAINTENANCE it possible to check the card number, the card type, and from this, the general function of the card by merely viewing the outer edge of the card without removing it. Some manufacturers cut slots, called key ways, into the plug-in side of the card to prevent one card type from being replaced with a different card type (fig. 2-7). The female connector that the card would be inserted into will have a built-up key to match the key way. Card Designations. -Depending upon the equipment design, most cards are installed in one or more plug-in chassis or racks (fig. 2-9). Locating and changing cards is made easier this way. Some chassis are easy to get to. Others are hard to reach when in their normal positions. Any chassis is accessible when the equipment is shut off and opened up, but for best troubleshooting results, the chassis should be accessible when the power is turned on. For equipment which is not accessible at this point, special adapters and connectors (such as logic extension cables) are usually available as troubleshooting aids. An X - Y coordinate system is usually used to show where a specific card is located in the equipment. The row the card is in is usually identified by a letter, and the card is identified by a number. For example, B22 would be row B (2nd row) on a chassis, the 22nd card in that row. This number is not to be confused with the CIRCUIT CARD RETAINERS, TIEDOWN BARS, OR CARO HOLDOWNS. 124.538 Figure 2-9.-OA-7984/UYK Console Logic Chassis Assembly. 29 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 INTER-CHASSIS 'CABLE CONNECTORS ■SAFETY CATCH LEVER TEST POINT BLOCKS- WRENCH FOR CHASSIS REMOVAL- -c- % ROWS— f I M .1 I 1 .1 I I I I I I I I »I1 'I •I"; -I .i I -l -I l i J / nn hi J iHl Ml IJ t| i «JM I -I I I IH H 1 I II M 1 -I il ! I Mill ■E— ■F — i i . i i i i i . .. ■ : "i'i'i-i-i r r i«u inmnuwui i >) I I l I -I I I l l I I I l I l M M I l i i i i • i i i i i i i i i i i i i i I i i I I I I M M I I I I I I II I I ! I I I I I I J f I I I I | ! ! i '; i i ! "i * ~ "• -* j .•.< .<•< jy yj .' JjJJJ •••' It V -CARD POSITIONS- / Figure 2-10.-Logic Chassis A1A1 for RD-270(V)/UYK Magnetic Tape Unit (Removed). 30 124.539 Chapter 2-MAINTENANCE card type number. Larger equipment may have more than one chassis. In this case, a chassis identifier normally precedes the B22, such as A1B22 for chassis Al. Sometimes the equipment is broken up into different subassemblies, in which case both a subassembly and a chassis identifier are required. As an example, A1A1B22 is subassembly Al, chassis Al, row B, card 22 (fig. 2-10). In many logic prints, the A1A1 appears in large type at the right side of the print page, with the B22 indicated in a corresponding logic symbol on that page. Sometimes a circuit indicator precedes the row-card designator. 01B22 would mean the first circuit of card B22, while the logic print page would be chassis A1A1. In each case, there is usually a foreword in the prints which will show what system of circuit designation is being used. There should also be a figure in one of the technical manuals giving the logic chassis designations and where they are located in the equipment. Some circuit cards have test points where test equipment probe tips can be inserted (fig. 2-11). They may be indicated by another designator on the card numbering system, such as B22B. This means test point B of card B22. In some cases, test point B would be the second from the top. In other cases, it may correspond hnnnnnnnnnnnnnr 124.540 Figure 2-1 1.— An Example of Test Point Designation. to a general location on the card. The techniques used for designating 1, 2, 3, or 5 test points are as follows: Method 1 : ^v AAA B Top outer edge of card B C > Test Points D B C E J Bottom outer edge of card The specific technique used with each equipment type is shown in the technical manual. Some circuits either provide no test points, or the test points are not aligned with the outer edge of the card. If there are test points, they are usually numbered by hundreds with the most significant digit corresponding to the circuit number on the card (TP101 and TP102 with circuit 1; TP201, TP202, and TP203 with circuit 2; etc.) (see figure 2-12). In smaller equipment, the test points may be numbered consecutively as they appear in the logic prints, regardless of physical placement. Pin Connections— Most pin connections for logic cards provide an electrical and physical connection between the logic card and the chassis. Some equipment provide card guides and locking or tiedown bars so that logic cards will not suffer intermittent problems as a result of vibrations from the ship's movements (fig. 2-9). There may be 22, 26, 32, 86, or more pins involved on each card, depending upon the design of the equipment. Each pin is uniquely numbered or lettered so that it can be identified. The system of pin designation is in the technical manual, and is the same for every connector of that type in the equipment. Additional information on connector pin designation and cable makeup can be found in NAVSEA 0967-LP-000-0110 EIMB, Installation Standards Handbook, and NAVSEA 0967- LP-000-0140, EIMB, Reference Data Hand- book. 31 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 LEFT HALF TEST POINTS FOR CIRCUIT 2 TEST POINT FOR CIRCUIT 2 Figure 2-12.-Circuit Board A3A1 for AN/USM-281 A Oscilloscope. 124.541 32 Chapter 2-MAINTENANCE Note: cut length of paper clip TO MINIMUM REQUIRED, AND APPLY INSULATING TAPE WHERE NEEDED TO PREVENT ACCIDENTAL SHORTING. +15V -15V (®) (®) GND. -4.5V SIGNAL COUPLING DC LOGIC BIAS AC TRIGGER INPUTS' TEST EQUIPMENT CONNECTIONS 124.542 Figure 2-13.— Examples of Test Block Applications. Test Points.— Most troubleshooting must be traced through the equipment while it is performing some type of redundant operation. To trace a signal with an oscilloscope, make sure that the circuit suspected of malfunctioning is activated. The trace on the face of the cathode-ray tube (crt) will be the composite of repeated pulse trains through the circuit. Some of the newer test equipment have an oscilloscope with logic. These "logic analyzers" as they are called, often use a memory where the basic characteristics of a single pulse can be stored. The logic features can use this information to reconstruct the trace outline, which is then continuously regenerated on the face of the crt. A logic analyzer may even be able to "detect" individual traces that differ widely from the norm. Logic analyzers often 33 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 include other features, but these vary markedly from one type to another, and it is not possible to generalize. To use an oscilloscope or logic analyzer properly, the probe must be attached to a voltage point, which is a conductor, somewhere in the circuit. Usually only the input and output voltage (signal) waveforms are of immediate interest, while source voltages (supplied power and bias waveforms) are not. Some printed circuit cards have metal eyelets or posts centered in the metal ribbon runs through which the input or output signals are conducted. The probe tip can be hooked onto the post, or replaced with a hook fitting that can hang from the eyelet while the signal is fed to the test equipment. Another technique is to use a probe with a flexible hollow tip that can be fitted down over an extended metal pin or post, as is found in the interiors of some equipment. Some equipment use a technique where an extra multipin female or male connector is fed by input and output waveform connections. The connector is placed at a convenient position where probe tips can be inserted or hung while the circuit is under test or when troubleshooting (fig. 2-13). The test points (for the pins) or test blocks (for the whole connector) are usually grouped in one location for convenience (fig. 2-14). Another system of X - Y coordinates is required to locate a specific pin. In this case, a chassis-test block-test point system is usually used. Sometimes the chassis is left off since the test block is usually on the same chassis as, though not necessarily in the immediate vicinity of, the circuit under test. The equipment manufacturer may reverse the letter-number technique of designating X - Y coordinates so that there is no confusion between the system used to designate the card location, and the system used to designate a test point. Some types of equipment do not have built-in test points for their cards. Or sometimes it is necessary to observe signals that are not coupled to a card test point or chassis test block. When this happens, it is often necessary to resort to the use of a card extender. A card extender is a logic card having a male connector at one end and a female connector at the other. The logic card under test is inserted into the female connector of the card extender, then the card extender is inserted into the logic card's normal position. The extra length provided by the leads between the male and female connectors of the card extender provides access to the ribbon runs and component leads on either side of the logic card. Usually the card extender will also offer test points for each connector pin (fig. 2-15). Card extenders are easily identified in that they only contain opposing male and female connectors, leads, and test points. They usually have no logic elements of their own. IC insertion sockets may be used in future equipment. These sockets can be successfully mounted on the printed circuit card separately; then, the IC is inserted into the socket. This technique was adopted for CMOS ICs, which are very susceptible to static voltages. CMOS ICs may not be used in every case, as the technique can be applied equally well to other forms of ICs. This approach increases the ease with which repairs can be made to a circuit, but it also exposes the circuit to an increased rate of corrosion. These insertion sockets will probably be found in limited logic applications and low frequency circuits. However, some manufacturers are able to "crimp" the pins into their sockets during the assembly stage, which can provide good corrosion resistance. Certain metal platings may also be used to improve conductivity. Removing ICs from crimped sockets, or working with certain metal platings may involve techniques not covered in this text. The correct procedure can usually be obtained from the equipment manufacturer. Several new devices are now available for testing ICs in a circuit. These range from clip-on testers that use LEDs (light-emitting diodes) to indicate current flow in each IC pin, to much larger logic testers to which the module (such as a printed circuit card or logic card) is directly connected. The module is then subjected to test inputs with monitored outputs. There has always been an effort to use the equipment to check itself. Digital computers are particularly adaptable to this form of testing, and provide excellent diagnostic capabilities when testing online equipment. Unfortunately, not every test result can be accepted on the basis of its indications. This is particularly true where a failure in the test equipment would give the same indications as the equipment under test. 34 Chapter 2 -MAINTENANCE TEST BLOCK 1 (SOME NOMENCLATURE ON THE EQUIPMENT MAY NOT BE PLACED ON A PROPER VERTICAL AXIS). AUTOMATIC TIMER (RUNS CONTINUOUSLY TO RECORD HOURS EQUIPMENT IS ENERGIZED). 124.543 Figure 2-14.-Typical Test Block, AN/UYK-7(V) Computer Set. This problem is usually more predominant in equipment that perform internal checks upon themselves, since the same circuitry used during the testing might be producing the problem. More reliable results can frequently be obtained with equipment tested by external means. Many types of special devices have been developed as testers and diagnostic aids to other equipment. These use their own logic, or in some cases, function under computer program control. Whatever test equipment is used by the technician, it is his responsibility to become familiar with its function and operation, to care for it, and in some cases, even to perform repairs on it. If his test equipment is not working properly, he will not be able to depend on it in performing his other duties. Test equipment malfunctions must be reported to his superiors and corrective measures started as soon as possible. Troubleshooting The circuitry used on most printed cards form complete functional groups. If circuit 35 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 EXTENDER CARDS DECADE RATIO XFMR ELECTRONIC EQUIPMENT MOUNTING BASE BRIDGING XFMR SYSTEM LOAD 124.544 Figure 2-15.-Ratio Adjustment Test Setup Using Extender Cards (Equipment is CV-1980B/USQ-20(V) DAC). density is high enough, several functional groups may be found on each card. One card may have several AND functions, or several OR functions, or it may contain some other type of logic function groups. Each card type is usually identified by a unique number. Cards with the same number can be interchanged in many cases. In other cases, they can be exchanged, but only after variable components such as pots (adjustable resistors) on them are readjusted to compensate for different circuit applications. The number code used with many cards may be followed by a letter, such as 7 030 A or 2123B. This usually represents a modification or improved version of the basic card type. In most cases, the card function remains the same and the newer card can be substituted for the older version. In some cases, the older version may also be used to replace the newer version. More often, the older version of the card will be reworked into the newer circuit version, and relettered by hand to indicate the circuit revision. The resistive color code is used to help identify the card. The edge of the card that can be seen will have four color bands to represent the last four digits of the number code (figure 2-8 and table 2-1). This helps verify that each card slot contains the correct card type, without the need of removing the cards to check. Some equipment use a more positive control over their cards with a "key" used with the 36 Chapter 2-MAINTENANCE female connector in the card slot. The key must align properly with a key way cut into the face of the male connector on the card before the card can be inserted into the card slot completely. This helps prevent a card from accidentally being put into the wrong card slot (see figure 2-7). In troubleshooting, when the problem is narrowed down to a single card, the normal procedure is to replace the suspected bad card with another of the same type to verify the source of the problem. If a spare card is not available, the suspected bad card can be exchanged with the same card type (provided no adjustable components are involved) that is in a different location of the equipment. However, a bad card would then cause a different indication of trouble as it affects the new area of equipment, and its behavior in this new area should be anticipated first. In isolating malfunctions, the card exchange technique can be very useful if properly employed. Sometimes it is very difficult to pinpoint the precise area where a malfunction occurs. By systematically replacing the circuit cards most strongly suspected, the problem can often be found and corrected quickly. Speed is a primary consideration in many types of repair work, and in these cases, the fastest way is usually the preferred way of getting a repair accomplished. The card exchange technique is also one of the most useful ways that has been developed for isolating intermittent problems. The intermittent problem, which comes and goes in cycles, has usually vanished by the time the technician is prepared to look for it with his maintenance programs and test equipment. One failure every few hundred thousand operations or so would be sufficient to disable many digital devices by causing unrecoverable errors every few minutes . In many cases , the intermittent problem will eventually increase in frequency and duration, until a point is reached where it becomes a "hard" problem and endures long enough to be detected and corrected. In other cases, the computer can be reprogrammed with short, specialized programs which are suited to locating the specific problem at hand. This task is within the ability of most DSs to perform when the need arises. In still other cases, specialized test equipment can be acquired that will add more flexibility to efforts to detect the problem while the system continues to function at its normal job. However, assuming that none of these events take place, the technician is still far from helpless in trying to cope with problems of an intermittent nature. He can begin to systematically isolate all the areas where the problem can originate. Within each of these areas, he can establish areas of higher probability where the malfunction is more likely to occur. He can do all this just from the vast store of experience he has acquired with the system and with the equipment within the system. Once he has succeeded in doing this, the technician may still find that there are usually many possible areas were the malfunction could occur, yet he may have reached the limits of his experience, his programs, and his test equipment. At this point he may again resort to systematic exchange techniques to find the problem. TECHNICAL MANUALS. -The technical manuals (TMs) used with Navy equipment are usually provided to the Navy by the equipment manufacturer. In some instances contract specifications require that the manual meet certain military standards. In other instances the Government may accept the existing civilian TM version, and these are more likely to contain unfamiliar terminology or unique symbology peculiar to civilian applications. In addition, the civilian version may be arranged in a different order, and may contain some information that is not necessary to its military application, while not including other material that would be of benefit to personnel providing military maintenance support. Technical manuals vary in many ways, such as in color, dimensions, order of contents, or thoroughness of detail. Some are several volumes thick, while others may be nothing more than pamphlets. In general, the logic prints and schematics (electronic diagrams), along with maps of subassembly areas, are usually double-page in size. These will usually appear as either foldouts near the back of the technical manual, or may be placed separately in an oversized binder. Most TMs employ some form of looseleaf binding to simplify major revisions. 37 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Many TMs are organized into sections. These sections provide a one-step-at-a-time approach to the equipment, and are arranged to coincide with the arrival of a new device in a system : Section 1 : General duction) Information (Intro- Section 2: Installation (gives standards and instructions for packing, shipping, unpacking, and installing equipment) Section 3: Operator's Section (explains basic operator functions) Section 4: Principles of Operation (explains equipment operation in detail) Section 5: Troubleshooting (provides basic offline troubleshooting techniques and symptoms) Section 6: Repair (gives standards of repair, techniques, useful hints) Section 7: Parts List (identifies each component by name and either Federal supply number or manufacturer stock number) Section 8: Functional Schematics (logic prints, power supply schematics, etc.) Section 9: (If included) Wire List— shows point-to-point wire contacts Most technicians will report to duty stations where the equipment is already installed. However, it would be a good idea to become familiar with the installation section of the manual. A part of the technician's responsibility is to maintain the equipment, particularly grounding straps, RFI shielding, and other physical aspects, in the installation standards. In addition to the one, two, three, or four volumes that contain these eight sections, some equipment may have supplementary volumes. Magnetic tape units, for example, often have a subcontractor's manual provided for the mechanics, since these are not covered in detail in the main text. Another volume containing an equipment's wire lists may not be available locally, but it should be obtainable through the Naval Supply System if a problem in the equipment wiring is suspected. Supply requisitions for publications should be addressed to Naval Publications and Forms Center, Philadelphia, PA 19120. In addition, requests for NTDS publications or publications on NT DS- related equipment should first be forwarded to Officer in Charge, Naval Sea Com- bat Systems Engineering Station, Code 6633B, Norfolk, VA. 23511. There are many program documents prepared for the various systems, which are in addition to the technical manuals. These software manuals (as they are called) detail the function of various programs and provide precise information on operator and user involvement. Many of the symptoms that are reported to the DS are in terms of apparent problems with these programs. The DS will find that he will require a working knowledge of the system software (operational, utility, and maintenance programs and documentation) in order to provide adequate maintenance support. Most maintenance programs are documented with step-by-step operating procedures, program symptom breakdowns, and even a program listing to show the manner in which the equipment is tested. These are in addition to his obvious need to become familiar with available equipment (technical) manuals. Most technical manuals have dependable logic prints, and provide a reliable basis for locating discrepancies in the text. For instance, a conflict may arise between the text and flowchart. By consulting the logic prints, it is possible to determine which of the two is correct. Two areas of the text may contradict each other. A timing diagram is traced, a check of the logic prints verifies the result, and the matter is resolved. Most logic prints are almost infallible. They usually act as the ultimate answer to conflicts that arise in the text. Chassis maps cover those diagrams and tables that show and list the various assemblies, subassemblies, chassis, test point blocks, card slots, and even card placements (by type and circuit) in the equipment. They work in 38 Chapter 2-MAINTENANCE conjunction with the logic prints (or schematics) in locating those areas and components of the equipment being referred to. The parts list show exploded views of the equipment, identify each component down to the smallest screw, and give the source and part or stock number needed when reordering that item. Wire lists usually just give terminal points of wire connections, so that continuity checks to verify each wire placement can be performed when necessary. These are usually very accurate. However, in the final anaylsis, NO source is absolutely infallible. In order to correct any faults and oversights, and to question apparent contradictions, a positive feedback program is required. Discrepancies, conflicts, and oversights are all reportable items that, if submitted, could eventually result in a superior technical manual. The technician can use the mail-in comment sheet that appears on the back of some EIBs (Electronics Information Bulletin), or he can use the feedback forms that are used with the 3M system to report any observed discrepancies. Either way, he will eventually be contacted usually within a matter of weeks, and given a response regarding the disposition of the matter. If he requires immediate assistance because of the consequences of this discrepancy, he may make an official phone call or office visit (subject to the approval of his command). The technician must also make sure that the latest technical manual revision (called a change) is properly inserted and documented. He must verify that the manual is designed to support the exact version of the equipment that he is maintaining. Failure to do these things will eventually lead to someone trying to fix something with the wrong version of a TM, or an obsolete or improperly maintained technical manual, and this can only result in further problems. in his field. The equipment technical manuals will teach him the specifics of the equipment he supports. There are equipment MRCs (Maintenance Requirement Cards) to guide him in performing routine maintenance. The MRCs state when the maintenance is to be done, how long it should take, who will do it, what tools and equipment are needed, as well as providing detailed step-by-step instructions. Additional assistance can also be gotten from the division officer, or the EMO (Electronics Material Officer). There are MOTUs (Mobile Technical Units) staffed by qualified personnel with a vast background of experience in the field and who have demonstrated that they are themselves competent technicians. MOTU personnel will render technical assistance when requested to do so. MOTU units respond automatically to requests indicating that technical assistance is required on casualty reports (CASREPS). In addition, MOTU per- sonnel will conduct on-site training upon request, and assist in every way possible to evaluate and upgrade the maintenance effort that fleet personnel are capable of. When requested to provide technical assistance to a system experiencing difficulties, MOTU personnel attempt to help the system personnel in their efforts to locate and correct the problem. They do not normally take over and conduct the entire maintenance effort themselves. This approach of helping rather than replacing system personnel serves a more useful purpose, first, in taking advantage of the efforts that the system personnel have already put into trying to isolate and deal with the problem source, and second, in that the joint effort will establish a basis by which permanently assigned personnel will be able to benefit from the experience. Training Considerations Typically, the technician receives most of his training from service schools, his shipmates, and supervisors. He also uses documents, such as EIMBs, technical publications, rate training manuals, and correspondence courses based on the rate training manuals for advanced training The Navy also has a number of engineering centers where additional assistance can be obtained. The engineering centers are not chartered to provide the same type of assistance as given by the MOTU units. Instead, they are more concerned with ways in which equipment, systems, and material support can be improved. If problems appear to go beyond areas where a simple repair can produce results, then the 39 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 engineering center would be very interested to learn what problems are being encountered. Perhaps a certain item will not give reliable service, or perhaps the capabilities of the equipment suffer due to some installation problem. Perhaps a replacement item being procured for the supply system is inferior, or does not seem to be the right replacement part. The engineering centers have a special interest in any subject that affects the whole system, or which may affect more than one installation. In addition, they like to stay informed and keep in touch with personnel, particularly maintenance personnel, from the various systems that they help support. The input that they get from the fleet can become the starting point for a feasibility study, or for an R&D (research and development) effort intended to upgrade the material aspect of the fleet. The MOTUs act to improve the manpower resources, while the engineering centers are concerned more with the material condition and capabilities. Because there are a number of engineering centers that have their own specific areas of interests, it is important to know which engineering center has an interest in the particular system being supported. NAVSEA (Naval Sea Systems Command) has an interest in nearly all systems that involve ships. They also review all technical feedback forms and EIB (Engineering Information Bulletin) comment sheets that are submitted. In addition to publishing the EIBs, NAVSEA also publishes the EIMBs, and material considered to be of permanent interest is taken from the EIBs and republished in the FCIG (field change identification guide) and the Service Note sections of NAVSEA SE000-00-EIM-010 Communications Handbook of the EIMBs. The FCIG section identifies the field change nomen- clature with the purpose of the change, the serial numbers of the equipment affected, and a means of verifying if the change has been installed. The Service Notes section is organized by equipment (including data systems equipment), and discusses problems that have occurred related to that equipment, and techniques and tools that are helpful in working with that equipment. NAVSEA also verifies requests for technical manuals submitted through the Navy Supply System. NAVAIRENGCEN (Naval Air Engineering Center) is concerned with airborne systems, weapons, and support. The ACLS (Automated Carrier Landing System) and LCC-IC and CV-IC (Amphibious Command Ship Intelligence Center and Aircraft Carrier Intelligence Center) are just three of the systems that NAVAIRENGCEN has an interest in, and with which DSs are involved in the maintenance. In many of these areas, NAVAIRENGCEN has a working agreement with NAVSEA that allows NAVSEA con- figuration control and technical support of these airborne support or interface systems. NAVELEXSYSENGCENs (Naval Electronics System Engineering Centers) are concerned with a great many areas that are also of interest to DSs. Among these are: (1) Involvement with a number of shore based (civilianized) data processing systems, (2) test equipment standards, calibration, restoration, procurement requirements, and validation, and (3) automated test equipment for checking such things as components, circuits, computers and related equipment, also for testing detection and navigation equipment. Other commands can sometimes offer needed assistance. Ships that have identical equipment but different system configurations can probably provide the best assistance for specific equipment problems. Ships with similar systems, even though the equipment differs, are another excellent source of information, expecially if the problem seems to be generalized to the entire system. Even commands with different equipment and different systems can sometimes be of vital assistance if they have trained personnel available. The odds of finding a technician with a background that covers the area where the problem exists are usually very good if an adequate effort is made to find him. The DS can obtain help in this search by going through his supervisor, LPO (leading petty officer), division officer, department head or CSO (combat 40 Chapter 2-MAINTENANCE systems officer), and through other elements of the chain of command. As a rule of thumb, the technician is expected to use his own initiative and begin with the information sources closest to him. He should keep his superiors informed of his progress, so that they can provide assistance in matters that may require their personal attention. When a ship is in port and individuals are free to move around to some extent, semiofficial contacts between personnel in the various commands, especially with technicians in the MOTUs and engineers in the engineering centers, may prove to be very beneficial. The exchange of information that is possible by these contacts can measurably improve the DS's understanding of his field and his system, and can aid these support commands in their efforts to meet the needs of the fleet. Intersystem Responsibilities Many DS systems relate to other systems. The power and the demineralized cooling water used to energize and cool electronic equipment are two systems that the computer system is dependent upon. Likewise, a real-time system is dependent upon other systems for its input and output. One system may parallel another, or its final stage of operations (output) may serve as the lead-in point (input) of another system. Combat systems, as one unified structure, are now operational in the Navy. At present, there are many technical ratings that support different portions of the combat system aboard most ships. This means that in order for the whole system to be supported properly, each of these ratings must know its responsibilities and the responsibilities of the other involved ratings. Another important consideration is that all the rating responsibilities must carefully dovetail so that there are no gaps in the maintenance support being provided. In order to do this properly, there must be a high degree of coordination and cooperation between each shop and each rating. In order to achieve this end, the combat system concept was evolved, and the unification point of a Combat Systems Officer (CSO) is required. In addition to his other responsibilities, the CSO coordinates the activities of the various ratings assigned to the combat system. He resolves disputes that may arise, and establishes guidelines and determines areas of responsibilities. Technicians in the various ratings can work to the same end by establishing personal contacts and working to provide mutual support. There are occasions when one system has to be configured in a certain way, or set up to provide test data, so that another system can be checked out properly. There are other occasions when a signal discrepancy is traceable beyond the boundaries of one system and probably exists in the other system also. These situations make it essential that the technicians in the different ratings establish a spirit of cooperation and coordinate their efforts in a joint effort to handle these occasions properly. Another occasion when close cooperation is required is when providing maintenance support to some piece of equipment that is tasked to two or more ratings. The OJ-21 2 modified teletype is one example of such coverage, with OSs (Operations Specialists) providing operator maintenance support, DSs providing electronic maintenance support, and RMs (Radiomen) providing support of the teletype mechanics. If a problem exists in terms of obtaining adequate coverage for systems or equipment having multirating support, it is often caused by a failure to establish and maintain personal interrelationships between each rating involved. If a technician finds that he is unable to cope with problems because the support from other ratings is not there, then he should consider doing one of two things: (1 ) Either he can try to bridge the apparent gap himself, or (2) he can take the problem to his immediate senior and request that his senior attempt to resolve the apparent difficulty. Most often, breakdowns in multirating support can be traced to simple things, like a breakdown in communications, when someone simply forgot to pass the word along, or a garble in the message that conveys the wrong meaning. Sometimes personal differences crop up and make mutual support difficult, but a good 41 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 technician should learn to put personal differ- ences aside and concentrate on the job at hand. Technicians would do well to familiarize themselves with the basic functions and concepts of the other systems that they must depend upon. An increased familiarity means a better understanding of the problems being experienced with those systems, and a greater ability to provide assistance or to identify symptomatic effects in their own systems. Input Power With the possible exception of motor generator sets and controllers, DSs generally have little responsibility for the electrical power system that provides power to their spaces and their equipment. As a consequence, many DSs are unaware of the electrical power system being used. This state of ignorance can have some tragic or otherwise undesirable consequences if a casualty occurs in the power supplied to a DS-maintained space. ELECTRICAL SYSTEMS USED BY THE NAVY.-Basically, there are two electrical sys- tems to be considered. The first system, which will be referred to as the shore system, is actually used at most shore sites (including commercial facilities) and in aircraft systems. This is the 3-phase 4-wire generator system (fig. 2-16) con- sisting of three windings, each having a different phase voltage developed across it; a neutral return, that potentially is midway between the three voltage phases and forms a common return; and a system ground. The voltage between the neutral return and ground is usually insignificant. In many installations, the two are made common by the method of installation and/or by combin- ing them with common junctions in equipment used in the system. The shore system offers the advantage of two voltage potentials : the output across any two phases, and a second voltage across any single phase and the neutral return. Because the phase angle between any two windings is 120°, the 2-phase voltage is only 1.73 (2 x sin 1 20°) times the voltage of a single phase, rather than twice the single phase voltage as might be expected. The second system, referred to here as the shipboard system, consists of a 3-wire isolated 3-PHASE GENERATOR IN WYE CONFIGURATION CHASSIS AND METAL SURFACE GROUND PLAIN A. 3-PHASE. 4 WIRE GENERATOR SYSTEM PROVIDING NEUTRAL RETURN (Short Inslollolions and Aircraft). 3-PHASE GENERATOR IN WYE CONFIGURATION CHASSIS AND SHIP STRUCTURE/ T GROUND PLAIN "# B. 3-PHASE IS0LATE0 GR0UN0 SYSTEM FOR SHIPBOARD USE. 124.545 Figure 2-16.— Shore and Shipboard Generator Systems. ground generator system (fig. 2-16). It does not use a neutral return, and the ground consists of grounding all the external metal surfaces in the installation together with the exception of the generator. The generator itself is isolated (insulated) from the system ground. Since there is no neutral return and the ground does not provide a return path for current flow, the system is regarded as less likely to suffer a severe casualty when compared to the shore system. Note that the problems between shore system and shipboard system equipment are one way. Common neutral-ground shore equipment cannot be used safely aboard ships, but shipboard-approved equipment can be used without restrictions in a grounded shore installation. Also note that in some older sites, receptacles were used without a ground connection, and that any 3-prong device can be safely used in a 2-prong receptacle only with an approved ground adapter, and that the ground 42 Chapter 2-MAINTENANCE wire must be properly grounded to the receptacle before the 3-prong plug is inserted. The grounding pin should never be removed from a 3-prong plug in order to permit its use in a 2-prong receptacle. For additional safety, electrical safety mats or seamless linoleum floors are used in electrical spaces immediately around the electrical equipment to reduce hazards to personnel. These should not be removed without proper authorization, and should be in position whenever the equipment is worked on. In addition to safety considerations, the DS should be familiar with input power since he may be tasked to provide support to at least one- element of the system -the MG/controller set that converts 60 Hz to 400 Hz in many system environments. A discussion of MG/controller sets follows in the next section. 60-HZ VS. 400-HZ INPUT POWER. -A large percentage of the militarized equipment supported by DSs utilize 120 V a.c. or 240 V a.c. at 400 Hz instead of the more conventional 60 Hz. The 400 Hz offers an advantage over 60 Hz, in that the power supplies in individual equipment for converting a.c. to d.c. can be made much smaller, while retaining the same power capacity. It can be demonstrated that an increase in frequency would require a corresponding decrease in the size of many components. (Smaller values of L, C, or mutual inductance can be shown to be a function of smaller component size, as well as other factors.) It is worth noting at this point that transformers are designed to function properly at certain frequencies or frequency ranges, and that power transformers intended for 60-Hz applications, as an example, would not normally be used at 400 Hz, or vice versa. Also, power supplies intended for use at one frequency are not suitable for use at a significantly lower frequency, since in most cases this will result in poor filtering of the lower frequency ripple. CONVERTING 60 HZ to 400 HZ.-A transformer can be used for converting one a.c. voltage level to another. A delta-Y transformer CONTROLLER MOTOR GENERATOR SET, C-34I4/USQ-20(V) MOTOR GENERATOR SET, PU-491/USQ-20IV) 124.547 Figure 2-17.— Typical MG (Motor Generator) Set. can be used to alternate between 3-phase and single-phase power. Single-phase power can even be taken directly across two phases of a 3-phase source. Frequency multiplication, however, cannot be achieved by any of these means. A stabilized oscillator-controlled amplifier circuit can convert d.c. to some a.c. frequency for small and medium sized power supplies. Recent advances in solid-state physics and fabrication technology have resulted in static frequency converters that have no moving mechanical parts. In the recent past the only widespread means of obtaining frequency multiplication within a large scale system involved a motor generator (MG) set, consisting of a 60-Hz motor and a 400-Hz generator, and a 43 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 controller to regulate the voltage and frequency output (fig. 2-17). The use of MG sets is widespread in the Navy at present, although newer installations are gradually seeing more and more of the static frequency converters. It can be anticipated that the Navy will continue to rely upon the existing MG sets for some years, while gradually phasing in newer equipment intended for the same purpose. Basically, an MG set is an electro-mechanical device which consists of a 60-Hz motor connected to a 400-Hz generator by a single shaft. An MG set controller serves as a governor and can vary the applied voltage to hold the 400-Hz output fairly constant despite changes in the load. The controller also provides over- and under-voltage protection for the set. The motor-generator arrangement has been designed into one housing, and the windings for the motor may be wound about the same armature as the windings for the generator. Continued advances in the design have resulted in a smaller unit of greater efficiency. One type of MG set employs brushes, since the design requires the 400 Hz to be taken from the generator wound on the armature shaft. Another type of MG is brushless since its generator field effect is produced on the armature, and the voltage developed is available from the case windings. The DSs provide operator-type maintenance, such as those tasks assigned by PMS, on the MG sets used with their systems, while the EMs have the responsibility, (in most cases), for corrective maintenance. However, this arrangement may not always hold true, and sometimes the DSs are also tasked with corrective maintenance for their MG sets and controllers. Extensive repairs usually involve assistance from a repair facility. The group having corrective maintenance responsibilities act as coordinators in obtaining the needed assistance. Cooling Another aspect of the various systems and equipment covered in this text is cooling. Electronic circuits, both tube and solid-state, consume electrical power and produce heat as a byproduct. Solid-state devices consume less energy and produce less heat as a general rule, but this feature is offset by utilizing higher circuit densities in solid-state technology, or using solid-state devices in power applications. The life span and performance characteristics of tube and solid-state circuits are altered in unfavorable ways when they are exposed to excessive heat. The two most common ways of cooling equipment are: (1) forced air cooling, and (2) water cooling. Fans provide forced air cooling, and the equipment is designed for maximum ventilation possible in the space allowed. Air filters are required in most forced air applications in order to remove airborne contaminants. Many electronic components are sealed away from contaminants, but a thick dust buildup in the equipment is harmful, since this will insulate the surfaces it covers and prevent heat from radiating away properly. Even the use of filters presents problems, since they retain the airborne contaminants. This will eventually result in the filters becoming clogged, and cause a reduction of air flow in the equipment. This is resolved by frequent inspection, cleaning, and replacement of the filter elements. Water cooling may be accompanied by forced air cooling. However, water cooling is extremely effective in a properly designed and maintained system. DEMINERALIZED COOLING WATER SYSTEMS.— Demineralized water is used in water cooled equipment. Heat transfers are accomplished through large tubing coils called heat exchangers. The heat is drawn off from the coil by demineralized cooling water being pumped around the coils. Some of the equipment is designed to be either air cooled or water cooled. An RD-270(V) magnetic tape unit, for instance, may be air cooled in one installation and water cooled in another installation. The two may function the same, but the maintenance requirements differ slightly. 44 Chapter 2-MAINTENANCE WARNING— The temperature of the demineralized cooling water must be main- tained at 73° ±3°F. Under no cir- cumstances should the demineralized water be on without power applied to equipment being cooled. Legend : ■ OlSTfLLEO WATER FLOW. - SEA WATER FLOW. H # 1.312 Figure 3-9.— Functional block diagram of a.c and output voltage circuits. S102 RANGE SWITCH ■O-r*0- METER MOVEMENT ^= \ RED TEST LEAD | - -CH-*0- SHUNT BLACK TEST LEAD \ => 1.313 Figure 3-10.— Functional block diagram of d.c. current circuits. <= ^ RED TEST LEAP| MULTIPLIER METER MOVEMENT ZERO OHMS MULTIPLIER S101 FUNCTION SWITCH COMPARISON RESISTOR BATTERY - \ BLACK TEST LEAPfc => Figure 3-11.— Functional block diagram of ohmmeter circuits. 62 1.314 Chapter 3 -TEST EQUIPMENT leads, this resistance will be in series with the instrument circuit, and less current will flow through the meter movement. The amount of reduced meter deflection indicates how much resistance is between the test leads. Function Switch S-101 Function switch S-l 01 (fig. 3-7) located in the lower left-hand corner of the front panel, selects the type of circuit for which the instru- ment is connected. There are two positions for d.c. volts, direct and reverse. The normal position is direct. When using the meter to make a d.c. voltage measurement and a connection is made which causes the meter to read backwards (deflec- tion of the pointer to the left), set switch S-101 to reverse and the pointer will be deflected upscale. To read alternating current voltages, set switch S-101 to the ACV position. A rectifier within the instrument rectifies the a.c. voltage to an equivalent d.c. value, and the meter indicates the RMS value of the applied voltage. To read the a.c. portion of mixed a.c. and d.c. voltages, set switch S-101 at OUTPUT. Set switch S-101 at DC //A MA AMPS to read direct current. As mentioned previously, switch S-101 also serves as a range switch for resistance measurements. A -102 S101 FUNCTION SWITCH S102 RANGE SWITCH MULTIMETER ME-48A/U W-102 W-IOI 4.133 Figure 3-12.— Controls, jacks, leads and accessories. 63 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 S101 must be kept in the DCV position when not in use to prevent battery drain. Range Switch S-102 This eight-position range switch located in the lower right corner of the front panel permits the selection of voltage and current ranges. The full scale value for each range switch position is marked on the front panel. Zero Ohms Control The ZERO OHMS control is located near the center of the front panel. Each time the function switch S-101 is placed in a position to read resis- tance, short the test leads together and rotate the ZERO OHMs control knob to make the pointer read full scale, or zero ohms. If you cannot bring the pointer to full scale, the battery should be replaced by the cognizant calibration lab. Test Leads and Test Jacks There are two test leads, W-101 and W-102 (fig. 3-12) which are needed for all measurements except those which require the 5000V d.c. range. Test lead W-101 is red, and test lead W-102 is black. Unless otherwise specified, connect black test lead W-102 in the common jack, J-106, and connect the red test lead W-101 in the +V MA OHMS jack, J-101. For the 1000V d.c. range, place red test lead W-101 in the 1000V d.c. jack, J-103. For the 1000V a.c. range, place red test lead W-101 in the 1000V a.c. jack, J-104. Use the red test lead to contact the positive side of the source for d.c. measurements and the black test lead to contact the negative side. For the 5000V d.c. range, use black test lead, W-102 in the common jack, J-106, and use the high voltage test lead, W-103, screwed on over recessed post J-102, +5000V d.c. multiplier. For the 10 ampere range, place red test lead, W-101, in the special +10 AMPS jack, J-105. Accessories E-101, E-102, and E-103 There are two alligator clips, E-101 and E-102, which the operator may use to screw on over the end of test leads W-101 and W-102. This is for the convenience of the operator. There is a telephone plug, E-103, which may be used to connect both the test leads, W-101 and W-102, to contacts within a two-contact telephone jack. This permits easier connection to the jack contacts for any electrical measurement because the operator can make the measurement directly through an equipment panel without opening the case of the equipment. The red test lead W-101, connected in the red insulated jack (not shown) on the rear of the telephone plug E-103, contacts the tip of the plug. The black test lead, W-102, connected in the black insulated jack (not shown) on the rear of the telephone plug, E-103, contacts the sleeve of the plug. ELECTRONIC MULTIMETER The AN/USM-116C is a portable (17 pounds) electronic multimeter used for general servicing of electronic equipment. It is designed for use where precise voltage, current and resistance measurements are required. It has a high input impedance which permits voltage measurements to be made with only a small amount ot loading on the circuit under test. The AN/USM-1 1 6C is capable of making the following range of measurements: 1. A.C. volts - 0.01 to 300 rms (effective) 2. D.C. volts - 0.02 to 1 ,000 (+ or -) 3. D.C. current - 20 /iA to 1 ,000 mA 4. Resistance - 0.2ft to 1 ,000 Mft Front Panel Controls Figure 3-13 illustrates all the controls necessary for proper operation of the multimeter. These controls include the FUNCTION SELECTOR switch which selects the type of measurement to be made. The RANGE SELECTOR switch determines the desired range of a particular measurement. There are multiplication factors to be considered when making some measurements. Check the technical manual (NAVSEA 0969-126-8010) for these figures. The OHMS ADJ. control permits proper 64 Chaper 3 -TEST EQUIPMENT MULTI-PURPOSE METER METER SCALES MECHANICAL ZERO ADJUSTMENT SCREW ZERO ADJUST - CONTROL VAX! POWER CABLE - PILOT. LIGHT FUSE HOLDER FUNCTION SELECTOR SWITCH RANGE SELECTOR SWITCH -TEST LEADS -OHMS ADJUST CONTROL The Hickok Electrical Instrument Company 124.406 Figure 3-13.-AN/USM-116C front panel. calibration of the ohmmeter ranges. The ZERO ADJ. is a dual control. Adjustment of the black knob serves to balance the multimeter for proper accuracy when measuring d.c. volts, a.c. volts and ohms. The red knob of the ZERO ADJ. control permits secondary adjustment of the low a.c. voltage ranges. The face of the meter contains six scales. The three lower scales are used with the 1,3, and 10 a.c. volt ranges. The blue OHMS scale is used for all resistance measurements. All other measurements of a.c. volts, d.c. volts and d.c. milliamperes are made on the two top scales. The purpose of the mirror on the meter face is to eliminate parallax errors. When reading the meter, view the scale so that the pointer coincides exactly with the image in the mirror. There are four permanently mounted test leads feeding out of the bottom of the control panel. Two of these leads are unshielded and used for making RESISTANCE AND CURRENT tests. One of the unshielded leads is a ground lead marked COM, and the other is labeled OHMS-MILS. One of the shielded leads (red test probe) is used to measure d.c. volts. The other shielded lead is used for measuring a.c. and is connected to an RF probe. There is a special ground lead to be connected to the a.c. probe when measuring RF voltages. Refer to the AN/USM-116C technical manual for detailed instruction on how to make various measurements. FUNCTIONAL BLOCK DIAGRAM Figure 3-14 is a block diagram of the multimeter. As previously stated, the multimeter can measure a.c. and d.c. voltages as well as resistance and current. When measuring a.c. voltages, the signal must first be rectified by a diode in the a.c. probe. The signal must be rectified because the meter circuit is sensitive only to d.c. voltages. The Function Selector switch determines which function is being used by selecting either the VOLTAGE ATTENUATOR, the OHMS MULTIPLIER or the MILS ATTENUATOR. 65 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 PROBE DC PROBE BALANCED BRIDGE r OHMS MILS* PROBE COM PROBE 115 VOLT AC INPUT 124.407 Figure 3-14.— AN/USM-116C functional block diagram. When the Voltage Attenuator is selected, the a.c. or d.c. voltage is applied across a voltage-divider network so that the total input impedance of the multimeter remains constant when the position of the Range switch is changed for various levels of input voltage. The meter is then connected across a BALANCED BRIDGE network through the CALIBRATION RESISTORS. With no input, the bridge is balanced and the meter reads zero. When the bridge is unbalanced by an input voltage, the meter pointer is deflected. The amount of 66 Chapter 3 -TEST EQUIPMENT deflection is proportional to the value of the input voltage. The ohmmeter section also uses the bridge circuit. When an unknown resistance is placed between the OHMS-MILS lead and the COM lead, the bias voltage on the balanced bridge, through the OHMS MULTIPLIER, decreases in proportion to the unknown resistance. The value of the unknown resistance determines the degree to which the bridge is unbalanced and, therefore, the magnitude of the meter pointer deflection. No battery supply is required for the ohmmeter circuitry. The milliammeter function does not make use of the bridge circuit. The range switch connects various calibration resistors (shunts) across the meter to increase the range of current measurements. The VOLTAGE REGULATOR is used to maintain the B+ supply voltage to the balanced bridge at a constant value despite changes in line voltage. MODEL 803D DIFFERENTIAL VOLTMETER The 803 D (fig. 3-15) is a highly accurate, portable and compact differential voltmeter used for precise measurement of almost any a.c. or d.c. voltage. Its general function is to compare an unknown voltage with an internal reference voltage, and to indicate the difference in their values. It is capable of being used as a vacuum tube voltmeter, as a precision potentiometer, and as a megohmmeter for measurement of high resistance. It can also be used to measure the variations (positive and 124.404 Figure 3-1 5. -Model 803D Differential Voltmeter. 67 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 negative) from a specified voltage level. One feature that should be emphasized is that no current is drawn from the unknown source for d.c. measurements when balance is attained. Thus, the determination of the unknown d.c. potential is independent of its source resistance. In simpler terms, the 803D will not load the circuit under test once a balance (NULL) condition has been reached. The 803D may be used for measurements of d.c. voltages from to 500 volts and a.c. voltages from 0.001 to 500 volts. However, high accuracy measurements to 30,000 volts d.c. are possible with precision voltage dividers. It also has a polarity switch for equal convenience in measuring positive or negative d.c. voltages and an adjustable recorder output which makes the 803D particularly useful for monitoring the stability of almost any a.c. or d.c. voltage. Operating Controls The front panel controls of the 803D are shown in figure 3-15. The OPERATE/CALIBRATE switch is spring loaded to the OPERATE position. The CALIBRATE position is used to calibrate the internal 500V d.c. reference supply. In this position, a representative sample of the reference voltage is compared to the voltage of an internal standard battery. The CALIBRATE control is used with the OPERATE/CALIBRATE switch to vary the output of the 500V d.c. reference supply. The reference supply is accurately set by adjusting the CALIBRATE control for zero meter deflection. The RANGE switch selects the desired voltage range or an A.C. NULL MULTIPLIER. Full scale ranges of 500, 50, 5 and 0.5 volts are available. The NULL switch is set to the VTVM position for determining the approximate value of unknown voltage prior to differential measurements. Five null ranges of 10, 1, 0.1, 0.01, 0.001 volts may be used for differential measurements. For the D.C. mode, the null ranges represent full scale differences between the unknown voltage and the amount of precision internal reference voltage that is set on the voltage readout dials. In the A.C. mode, the NULL range switch times the applicable A.C. NULL MULT setting, represents the full scale difference between the unknown voltage and the amount set on the voltage dials. The A, B, C, D, and E voltage readout dials provide an in-line readout of the amount of internal reference voltage necessary to null the unknown voltage. The DECIMAL LIGHTS on the front panel serve as decimal points for the voltage readout dials. A different light illuminates for each position of the RANGE switch. Operation The 803D is capable of several different types of operation. The D.C. Differential voltmeter operation will be discussed in this text. Other operations are discussed in detail in the Model 803D technical manual. After turning the 803D on and allowing a warmup period of at least ten minutes, adjust the internal 500-volt reference supply for zero meter deflection, by using the CALIBRATE control. The ten-minute warmup period is especially important because it allows the meter components time to stabilize. Connect the unknown voltage to the input binding posts. If one side is grounded, always connect it to the lower input post (middle post). With the NULL switch in the VTVM position turn the RANGE switch to the lowest range that will allow an on-scale reading and note approximate value of unknown voltage as indicated on upper meter scale. If meter reads to the left, turn A.C. -D.C. polarity switch to the negative position. The meter needle will deflect to the right. This is because polarity of unknown voltage is negative. Noting the position of illuminated decimal light, set five voltage readout dials to approximate voltage determined previously. For example, if approximate voltage is 35 volts, the decimal light between the B and C voltage readout dials will be illuminated. Therefore, set A dial to 3, B dial to 5. and C, D, and E dials to 0. Set NULL switch to successively more sensitive null ranges, as indicated in table 3-1, and adjust voltage readout dials for zero meter deflection in each null position. When the meter needle indicates to the right, the voltage under 68 Chapter 3 -TEST EQUIPMENT Table 3-1. -Recommended NULL Settings. INPUT ♦RECOMMENDED VOLTAGE NULL RANGE SETTING 50-500 10 then 1 (then 0.1 for voltages from 50 to 100 volts) 5-50 1 then 0.1 (then 0.01 for voltages from 5 to 10 volts) 0.5-5 0.1 then 0.01 (then 0.001 for voltages from 0.5 to 1 volt) 0-0.5 0.01 then 0.001 *Any null range may be used with any input voltage range; r ecommended settings are those most useful. measurement is greater than the voltage set on the voltage readout dials. When the indication is to the left, the voltage is less than that set on the readout dials. Read the measured voltage directly from the five voltage readout dials. BLOCK DIAGRAM Figure 3-16 shows the block diagram for the 803D A.C./D.C. Differential Voltmeter. As seen in this figure, the circuit consists basically of an a.c. to d.c. converter, a d.c. vacuum tube voltmeter (vtvm), and a to 500 volt d.c. reference supply. The overall operation of the 803D may be summarized as follows. To measure the approximate value of a d.c. voltage, the unknown voltage is connected directly to the d.c. vtvm.. To accurately measure a d.c. voltage, the unknown voltage is connected across the series combination of the d.c. vtvm and the to 500 volt d.c. reference supply. The reference supply voltage is then adjusted with the five voltage readout dials until it matches the unknown voltage as indicated by the vtvm. All a.c. measurements are made by first converting the a.c. input voltage to a d.c. voltage by means of the a.c. to d.c. converter. The 803D then operates essentially the same as for approximate and accurate d.c. measurements. D.C. VACUUM TUBE VOLTMETER The d.c. vtvm is composed of an attenuator, a null detector, and a meter. The heart of the d.c. vtvm is the null detector in which the d.c. signal input is modulated, amplified, rectified, and finally filtered to produce a d.c. output. The output current from the null detector is indicated on a meter that has taut-band suspension. This suspension does away with all friction associated with meter pivot stickiness. Thus, any tendency for the meter pointer to stick at one point of the scale and then jump to another point is completely eliminated. The attenuator is used to reduce the voltage span of each range to a common range usable by the NULL DETECTOR, to produce proper meter deflection. 500 VOLT REFERENCE SUPPLY When the 803D is used for differential voltage measurements, an internal voltage is nulled or matched against the unknown voltage. An extremely accurate reference voltage is, therefore, required. This is obtained from the to 500 volt reference supply. The to 500 volt reference supply is composed of a well regulated 500 volt power supply, a range divider and a five decade attenuator. The output of the 500 volt power supply is applied directly to the attenuator for the 500 volt d.c. range. In the 50, 5, and 0.5 volt d.c. range, the range divider reduces the voltage to 50, 5, and 0.5 volts before it is applied to the attenuator. For any a.c. range, the range divider always reduces the voltage to 5 volts. The attenuator divides its input voltage (500, 50, 5, or 0.5 volts) into 69 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 AC, INPUT DC? ["AC TO DC I CONVERTER I 1 AC ATTENUATOR DC VACUUM TUBE VOLTMETER RECTIFIER FILTER CIRCUIT VTVM INPUT o- NULL TO 500 VOLT DC REFERENCE SUPPLY 500 RANGE RANGE DIVIDER AO 1 I BO 1 CO 1 DO- 1 EO 1 DECADE ATTENUATOR 500 V DC POWER SUPPLY PRIMARY REFERENCE 124.405 Figure 3-16.— Model 803D, functional block diagram. 50,000 equal increments, any number of which may be selected by setting the five decades with the voltage readout dials. The output of the attenuator, therefore, provides an extremely accurate reference voltage. The primary reference (fig. 3-16) is a battery used to calibrate the 500 volt supply. AC. TO DC. CONVERTER An operational amplifier containing three resistance-capacitance coupled amplifier stages with high negative feedback is used to make the rectification characteristics of the diodes linear and stable. The attenuator is used to reduce the a.c. input voltage by a factor of 10 or 100, as required to restrict the operational amplifier input to 5 volts maximum for full scale inputs of 50 and 500 volts respectively. The a.c. to d.c. converter is composed of an attenuator, an operational amplifier, and a rectifier-filter circuit. A diode in the rectifier-filter circuit is used to convert the unknown a.c. into pulsating d.c, which is then filtered to obtain a d.c. voltage that is proportional to the average value of the a.c. input voltage. The output however, is calibrated to indicate the RMS value of a pure sine wave. FREQUENCY COUNTER The AN/USM-207 is a portable, solid-state electronic counter for the precision measurement and eight-digit numerical display of: the frequency and period of a cyclic electrical signal, the frequency ratio of two signals, the time interval between two points on the same or different signals, and the total 70 Chapter 3 -TEST EQUIPMENT number of electrical impulses (totalizing). The unit also provides output signals of the following types: 1. Standard signals from 0.1 Hz to 10 MHz in decade steps derived from a 1 MHz frequency standard, frequency dividers, and a frequency multiplier 2. Input signals divided in frequency by factors from 10 to 10° by a frequency divider 3. Digital data of the measurement in four -line binary-coded-decimal form with decimal point and control signals for operation of printers, data recorders, or control devices 4. A 1 MHz output from a frequency standard. General Description The AN/USM-207 (fig. 3-17) consists of a major counter assembly, two plug-in assemblies installed in recesses on the front and rear panel, and a group of accessory cables and connectors stored in the detachable front cover. The major assembly Digital Readout Electronic Counter CP-814/USM-207 contains the input amplifiers, gate control, display, reset and transfer control, frequency multipliers, time base dividers, decade and readout boards, numerical display tubes, decimal point and units indicators, power supply and regulator, and controls associated with these circuits. The R adiof req uen cy Oscillator O-1267/USM-207 plug-in assembly develops a 1 MHz signal and includes its own power supply. The oscillator includes the 1 MHz output receptable which may be used as a source of that frequency when the oscillator is connected to a.c. power through the basic counter or when connected to the power line independently of the counter. The counter may be operated without the oscillator in totalizing, scaling the input signal, time interval with external clock, and frequency ratio measurements. For other measurements the counter does not require the oscillator when a separate external 100 kHz or 1 MHz signal is connected. In either of these two situations, the oscillator may be left in the counter or removed. The oscillator plugs in to the right rear of the counter. The Electronic Frequency Converter CV 1921/USM-207 plug-in assembly permits measurement of frequencies up to 500 MHz, RADIO FREQUENCY OSCILLATOR 0-1267/USM-207 (Hidden) ELECTRONIC FREQUENCY CONVERTER CV-1921/USM-207 -DIGITAL READOUT ELECTRONIC COUNTER CP-814/USM-207 162.7 Figure 3-17.-AN/USM-207 front panel. 71 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 using the heterodyne principle (Basic Electronics, NAVEDTRA 10087-C, Vol. 1 , Ch. 16 or Navy Electricity-Electronics Training Series (NEETS), applicable module.) The unit consists of broadband amplifier, mixer, multiplier, and controls and" indicators associated with these circuits. When measurements other than hetero- dyne frequency measurements are made, the converter is not required, but need not be removed. The converter also permits the measure- ment of signals from 35 MHz to 100 MHz with a greater sensitivity than possible with the basic counter. The converter plugs into the right front of the counter. Front Panel Controls Refer to figure 3-17. The FREQ. A input connector accepts an external signal for frequency and frequency-ratio measurements, for totalizing, and for obtaining scaled outputs. The SENSITIVITY switch selects source of input signal in frequency, frequency ratio (numerator) and totalizing modes of operation. The digital display indicates numerical results of measurement with an automatically positioned decimal point. The LEVEL meter indicates in the green when the level of the signal applied to the converter INPUT connector is sufficient to provide a valid digital readout. It indicates in the red when the input signal level is questionable, incorrectly attenuated, or the mixing frequency is incorrect. The FREQUENCY TUNING-MC switch selects a mixing frequency for heterodyne frequency measurement. This switch operates with the LEVEL meter. When the POWER switch is set to OFF, all power is removed from the counter circuits. When set to STBY, power is applied to the radiofrequency oscillator only. When set to TRACK, power is applied to all counter circuits and the digital display shows a continuous display of the changing count. When set to STORE, power is applied to all counter circuits, and the digital display remains constant during the count and changes only when the final count changes after any gate period. The DISPLAY control is used to increase the length of time that the count is displayed as the control is rotated from the MIN. position clockwise. The measurement automatically recycles after the display time. When switched to the extreme clockwise 00 position, the count is displayed until the RESET switch is pushed. The STD FREQ OUT switch is dual control. The red switch selects the standard frequency output that appears at the STD FREQ OR SCALE OUT connector (on rear panel). The black switch (time base) has four uses. It will select the CLOCK FREQ that is counted when period and time-intervals are measured. It will select the GATE TIME when measuring frequency. It will select a SCALER RATIO by which the input signal is divided when used with the FUNCTION switch. It will also select the frequency ratio measurement in the 10° position when used with the FUNCTION switch. The time base switch in conjunction with the FUNCTION switch position selects the unit of measurement and decimal point that are displayed in frequency, period, and time-interval measurements. The FUNCTION switch selects measurement or scaling mode of operation in conjunction with positions of SENSITIVITY switch and time base switch as follows: The d.c. and a.c. connectors for each channel accept an external signal for period, frequency -ratio and time-interval measurements. The two switches above the connectors are dual purpose. The inner knobs are the channel MULTIPLIER switches which select a multiplier for the channel TRIGGER VOLTS controls (outer knobs). The outer knobs select any voltage from +6 to -6 volts which when multiplied by the channel MULTIPLIER switch setting will determine the exact triggering point of the input signal for the selected channel. There is a PRINTER connection (not shown) on the rear panel that supplies signals representing the digital data output of the measurement including the decimal-point position in four-line binary-coded decimal form. Included in the output are control signals for the operation of printers, other data recorders, or control devices, and a reset inhibit line to prevent reset of the counter during data recording. Functional Description Figure 3-18 is the overall functional block diagram of the counter. To make a measurement 72 Chapter 3-TEST EQUIPMENT PLUG-IN UNIT 0-1267/USM-207 RADIO FREQUENCY OSCILLATOR 1 MHz STANDARD FREQUENCY OUTPUT 'V\, I MHz STANDARD FREQUENCY EXTERNAL STANDARD . FREQUENCY INPUT 10MHz 8 1MHz MULTIPLIER nnA STANDARD FREQUENCY INPUT "c" AMPLIFIER n_TL SHAPED "C" SIGNAL "A" INPUT CONVERTER INPUT ii.ii A AMPLIFIER n.r\- n_TL SCALER SCALED STANDARD FREQUENCY OR MULTIPLE "B" SIGNAL r^_n_ NOTE: ALL UNITS SHOWN, EXCEPT THE TWO PLUG -IN UNITS, ARE CONTAINED IN THE CP-814/USM-207 ASSEMBLY. SCALED STANDARD -*■ FREQUENCY OR SCALED"A" SIGNAL SCALED A SIGNAL GATE CONTROL GATE CONTROL SIGNAL 4 — ► COUNT CONTROL ywm HETERODYNE SIGNAL 10 MHz VW SHAPED HETERODYNE OR "A" SIGNAL STANDARD FREQUENCY /VWWWWVl GATE SIGNAL .PRINTER CONTROL CYCLE CONTROL RESET CONTROL , COUNT <► rurn. _rmn_ [ 14171.411MHz ) REAOOUT , PRINTER DATA COUNT SIGNAL COUNT DECADES CV-1921/USM-207 ELECTRONIC FREQUENCY CONVERTER 1 PLUG-IN UNIT DC POWER TO ALL, FUNCTIONAL SECTIONS POWER SUPPLY 162.8 Figure 3-18.-AN/USM-207, functional block diagram. requires two types of information; a count signal, and a gate control signal. These two signals may be generated within the instrument, or they may be supplied from outside sources. The type of measurement the counter will make depends upon the relationship of these two signals. In any function the instrument counts the count signal for a period of time determined by the gate control signal. Routing of these signals within the instrument is accomplished by logic circuits. These logic circuits are controlled by means of the front panel controls. The radiof requency oscillator (O-1267/USM-207) generates a signal of precise frequency for use throughout the counter or to provide a precise 1 MHz signal for use outside the equipment. The electronic frequency converter accepts radiofrequencies between 100 MHz and 500 MHz and converts them to radiofrequencies between 5 MHz and 100 MHz for measurement by the basic counter. The "A", "B", and "C" amplifiers amplify and shape the respective input signals for use throughout the counter. The 1 MHz and 1 MHz multiplier multiplies the frequency and shapes the signal generated by the radiofrequency oscillator. It also provides 73 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 precise timing signals to the various functional sections of the basic counter and to the frequency converter. The scaler consists of a series of decade dividers and gating systems which provide divided standard frequencies and control signals depending on the type of measurement the instrument is making. The gate control generates the gate control signal. This signal determines the length of time that the count decades will count the count signal. The count control provides the proper count signal to the count decades, as selected by the setting of the front-panel switches. The cycle control produces all signals necessary to display the measurement results on the readout and to recycle the counter. The count decades count the count signal when permitted to do so by the gate control. The result of their counting becomes the final reading displayed by the readout at the end of each measurement. The readout receives binary-coded-decimal (BCD) data from the count decades, decodes this data into decimal form and drives the readout indicator tubes. The readout also contains memory circuits which function when the counter is operated in the "Store" mode. The power supply supplies all d.c. power required by the basic instrument and the converters and consists of seven d.c. supplies. Five of these supplies (+18 volts, +12 volts, +6 volts, -6 volts, and -12 volts) are regulated, and two (+180 volts and +45 volts) are unregulated. TESTING SEMICONDUCTOR DEVICES Because of the reliability of semiconductor devices, servicing techniques developed for transistorized equipment differ from those normally used for electron tube circuits. Electron tubes are usually considered to be the circuit component most susceptible to failure, and are, therefore, normally the first components to be tested. Transistors, however, are capable of operating in excess of 30,000 hours at maximum rating without failure and are often soldered in the circuit in much the same manner as resistors and capacitors. Replacing a semiconductor diode or transistor of questionable condition with one known to be good is a simple means of determining the device's state. This technique should be used only after you have made voltage and resistance measurements to make certain that there is no circuit defect that might damage the substitute semiconductor device. If more than one defective semiconductor is present in the equipment section where trouble has been localized, this method becomes cumbersome, since several semiconductors may have to be replaced before the trouble is corrected. To determine which stages failed and which semiconductors are not defective, all of the removed semiconductors must be tested. This can be accomplished by observing whether the equipment operates correctly as each of the removed semiconductor devices is reinserted into the equipment. TESTING DIODES Semiconductor diodes, such as general purpose germanium and silicon diodes, power silicon diodes, and microwave silicon diodes, may be tested most effectively only under actual operating conditions. However, crystal rectifier testers are available to determine direct -current characteristics which provide an indication of crystal-diode quality. A common type of crystal diode test set is a combination ohmmeter-ammeter. Measurements of forward resistance, back resistance, and reverse current may be made with this equipment. The condition of the diode under test can then be determined by comparison with typical values obtained from test information furnished with the test set or from the manufacturer's data sheets. A check which provides a rough indication of the rectifying property of a diode is the comparison of the diode's back and forward resistance at a specified voltage. A back-to-forward resistance ratio is greater than 10:1 and a forward-resistance value of less than 50 ohms is common. To insure correct ratios and resistance 74 Chapter 3-TEST EQUIPMENT values, compare the diode being checked against a known good diode of the same type. Testing With Ohmmeter A convenient test for a semiconductor diode requires only an ohmmeter. The forward and back resistance can be measured at a voltage determined by the battery potential of the ohmmeter and the resistance range at which the meter is set. When the test leads of the ohmmeter are connected to the diode, a resistance will be measured which is different from the resistance indicated if the leads are reversed. The smaller value is called the forward resistance, and the larger value is called the back resistance. If the ratio of back-to-forward resistance is greater than 10: 1, the diode should be capable of functioning as a rectifier. However, you should keep in mind that this is a very limited test that does not take into account the action of the diode at voltages of different magnitudes and frequencies. Testing With An Oscilloscope An oscilloscope can be used to graphically display the forward and back resistance characteristics of a crystal diode. A circuit used in conjunction with an oscilloscope to make this test, is shown in figure 3-19. This circuit uses the oscilloscope line test voltage as the test signal. A series circuit composed of resistor Rl and the internal resistance in the line test circuit decreases the 3-volt open circuit test voltage to a value of approximately 2 volts, peak to peak. The test signal applied to the crystal diode is also connected to the horizontal input of the oscilloscope. The horizontal sweep will then represent the voltage applied to the diode under test. The voltage developed across current-measuring resistor R2 is applied to the vertical input of the oscilloscope. Since this voltage is proportional to the current through the diode under test, the vertical deflection will indicate crystal current. The resulting oscilloscope trace for a normal diode will be similar to the curve shown in figure 3-20. To test zener diodes, a higher voltage than the oscilloscope line test signal must be used. This test can be made with a diode test set or with the circuit shown in figure 3-2 1 . In this circuit, rheostat Rl is used to adjust the input voltage to a suitable value for the zener diode being tested, and resistor R2 limits the current through the diode. The signal voltage applied to the diode is also connected to the horizontal input of the oscilloscope. The voltage developed across current-measuring resistor R3 is applied DIODE ' UNDER TEST • — -i LINE TESTO- ■o v H o- _* — ■ 1 ■ i i J-n. >R2 >220a G G 2VP 1 60H; ♦ O j Figure 3-19.— Testing semiconductor diode with oscil- loscope. 162.117 Figure 3-20— Characteristic curve of a semiconductor diode. 162.118 162.119 Figure 3-21.— Testing zener diode. 75 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 to the vertical input of the oscilloscope. Therefore, the horizontal sweep will represent the applied voltage, and the vertical deflection will indicate the current through the diode under test. Figure 3-22 shows the characteristic pattern of a zener diode; note the sharp increase in current at the zener voltage (avalanche) point. For the zener diode to be acceptable, this voltage must be within the limits specified by the manufacturer. Instructions for constructing a simple in-circuit semiconductor diode and a transistor tester (used in conjunction with an oscilloscope) are contained in EIB 815 of 15 November 1971. circuits other than pulse and power amplifier stages are usually biased so that the emitter current is from 0.5 to 3 milliamperes, and the collector voltage is from 3 to 15 volts. The emitter current can be measured by opening the emitter connector and inserting a milliammeter. When making this measurement, you should expect some change in bias due to the meter resistance. The collector current can often be determined by measuring the voltage drop across a resistor in the collector circuit and calculating the current. If the transistor itself is suspected, it can be tested with an ohmmeter or transistor tester as described in the following paragraphs. Resistance Test ZENER VOLTAGE + 1 -V FORWARD 'CONDUCTION -V / BACK /CONDUCTION 162.120 Figure 3-22.— Zener diode characteristic curve. TESTING TRANSISTORS When trouble occurs in transistorized equipment, power supply voltage measurement, waveform checks, signal substitution or signal tracing methods are normally the first tests made. If a faulty stage is isolated by one of these test methods, voltage, resistance, and current measurements can be made to locate defective parts. When making these measurements, you must make certain that the voltmeter resistance is high enough to have no appreciable effect upon the voltage being measured, and that current from the ohmmeter will not damage the transistor. If the transistors are not soldered into the equipment, it is usually advisable to remove the transistors from their sockets during a resistance test. Transistors should be removed from or reinserted into their sockets only after power has been removed from the stage, since damage by surge currents may otherwise result. Procedures for removing soldered-in transistors are discussed in chapter 2. Transistor An ohmmeter can be used to test transistors by measuring the emitter-collector, base-emitter, and base-collector forward and back resistances. A back-to-forward resistance ratio on the order of 500:1 should be obtained for the collector-to-base and emitter-to-base measurements. The forward and back resistances between the emitter and collector should be nearly equal. All three measurements should be made for each transistor tested, since experience has shown that transistors can develop shorts between the collector and emitter and still have good forward and reverse resistances for the other two measurements. Because of shunting resistances in transistor circuits, you will normally have to disconnect at least two transistor leads from the associated circuit for this test. You must exercise caution during this test to make certain that current during the forward resistance tests does not exceed the rating of the transistor. Ohmmeter ranges which require a current of more than 1 miiliampere should not be used for testing transistors. Many ohmmeters are designed so that on the RX1 range 100 milliamperes or more can flow through the electronic part under test. Transistor Tester Laboratory transistor test sets are used in experimental work to test all characteristics of transistors. For maintenance and repair, however, it is not necessary to check all of the transistor parameters. A check of two or three performance 76 Chapter 3 -TEST EQUIPMENT characteristics is usually sufficient to determine whether a transistor needs to be replaced. Two of the most important parameters used for transistor testing are the transistor current gain (Beta) and the collector leakage or reverse current (Ico). These are discussed in Basic Electronics, Vol. I, NAVEDTRA 10087-C (or Navy Electricity- Electronics Training Series (NEETS), applicable module). Semiconductor Test Set AN/USM-206-A (fig. 3-23) is a rugged field type tester designed to test transistors and semiconductor diodes. The set will measure the Beta (amplification factor) of a transistor, the resistance appearing at the elec- trodes and the reverse current of a transistor or semiconductor diode, a shorted or open diode, the forward transconductance of a field effect tran- sistor, and the condition of its own batteries. In order to assure that accurate and useful information is gained from the transistor tester, the following preliminary checks of the tester should be made prior to testing any transistors: With the POLARITY switch (fig. 3-23) in the OFF position of the meter pointer should indicate exactly zero. (When required, rotate meter adjust screw on front of meter to fulfill this requirement). The POLARITY switch must always be left in the OFF position, when measurements are not actually being made, to prevent battery drain. Always check the condition of the test set batteries by disconnecting the test set power cord, placing the POLARITY switch in the PNP position and placing the FUNCTION switch first to BAT(l) then to BAT(2). In both BAT positions the meter pointer should move so as to indicate within the red BAT box. BETA MEASUREMENTS. -If the transistor is to be tested out of the.circuit, plug it into the test jack located on the right-hand side below the meter shown in figure 3-23. If the transistor is to be tested in the circuit, it is imperative that at least 300 OHMS exist between E-B, C-B, and C-E for accurate measurement. Initial setting of the test set controls is: (a) Function Switch to BETA (b) Polarity Switch to PNP or NPN (dependent on type of transistor under test) r © © ® e METER© ZERO IN/CKT OFF » __ T . PNP • NPN XLO ATT V. * BETA * A * X ° ' /K *'° ^\ chg« K*N. •e-b-i /m * /{% * \ ' 25 AMP o •C-E -■ 'CO.* * •l CES 2ER0 ES READ .25 AMP (STX^ X) POWER COARSE ®. 162.121 Figure 3-23.-AN/USM-206A front panel (c) Range Switch to X10 (d) Adjust meter zero for zero meter indication (transistor disconnected). NOTE: The polarity switch should remain OFF while transistor is connected to or disconnected from the test set. If it is determined that the Beta reading is less than 10, reset the range switch to XI and reset the meter to zero. After connecting the yellow test lead to the emitter, the green test lead to the base and the blue test lead to the collector, plug the test probe (not shown) into the jack located at the lower right hand corner of the test set. When 77 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 testing grounded equipment, unplug the 115V a.c. line cord and use battery operation. Beta reading is attained by multiplying the meter reading times the range switch se r tng. Refer to the Transistor Characteristics I ) k provided with the tester to determine if reading is normal for the type of transistor . test. ELECTRODE RESISTANCE MEASUREMENTS. -Connect the in-circuit probe test leads to the transistor with the yellow lead to the emitter, the green lead to the base, and the blue lead to the collector. Set the function switch to the OHMS E-B position and read the resistance between the emitter and base electrode on the center scale of the meter. To read the resistance between the collector and base and the collector and emitter, set the function switch to OHMS C-B and OHMS C-E. These in-circuit electrode resistance measurements are used to correctly interpret the in-circuit Beta measurements. The accuracy of the BETA XI, XI Orange is ±15% only when the emitter to base load is equal to or greater than 300 ohms. ICO MEASUREMENTS (COLLECTOR LEAKAGE TEST). -Adjust meter zero control for zero meter indication. Plug the transistor to be tested into the jack or connect test leads to the device under test. Set the PNP/NPN switch to correspond with the transistor under test. Set the function switch to ICO, the range switch to X0.1, XI or XI as specified by the transistor data book for allowable leakage. Read leakage on bottom scale, and multiply by the range setting figure as required. DIODE MEASUREMENTS. -Diode qualitative in-circuit measurements are attained by connecting the green test lead to the cathode and the yellow test lead to the anode. Set the function switch to Diode IN/CKT and the range switch to XI . (Insure that the meter has been properly zeroed on this scale.) If the meter reads down scale, reverse the polarity switch. If the meter reads less than midscale, the diode under test is either open or shorted. The related circuit impedance of this test is less than 25 ohms. PRECAUTIONS. -Transistors, although generally more rugged mechanically than electron tubes, are susceptible to damage by excessive heat and electrical overload. The following precautions should be taken in servicing transistorized equipment: 1 . Test equipment and soldering irons must be checked to make certain that there is no leakage current from the power source. If leakage current is detected, isolation transformers must be used. 2. Ohmmeter ranges which require a current or more than 1 miiliampere in the test circuit should not be used for testing transistors. 3. Battery eliminators should not be used to furnish power for transistor equipment because they have poor voltage regulation and, possibly, high ripple voltage. 4. The heat applied to a transistor, when soldered connections are required, should be kept to a minimum by using a low-wattage soldering iron and heat shunts, such as long-nose pliers on the transistor leads. 5. All circuits should be checked for defects before a transistor is replaced. 6. The power should be removed from the equipment before replacing a transistor or other circuit part. 7. When working on equipment with closely spaced parts, conventional test probes are often the cause of accidental short circuits between adjacent terminals. Momentary short circuits, which rarely cause damage to an electron tube, may ruin a transistor. To avoid accidental shorts, the test probes can be covered with insulation for all but a very short length of the tips. 78 CHAPTER 4 NTDS UNIT COMPUTER CP-642B/USQ-20(V) The Digital Data Computer CP-642B/USQ-20(V) (fig. 4-1) is a general-purpose, stored-program, real-time, digital computer capable of processing large quantities of complex data where heavy input/output communication is required. The computer is suitable for such real-time applications as missile guidance and tactical control and display. It can be connected simultaneously to a variety of peripheral equipment. Such equipment includes teletypewriters, magnetic tape units, high-speed printers, card read/punch units, display and display interface equipment, radar and radar adapting interfaces, paper tape units, and manual entry devices. The computer is also capable of communicating with a wide variety of other asynchronous external devices in real-time applications. Other compatible peripheral equipment includes: video processors, various types of displays, digital-to-analog and analog-to-digital converters, X-Y plotters, and high-speed radio transmission links. Its primary use in the Navy today is as the unit computer for the Naval Tactical Data System. CHARACTERISTICS The CP-642B consists of four functional sections: control, arithmetic, memory and input/output and is capable of 30-bit (whole word) or 15-bit (half-word) computer word operation. These words are internally stored in one of three internal memory areas. The computer has a valid repertoire of 62 flexible single address instructions that may be modified by seven index registers (B registers). The mathematical and logical operations are accomplished using parallel one's complement subtractive arithmetic. Its input/output section can communicate on 16 I/O channels with provisions for high speed or low speed interface with all I/O transfers in parallel. The internal real-time clock has a frequency of 1024Hz, and provisions are available for using an external clock. FRONT PANEL CONTROLS The maintenance and control console (fig. 4-2), located on the upper front of the computer, includes indicator lamps which display a detailed report of the internal status of the computer and controls to permit manual initiation of various operations. During normal operation, it is not necessary to monitor this panel. The front panel shown in figure 4-2 has been divided into three sections (I, II, III) for ease of explanation. Switches and Indicators The maintenance panel provides manual controls for selecting the following special modes of operation: 1. Execution of one program instruction for each depression of a switch. 2. Execution of consecutive program instructions at a slow controllable rate. 3. Execution of one master clock phase each time a switch is depressed. 4. Execution of consecutive master clock phases at a slow controllable rate. 5. Operation that is normal except that the computer does not stop for a programmed STOP 79 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 151.240 Figure 4-1.-CP-642B/USQ-20(V) digital computer. instruction (called abnormal high-speed operation). Although the operation of the computer is automatic, the manual controls may be used to suspend normal operation of the computer without affecting subsequent operations. There are switches which are used to affect the entire computer operation, control parts of the computer operations, provide certain jump and/or stop conditions and govern speed of operation. 80 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) ode Switches (Section I) Start-Step/Restart (Section I) The computer is operative in any one of veral modes (LOAD, PHASE STEP, OP STEP RUN). The indicator-switch controls allow ie operator to select a specific computer perating mode. Pressing the LOAD dicator-switch locks out all interrupts and aces the computer in a condition for initial ogram loading from a selected peripheral ;vice. Pressing the PHASE STEP switch allows the Dmputer to be operated on a le-clock-phase-at-a-time basis. This mode is Drmally used for maintenance. Pressing the OP STEP switch allows the imputer to execute one instruction at a time, lis mode is usually used for program ibugging. Pressing the RUN indicator-switch (Section allows the computer to operate at normal high eed. Each of the mode indicator-switches will 3W when depressed. Once a mode selection has been made, the computer is started by operating the START-STEP/RESTART switch. Table 4-1 summarizes the action performed by the various selections. Stop (Section I) The STOP switch, when operated, disables the high-speed operation of the computer. It also extinguishes the RUN indicator. In computers where an applicable field change (modification) has been installed, the STOP switch in its UP position will effect Bootstrap Memory and inhibit Bootstrap Mode of operation. (These terms will be discussed in detail later.) The PHASE REPEAT switch forces the repetition of the selected clock phase at a high-speed operation rate. The PHASE REPEAT switch is active only if the PHASE STEP mode has been selected. Table 4-1. -Summary of RESTART/START-STEP switch functions MODE START-STEP RESTART an Initiates high speed operation Allows self-recovery from program stops o Step Allows the execution of one instruction each time the switch is operated Allows initiation of one instruction at a repetition rate controlled by the RESTART SPEED CONTROL and low speed oscillator liase Step i Generates one clock phase each time the switch is operated Generates clock phases at a rate controlled by the RESTART SPEED CONTROL and low speed oscillator I |)ad Initiates high speed operation starting at address 00540 (executes bootstrap) NOT USED 81 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Automatic Recovery (Section I) The AUTOMATIC RECOVERY switch directs the computer's activity after a program fault. In the up position, all interrupts are locked out, a jump is initiated to address 00540 and the selected Bootstrap program is executed. If a program fault occurs with the switch in the center position, a jump to address 00000 is executed. The program starting at that address is then performed. Master Clear (Section I) With the computer not in the RUN mode, depressing the MASTER CLEAR pushbutton will clear (reset) most of the flip-flops in the computer, including the register indicators. If the computer is in the RUN mode, only the FAULT indicator will be cleared if the MASTER CLEAR switch is depressed. This feature prevents the computer from being inadvertently cleared during run. Programs I and II (Section I) The PROGRAM I or II pushbutton indicators are used to select the Bootstrap program which will be executed during manual initiation in the LOAD mode. They also indicate the Bootstrap program to be used when referenced by the AUTOMATIC RECOVERY switch, and they light the associated green indicator when selected. Restart Speed Control The RESTART SPEED CONTROL is a potentiometer that is used to vary the speed of operation when the computer is in the PHASE STEP or OP STEP modes and the START-STEP/ RESTART switch is in the up position. I) n RUN indicator glows when the in high-speed operation. Pressing the ch during high-speed operation will the RUN indicator. Fault (Section I) The red FAULT indicator glows whenever the computer encounters a program fault or attempts to execute an instruction from control memory. Instruction function codes 00 and 77 are illegal and will cause a fault condition and a fault interrupt within the computer if they are executed. The FAULT indicator, once lighted, can be extinguished only by pressing the MASTER CLEAR switch. Marginal Check (Section I) The MARGINAL CHECK indicator indicates that the computer is in a memory margin check condition. Margin check will be discussed later in this chapter. Local Control (Section I) The LOCAL CONTROL indicator is lighted to indicate that the computer is being operated from the maintenance panel. The computer can also be operated remotely from another equipment. The remote equipment will be discussed in another chapter. Overtemp Warning (Section I) When lighted, the OVERTEMP WARNING pushbutton-indicator indicates an overtemperature condition inside the computer cabinet (115°F). When this temperature is reached, an overtemperature alarm horn sounds and can be reset by pressing the OVERTEMP WARNING pushbutton indicator. C1-C2-C3-C4 (Section II) The two C register rotary switches allow switching between the four C registers and the C register indicator-switches. The left switch permits the upper 15-bits to be displayed, and the right switch displays the lower 1 5-bits. Register Indicator-Switches (Section II) The indicator-switches labeled K3, K2, C, R, B, S, Q, A, D, X, Z and U display the bit 82 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) positions of the associated register. Each of the bit positions may be set manually, but the whole register must be cleared at the same time by the clear pushbutton to the right of the register. Most of these registers are not addressable by the program and are used for internal operations of the computer. The contents are displayed on the front panel for ease of troubleshooting. Designator Indicator-Switches (Section II) The designator indicator-switches are particularly useful when troubleshooting the computer if the technician is familiar with the information that is displayed in them. Generally, these indicators specify a timing point in a predetermined sequence of events. For example, the row of indicators labeled MAIN TIMING are the indicators for the flip-flops of the timing chain. Flip-flops of timing chains are identified by an abbreviation of the timing chain name and the flip-flop nomenclature (e.g., flip-flop 00T1 1 /01T1 1 of the main timing chain becomes MTT11). The timing chains shown on the front panel are: (1) MAIN TIMING - main timing chain Tl 1 - T63 (2) c - C sequence Tl 1 - T63 (3) af - A final sequence T41 - T63 (4) bf - B final sequence T41 - T61 (5) Mul/Div Seq - Multiply /Divide/Square Root Subsequence (6) SUB SEQ - made up of three minor timing chains- Interchange AQ Ready Y Store Y Each of the three timing chains and associated sequences will be discussed later in this chapter. The indicators labeled ACTIVE SEQ are used to denote the sequence that is currently being performed: Af, Bf, Df, or I/O. The AfEn (A Final Enable) indicator, when set, indicates that the A final sequence has been enabled. In the Op Step mode this indicator-pushbutton must be depressed. The EF DESIGNATORS lights are used to specify the channel number for external function acknowledges and output data acknowledges. The r designator is used with a repeat instruction to specify how the operation is to be repeated. Bit 3 set indicates that the r designator is active, and bits through 2 determine which of seven different methods is to be used. A detailed explanation of the functions bf the r designator may be found in the operator's section of the appropriate technical manual. The g designator is used for extended arithmetic operations. Each of the indicators is from a flip-flop in the arithmetic sequences that may or may not be set at various times: a - Abort flip-flop b - B = flip-flop ah - Arithmetic Hold flip-flop bh - Bf Inhibit flip-flop The CLOCK PHASE indicators specify which master clock phase is currently active. During normal operation these indicators will all appear to be lighted due to the frequency of the clock. I/O Indicator-Switches (Section III) All the information displayed in these indicators deals with I/O control signals. The I/O channels are numbered through 17 8 (right to left) with groups of four channels on each I/O chassis. The control signals are labeled down one side of the array of switches. The following signals are from flip-flops that specify a particular function on the indicated channel. (1) OD/EF ACK-Output Data/External Function Acknowledge (2) ID ACK-Input Data Acknowledge (3) OD ACT-Output Data Active (4) OD MON-Output Data Monitor (5) ID ACT-Input Data Active (6) ID MON-Input Data Monitor (7) EF ACT— External Function Active (8) EF MON— External Function Monitor 83 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 The MN PRI indicators are for the main priority scheme of the computer, and they indicate which channel on which chassis has precedence. The SUB PRI (subpriority) indicators are from flip-flops that determine the operating mode (input or output) of the I/O section. The signal names for these indicators are: (1) EI— External Interrupt (2) EF— External Function (3) OD-Output Data (4) ID-Input Data (5) FM— Fault Monitor Interrupt (6) EIM-External Interrupt Monitor (7) EFM— External Function Monitor (8) ODM-Output Data Monitor The TRANS (I/O translator) indicators provide a visual indication of the current I/O operating mode. The indicator labels mean: (1) RTC-Real Time Clock (2) El-External Interrupt (3) EF— External Function (4) OD-Output Data (5) ID-Input Data All I/O signals, what they do and how they operate, will be discussed later in this, chapter. The P register falls into the same category as the registers in section II of the front panel. Disconnect (Section III) The operation of the disconnect circuit involves an indicator and three switches. Selecting any of the three switches (RTC, ADV P, or B7) causes the red DISCONNECT indicator to glow. Selecting the B7 switch inhibits decrementing the B7 register during the repeat mode of operation. Selecting the ADV P switch inhibits the incrementing of the P register. Selecting the RTC switch inhibits incrementing the real-time clock. Jump (Selective) The red JUMP indicator glows when any or all of the three Selective Jump switches ( 1 , 2, or 3) are selected. Selecting the switches allows manual selection or omission of predetermined program sections in conjunction with the 61 or 65 instructions. (See table 4-2.) Stop (Selective) The red STOP indicator glows when any or all of the Selective Stop switches (5, 6, or 7) are selected. Selecting the switches allows program monitoring when used in conjunction with appropriate 61 and 65 instructions. The red STOP 5, 6, or 7 indicators glow when a corresponding switch is selected, and another indicator glows when the program stop occurs. Program Stop The red 4-stop indicator will glow whenever the computer reaches a programmed stop other than a key stop (selective stop). This normally will be at the end of a subroutine when some action is required by the operator, such as supplying additional data required for the solution of the problem. Also, the stop at the end of a program is normally a 4-stop. INSTRUCTIONS A large repertoire of instructions (table 4-2) provides the means for directing the computer to perform the mathematical operations involved in solving problems in real-time. Single address instructions are employed, most of which have an execution time of 8 to 12 microseconds. The computer can also be instructed to perform the data processing necessary for initiating and maintaining communications between, or control of, compatible external equipment. Short routines can be manually entered into the computer by operating the appropriate console controls. Lengthy programs are entered into computer via a peripheral device such as a punched paper tape reader or a magnetic tape unit. The instructions contained in the program provide the computer with constants, decision-making capabilities, and an input/output capability. During operation, the program instructions are usually obtained from memory and performed in a sequential manner. 84 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-2.-CP-642 function codes a. (-MNEMONICS BRIEF DESCRIPTION OCTAL INSTRUCTION MNEMONIC OF OPERATION SPECIAL CODE (MEMORY AID) PERFORMED BY CONSIDERATIONS THE INSTRUCTION Fault light; — P Reg. 00 (Fault interrupt) ERR 01 RIGHT SHIFT Q R.SH.Q or RSH.Q Shift (Q) right by Y; Sign extend Qu, truncate Qj_ 02 RIGHT SHIFT A R.SH.A or RSH.A Shift (A) right by Y; Sign extend A u , truncate A L 03 RIGHT SHIFT AQ R.SH.AQ or RSH.AQ Shift (AQ) right by Y; Sign extend A u , truncate Q| 04 COMPARE COMP Sense j; (A)i = (A)f see table 4-2b 05 LEFT SHIFT Q L.SH.Q or LSH.Q Shift (Q) left by Y; Qu ends-around into Q|_ 06 LEFT SHIFT A L.SH.A or LSH.A Shift (A) left by Y; A u ends-around into A|_ 07 LEFT SHIFT AQ L.SH.AQ or LSH.AQ Shift (AQ) left by Y; A u ends-around into Q|_ 10 ENTER Q ENT.O y*~ Q * CLEAR Q CLR.Q 0-Q k = 0, B = 0, Y = 11 ENTER A ENT.A Y — A * CLEAR A CLR.A — A k = 0, B = 0, Y = 12 ENTER Bj ENT.Bn Y — Bj CLR.B n — BJ * NO OPERATION NO.OP j = 13 13k = 3-max of 36 fisec 13k = 0,1,2 - 8 pisec * EXTERNAL FUNCTION XF(M).C n Y — (140 + Cj); w(Y) - Cj EF lines; Cj W/ MONITOR internal interrupt when done k = * EXTERNAL FUNCTION XF(FM).C n Y— (140 + Cj); w(Y) (forced) — Cj W/MONITOR or Cj EF lines; internal interrupt k = 1 (FORCED) XF (MF).C n when done „ * EXTERNAL FUNCTION Cj XF.C n Y — (140 + Cj); w(Y) — Cj EF lines k = 2 * EXTERNAL FUNCTION C- XF (F).C n Y — (140 + C-); w(Y) (forced) — Cj EF lines J (FORCED) J k = 3 14 STORE Q STR.Q Q-Y * COMPLEMENT Q CPL.Q % -Qn k = 15 STORE A STR.A A_— Y * COMPLEMENT A CPL.A n — *" "n k = 4 16 STORE Bj STR.B n (Bj)- Y j = 0; STORES ZEROS IF k = - 4 * CLEAR Y STR.0 0's — Y [store +0) * SET Y STR.l l's — Y [store -01 J = 0; STORES ONES IF.k =5-7 17 17k = 2-max of 36 ixsec 17k = 0, 1 - 3 /xsec 17k = 3 -12 /xsec k = 0,1 * IF EXTERNAL FUNCTION XF.BUSY.JP.C n IF Cj busy; Y— P Reg. BUFFER BUSY (OR NO EFR's) ON C?, THEN JUMP * INPUT ONE WORD Cj : INP(F)HOLD.C n Cj INPUT — Y; force IDA; program k = 2 HOLD UNTIL RECV'D holds until complete * EXTERNAL INTERRUPT Cj-Y STR.X.INT.C n Cj X.INT; (520 + Cj) — Y; enable Cj X.INT k = 3 85 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Table 4-2.— CP-642 function codes— Continued 0. t- MNEMONICS (continued) BRIEF DESCRIPTION OCTAL INSTRUCTION MNEMONIC OF OPERATION SPECIAL CODE (MEMORY AID) PERFORMED BY CONSIDERATIONS THE INSTRUCTION (A) + Y — A 20 ADD A ADD. A 21 SUBTRACT A SUB. A (A) - Y— A 22 MULTIPLY MUL (Q)Y — AQ 23 DIVIDE DIV ( AQ ) * Y — Q ; Remainder— A JfAQT— Q ; Remainder-* A * SQUARE ROOT SQRT k = 7 square root execution time r 52 /isec 24 REPLACE A + Y RPL.A+Y (A) + Y — A&Y 25 REPLACE A - Y RPL.A-Y (A) - Y — A&Y 26 ADD Q ADD.Q (Q) + Y-Q see table 4-2c 27 SUBTRACT Q SUB.Q (Q) - Y-Q see table 4-2c 30 ENTER Y + Q ENT.Y+Q Y + (Q)-A 31 ENTER Y - Q ENT.Y-Q Y - (Q)-Q 32 STORE A + Q STR.A+Q (A) + (Q) — Y&A 33 STORE A - Q STR.A-Q (A) - (Q)— Y&A 34 REPLACE Y + Q RPL.Y+Q (Y) + (Q) — Y&A 35 REPLACE Y - Q RPL.Y-Q (Y) + (Q) — Y&A 36 REPLACE Y + 1 RPL.Y+1 (Y) + 1 — Y&A 37 REPLACE Y - 1 RPL.Y-1 (Y) - 1— Y&A 40 ENTER LOGICAL PRODUCT ENT.LP LlY(Q)|-A see table 4-2c 41 ADD LOGICAL PRODUCT ADD. LP L|Y(Q)| + (A) -A 42 SUBTRACT LOGICAL PRODUCT SUB. LP L|Y(Q)| - (A)-A 43 COMPARE MASK MASK.COMP (A) - L|Y(Q)| ; sense j ; then (A) + L|Y(Q)| ; A i = A f use normal j values (A) unchanged 44 REPLACE LOGICAL PRO- DUCT RPL.LP L l(Y) (0)1 — Y&A see table 4-2c 45 REPLACE A + LOGICAL PRODUCT RPL.A+LP LI(Y)(Q)1+ (A)- Y&A 46 REPLACE A - LOGICAL PRODUCT RPL.A-LP (A) - L|(Y)(Q)1-Y*A 47 STORE LOGICAL PRO- DUCT STR.LP L[(A)(Q)1-Y; (A)i = (A) f (A) is not changed 50 SELECTIVE SET SEL.SET Set (A) n for Y n = 1 51 SELECTIVE COMPLEMENT SEL.CPL Complement (A) n for Y n = 1 52 SELECTIVE CLEAR SEL.CLR Clear (A) n for Y n = 1 53 SELECTIVE SUBSTITUTE SEL.SUS Y n — A n for (Q) n = 1 86 Chapter 4- -NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-2.— CP-642 function codes— Continued a. f-MNEMONICS (continued) BRIEF DESCRIPTION OCTAL INSTRUCTION MNEMONIC OF OPERATION SPECIAL CODE (MEMORY AID) PERFORMED BY THE INSTRUCTION Set (A) n for Y n = 1; — Y&A Complement (A) n for Y n = 1; CONSIDERATIONS 54 REPLACE SELECTIVE SET RPL.SEL.SET 55 REPLACE SELECTIVE RPL.SEL.CPL. COMPLEMENT results in Y&A 56 REPLACE SELECTIVE CLEAR RPL.SEL.CLR Clear (A) n for Y n = 1; —Y&A 57 REPLACE SELECTIVE SUBSTITUTE . RPL.SEL.SUB (Y.)n — (A) n for (Q)n = 1; — Y&A 60 JUMP (Arithmetic) Jump to Y per special interpreta- tion of j : al so see table 4-2d * CLEAR INTERRUPT CIL (If j = 0) — CIL LOCKOUT (J = 0,1) CIL.JP (If j = 1)— CIL; Y— P Reg. 61 JUMP (Manual ) Jump to Y per manual keys 1, 2, or 3; Jump & Stop for keys 5, 6, 7 (See special j interpretation). see table 4-2d If jump condition is not 62 JUMP ON Cj ACTIVE JP.INPACT.Cn If input buffer busy Cj; Y — P Register satisfied, execution time INPUT BUFFER is 4 /isec 63 JUMP ON Cj ACTIVE JP. OUTACT.C r If output buffer busy on C5; Y — P Register OUTPUT BUFFER 64 RETURN JUMP (P Reg) — Y L ; NI at Y + 1 See table 4-2d (Arithmetic) (special j interpretation)! If return jump condition 65 RETURN JUMP (P Reg) — Yl; NI at Y + 1 is not satisfied, execu- (Manual ) (special j interpretation)! tion time is 4 /usee 66 (see follow- ing) * TERMINATE Cj INPUT BUFFER TERM.INP.C n terminate input buffer on Cj k = * ENABLE ALL INTERRUPTS ALL. INT enable all internal (monitor) and external (equip status) interrupts k ' = 1, b = * DISABLE ALL INTERRUPTS NO. INT disable all internal -external interrupts k = 1, b f * ENABLE ALL EXTERNAL INTERRUPTS ALL. X. INT enable all external interrupts k = 2, b = * DISABLE ALL EXTERNAL INTERRUPTS NO. X. INT disable all external interrupts only; does not effect monitors k = 2, b f * ENABLE Cj EXTERNAL INTERRUPT X.INT.C n enable external interrupt on Cj k = 3, b = * DISABLE Cj EXTERNAL INTERRUPT NO.X.INT.C n disable external interrupts on C^ only; does not effect monitors k = 3, b f 67 * TERMINATE Cj OUTPUT TERM. OUT. C n terminate output buffer on Cj k = BUFFER * TERMINATE Cj EF OUT- TERM. XF. OUT. terminate external function k = 1 PUT BUFFER Cn buffer on Cj terminate all buffers * TERMINATE ALL INPUT/ TERM. ALL k = 2 OUTPUT/EF BUFFERS 70 REPEAT RPT Repeat NI Y_ times (see special j interpretation) see table 4-2e 71 B SKIP ON Bj B.SK.B n or BSK.B n If (Bj) = Y; skip NI, clr Bj If (Bj) f Y; add 1 to Bj , execute Next Inst. tNOTE: On Return Jumps (64 & 65 instructions) : P Reg contains current address when instruction is read from memory, but will contain address + 1 when instruction is execu ted. 87 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Table 4-2.— CP-642 function codes— Continued 0. (-MNEMONICS (continued) BRIEF DESCRIPTION OCTAL INSTRUCTION MNEMONIC OF OPERATION SPECIAL CODE (MEMORY AID) PEFORMED BY CONSIDERATIONS THE INSTRUCTION If (Bj) = 0; execute NI 72 B JUMP ON B, B.JP.B n or BJP.B n If (Bj) + 0; subtract 1 from Bj, jump to Y 73 INPUT BUFFER ON Cj INP.C n Y(k) — (100 + Cj); initiate input on Cj (without monitor mode' 74 OUTPUT BUFFER ON Cj OUT.C n Y(k)_— (120 + Cj); initiate output on Cj (without monitor mode * EXTERNAL FUNCTION OUT- XF.OUT.C n w(Y)— (140 + Cj); initiate EP k = 2 PUT BUFFER ON Cj (w/o output on Cj monitor) 75 INPUT BUFFER ON Cj INP(M)C n Y(k)_— (100 = Cj); initiate input (with monitor mode) on Cj; enable interrupt address (40 + Cj) Y(k);~ (120 + Cj); initiate output 76 OUTPUT BUFFER ON Cj OUT(M)C n (with monitor mode) on Cj ; enable interrupt address (60 + Cj) * EXTERNAL FUNCTION XF.OUT(M)C n OUTPUT BUFFER ON Cj put on Cj ; enable interrupt address k = 2 (W/monitor) (500 + Cj) 77 (Fault interrupt) FAULT fault light; — P Reg NOTE: This table is not compiler or assembler oriented in its use of MNEMONICS. The MNEMONICS used were selected to supply concise in formation on the machine language instruction. MNEMONICS starting as STR or RPL use the respective Store or Replace k- values. All others, except as noted, use the Read k-values. b. k- MNEMONICS NORMAL READ (-VALUES MNEUMONIC Read instructions (01- 12, 20-23, 26 , 27, 30, 31, 40-43, 50-53, 60-65, 70-72): k = 0: Yu = 0's; YL = Y (blank) k = 1 Yu = 0's; YL = (Y)L L k = 2 Yu = 0's; YL = (Y)u U k = 3 Y = (Y) M k = 4 Yu = same bits as Y14; YL = Y X k = 5 Yu = same bits as Y14; YL = (Y)L XL k = 6 Yu = same bits as Y29; YL = (Y)u XU k = 7 Yu = (A) A For ii istruc tions 22, 52, and 53, k = 7 is not used. 88 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-2.— CP-642 function codes— Continued b. k- MNEMONICS (continued) NORMAL STORE K-VALUES MNEMONIC Store instructions (14-16, 32, 33, 47): k = Store operand in Q.* Q k = 1: Store operand L in YL, leaving (Y)u undisturbed. L k = 2: Store operand L in Yu, leaving (Y)L undisturbed. U k = 3: Store operand in Y. M k = 4: Store operand in A.** A k = 5: Store complement of operand L in YL, leaving (Y)u undisturbed. CPL/L k = 6: Store the complement of operand L in Yu, leaving (Y)L undisturbed. CPL'U k = 7: Store the complement of operand in Y (storing the complement of Bj is the same complement as for a 30-bit register). CPL'M * A 1400000000 instruction complements (Q) ** A 1504000000 instruction complements (A) REPLACE INSTRUCTION K-VALUES MNEMONIC (Notes) Replac e instructions (24, 25, 34-37, 44-46, 54-57) k = 0: Not used. __ k = 1: Read portion - Yu = 0's; YL = (Y)L. Store portion - Stores operand L in UL leaving (Y)u undisturbed. L k = 2: Read portion - Yu = 0's; YL - (Y)u Store portion - Stores operand L in Yu leaving (Y)L undisturbed. U k = 3: Read portion - Y = (Y). Store portion - Stores operand in Y. M k = 4: Not used. — k = 5' Read portion - Yu = same bits as Y14; YL = (Y)L Store portion - Stores operand L in YL leaving (Y)u undisturbed. XL (X in A only) k = 6 Read portion - Yu = same bits as Y29; YL = (Y)u Store portion - Stores operand L in Yu leaving (Y)L undisturbed. XU (X in A only) k = 7 Not used c. b- MNEMONICS NORMA . b DESIGNATORS y. MNEMONIC (blank) b = : Do not modify b = 1 : Add (Bl) to y. Bl j b = 2 : Add (B2) to y B2 b = 3 : Add (B3) to y B3 b = 4 : Add (B4) to y B4 b = 5 : Add (B5) to y B5 b = 6 : Add (B6) to y B6 b = 7 : Add (B7) to y B7 89 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Table 4-2.-CP-642 function codes— Continued d. j- MNEMONICS NORMAL J VALUES MNEMONIC NOTE: These are the ship- ; = 0, Do not Skip NI (Next Instruction). (blank) MNEMONICS ; = 1, Skip NI. SKIP referred to in j = 2, Skip NI if (Q) is positive. * T SKIP.Q.POS or SKIP.QP Table 4-2c. j = 3, Skip NI if (Q) is negative. * f SKIP.Q.NEG or SKIP.QN ; = 4, Skip NI if (A) + (positive zero), t SKIP. A. ZERO or SKIP.AZ ; = 5, Skip NI if (A) f 0. t SKIP. A. NOT. ZERO. or SKIP.ANZ ; = 6, Skip NI if (A) is positive. 1 SKIP.A.POS or SKIP.AP j = 7, Skip NI if (A) is negative, t SKIP.A.NEG or SKIP. AN i r If f = 40 or 44 and j = 2, skip if even pari ty. If f = 40 or 44 and j = 3, skip if odd parity. tWhen f = 26 or 27, a special interpretation is given the values of j . They are: ; = 2, Skip NI if (A) is positive. j = 5, Skip NI if Q is not zero. ; = 3, Skip NI if (A) is negative. j = 6, Skip NI if Q positive E = 4, Skip NI if Q is zero. j = 7, Skip NI if Q negative (-INDEX INSTRUCTIONS (12, 16, 71, 72) NOTE: B-Index J = 0, No index register-computer substitutes all zeros for a B0. instructions do J C = 0, j value indicates B register (B n is Bj ) not util ize j values as skips OMPARE (04 INSTRUCTION) MNEMONIC NOTE: The following in- ; = 0, Do not skip NI . (blank) structions use ; = 1, Skip NI. SKIP j-MNEMONIC ; = 2, Skip NI if Y < (Q). SKIP.Y.LE.Q instead of f- ; = 3, Skip NI if Y > (Q) SKIP.Y.GR.Q MNEMONIC for ; = 4, Skip NI if Y < (Q) and Y >(A). SKIP. Y. OUT. AQ the instruction ; = 5, Skip NI if Y > (Q) or Y <(A). SKIP.Y.IN.AQ MNEMONIC in ; = 6, Skip NI if Y < (A). SKIP.Y.LE.A Table 4-2e. ■ = 7, Skip NI if Y >(A). SKIP.Y.GR.A ARITHMETIC JUMPS (60 & 64) MNEMO MIC (60 inst.) (64 inst.) j = 0, do not jump* CIL NO -RJP ; = 1, jump* CIL-JP RJP ; = 2, jump if bit 29 of Q-register JP'Q'POS or RJP-Q-POS or clear JP-QP RJP-QP ; = 3, jump if bit 29 of Q-register JP-Q-NEG or RJP-Q-NEG or set JP-QN RJP-QN : = 4, jump if A-register clear JP-A-ZERO or RJP-A-ZERO or JP-AZ RJP-AZ ; = 5, jump if any bit in A-register JP-A-NOT-ZERO or RJP -A. NOT -ZERO or set JP-ANZ RJP-ANZ ; = 6, jump if bit 29 of A-register JP-A-POS or RJP-A-POS or clear JP-AP RJP-AP ■ = 7, jump if bit 29 of A-register JP-A-NEG or RJP'A-NEG or set JP-AN RJP -AN i r Any enabled interrupt can be honored after CIL or CIL* JP is execu ted. When an 1 nterrupt is honored, all other interrupts are locked out until the next CIL or c :IL"JP is executed. CIL or CIL-JP also clears bootstrap mode. 90 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-2.— CP-642 function codes— Continued d. j- MNEMONICS (continued) MANUAL JUMPS (61 & 65) MNEMONIC (61 inst.) (65 inst. ) j = 0, jump JP RJP-KEY or RJP-M j = 1, jump if JUMP 1 switch up JP-KEY1 RJP-KEY1 j = 2, jump if JUMP 2 switch up JP-KEY2 RJP-KEY2 j = 3, jump if JUMP 3 switch up JP-KEY3 RJP-KEY3 j = 4, jump; then stop JP-STOP RJP-STOP j = 5, jump; stop if STOP 5 switch up JP-ST0P5 RJP-ST0P5 j = 6, jump; stop if STOP 6 switch up JP"ST0P6 RJP-ST0P6 j = 7, jump; stop if STOP 7 switch up JP-ST0P7 RJP-ST0P7 Repeat (70) Instruction - modifies NI by j while repeating NI by Y MNEMONIC Read, Store, or read cycle of a Replace Inst. j = 0, NI unmodified store cycle when NI is a Replace Inst. (blank) INC j = 1. Y_ of NI increased by 1 upon each successive re-execution of NI j = 2, Y_ of NI decreased by 1 upon each successive re-execution of NI DEC j = 3, Y_ of NI increased by b of NI upon re-execution of NI B-INC j = 4, NI unmodified X of NI modified by B6 during store sequence for Replace inst. (B6) j = 5, Y_ of NI increased by 1 upon each successive Y_ of NI modified by B6 during INC(B6) re-execution of NI store sequence for Replace inst. j = 6, Y_ of NI decreased by 1 Y_ of NI modified by B6 during DEC(B6) upon each successive store sequence for Replace re-execution of NI inst. j = 7, Y_ of NI increased by b X of NI modified by B6 during B'INC(B6) of NI upon re-execution store sequence for Replace of NI inst. NOTE: Modifications to NI do not c is executed. Table 4-2e. MNEMONIC format lange the NI as it is stored, only as it instruction MNEMONIC . k-MNEMONIC (B + Y). skip MNEMONIC 91 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 However, a program decision may direct the computer to either skip an instruction or to exit from the present routine and enter another. The routine is terminated when either a predetermined event or conclusion is reached, or when all of the instructions have been performed. Terms and Symbols Before a discussion of instruction word format, there are some terms and symbols that should be completely understood. These terms and symbols are not particularly unique to the CP-642B computer but may be found in some of the other data processing systems throughout the Navy and civilian business world. The symbol =» should be interpreted as "means" or "implies that." (e.g., 1 "* one). The symbol a is to be interpreted as meaning any register or memory location. (a) =» the content of a. (a)i =* the initial content of a. (a)f =» the final content of a. a n =* the nth bit of a. (a) n =► the nth bit of the content of a. a u =» the upper 1 5-bits of a. GL =* the lower 1 5-bits of a. operand ^ that which is operated upon. y (lower case) =» operand designator-lower 1 5-bits of the instruction word-UL Y (upper case) ^ address of the operand— usually formed by y + (index register) (Y) ^ the contents of memory address Y Y_ => the operand (regardless of source) LY(a) ^ the logical product of Y and the contents of a register or memory location. Instruction Word Formats An instruction word for the CP-642B Computer is made up of parts called designators. Each designator specifies a particular function for the computer to perform for that specific instruction. The CP-642B uses a fixed instruction word length of 30-bits divided into five designators labeled f, j, k, b and y. There are two types of formats for the CP-642B instructions, Format I or normal and Format II or input/output. A general format for the instruction words and associated explanations for the designators are shown in table 4-3. FUNCTION CODE DESIGNATOR (f).-The f designator (bits 2 29 ■ 2 24 ) is always the upper six bits of the instruction word. It specifies the general operation to be performed by the computer. All values from 01-76 inclusive are defined in the instruction repertoire (table 4-2). Codes 00 and 77 are illegal function codes and if executed cause a fault interrupt and a jump to the address specified by the setting of the AUTOMATIC RECOVERY switch. BRANCH CONDITION DESIGNATOR (j).-The j designator (bits 2 23 - 2 21 ) of a normal instruction word is primarily used for jump and skip determinations (if certain predetermined conditions are satisfied), for index (B) register specification (for certain instructions) and for repeat status interpretation (for certain other instructions). Examples of skip determinations for some function codes are shown below: j = 0-Do not skip the next instruction (NI) j = l-SkipNI j = 2 -Skip NI if (Q) is positive j = 3 -Skip NI if (Q) is negative j = 4-Skip NI if (A) is zero (positive zero) j = 5 -Skip NI if (A) is non-zero j = 6— Skip NI if (A) is positive j = 7 -Skip NI if (A) is negative 92 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-3.— Instruction word format 29 14 2/ 2/ 2/ ffffffjjj kkk bbb yyyyyyyyyyyyyyy FORMAT I (Normal) 29 14 2/ AAAA A A 2 / 2/ Designator kkbbb yyy yyyyyyyyyyyy FORMAT II (I/O) Name Interpretation Format I Format II Function code designator Specifies operation to be performed by instruction Same Branch condition designator (1) Jump or skip operations (2) Index (B) register specifi- cation (3) Repeat Specifies I/O channel number A Called j (j cap or j hat) Operand interpretation designator Specifies where the operand is to come from and/or where it is to be stored Same A Called k (k cap or k hat) Address modification designator (index designator) Specifies B register to be used for address modification Same Operand designator May be the operand or the address of the operand Same 93 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Specific examples of j values may be found in the technical manual in section three. When the branch condition involves the sign of the quantity in A or Q, the evaluation examines the sign bit; therefore, positive zero (all zeroes) is considered a positive quantity, and negative zero (all ones) is considered a negative quantity. For input/output instructions, the y designator (table 4-3) (bits 2 23 - 2 20 ) specifies the channel number for that instruction. Bit 2 23 assumes a value of eight, bit 2 22 a value of four, bit 2 21 a value of two and bit 2 20 a value of one; thus, the *y designator provides for all channel numbers from 0- 17 8 . See the technical manual, section three, for details on which instructions use the j designator. OPERAND INTERPRETATION DESIGNATOR (k).-The k designator (bits 2 20 - 2 18 ) specifies for the function code exactly where the operand (that which is to be operated on) will come from before and where it will be stored after the instruction is executed and whether it is 15 or 30-bits in length. The k designator functions directly with the y designator to obtain the correct values. The k designator occupies only bits 2 19 and 2 18 since it is used in I/O instructions only and the y designator uses bit 2 20 . The k designator performs essentially the same function for I/O instructions that the k designator does for normal instructions. The operand interpretation is made for the three classes of instructions that the CP-642B computer uses: Read, Store and Replace. Those instructions that read an operand but do not replace it after the arithmetic is performed are called Read instructions. Those instructions that do not read an operand but store it are called Store instructions. Instructions which do both are called Replace instructions. Store class instructions in the Repertoire of Instructions have STR as the first 3 letters of the MNEMONIC code, and Replace instructions are identified by RPL as the first 3 letters of the MNEMONIC code. All other codes are classified as Read Instructions. Examples of k designator uses in a normal instruction are shown below: k = - Store operand in Q. (A 1400000000 instruction complements (Q).) k = 1 - Store operand L in YL, leaving (Y)u undisturbed. k = 2 - Store operand L in Yu, leaving (Y)L undisturbed. k = 3 — Store operand in Y. k = 4 - Store operand in A. (A 1 504000000 instruction complements (A).) k = 5 Store complement of operand YL, leaving (Y)u undisturbed. L in k = 7 - Store the complement of operand L in Yu, leaving (Y)L undisturbed. Store the complement of operand in Y (storing the complement of B, is the same complement as for a 30-bit register). INDEX DESIGNATOR (b).-The b designator (bits 2 17 - 2 15 ) is used to specify which, if any, of the index registers (B) will be used to modify the operand designator, y, to form Y = y + (Bb). This operation exploys an additive accumulator; therefore, a quantity consisting of all zeroes cannot result unless the bits of both y and (Bb) are all zeroes. The effects of the various values of the b designator are as follows: b = — Do not modify y. b = n - Add (Bn) to y. (n = 1 through 7). OPERAND DESIGNATOR (y).-The operand designator (bits 2 14 - 2°) may be the operand or the address of the operand depending on the function code and the value of k. If it is the address of the operand, it is usually added to the value in the index register specified by the b designator to obtain a final address. In the operator's section of the technical manual, there is a table that explains fully the 94 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) operations performed by each of the instructions and includes the operations of each designator for a particular function code. You should refer to this table or a repertoire card when attempting to program the computer. DO NOT ATTEMPT TO MEMORIZE THE INSTRUCTIONS. SIMPLIFIED BLOCK DIAGRAM Figure 4-3, the simplified block diagram of the CP-642B, shows the primary signal transfer paths between the four computer sections. Control Section The control section contains the registers, designators, modifiers and special circuits necessary to control the main timing of all computer operations; obtain the instruction words and operands from memory; direct arithmetic functions; make jump, skip or abort decisions; and to respond to manual intervention. Main timing control is achieved through the main timing sequences. A free running timing chain generates the timing signals for such events as initiating memory functions, skip decisions and other functions which require regulated timing. Sequencing is closely associated with main timing and is accomplished through eight sequence control flip-flops which provide main timing function control enables (called A, B, D and I/O enables). When combined with the main timing signals, these enables supply the commands for computer operation. CONTROL SECTION MEMORY ADDRESS SELECTION MAIN AND SEQUENCE TIMING COMMANDS AND INSTRUCTION WORDS INPUT/OUTPUT COMMANDS INPUT FROM EXTERNAL DEVICES OUTPUT TO EXTERNAL DEVICES INPUT/OUTPUT SECTION ARITHMETIC SECTION DATA FOR STORAGE DATA TO BE MANIPULATED MEMORY SECTION INPUT DATA OUTPUT DATA 124.409 Figure 4-3.— CP-642B simplified block diagram. 95 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Arithmetic Section The arithmetic section contains the registers and modifiers required to perform the arithmetic or other logic operations specified by the instruction word. Communication between the arithmetic section and the other sections of the computer is primarily through the X and D registers. The registers of the arithmetic section hold the data to be manipulated and provide temporary storage for the result. The main matrix of the arithmetic section is the arithmetic subtractor which provides the logical sum or difference of the data contained in the X and D registers. The arithmetic section also contains auxiliary timing circuitry to control such arithmetic functions as multiply, divide, square root, and shifting, which require additional function time. INPUT/OUTPUT SECTION The input/output section, normally referred to as the I/O section, provides the communication path which enables the computer to process data in conjunction with peripheral equipment. Cables provide the connections for channeling information from the computer to the external devices, and for the transfer of information from these devices to the computer. Several memory locations are reserved to contain the operating capabilities for the I/O channels. Internal control functions and timing provide the enables to perform essentially independent operation of the I/O section once the mode of operation is initiated by the computer control section. The two modes of operation are input and output. The input mode of operation is initiated when the computer requests input data from associated external devices. On signal, a specific channel is enabled, and the transfer of data is accomplished. The output mode of operation is initiated when the computer specifies the transfer of data to an external device. The output channel associated with the designated device is enabled and the data transferred to the device. The I/O section contains a priority system for channel activation, allowing the highest numbered channel the highest priority. A subpriority is established which is dependent upon the function to be performed. These functions, in the descending order of priority, are real-time clock, external interrupt, external function, output data, and input data. MEMORY SECTION The memory section supplies the storage capability of the computer, the logic circuitry to write information into this storage, and the read circuitry to retrieve the information from storage. The memory section is capable of storing 32,768 30-bit words and consists of three distinct memory systems. Each of these systems, main memory, control memory, and bootstrap, is associated with the storage of a particular type of information. Main Memory The main or core memory contains 32,672 storage locations. Ninety-seven of these locations are special purpose and provide seven distinct functions. Table 4-4 lists these functions and the memory addresses with which they are associated. All other main memory locations are used for instruction and data storage. The main memory has a read-restore cycle time of four microseconds. Control Memory Control memory, a variable, thin-film memory, serves as the storage medium for indexing and input/output control. It consists of 64 storage locations, with a read-restore cycle time of 667 nanoseconds. Fifty-six of the storage locations are used for specific I/O functions and are listed in table 4-4. Bootstrap Memory The bootstrap memory is a 667-nanosecond permanent memory consisting of 64 30-bit words. This memory provides for the automatic initial-loading of programs, or for automatic recovery in the event of program failure. There are 32 address locations in the bootstrap memory, but there are two 32-word permanent storage programs. Either of the programs can be 96 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-4.— Memory Assignment MEMORY MEMORY ADDRESSES FUNCTION Main Control Main Bootstrap Main 00000 00001 00020 00040 00060 00100 00120 00140 00160 00161 00170 00200 00500 00520 00540 00540 00600 00620 00017 00037 00057 00077 00117 00137 00157 00167 00177 00477 00517 00537 00577 00577 00617 77777 Fault Entrance Unassigned External Interrupt Entrance Input Monitor Interrupt Entrance Output Monitor Interrupt Entrance Input Buffer Control Registers Output Buffer Control Registers External Function Buffer Control Registers Real-Time Clock B 1 through B7 Index Registers Unassigned Film Locations Unassigned Core Locations External Function Monitor Interrupt Entrance External Interrupt Code Storage NDRO Bootstrap Program I NDRO Bootstrap Program II Intercomputer Time-Out Interrupt Entrance Unassigned Core manually selected. The addressing of the memory is controlled by the SO register, and data is read out of the bootstrap memory via the Z0 register. The routines stored in bootstrap memory are fixed at the time of manufacture and cannot readily be altered. Where an address has been identified as Control or Bootstrap memory, the use of Main memory for that address has been suppressed and either a thin-film or hardwired (belt buckle) memory substituted respectively. Control (thin-film) memory is faster than Main memory, but is inhibited internally from being read up as an instruction (a forced (30 code occurs in the upper 6 bits when this is attempted). When addresses 161-167 are referenced as B-Indexes, the upper 15 bits of the address are automatically cleared. In other modes of addressing, all 30 bits of control memory can be utilized as a normal memory cell. Bootstrap (belt buckle) memory is normally referenced as a constant. Belt buckle memory cannot be modified by attempting to store data into that memory location. Bootstrap I or Bootstrap II are available at the throw of a switch on the front panel. If the AUTO switch is elevated to the UP position and left there, belt buckle memory will be suppressed entirely and Main Memory is available with no restrictions for these addresses (main memory for address 97 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 00540-00577 is called SHADOW MEMORY when Bootstrap memory is suppressed in this fashion). CONTROL SECTION FUNCTIONAL BLOCK DIAGRAM The control section of the computer, figure 4-4, allows computer operation under either manual or program control through the generation of specific sequencing and enables. During manual operation, circuit conditions are displayed on the operator's control panel. Control of these conditions is accomplished through the use of pushbutton switch-indicators and several control switches which allow stepping slowly through various functions in performing an instruction. During this procedure, a study can be made of the lighted indicators to isolate possible logic malfunctions. Under program control, the computer performs instructions of an entire program at a high rate of speed, stopping only at programmed stops. During either manual or program control, the control section supplies timing, translation, and sequencing required for all computer functions. Instruction Word Translation The U register holds the instruction that is presently being executed. It receives its input from the memory data register (Z) and effectively breaks the instruction word down into its five components: f, j, k, b and y. Function Code Translation Because the instruction word is transferred to and stored in the U register, the upper six bits of U provide the inputs to the f code translator. The f translation is accomplished in three general areas. Some circuits translate for the upper octal digit of f, some translate for the lower digit and still others combine these two digits to translate for the specific value off. Although there is no f register, the upper six bits of the U register are arbitrarily assigned bit identification with f. This assignment is made as shown below. U REGISTER 2 29 2 28 2 27 2 26 2 25 2 24 BIT f TRANSLATOR 2 s 2 4 2 3 2 2 2 1 2° BIT Thus, the set or cleared condition of a U register bit will reflect a like condition of the corresponding f bit. Assume, as an example, that bits 2 27 , 2 2s and 2 24 are set in the U register. This will reflect a set condition of f bits 2 3 , 2 1 , and 2° and result in an f = 13 8 code. U REGISTER 2 29 2 28 2 27 2 26 2 2S 2 24 BIT BIT 001 011 = 13 8 CONTENT 10 11 f TRANSLATOR 2 5 2 4 2 3 2 2 2 1 2° BIT Branch Condition Designation Translation The branch condition designator, j, translation works in the same manner as the f code translator and produces enables to appropriate circuits throughout the computer. The uses of the j and y designators have been discussed previously. Operand Interpretation Translation The operand interpretation designator, k, specifies the manner in which the operand is treated. Outputs from these stages are applied to the k translator for interpretation. The k translator translates for the value of the k designator and combines this value with values of f to provide specific function translation. Index Modification Translation The b designator specifies which B register, if any, is to be used to modify the operand designator, y. The seven B registers used for indexing/incrementing/decrementing are 98 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) TO I/O TRANSLATOR n FROM DATA REGISTER (Z) TO I/O CONTROL BRANCH CONDITION DESIGNATOR 0) OPERAND INTERPRETATION DESIGNATOR (k) TO MULT./DIV. CONT. REO.(D) FROM SHIFT REGISTER (W) TO ADDRESS REGISTER(S) TO ADDRESS REGISTER(S) TO I/O TRANSLATOR ii INSTRUCTION REGISTER (U) FUNCTION CODE TRANSLATOR (f) TO ADDRESS REGISTER(S) ii PROGRAM ADDRESS REGISTER (P) FROM DATA REGISTER (Z0) TO ADDRESS REQUEST (S0) il i CONTROL REGISTER (B) TO DATA REGISTER (Z0) /l CONTROL ADDER TO MEMORY CONTROL SEQUENCE CONTROL FROM ARITHMETIC SUBTRACTOR DISTRIBUTED TO LOGIC THROUGHOUT- THE COMPUTER PARITY CHECK L COMMAND ENABLES FROM DATA REGISTER (Z0) ADDRESS MODIFICATION REGISTER (R) TIMING CHAIN MASTER CLOCK 124.410 Figure 4-4.— Control section functional block diagram. 99 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 actually addresses in the control memory. A word is read from the control memory by transmitting its address to the S0 register. The S0 register translates the address bits so the proper address is referenced. In the case of a B register selection, U15, U16, and U17 are transmitted to the S0 register with the result that the address specified by the b designator is read up. The content of the control memory address specified by the b designator is read up. The contents of the control memory address specified by the b designators are referred to as Bb. If b = 0, no Bb is referenced and y is not modified. The modification of y is done by adding Bb to y to form a new quantity referred to as Y. Operand Address Interpretation The operand address designator, y, is the lower 15 bits of the instruction word stored in U. Although its usual function is to specify the memory address for reading or storing the operand, it can also be used for other functions. The two conditions that specify the use of y are the instruction being performed and the value of the k designator. The f codes have been divided into three groups, each utilizing k in a different manner. For read instructions, when k = or 4, y + Bb is used directly as the 1 5-bit operand and no memory reference is made. When k = 7, the contents of the A register are used as the 30-bit operand. In this case y is not used, and again no memory reference is made. When k = 1, 2, 3, 5, or 6, y + Bb specifies the memory location of the operand. For store instructions when k = or 4, y is not used, as the operand is stored directly in the Q register or the A register, respectively. When k = 1, 2, 3, 5, 6, or 7, y + Bb specifies the memory location for storage. For replace instructions, when k = 1, 2, 3, 5, or 6, y + Bb specifies the memory location of the operand. After operations specified by the instructions are completed, the result is returned to memory address y + Bb. The values of k = 0, 4, and 7 are not used for replace instructions. A memory address is selected by transmitting Y to the S register. The S register and its associated translator select the specific memory address. Summary An instruction word is a 30-bit quantity read from memory and contained in the U register. It is composed of f, j, k, b, and y designators. The f designator specifies the function to be performed; y is used in selecting the memory address of the operand (or may be the operand); j, k, and b designators are used to modify and/or control the functions of the instruction. Timing and Sequence Control Computer timing and operation are dependent primarily upon clock timing pulses, generated by the master clock, and enables generated by instruction format and switch settings. Sequence control, resulting from the interpretation of the instruction word, generates command enables to allow sequential control of computer operation to perform the directed task. MASTER CLOCK. -The master clock (basically a delay line oscillator) normally operates at a high rate of speed and generates timing pulses for the computer. However, under certain mode selections, the speed of the master clock is controlled by the setting of the lower speed oscillator or RESTART SPEED CONTROL on the operator's front panel. The period of the master clock is about 680 ns (fig. 4-5). Within this period are four evenly-spaced pulses called clock phases (0). Each clock phase is an L for about 130 ns (measured at the 50% amplitude points of the clock phase waveform). Console Controls The console controls supply inputs to the logic of the computer and to indicators that monitor operation. A remote panel may be used to control the computer. When this remote panel has active control of the computer, the computer confrols are inhibited from the remote panel. The 100 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) CLOCK PHASE 1 CLOCK PHASE 2 CLOCK. PHASE 3 .Ov Legend: REPRESENTS IDEALIZED WAVEFORM. REPRESENTS ACTUAL WAVEFORM. Note: ALL FIGURES REPRESENT TIMES IN NANOSECONDS. PULSE WIDTHS ARE MEASURED FROM 50% AMPLITUDE POINTS. CLOCK PHASE 4 170 M 170- ->[« 170 *|* 170 ►! •680 fr| Figure 4-5 .-Master clock outputs, idealized waveform. 124.411 operation and results of the controls are the same for remote control or local (computer) control. Console controls are not shown in figure 4-4. Main Timing The main timing circuitry consists of 12 flip-flops which, under direction from the sequence control circuit, provide timing enables to perform instructions. Main timing is functionally divided into two time divisions, MTi (initial main timing) and MTf (final main timing). The events controlled by each division are dependent upon the enables received from the sequence control circuits. MTi. -MTi consists of six flip-flops and operates with the A, B, and D enables from sequence control or from the function or other designators. For example, when MTi operates with Ai enables, the next instruction is read 101 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 from the selected memory address and placed in U. This sequence occurs for each instruction. When MTi operates with Bi or Di enables, most computer functions are further enabled through function code translation or by other designators. MTf.— MTf consists of six flip-flops and operates with enables from sequence control. MTf provides timing for the store portion of replace and return jump instructions. It also provides timing for miscellaneous functions of other instructions. Sequence Control Sequence control consists of eight flip-flops that provide enables (primarily to MT) to accomplish certain events. There is an enable flip-flop that allows operation to begin and recycle if certain conditions exist. An Input/Output Request flip-flop provides enables to accomplish the I/O function and to inhibit non-1/0 functions. The six remaining flip-flops that are used for non-1/0 functions are labeled according to the sequence they are used with: Ai (A sequence initial), Af (A sequence final); Bi; Bf;Di;Df. Each instruction is executed according to the sequence of operation for automatic operation of the computer. The main timing chain with A sequence enables from sequence control will read the next instruction and perform preliminary operation modification. MT with B enables obtains the operand and initiates arithmetic functions. MT with D enables performs the store functions for certain store instructions. There is a C sequence that is run independently of MT. It provides timing to perform the arithmetic and logical functions specified by the current instruction. It also initiates the following subsequences: Read Y— obtains the specified operand Store Y— controls the store function Interchange AQ— controls interchange of contents of A and Q. The C sequence may also initiate the multiply/divide/shift sequence which enables setting the Arith Hold flip-flop for certain shift instructions or multiply, divide or square root instructions. The C sequence also enables the skip evaluation to be made for the instructions that require functions controlled by the C sequence and initiates the commands that transfer data between registers and modifying circuits. Refer to the appropriate technical manual for detailed explanations of all sequences and subsequences. Control Adder The control adder is used with the registers of the control section to modify the contents of those registers (normally address modification). The control adder is an additive matrix that may be used as an adder or counter. The normal adder operation is altered by preventing end-around carries to produce a counter circuit. During adder operations (+ 1 ) + (- 1 ) = + 1 . During counter operations (+ 1 ) + (- 1 ) = +0. Program Address Register The program address register, P, is used to store the address of the memory location to be referenced. Through use of the R register and the control adder, the contents of P are incremented to provide successive memory addressing. Control Register The control register, B, is used to increment the contents of P through use of the SET B = +1 command. Through the control adder, the B register also functions as an adder input register to update the contents of UL or Z. This B register (control register) SHOULD NOT BE CONFUSED with the seven B registers (index registers) contained in memory. Address Modification Register The R register is used to modify the contents of the P register through use of the 102 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) control adder. Inputs are from either the P or Z register with an output to the control adder for modification by the contents of the B register. ARITHMETIC SECTION The arithmetic section contains the logic required to perform such operations as add, subtract, multiply, divide, square root, parity, shifting and other logical or arithmetic functions. The arithmetic section functions under commands from the control section (primarily the C sequence). All arithmetic operations, except for square root, are performed with either positive or negative numbers identified by bit 29, called the sign bit. If the number to be manipulated is negative, the sign bit is set (1). For positive numbers the sign bit is clear (0). Initial and final sign corrections assure the correct sign of the result. For square root operations, no sign bit is used, and the entire 30 bits are treated as a positive number. Shifting operations are performed during the transfer of data between registers and/or selectors. The timing of arithmetic functions such as multiply or divide is controlled by a timing chain which is initiated by the C sequence. Those functions which require an unusually long time for performance set the Arith Hold flip-flop, which inhibits other operations until the completion of the arithmetic process. Registers Figure 4-6, the arithmetic section functional block diagram, illustrates registers, the subtractor, selectors, shift counters and shift control. The A register is called the accumulator (a register in which the result of an arithmetic or logic operation is formed). It is a 30-bit addressable (may be addressed by the program) register. It holds the augend prior to and the sum after the add operation. For the subtraction operation it holds the minuend before and the difference after. There are other add and subtract operations that do not use the A register (e.g., ADD Q, SUBTRACT Q). The D register is an exchange register used internally in the arithmetic section. It is nonaddressable and 30 bits in length. The D register holds the addend or subtrahend hratld or subtract operations. The add operation is typical of the relationship between the A and D registers. The augend and addend are initially contained in A and D. Before the addition is performed, (A) is transmitted to X. X and D are then combined by the subtractor network (complement arithmetic) to form the sum of the two numbers in a parallel manner, and the result is transferred to A. The Q register is also a 30-bit addressable register that is used primarily during multiply and divide operations. The A and Q registers may be combined to form a 60-bit addressable register that will hold the product after multiplication or a 60-bit dividend prior to division operations. The contents of A and Q may also be shifted left or right, either individually or as one double-length 60-bit word. The Q register holds the multiplier prior to multiplication or the quotient after division (the remainder is sent to A). The X and W registers are 30-bit nonaddressable registers. These registers are used for the exchange of data within the arithmetic section and for communicating with the remaining sections of the computer. The W-register is not displayed on the control panel of the computer; the A-, Q-, X-, and D-registers have indicators which allow the operator to inspect the contents of these registers during debugging and maintenance operations. The SI and S2 selectors are control gates that allow an increased number of inputs to A and W to be used. The K registers (Kl, K2, K3) function as a shift counter for all arithmetic operations that involve shifts (multiply, divide, square root and shift instructions). Subtractor The subtractor is a logic matrix that combines the contents of the X and D registers to produce the difference or logical sum of their outputs. The subtractor uses one's complement binary arithmetic. The logic of the subtractor accepts the input from the D register in complemented form to perform its operation. This may be shown as: 103 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 TO INPUT/OUTPUT SELECTOR H MULT/OIV CONTROL REGISTER (D) SHIFT REGISTER (W) QUOTIENT REGISTER (Q) SELECTOR 2(S2) TO DATAREGISTER(Z) A FROM DATA REGISTER(Z) FROM DATA "REGISTERS) EXCHANGE REGISTER (X) ARITHMETIC SUBTRACTOR SELECTOR USD ACCUMULATOR REGISTER (A) FROM DATA REGISTER (Z) FROM PROGRAM ADDRESS REGISTER(P) TO PROGRAM ADDRESS, REGISTER (P) TO PARIJY CHECK a INSTRUCTION REGISTER (U) SHIFT CONTROL (K3) I SHIFT COUNTER (K1 8 K2) Figure 4-6.— Arithmetic section functional block diagram. 164.173 ;<; D) D REGISTER COMPLEMENT SUBTRACTIVE PROCESS OR X + D EQUIVALENT PROCESS The arithmetic process of addition is thus performed by the subtractor. If subtraction of two numbers is directed, the complement of the subtrahend is initially placed in the D register, and the operation thus becomes: x a ( ;?'> COMPLEMENT OF SUBTRAHEND APPARENT COMPLEMENT SUBTRACTIVE PROCESS ORX-D EQUIVALENT PROCESS 104 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-2G(V) The operation of the subtractor is divided into two parts, the formation of the half-subtract (HS), and the sensing and performing of any borrows which are present. Although both functions occur at the same time, they will be explained separately. The half subtract result is formed in a bit-by-bit subtraction with no regard for borrows. Table 4-5 shows the four possible input combinations to_a subtractor stage and their HS and HS results. HS is the complement of HS. The first entry in table 4-5 shows the contents of both the X and D registers as 1. The subtractor performs a 1 - operation (the subtractor actually uses D') to produce an HS of 1. The second entry also produces an HS of 1. However, the second entry produces a difference of 1 with a borrow from a higher-order stage. For the HS result, borrows are disregarded. The third and fourth entries produce a difference of 1 with a borrow from a higher-order stage. For the HS result, borrows are disregarded. The third and fourth entries produce an HS of 0. These HS and HS results are ANDed with the generated borrow request signals to produce the final answer. As shown in table 4-5, the result of the first entry can satisfy a borrow. Therefore, if a borrow is requested of this stage, it can satisfy the borrow without generating a borrow. The second entry in the table is the combination which generates a borrow. When this condition exists, a signal informs the next higher order that a borrow is being requested. Entries three and four neither generate nor satisfy a borrow but rather propagate, to the next higher-order stage, any borrow which may be requested of it. The signal, in this case, is called a borrow enable. The following six-bit example illustrates these conditions. The first, or lowest-order stage can satisfy a borrow. The second stage generates a borrow which is propagated through stage three to be satisfied by stage four. Stage five neither generates nor satisfies a borrow, and the sixth stage generates a borrow which is satisfied by the first stage. PROBLEM: 110 1 + 01100 1 10 110 SUBTRACTOR SOLUTION: Complemented G P S P G S 110 1 ■ 10 110^ Linel — ►101011 Line 2 Line 3- ) 1 101 *i 110 I 10 G— Generates a borrow P— Propagates a borrow S— Satisfies a borrow HALF SUBTRACT BORROWS RESULT (SUM) Where there is no borrow, the HS isjhe final re- sult. Where a borrow is present, the HS is the final result. In other words, if a bit in line 2 is zero (no borrow), the corresponding bit in line 1 (HS) will be the final results in line 3. If a bit in line 2 is a one (borrow), the_complement of the correspond- ing bit in line 1 (HS) is the final result in line 3. In computer logic, the HS can be obtained as an exclusive OR output of the corresponding Table 4-5.— Subtractor input combinations and HS results ACTUAL CONTENTS SUBTRACTOR INPUT HS HS CONDITION X D tp (1) 1 1 1 - 1 Satisfy borrow (2) - 1 1 Generate borrow (3) 1 - 1-1 1 Propagate borrow (4) 1 - 6 1 Propagate borrow 105 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 ooaoo A3X00 A3010 A3X10 A3000 L+A3a00 1 + A3010 1+A3X10 n-Asaoo aoxoo c C>J aooio aoxio ' l +00X00 — c CSJ I + 00010 I +00X10 - I +00000 CM 8 5 3 8 a I r*.' <* S s. LL 106 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) minuend and subtrahend bits. The borrow will always be an exact reflection of the minuend, in fact it may be the minuend in the circuits. Each stage of the subtractor contains an input circuit which, properly enabled, will generate a borrow; a circuit used as an inverter, which gener- ates HS and enable signals; a circuit which checks the borrow status; and an output circuit. Figure 4-7 shows four typical subtractor stages. The sig- nal level for borrows from odd-numbered stages is: H => BORROW while from even-numbered tages L =* BORROW. All odd-numbered stages are similar as are all even-numbered stages. The HS is formed by inverting the 30A— out- put through 31A-. The HS and HS are ANDed, together with borrow information from the next lower-order stage, to produce the final output from that stage through 70A— . This final output is actually the complement of the answer and is inverted through SI and placed in the A register. The borrow status of each stage is determined by the 40A— circuit. A borrow from any stage results either when this stage is generating a borrow or when a borrow is requested from this stage and is not satisfied but is propagated to the next higher-order stage. The only combination which will generate a borrow is X = D = 0. The only combination which will satisfy a borrow is X = D = 1. The remaining two combinations, X ^ D, will enable borrows to be propagated. Examination of the inputs of 40 AOD shows how a borrow signal is generated. If both inputs to the #1 AND are low, indicating that X00 = D00 = 0, a high out of 40A0D indicates, to 40AEV, that a borrow has been generated. If either the X00 or D00 inputs are high, the inputs to the #1 AND of 40 AOD will not generate a borrow. However, depending upon the input from 40AEV to the #2 AND of 40A0D, the stage is capable of propagating a 29 24 23 18 17 borrow to a 40AEV. If X00 = D00 = 1, the #2 AND of 70AEV is enabled by the output from 30AEV, and any borrow generated by 41AEV will be satisfied by this stage. The subtractor is divided into five 6-bit SECTIONS to speed up the arithmetic process. Figure 4-8 illustrates the sections and bit posi- tions. If a borrow request is generated within a section and not satisfied within that section, it is applied to the next section as an intersection (between sections) borrow request. This request is generated by the highest-order stage within the section generating the request or by a lower-order stage generating a borrow request which is propa- gated by the higher-order stage or stages within that section. The intersection borrow requests are applied to the lowest-order stage of each section. If none of the stages within a section will either satisfy or generate a borrow, the section will produce a section borrow enable. Thus, if a borrow request is applied to that section, it will be propagated to the next section. For example, if a borrow request is generated by section I and sections II and III are enabled, the request will be applied to section IV. An important point to remember is that the subtractor is capable of using an end around borrow. That is, if section III generates a borrow and section IV and V cannot satisfy the borrow, the request will be propagated to section I. MEMORY SECTION The memory section is composed of three separate and distinct memory systems which function together to store all the required data within the computer. Each memory system has its own special function and type of storage. The main memory, which is the largest, is a core storage memory which is used for the storage of 12 11 SECTION V SECTION IV SECTION III SECTION II SECTION I Figure 4-8.— Subtractor sections. 107 124.413 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 programs, constants, and input/output data. The control memory is a high-speed thin-film memory which serves as the storage medium for indexing and input/output control. The bootstrap mem- ory is used for the storage of critical instructions and constants, and it also provides for automatic recovery in the event of program failure and for automatic initial loading of programs. Altogether there are 32,768 possible 30-bit locations; 32,672 of these are in main memory, 64 in control memory, and 32 in bootstrap memory. The 32 bootstrap addresses actually contain 64 words. Two different programs of 32 words may be selected by means of the PROGRAM I /PROGRAM II pushbutton- indicators on the console when in the load mode. For all other conditions, one or the other may be selected by means of the switch on the program switch module on chassis A5. Main Memory The main memory section of the computer consists of five identical memory chassis (chassis A9 through A 13) and the control memory chassis (chassis A8), which contains the S register and translator, the Z register, the data buffer register, and the memory control circuits. Each main memory chassis contains a portion of the magnetic core storage system. This system has high speed, random-access, and nonvolatile characteristics. With this high-speed capability, speed of operation is compatible with the other computer sections; being random-access, data may be referenced in a nonsequential manner; and, being nonvolatile, the system retains its data when power is removed from the computer. All main memory chassis are identical, and each stores a six-bit segment of the 30-bit word. Every storage location is assigned a separate ad- dress (000008-777778), with addresses 00100- 00177 reserved for control memory and 00540- 00577 for bootstrap memory. A 30-bit word in storage can be divided into two 1 5-bit words, the upper 1 5 bits (Mu) and the lower 1 5 bits (ML). By means of programming and the use of the k desig- nator, each 1 5-bit word can be handled separately. Figure 4-9 is a simplified block diagram of the main memory system. When a specific storage location in memory is referenced, the S register contains a 15-bit address word that Z REGISTER 30 BITS ® INPUT DATA OUTPUT DATA DATA BUFFER REGISTER SENSE AMPLIFIER © INHIBIT GENERATOR MEMORY CORE STACK 32,672 30-BIT WORDS, FOUR n Sec. S TRANSLATOR X-Y (ACCESS CIRCUITS) A S REGISTER 15 BITS 124.414 Figure 4-9.— Main memory block diagram. specifies one of the storage locations. The data transmission into or out of the selected storage location is through the Z register. The control and input/output sections of the computer have independent access to the storage registers through the use of the S register and translator, the Z register, and memory control. The time required for one main memory reference (basic memory cycle time) is four /-is. After a given function initiates memory, it is approximately one ms before the delivery of data from storage (readout time). All timing relationships in the memory section are established by memory control and the basic timing of the computer. Magnetic Cores Before exploring how the main memory system works, it is necessary to review the physical construction of a magnetic core memory. The operations of the components of a core memory will also be briefly discussed. The magnetic cores are the basic elements of the main memory system used in the CP-642B. A magnetic core is a bistable device capable of 108 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) toring a 1 or a 0, depending upon the polarity fits residual magnetization. The cores are made f ferrite material and have an outside diameter »f 0.050 inches, an inside diameter of 0.030 iches, and a thickness of 0.0125 inches. The haracteristics of these cores are such that pproximately 400 mA of current for a period f 1.2 microseconds is required to switch them rom one stable magnetic state to the other. The oincident current switching technique is mployed to switch the cores. Four lines pass hrough each core (fig. 4-10 and 4-11): An X ead/write drive line, a Y read/write drive line, a ertical or horizontal inhibit line, and a diagonal ense line. The state of magnetization of a core is nduced by the current in the X and Y drive ines. If the core is in the 1 stage of nagnetization and if the magnetizing force on he X and Y drive lines is great enough, it will Irive the core to the state, thus causing a hange in flux within the core. Any change in lux of a core induces a voltage in all lines 3 INHIBIT LINE JX DRIVE LINE FOR'O' X DRIVE LINE FLUX DIRECTION FOR "I" FLUX DIRECTION FOR"0" Y DRIVE LINE 9 INHIBIT LINE 124.415 Figure 4-10.— Typical magnetic core, inhibit line X oriented. 124.56 Figure 4-11.— Typical magnetic core, inhibit line Y oriented. passing through the core. Therefore, the induced voltage on the sense line is sampled to see if there is an output (over 30 millivolts) indicating that the core was in the 1 state and has been switched. Because the state of the core is determined in this manner, the current pulse producing this magnetizing force is called a read pulse. If, on the other hand, the core was originally in the state, the magnetizing force will only disturb the state of the core, and no appreciable flux change will occur. Therefore, no output will be observed on the sense line. In both the above cases the core will be in the state after it has been read. This is known as destructive readout, and the initial condition must be restored. This is accomplished by applying a coincident current on the X and Y drive lines which is opposite in polarity to the read pulses. If a 1 was stored in the core previous to the read step, these coincident current pulses drive the core to its 1 state, thus restoring the information which was read. If a 109 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 INHIBIT LINES DRIVE LINES 124.57 Figure 4-12.— Basic construction of a magnetic core matrix. was stored in the core previous to the read step, a current is applied to the inhibit line which is opposite in polarity and overlaps the time duration of the pulse on the Y drive line. This pulse reduces the effect of the X and Y pulses sufficiently to prevent the core from being driven to the 1 state, and the core remains in the state. The pulses associated with the restore function are called write or restore pulses and are nearly equal in amplitude but opposite in polarity from the read pulses. To write into the core, or change its state, the read pulses are again applied to the X and Y drive lines and the core is read. But, since the information read out of the core during this step is not retained, the effect is to clear all the cores to the state in preparation for the write step. The write step is similar to the restore step described above. During the write step, coincident current pulses on the X and Y drive lines drive the core to its 1 state of magnetization. However, if a is to be written, a current pulse is applied to the inhibit line which is opposite in polarity to that of the pulse applied to the Y drive line. This pulse reduces the magnetizing force of the X and Y pulses and prevents writing a 1 . MEMORY PLANE. -The memory plane is the basic unit of the memory stack. It has 16,384 magnetic cores that are located at the intersection of the horizontal _ and vertical conductors. Figure 4-12 is a simplified view of an intersection and shows X and Y drive line orientation. Two memory planes with 4 quadrants each are required to store all the main memory addresses for one bit position. The X and Y drive lines terminate at tabs along the edges of the plane. Each memory plane has four inhibit lines and four sense lines that pass through all cores and are brought out to solder terminals at the four corners of the plane. A memory plane is divided into four quadrants (fig. 4-13). Each quadrant contains a UPPER LEVEL (QUADRANTS 0-3) 1 3 2 LOWER LEVEL (QUADRANTS 4-7) 5 7 I i I 1 | I "~ ; ~r ~ — i 4 6 124.155 Figure 4-13.— Memory plane, quadrant designations. 110 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) 64 x 64 array of core (fig. 4-14) and has its own inhibit and sense lines. An inhibit line is threaded vertically (parallel to the X drive lines) Dr horizontally (parallel to the Y drive lines) through all of the cores in a quadrant. The nhibit line is threaded vertically in quadrants, 1, 2, 5 and 6 (fig. 4-10) and horizontally in quadrants 0, 3, 4 and 7 (fig. 4-11). This method of threading the inhibit lines equalizes the oading effect on the drive lines by the inhibit ines. A sense line is also threaded through all of the cores in a quadrant. The sense line is oriented to allow maximum noise cancellation when a core is switched. MEMORY STACK.-The storage elements of the main memory are contained in the five memory stacks. There is one stack on each of the five memory chassis. Each stack contains all of the 32,672 addresses required for the storage of a six-bit segment of a 30-bit word. A stack contains 12 memory planes, two endboard assemblies, and a center board (fig. 4-15). The memory stack is divided into two parts that are referred to as the upper level (the module side of a chassis) and the lower level (the wiring side of a chassis). Each level contains six memory planes separated by the center board, and an endboard assembly. The memory planes are INH / Figure 4-14.— Memory quadrant (64 x 64 array). 124.58 111 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 ENDBOARD A1 - A8 UPPER LEVEL {STACK 0) OCTAL ADDRESS OOOOO - 00077 00200 - 00537 00600 - 37777 CORE PLANE A 17 AW AJ9 A20 A21 A22 CENTER BOARD CORE PLANE A23 LOWER LEVEL (STACK 1) OCTAL ADDRESS 40000 - 77777 PRINTED CIRCUIT CONTACTS CORE PLANE CENTER BOARD- A24 A25 A26 A27 A28 MD-Z / ENDBOARD A9 -AJ6 QUADRANTS 0-3 INHIBIT TAPER PINS QUADRANTS 4-7 NOTE: ALL CONNECTIONS TO X AND Y ACCESS CIRCUITS ARE MADE THROUGH THE CENTER BOARD AND THE ENDBOARD. END VIEW OF CONTACTS NOTE: ALL INTERCONNECTIONS BETWEEN PLANES ARE MADE USING SPRING CLIPS WHICH CONNECT TO THE PRINTED CIRCUITS CONTACTS ALONG THE EDGES OF THE PLANES. 124.153 Figure 4-15.— Memory stack. interconnected by spring clips that are also used to connect adjacent memory planes to the center board and to the endboard assemblies. CENTER BOARD.-The center board is a printed circuit board that connects the X and Y drive lines on the memory planes to the X and Y selector transformer secondaries. END BOARD.-The endboard assembly consists of eight printed wiring cards and mounted diode modules. Each module contains 1 6 diodes used to terminate the drive lines. Core Selection The main memory of the computer is a current-operated, magnetic core storage system. The operation described previously for the selection of one core is applied with refinements to the selection of a word (30 bits) from any 112 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) X DRIVE LINE - XLS SENSE LINE \ 1-1 2 4 6 10 12 1 14 16 S-3 ; A A AAA J1 "" h INHIBIT LINE QUADRANT I QUADRANT 16 3 QUADRANT 3 1-0 S-0 I 3 5 7 II 13 15 17 1-2 124.58 Figure 4-16.— Simplified diagram of a 16 x 16 magnetic core array. address in memory. Figure 4-16 illustrates a simplified magnetic core plane containing a 16 x 16 array of cores. The memory planes used in the computer contain four 128 x 128 arrays. Selectable conductors (X and Y drive lines) thread through each core in each row and column. Any one of the magnetic cores in the matrix may be selected (addressed) by pulsing a given row and column. In the sequence of events which follows, a coincident half-amplitude current pulse is generated in each selected row and column. The core at the intersection of the row and column (selected core) receives a total of two half-amplitude current pulses. For example, assume core A on figure 4-16 has been selected or addressed. It receives a net full-amplitude pulse when coincident half- amplitude current pulses are impressed on its intersecting X and Y drive lines. All other cores in the same row or in the same column as core A receive half-amplitude current pulses (cores B, C, D, and E). These cores are half-selected. The remaining cores, neither half-selected nor fully selected, are referred to as unselected cores (core F). The binary information (0 or 1 ) stored in a core is determined by the polarity of its magnetization. The information is extracted from a selected core when two coincident half-amplitude read current pulses switch the magnetization of the core. In read pulse polarity, if the core holds a 1 , the magnetization in the core is reversed, and a voltage (55 millivolts peak) is induced in the sense line. When the selected core is in the state, an insignificant voltage (10 millivolts maximum) is induced in the sense line when the read pulses are applied. The small induced voltage indicates no flux reversal and is sensed as a 0. 113 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 r - Z REGISTER SENSE AMP Y LINE SELECTORS r Y GROUP SELECTORS X LINE SELECTORS INHIBIT i ! I J ~l X GROUP SELECTORS "~l I r J I L_ S REGISTER 164.161 Figure 4-17.— Memory address translation. Address Translation Figure 4-17 is a simplified block diagram of the memory address translation circuits. The X and Y group selectors, the X and Y line selectors and the inhibit selector make up the S translator. The S translator breaks down the contents of the S register into enables for a specific address. The translator is enabled when either the read or write flip-flop in memory control is set. The group selectors enable the primary and secondary of a selected drive current transformer. The output of the drive current transformer is to a group of eight drive lines. The line selectors determine which specific drive line is selected. By using combinations of these group and line selectors, any address in memory may be selected for either read or write. The sense amplifiers connect the outputs from the memory planes to the Z register. Each sense circuit connects the output of the sense windings in a bit-plane (two memory planes) to a stage in the sense register. The sense register, in turn, connects to the Z register. 114 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) The inhibit circuits are used during the write cycle to prevent writing into a wrong address in memory by counteracting X and Y drive line pulses for core selection. Control Memory The control memory is a 64 word, 30-bit, thin-film memory with an access time of 333 ns and a total cycle time of 667 ns. Both the 30-bit data words and the 7-bit addresses are transferred to and from control memory in parallel. The control memory is located on chassis 8, which also contains memory control and the S and Z register. Film memory is composed of the logic circuitry and the film stack. THIN-FILM STACK. -The thin-film stack has a Unifluxor (Bootstrap Memory) plane mounted above the thin-film planes (fig. 4-18). The four thin-film planes are mounted above the transformer diode boards in locations A3 through A6, and the transformer diode boards are mounted on the bottom (wiring) side of the chassis. The interconnections between boards and the connections between the thin-film planes and the logic circuitry are accomplished by using plugs which connect directly to the etched surfaces on the edge of the memory planes. THIN-FILM PLANE.-Each thin-film plane consists of two covers, two wiring arrays, a spacer, and four substrates (fig. 4-19). The substrates are held in place by the spacer, which also serves to separate the wiring arrays. A wiring array is placed above and below the spacer containing the substrates, and the covers are attached, thus securing the complete thin-film plane. The transformer diode boards are identical for both bootstrap memory and control memory. The bootstrap transformer diode board is on the bottom at location Al, and the one for control memory is above it at location A2. THIN-FILM STORAGE.-The storage media for the control memory consists of a ferromagnetic material (permalloy) deposited as film spots on a substrate of thin glass. This is 124.416 Figure 4-18.— Thin film stack. 115 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 TOP COVER GLASS SUBSTRATE UPPER WIRING ARRAY LOWER WIRING ARRAY BOTTOM COVER 124.417 Figure 4-19.— Thin film plane. commonly called thin-film memory. These permalloy film spots are 50 mils in diameter and 1,000 angstroms (0.000004 inches) thick. The geometry of these film spots permits the magnetic state of the spot to be switched in nanoseconds by a small amount of power. Since the film spots have two preferred states of magnetization, they readily store binary informaticm. The frhn spots, which provide the^ storage media, are deposited on the glass substfate in a vacuum chamber. After the air is removed from the chamber, a shutter arrangement is opened, and vapors resulting from molten permalloy pass 116 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) through a mask and are deposited on the substrate. The pattern of the spots on the substrate is determined by the shape of the mask, and the thickness of the spots is determined by the shutter's opening time. A magnetic field is applied parallel to the surface of the substrate while permalloy spots are being deposited. Each film spot then becomes easier to magnetize along an axis parallel to that in which the magnetic field was applied (preferred axis). The film spot is well suited for storing binary data since it has a stable stage of magnetization in each direction parallel to the preferred axis (fig. 4-20). If the direction of magnetization (M) is rotated through 180 degrees starting from the preferred axis, the following phenomenon occurs. There is first a torque pulling the magnetic vector back toward the preferred axis; then, as it passes a point perpendicular to the preferred axis, there is a forward torque on the magnetic vector. This torque is produced by the residual magnetic field (A) which was produced during the deposition of the spots. If no magnetic fields are applied to the film spot, the residual magnetism (A) causes the magnetic vector to be parallel to the preferred axis (fig. 4-20A). If only a longitudinal field (B) is applied, a magnetic field parallel to the preferred axis in either direction has negligible effect on the magnetic state of the spot (fig. POSITION OF MAGNETIC VECTOR WITH NO FIELD APPLIED. POSITION OF MAGNETIC VECTOR WITH ONLY B APPLIED. C. POSITION OF MAGNETIC VECTOR WITH ONLY C APPLIED A+B POSITION OF MAGNETIC VECTOR WITH BOTH B and C APPLIED. 164.41 Figure 4-20.— Film spot, vector rotation diagram. 4-20B). If only a transverse field (C) is applied, a magnetic field perpendicular to the preferred axis causes the magnetic vector to rotate 90 degrees, as shown in figure 4-20C. If fields are applied such that the magnitude of A plus B equals C, the position of the magnetic vector will be as illustrated in figure 4-20D. If C is removed from the spot, the direction of magnetization becomes the same as the direction of B. If B is then removed, the spot remains in this position until C is again applied. Thus, the direction of B determines the direction of the final stable state of magnetization of the film spot. A magnetic field is produced concentrically around a flow of current; it is, therefore, possible to switch a film spot by passing current through drive lines placed close to the spot. The drive and sense lines are etched on Mylar sheets which are carefully aligned and attached to phenolic boards to give required strength to the line array. Figure 4-2 1 A shows a film spot and the line array on one side of it. An identical set of these lines is placed on top of the film spot. Connectors for the line array are wired in a manner such that the sense and bit lines each form one turn around the spot and the word lines form two turns. SENSE LINES A. I STORED, NO CURRENT APPLIED © B. WORD CURRENT APPLIED C. WORD CURRENT AND BIAS CURRENT "o' APPLIED D. STORED, NO CURRENT APPLIED 164.42 Figure 4-21.— Film spot switching. 117 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 TRANSFORMER DIODE MATRIX WORD CURRENT GENERATOR n TRANSFORMER DIODE MATRIX WORD CURRENT GENERATOR TRANSLATORS AND SELECTORS S0- REGISTER T FILM STACK UNIFLUXOR I STACK n <§>-. BIT CURRENT GENERATOR STROBE RJ STROBE SENSE AMPLIFIERS OUTPUT DATA ▲ Z0- REGISTER TIMING GENERATOR a CONTROL n ADDRESS DATA CLOCK PULSES CLEAR PULSES ® INPUT DATA 1 INTERFACE DRIVER -& 124.418 Figure 4-22.— Control and bootstrap memories. The arrow on the film spot in figure 4-21 A shows the stable state magnetic vector with a 1 stored. If word current flows down the word lines, the magnetic vector rotates 90 degrees as shown in figure 4-2 IB. The magnetic vector is made to rotate towards the stable state by a magnetic field produced when current flows through the bit lines (fig. 4-2 1C). After the word current is removed, the vector completes the 180 degree rotation from the 1 state. Thus, a is stored as shown in figure 4-2 ID. If a 1 is to be stored in the spot, current applied to the word lines is in the same direction, but the current applied to the bit lines is reversed. Thus, the magnetic field around the bit lines reverses, and the magnetic vector is rotated toward the 1 state. If the word current and then the bit current are removed, the stable state of magnetization will represent a 1 . Control memory is a destructive readout memory in that the reading of any control memory location changes the contents of that address. During a readout, only the word lines are enabled, producing a magnetic field perpendicular to the preferred axis. This field rotates the magnetic vector to a position perpendicular to the preferred axis. The sharp change in the magnetic field around the spots when the word lines are activated causes a voltage to be induced in the sense lines. The magnitude of this voltage depends upon the rate of change in magnetic flux resulting from the 118 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) switching process. For a given film spot, the output for a 1 is negative and for a is positive or vice versa. The arrangement of the sense lines is such that, for a given bit, the polarity of a 1 at the sense line output changes as the address changes; for example, bit 15 at address 3 is a positive for a 1, while bit 15 at address 4 is negative for a 1 . By ANDing a strobe pulse with the output from the appropriate side of the sense amplifier, a 1 is read from the memory. No output from the AND circuit indicates a has been read. CONTROL MEMORY WORD SELECTION.— Whereas the core memory is bit-oriented, the control memory is word-oriented (fig. 4-22). Word "oriented" means that a complete 30-bit word is selected and driven by one word line. The word drive line which has been activated by a word line transformer switches all 30 bits to determine their output. The word drive current is applied in the same direction during both read and write. During a write cycle, the bit current is also applied, but this is automatically supplied to all bits at one time. If, for instance, bit of Z0 contains a 1 , a bit current indicative of a 1 is passed through all the film spots in position 0. The bit current has a negligible effect on the spots that have not been selected by a word current because it produces a magnetic field in the same direction as B in figure 4-20. The word drive lines are threaded across four substrates located on two adjacent control memory planes. The substrates have a total of 36 film spots for each word, 30 of which are used. The word drive current passes across the top wiring array and back across the bottom; this essentially doubles the magnetic field produced between the two wiring arrays (fig. 4-23). The bit lines are arranged at right angles to the word lines. Control Memory Operations The control memory operations are read, write and restore. Write and restore are basically the same function; the only difference is whether or not the information written back into the memory is the same as was read out or whether it is new information. EVEN BIT LINES BIT !9 / A ODD / PLANE A4 77 BIT / WORDS 00-37 // LINES / OODBirs // U " ' ( - — {/ L-J __ ■ . —A — ' / PLANE A3 77 7 WORDS 40-77 77 / ooo sirs // \-J=-- 17 124.419 Figure 4-23.— Film memory word drive line routing. Each time control memory is initiated, a complete read/write cycle is performed. The address, supplied by the control section, determines which word line is activated. During the read portion of the cycle, the data register (Z0) is cleared. The Zty register is loaded by either the film stack outputs or the control section, or both. During the write portion of the cycle, the contents of the Z0 register are stored in the specified film stack locations. To read the memory (fig. 4-22), an address must be supplied to the S0 register, an initiate signal must be issued from memory control, and a read enable must be provided. The address in S0 is translated to enable the proper word line transformer, and the output of the film spots is sent to the sense amplifiers. When the sense amplifiers are strobed, the outputs are gated in the Z0 register. Strobed refers to a timing pulse called the strobe pulse which is used to ensure the optimum signal level before the data is transferred. The output pulse from a film spot is not of sufficient duration or amplitude to set a standard flip-flop; therefore, a holding flip-flop is used. This flip-flop stores the data received from the sense amplifiers until after it has been sent to the Z0 register; then it is cleared. If the sense amplifiers are not strobed, the film stack outputs will not be gated into the Z0 119 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Address Translation Z0 SAs SAs STROBE CIRCUITS n BIT CURRENT GENERATORS 29 15 H C 2-2 2-2 FILM STACK ADDRESS ADDRESSING CIRCUITS 124.420 Figure 4-24.— Control memory block diagram. register, and the data will not be restored to the film stack. Figure 4-24 shows that this strobe disable may be applied to the upper half, the lower half, or the entire word. During a read operation, both sets of sense amplifiers are enabled, and the entire word is gated into the Z0 register. During a write operation, data from the control section is loaded into the disabled portion(s) of Z0, and the entire word is written back into the film stack. By applying the disable to half the word, it is possible to modify half the word without affecting the other half. This function of control memory is very important to the control and input/output sections indexing operations. Reset circuits clear the holding flip-flops so that they may be available to store the information received during the next read cycle. The data contained in the Z0 register is unconditionally gated to the bit generators by timing pulses. The word current is still being applied to the selected word, so that, when the bit current is produced, the information held in the ZQ register will be written back into the film spots. Following the write/restore cycle, the word current and bit current are removed. The control memory address register (S0) is a seven-bit register which is loaded by the control section S0 selector at the same time control memory is initiated. This address may originate in either the control section or the input/output section, but it must pass through the SO selector gates which are logically located in the control section. Control memory addressing circuits are shown in the block diagram on figure 4-25. WORD CURRENT GENERATOR (WCG).— There are two word current generators which are used for the bootstrap and control memories. The most significant S0 address bit (2 6 ) determines which WCG is selected. Address group 100-177 selects control memory; bootstrap addresses 540-577 select Program I or Program II. The WCG outputs enable the word current diverters and supply the primary current for the transformer selectors. WORD CURRENT DIVERTER (WCD).-The 16 word current diverters select the primaries of the transformer selectors for bootstrap and control memory. Bits 03, 04, and 05 of the SO register and the outputs from the WCG select the WCD. All the transformer selector primaries are supplied current from the WCG, but only the primary which is enabled by the selected WCD will pass current and produce an output. LINE TRANSFORMER SELECTORS (LTS).— The eight line transformer selectors enable one of the eight word line transformers from the group designated by the transformer selectors. The stages of S0 concerned with line selection are 00, 01, and 02. At the completion of the write portion of the memory cycle, the line charger drives the LTS output to -15 volts (the stable state) in preparation for the next memory cycle. WORD LINE TRANSFORMERS.-The 128 word line transformers are located on the transformer diode boards. There are 64 word line transformers for control memory and 64 for bootstrap (two 32-word programs). The word line transformers generate the word current 120 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) 64 WORD LINES 64 WORD LINES BOOTSTRAP WORD LINE TRANSFORMER SELECT 540-577(1) OR 540-577 (n) XMFR SELECT CONTROL MEMORY WORD LINE TRANSFORMER SELECT 100-177 XMFR SELECT WCG WORD CURRENT TIMING WCG rr_o WCD n n WCD LTS i jr a ii OCTAL TRANSLATORS LTS LINE CHARGER 124.421 Figure 4-25.— Thin film memory addressing block diagram. which is used to read or write in the control memory, and to read only in the bootstrap memory. Timing and Control Control memory timing is taken from a tapped delay line with a total duration of about 500 ns. Once the memory cycle is initiated, it proceeds to completion independent of computer timing. The control section supplies the address, sets the inhibit flip-flops which determine to what portion of the data the strobe disables apply, initiates control memory, loads Z0 (write operation), and samples the contents of Z0 (read operation). 121 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 BOOTSTRAP MEMORY TOP PRINTED CIRCUIT BOARD (UPPER WIRING ARRAY) TOP COVER (PRESSURE PLATE) PROGRAM CARD I BOTTOM PRINTED CIRCUIT BOARD LOWER WIRING ARRAY) BOTTOM COVER PRESSURE PLATE) 164.163 Figure 4-26.— Exploded view of a Unifluxor plane. Enabling and disabling of the word and bit lines is controlled by the word timing and bit timing flip-flops. The specified word line is enabled before the read portion of the cycle and remains enabled until the completion of the write portion. The bit lines are enabled only during the write/restore portion of the memory cycle. Bootstrap memory is a 667-nanosecond cycle time Unifluxor memory which has a permanent or nondestructive readout (NDRO) type of storage. It is used primarily for program fault recovery and provides initial loading of programs. There are two programs in bootstrap memory which are supplied at the time of manufacture. Bootstrap memory employs linear storage elements which consist of a wiring array and two program cards, as shown in figure 4-26. The word lines and sense lines are etched on two plastic cards known as upper and lower wiring arrays. These lines are accessed and sensed by the circuitry associated with the control memory. Each program card has 32 words of 30 WORD CURRENT Note: NO OUTPUT BECAUSE THE INDUCED CURRENT IN EACH LOOP CANCELS OUT THE EFFECT OF THE OTHER. 164.164 Figure 4-27.— Belt buckle drive and sense lines. 122 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) WORD CURRENT OUTPUT . CURRENT 164.165 Figure 4-28.-A belt buckle that contains a "0" bits each. The stored information is in the form of copper "belt buckles" etched on the program card. The program cards are positioned between the wiring array cards and a cover is placed over them. This complete assembly is called a Unifluxor plane. The Unifluxor plane is mounted above the thin-film planes on chassis A8. The transformer diode board associated with the bootstrap memory is located at Al , and the Unifluxor plane itself is located at A7. Theory of Operation The principle used for the storage of data in the bootstrap memory is that a current through a conductor will induce a nearly equal but opposite current in another conductor placed very close and parallel to it. The program cards are placed on top of the wiring array and positioned so that the common loop of the belt buckle is directly over the word drive line as shown for one bit in figure 4-27. When a current is applied to the drive line, an opposite current is induced in the belt buckle. This current will flow around both sides of the belt buckle, and the net effect on the sense lines will be negligible. If one loop is cut, however, no current can flow around that side, and the result will be as shown in figure 4-28. This case represents a 0. If the opposite side is cut, the result will be as shown in figure 4-29. This case results in a 1, because the output on the sense lines is not inverted. Each word on a program card is made up of 30 such belt buckles which are opened on one side or the other to represent binary information. It is impossible to internally alter or change the information contained on these cards, but it is possible to replace the program card with another one. Program Selection In the load mode of operation, the PROGRAM I /PROGRAM II pushbutton indicators are pressed to select either of the two WORD CURRENT i OUTPUTS current] 7ZZ2ZZ22& :wordz: - LINE — 7zzzzzzzz 7Z%% V77777\ wzz^ w 777 ^ / line; Y/////////A '/////////A OUTPUT ^CURRENT 164.165 Figure 4-29.-A belt buckle that contains a "1". 123 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 programs. For other bootstrap references, the toggle switch at chassis location A5 is used to select either program for automatic recovery. MEMORY REPAIRS Some memory stacks have been damaged beyond economical repair by field maintenance personnel. In view of this damage field maintenance personnel have been requested not to attempt repairs of these stacks. The EIMB Communications Handbook (NAVSEA 0967-000-0010), in the Service Notes under CP-642B/USQ-20(V) Computer memory failures, or EIB No. 811 detail instruction on how to arrange replacement of a failed memory stack. Also, EIB 873 gives details for turning in a failing memory chassis and obtaining a replacement. INPUT/OUTPUT SECTION The transfer of data to and from the computer is via 16 input and 16 output channels with the data being transferred in a 30-bit parallel mode. These are octally numbered as - 17 8 . The 16 channels are constructed on four chassis, each of which contains four identical 1/0 channels. Channels - 3 are on chassis 4, channels 4 - 7 are on chassis 3, channels 10 8 - 13 8 are on chassis 2, and channels 14 8 - 17 8 are on chassis 1 . Any or all of the four chassis can be designated a high-speed (up to 250 kHz transfer rate per channel) chassis or a slow-speed (up to 40 kHz transfer rate per channel) chassis by the changing of the fast interface/slow interface circuit cards. Changing a chassis to either fast or slow interface effects all four channels on that chassis. The 1/0 section functions asynchronously with the computer program. It operates in one of two modes, input or output. In either mode, the peripheral equipment can either request data or command transfers. (Commands in the input mode are referred to as interrupts, and in the output mode as external function words.) In addition, the 1/0 section is capable of processing various internally generated interrupts. It becomes apparent that with the 16 channels, various types of requests and various types of interrupts, some priority system must be established since the 1/0 section can process one request or interrupt on one channel only at any given time. The 1/0 section utilizes three basic priority systems. Function priority is used to establish which request or interrupt is to be processed first, in the event that more than one request or interrupt is present simultaneously. Group priority is used to establish which chassis containing a request for priority will be acknowledged first. Channel priority is used to establish which channel on a particular chassis will be granted priority. After a request has been granted priority, the 1/0 section sends a signal to the external equipment indicating that the request has been processed. Data Format The three types of information transferred between the 1/0 section and the peripheral units are data words, control words, and external interrupt words. (1) DATA WORDS. -These words represent ALPHANUMERIC data. Input data words are data entered into the computer from the peripheral units. Output data words are data sent to the peripheral units from the computer. Data transfer is in a 30-bit parallel mode. (2) CONTROL WORDS.-Control words consist of bit-position coded, 30-bit words accompanied by an external function signal. Con- trol words are sent from the computer to peripheral units and specify the type of operation a peripheral unit is to perform. (3) EXTERNAL INTERRUPT WORDS.- External interrupt words consist of bit- position coded, 30-bit words accompanied by an external interrupt signal. Interrupt signals are sent from the peripheral units to the computer. Their purpose is to divert the computer's attention to a special condition which exists on a corresponding 1/0 channel. The accompanying interrupt word from the peripheral equipment will then inform the computer of the normal/abnormal conditions that caused the status interrupt. 124 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) r PERIPHERAL EQUIPMENT OUTPUT REGISTER (C) CHAN 0-3 OUTPUT REGISTER (C) CHAN 4-7 «-o OUTPUT REGISTER (C) CHAN 10-13 4-0 OUTPUT REGISTER (C) CHAN 14-17 INPUT/OUTPUT CONTROL MEMORY INPUT DATA GATES INPUT/OUTPUT SELECTOR INPUT/OUTPUT SECTION D-REGISTER U-REGISTER J-DESIGNATOR- F- TRANSLATOR - DATA REGISTER OUTPUT GATES INPUT/OUTPUT TRANSLATOR Z REGISTER 124.422 Figure 4-30.— I/O section simplified block diagram. SIMPLIFIED BLOCK DIAGRAM A simplified block diagram of the I/O section is shown in figure 4-30. The diagram represents the logic required to depict the operation of an input/output channel. In some cases, one block represents sixteen identical circuits, one for each I/O channel. In other cases, one block either represents four identical blocks, one for each chassis, or circuits which are common to all channels. I/O CONTROL.-The input/output control circuits provide the gating, timing, and monitor control for input/output data transfers. These circuits also initiate control signals and select control lines for data transfers. The computer program selects the appropriate input or output mode of operation through the use of the appropriate programmed instruction. Input instructions are f = 73 and f = 75 or the related instructions f = 17, 62, and 66. Output instructions are f = 74 and f = 76 or related instructions f = 13, 63, and 67. INPUT DATA GATES.-The input data gates provide a storage medium for input data to the computer until such time as the computer 125 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 logic is capable of processing this data as directed by the I/O control circuitry. The circuits contained in this section are the input amplifiers, input data gates, ID (input data) one-shots and request gates. These circuits provide the logic to transfer data from a peripheral device to the computer. The input amplifiers provide line isolation and signal amplification. The input gates allow the selection of the appropriate data for processing by the logic circuitry. The one-shot flip-flops ensure that input requests or interrupts are processed only once. I/O SELECTOR.-The I/O selector provides the necessary gating, through program generated enables, for signals and data from the I/O section to memory. Input signals to the selector include data from peripheral equipment or the D register and are routed to either the upper or lower 1 5 bits of the Z register. I/O TRANSLATOR.-The I/O translator provides translation to establish the priority of the input signal and the priority of the channel requesting the I/O function. Through this translation, the translator develops the enables used by the I/O section to process the specified function on the specified channel. The channel priority network is actually broken down into two parts. The channel selector selects one of four channels, through 3, within a group or chassis. The group selector selects one of the four I/O groups or chassis, Al through A4. Each chassis contains a channel selector, but the group selector is common to all chassis. The purpose of channel priority is to determine the priority level of the channels in the event that more than one channel attempts to process the same request or interrupt simultaneously. The chassis are numbered Al through A4. Chassis A4 contains channels through 3, chassis A3 contains channels 4 through 7, chassis A2 contains channels 10 through 13, and chassis Al contains channels 14 through 17. The channel selector always grants priority to the highest-numbered channel within a group. The group selector always grants priority to the highest-numbered group. Thus, channel 17 has the highest priority, and channel has the lowest priority. A single function priority scheme is used to service all 16 channels. The function priority is composed of two distinct groups, requests and interrupts. The purpose of the function priority is to determine which request or interrupts are present simultaneously. The priority and access circuits evaluate the requests function priority according to an established sequence, as follows: ( 1 ) Advance real-time clock (2) External function (3) Output request (4) Input request (5) External interrupt (6) External function monitor interrupts (7) Output monitor interrupt (8) Input monitor interrupt. If two or more channels simultaneously request the same type of function, the priority and access circuits assign channel priority in descending order of channel numbers. In addition, force instructions and real-time clock requests have priority over all other requests or interrupts. Each channel contains an ID (Input Data) Active, OD (Output Data) Active, and EF (External Function) Active flip-flop to indicate that the computer program has determined his channel ready to perform the stated function. The active flip-flops are set through either program or manual control and are cleared by either program control or master clear. The request gates are used as an AND function to allow a request to pass only if all required conditions are met. Each channel contains External Function Monitor (EF MON), Output Data Monitor (OD MON), Input Data Monitor (ID MON) and External Interrupt Monitor (EI MON) flip-flops to generate, via I/O priority, an internal interrupt when the specified buffer operation has been completed. These flip-flops, set through program control, are cleared by program control, translator control after the interrupt has been granted priority, or by master clear. OUTPUT REGISTERS.-One output, or C, register is provided for each group or chassis to store output data until the associated peripheral device is capable of processing it. 126 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) COMPUTER EXTERNAL FUNCTION REQUEST EXTERNAL FUNCTION ACKNOWLEDGE 16 OUTPUT OUTPUT DATA REQUEST CABLES OUTPUT ACKNOWLEDGE 30 OUTPUT DATA LINES 16 INPUT EXTERNAL INTERRUPT ENABLE EXTERNAL INTERRUPT REQUEST INPUT DATA REQUEST CABLES INPUT ACKNOWLEDGE 30 INPUT DATA LINES PERIPHERAL EQUIPMENT LEGEND: CONTROL LINES ' OATA LINES 124.423 Figure 4-31 .—Computer to peripheral equipment cabling. COMPUTER TO PERIPHERAL DATA AND CONTROL SIGNALS Each input and output channel is connected to its peripheral equipment by cables, as shown in figure 4-31. Each cable has data lines and control lines. The data lines are used to carry the data to or from the computer, and the control lines serve as a means of identifying the type of data on the data lines and as a synchronizing control between the two units of equipment. The output cable control lines are labeled : ( 1 ) External Function Request (2) External Function Acknowledge (3) Output Data Request (4) Output Acknowledge. The input cable control lines are labeled : (1) External Interrupt Enable (2) External Interrupt Request (3) Input Data Request (4) Input Acknowledge. Notice the direction of information flow in figure 4-3 1 . The data request signals are always sent from the external equipment to the computer. The acknowledge signals are always sent from the computer to the external equipment. Table 4-6 describes the computer to peripheral equipment control lines. Sequence of Events All references to input and output are made from the standpoint of the computer; input is input to the computer and output is output from the computer. Output Data (1) Computer initiates output buffer for given channel. (2) Peripheral equipment sets the output data request line, indicating that it is in a condition to accept data. (3) Computer detects the output data request. (4) Computer (at its convenience) places information on the data lines. (5) Computer sets the output data acknowledge line, indicating that the data is ready for sampling. (6) Peripheral equipment detects the output data acknowledge. (7) Peripheral equipment samples the data lines. 127 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Table 4-6.— Computer to peripheral control signals FUNCTIONAL NAME WORD TRANSFER CABLE DIRECTION DEFINITION EFFECT External Function Request External Function Acknowledge Output Data Request Output Acknowledge External Interrupt Enable External Interrupt Input Data Request Input Acknowledge NOTE: O O O O PE C PE C PE PE C PE C PE PE PE ♦■ C PE Peripheral equipment ready to accept an external function. An external function word is on the data lines ready to be sampled. Peripheral equipment ready to receive next output word. A data word is on the data lines ready to be sampled. Computer can accept an external interrupt. Control information is on the data lines A data word is on the data lines ready to be sampled. Computer has accepted the word on the data lines. Computer sends an external function to peripheral equip- ment. Peripheral equip- ment control unit decodes function word. Computer forms next output word and sends output acknowledge. ./litiates cycle whereby peripheral equipment accepts and processes output word. Peripheral equip- ment interrupts the computer if necessary. Causes computer program to jump to a subroutine for that channel. Computer accepts input word and sends input acknowledge. Initiates cycle whereby peripheral equipment produces next input word. Computer O Peripheral Equipment I Output Input 128 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) (8) Peripheral equipment may drop the output data request any time after detecting the output data acknowledge. (9) Computer drops the output data acknowledge after a specified time. Items 2 through 9 of this sequence are repeated for every data word until the number of words specified as the difference between the initial address and final address (i.e. upper 15 bits = final address, lower 15 bits = initial address) of the output buffer word has been transferred. Throughout the discussion of computer I/O control signal and data flow, reference will be made to the computer performing some action "at its convenience." Convenience, in this context, should be interpreted as meaning no higher priority work to be performed. Input Data ( 1 ) Computer initiates an input buffer for a given channel. (2) Peripheral equipment places a data word on the data lines. (3) Peripheral equipment sets the input data request line to indicate that it has data ready for transmission. (4) Computer detects the input data request. (5) Computer samples the data lines at its convenience. (6) Computer sets the input acknowledge line indicating that it has sampled the data. (7) Peripheral equipment senses the input acknowledge line. (8) Peripheral equipment may drop the input data request line any time after detecting the input acknowledge. (9) Computer drops the input acknowledge line after a specified time. Items 2 through 9 of this sequence are repeated for every data word until the number of words specified in the input buffer has been transferred. External Function (Normal) (1) Computer initiates an external function buffer for a given channel. (2) Peripheral equipment sets the external function request line when it is ready to accept the external function code. (3) Computer detects the external function request. (4) Computer, at its convenience, places the external function code on the data lines. (5) Computer sets the external function acknowledge line to indicate that the external function code is ready for sampling. (6) Peripheral equipment detects the external function acknowledge and samples the external function code. (7) Peripheral equipment may drop the external function request any time after detecting the external function acknowledge. (8) Computer drops the external function line after a specified time. External Function (Forced) Same as External Function (normal) except that the computer does not require an external function ready signal from the peripheral equipment, so the computer will not be delayed by steps 2 and 3. External Interrupt (1) Computer sets the external interrupt enable when it is ready to accept an external interrupt for a given channel. (2) Peripheral equipment detects the external interrupt enable. (3) Peripheral equipment places the external interrupt word on the data lines. (4) Peripheral equipment sets the external interrupt request line to indicate that an external interrupt code is on the data lines. (5) Computer detects the external interrupt request signal and, at its convenience, stores the external interrupt word. (6) Computer drops the external interrupt enable. (7) Peripheral equipment detects the drop of the external interrupt enable and clears the external interrupt request line and the data lines. The input acknowledge to 129 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 an external interrupt request will be initiated at the same time that the external interrupt enable is cleared. The simultaneous occurrence of these conditions should be used by peripheral equipment to differentiate between an interrupt acknowledge and a data acknowledge. Computer to Computer Data and Control Signals Any channel for which the intercomputer circuit card has been inserted can communicate with another computer (identification of these cards will be discussed later in the chapter). A similarity exists between intercomputer channels and normal channels. The two cables are identical, but the control line titles are different from the titles of a computer to peripheral channel. Interpretation of the data lines is similar and all voltage levels are the same. Figure 4-32 illustrates the interface between two computers. Control line title and functions are shown in table 4-7. Note that the control signals in the input cable are the same for intercomputer communication as for communication with peripheral equipment. In the output cable, ready and resume signals are used to control the intercomputer transfer of data. Sequence of Events Computer A is transmitting to computer B as shown in figure 4-32. Intercomputer Command Word Transfer (1) Computer B sets the external interrupt enable when it is ready to accept a command word from computer A. (2) Computer A recognizes the external interrupt enable as an external function request and places the external function code on the data lines. (3) Computer A sets the external function acknowledge to indicate that the external function code is on the data lines. (4) Computer B, at its convenience, recognizes the external function acknowledge as an external interrupt request and accepts the command word. (5) Computer B clears the external interrupt enable line, stores the command word in the status word location, and sets the input acknowledge line. COMPUTER A EXTERNAL FUNCTION REQUEST OUTPUT J f EXTERNAL FUNCTION ACKNOWLEDGE t r READY * fe \ \ RESUME \ OUTPUT DATA INPUT J EXTERNAL INTERRUPT ENABLE k r EXTERNAL INTERRUPT REQUEST ^ r INPUT DATA REQUEST s s, INPUT ACKNOWLEDSE » s INPUT DATA * \<- EXTERNAL INTERRUPT ENABLE EXTERNAL INTERRUPT REQUEST INPUT DATA REQUEST INPUT ACKNOWLEDGE H- INPUT DATA EXTERNAL FUNCTION REQUEST EXTERNAL FUNCTION ACKNOWLEDGE READY INPUT OUTPUT RESUME j OUTPUT DATA lbgehd: CONTROL LINES DATA LINES COMPUTER B Figure 4-32.— Intercomputer cabling. 130 124.424 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) Table 4-7.— Intercomputer control signals FUNCTIONAL NAME WORD TRANSFER CABLE DIRECTION DEFINITION EFFECT External Function Request External Function Acknowledge Ready Resume External Interrupt Enable External Interrupt Request Input Data Request Input Acknowledge O Rx ►Tx O Tx ►Rx O O Tx ►Rx Rx ►Tx Rx ►Tx Tx ►Rx Tx ►Rx Rx ►Tx Receiving computer is ready to accept an external function word. An external function word is on the data lines ready to be sampled. A data word is on the data lines ready to be sampled. Computer has received last word. Receiving computer is ready to accept an external function word. An external function word is on the data lines ready to be sampled. A data word is on the data lines ready to be sampled. Computer has accepted the word on the data lines. Transmitting com- puter sends an ex- ternal function to receiving computer. Appears as an ex- ternal interrupt request to receiving computer. Appear? as an input data request to re- ceiving computer. Transmitting com- puter produces next output word. Appears as an ex- ternal function re- quest to transmitting computer. Causes computer program to jump to subroutine for that channel. Receiving computer accepts input word and sends input acknowledge. Appears as a resume to transmitting com- puter. Note: Tx Rx Transmitting computer Receiving computer O I ♦ Output ■*■ Input 131 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 (6) Computer A recognizes the input acknowledge as a resume and clears the external function acknowledge line. Intercomputer Data Transfer (1) Computer B initiates an input buffer, and computer A initiates an output buffer for the required channel. (2) Computer A places data on the data lines. (3) Computer A sets the ready line to indicate that the data is on the lines. (4) Computer B recognizes the ready signal as an input data request signal and, at its convenience, accepts the data word. (5) Computer B sets the input acknowledge line. (6) Computer A recognizes the input acknowledge as a resume signal and clears the ready and data lines. The cycle is repeated for each word to be transferred. Input/Output Operations Once the I/O operations have been initiated by program control, the I/O section operates independently without program reference. To initiate an I/O function, or buffer, the program sets the active flip-flop for the desired function and the specified channel. The program also stores a control word in a fixed memory location which will be used to determine the memory address or addresses to be used during the buffer operation. At this point, the I/O section assumes full control of the buffer process, and program control is released to perform other computer functions. Once the channel has thus been activated, it can accept the specified function request from the peripheral device. Each time the request is received, one 30-bit word is processed, and the control word is updated and checked for termination. If the current address word and the final address word are identical, the active flip-flop is cleared and the buffer process is complete. INPUT DATA REQUEST (IDR).-When an input buffer is required, program control sets the ID ACT flip-flop for the specified channel and stores the I/O control word at the specified address for the desired channel. When the peripheral device has placed a data word on the input data lines, it sets the input data request line. At the input data request date, the request is ANDed with the active flip-flop, the one-shot, and the input available. The input available indicates that the input acknowledge register is not being used. The output of the input data request gate goes to the channel priority register, and the inversion of the output goes to the function priority register. Channel priority selects the proper channel within the group. Function priority, besides selecting the proper function, also selects the proper group. After the group has been selected, an output of group priority is used to initiate the I/O sequence. The outputs of channel and group priority are translated to supply enables which allow the I/O sequence to process this request by the following sequence. (1 ) Read the control word. (2) Clear the one-shot flip-flop. This ensures that the IDR line must be cleared and reset before another IDR can be processed on this channel. (3) Clear the active flip-flop if this is the last word to be read in. (4) Write the word on the data lines into memory. (5) Update the control word. (6) Write the control word back into its assigned address. (7) Send an input acknowledge signal to the peripheral device. This sequence is repeated for each IDR until the active flip-flop is cleared. OUTPUT DATA REQUEST (ODR).-When an output buffer is required, program control sets the OD ACT flip-flop for the specified channel and stores the I/O control word in the specified address for the desired channel. When the peripheral device is ready to accept data from the computer, it sets the output data request line. At the output data request gate, the request is ANDed with the active flip-flop, the one-shot, and the output available (indicating 132 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) that the output acknowledge register is not being used). The output of the output data request gate goes to special priority and from there to channel and function priority. Channel priority selects the proper channel within a group. Function priority is used to select the proper group. When the group has been selected, an output is used to start the I/O sequence. The translations of the outputs are used to allow the I/O sequence to process the request by the following sequence of events. ( 1 ) Read the control word. (2) Clear the one-shot flip-flop. This ensures that the ODR line must be cleared and reset before another ODR can be processed on this channel. (3) Clear the active flip-flop if this is the last word to be transferred. (4) Read the word from the address specified and place it on the data lines. (5) Update the control word. (6) Write the control word back into its assigned address. (7) Send an output acknowledge signal to the peripheral device. This sequence is repeated for each ODR from a peripheral device until the active flip-flop is cleared. EXTERNAL INTERRUPT REQUEST (EIR).— The EIR flip-flop is cleared by master clear or program control. The external interrupt hold (EI Hold) flip-flop is set by master clear or program control. When the EIR flip-flop is clear and the EI Hold flip-flop is set, the computer sends an external interrupt enable signal to the peripheral equipment indicating that the computer is capable of accepting an external interrupt on this channel. When the peripheral equipment desires to interrupt the computer program, it sets the EIR line. The EIR from the peripheral device is ANDed with EI Hold flip-flop set, EIR flip-flop clear, channel active, input available, and the one-shot at the EI request gate. The output of the EI request gate is transmitted to the channel priority register to determine priority of the channel. The inversion of the EI request gate goes to the function priority register to determine priority of the function. After priority has been determined, the I/O sequence is started. Translations of the outputs of channel and function priority supply the enables which allow the I/O sequence to process a request by the following sequence. (1 ) Clear the one-shot flip-flop. This ensures that the EIR line must be cleared and reset before another EIR can be processed for this channel. (2) Store the status word contained on the input data lines in the address reserved for external interrupt code storage for this channel. (3) Set the EIR flip-flop. This removes one of the enables to the external interrupt gate and drops the external interrupt enable line to the peripheral equipment which indicates to the peripheral equipment that the computer can no longer accept any interrupts on this channel. (4) The set side of the EIR flip-flop is ANDed with the clear side of the EI hold flip-flop and the channel active signal clear to request priority to interrupt the computer program. From this point on, this interrupt functions as any other I/O interrupt. I/O Interrupts An interrupt is a control signal which diverts the attention of the computer to an extraordinary event or set of circumstances. Many levels of control can be exercised by the numerous forms provided. The interrupts from external sources serve primarily to synchronize the computer program with the readiness of peripheral devices, including other computers, to transmit or receive data and to notify the computer when an error has occurred. Internal interrupts serve primarily to synchronize the computer program with termination of input/output transfers and to signal the occurrence of an error. An interrupt causes the next instruction to be procured from a fixed address corresponding to the interrupt source. This fixed address serves as a subroutine entrance by containing a return 133 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 jump instruction. The return jump instruction transfers the contents P + 1 , which is the address of the instruction that would have been executed, to the first address of the subroutine, thereby providing the subroutine exit. Program control is transferred to the second address. Basically, there are two types of interrupts, external and internal. The internal interrupts (monitor interrupts) are generated when the monitor and inhibit flip-flops are set. Whenever it is desired to have an interrupt upon termination of a buffer function, the monitor flip-flop is set by program control. The inhibit flip-flop will always be set unless it is desired that no interrupts be accepted for a given channel. When the buffer is terminated (current address equals ending address), monitor control will cause the EI Active flip-flop to be set. At this time, the interrupt requests channel and function priority. The special address (interrupt entrance address) is transferred to S from the channel and function translators. This causes the next instruction for the computer program to be read from this address. Operating Modes The computer program initiates and controls the input/output mode of operation and selects the proper I/O channel to be set in the active mode. The modes available are the input mode, output mode, interrupt mode, and the buffer mode. INPUT MODE.— The input mode is initiated by a programmed instruction when either the computer receives an external interrupt and the associated external interrupt code word or when it receives an input data request and the associated data word. When an input data request is received from a peripheral device, it enters the appropriate request circuits. To honor the request, the computer enables the appropriate channel to gate the request to the priority circuitry. The priority logic determines the priority rating of the request and also supplies the memory address which indirectly specifies where the data is to be either read from or stored. The function selected by priority is an input data transfer; the data present at the input amplifiers for the selected channel is gated into the Z register and stored in memory. The computer sends an input data acknowledge (ID ACK) signal to the unit which sent the data. Upon receiving the acknowledge signal, the peripheral unit drops the input data request line. OUTPUT MODE. -The output mode is initiated when the programmed instruction specifies a data transmission to a peripheral device. The I/O section translates the program instruction, accesses memory, places the data in the appropriate output C register, and energizes the specified external function or output data acknowledge control line to notify a particular external equipment that a data buffer is present. The data transfer consists of either an external function code word accompanied by the external function signal or data words accompanied by an output data request. The manner in which the computer initiates an output control word transmission is dependent upon the capability of the receiving peripheral device to generate an external function request signal. For peripheral equipment which cannot generate an external function request, the computer requires an f = 13 instruction (k - 1, 3) to generate the external function signal and control word. Therefore, the transmission of a control word is synchronous with the computer program. When the peripheral equipment is capable of generating an external function request, the signal interrupts the main computer program and causes the computer to select the appropriate I/O channel. Once the communication link has been established, the computer returns to the main program, and the transfer of output data proceeds without program reference until completed. If the function selected by priority was an output data transfer or external function transfer, the data is transferred from memory via the Z register to the C registers for transmission to the peripheral unit. INTERRUPT MODES. -Provision is made to permit interruption of a running program by an event which may occur asynchronously with the program. Both external and internal interrupts may be generated. Either type of interrupt 134 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) causes the computer to discontinue the running program and to execute the instruction located in one of the permanently assigned external or internal interrupt entrance registers listed in table 4-4 External Interrupts An external interrupt results from an external unit placing a signal on an external interrupt line. The accompanying bit-position coded, 30-bit word on the data lines defines the special condition which exists at the external unit originating the signal. When an external interrupt transmission is recieved, computer program control is transferred to a special subroutine for processing the interrupt. The interrupt causes the computer to discontinue the (normal sequence and to execute the instruction obtained from the core memory address (00020 +y) corresponding to the interrupt source (table 4-4). Address 00020 + y serves as a subroutine entrance by containing a return jump instruction. The return jump instruction ! transfers the contents of P (address of next i instruction) to the first address of the subroutine, thereby providing a subroutine exit. Program control is then transferred to the second subroutine address, and the interrupt is processed. Internal Interrupts Two types of internal interrupt signals are produced by the 1/0 section. Internal interrupts are generated whenever a buffer, which has been initiated with a monitor, terminates at the end of the transfer. Fault interrupts are caused by either executing an illegal function code (f = 00 or 77) or by a time-out interrupt on any of the intercomputer channels. Buffer with Monitor During a buffer with monitor, data words are transferred sequentially, starting at a given address through a terminal address, on the specified input or output channel. Completion of the buffer causes an internal monitor interrupt to the input, output, or external function monitor interrupt entrance register (table 4-4) assigned to the input or output channel. The monitor interrupt entrance register contains the next instruction. As an example, a monitor interrupt entrance register may contain the following type of instruction. 650nn nnnnn — exit to an interrupt subroutine for remedial action. This subroutine ends with a 60 Inn or 66 instruction which clears the internal interrupt mode; then returns control to the main routine. During the transmission of external function and/or output data words between computers, the transmitting computer holds the word in the output register associated with the specified channel until a resume signal is received or until a specified time has elapsed. Failure to receive a resume signal within the specified time causes a time-out interrupt to the intercomputer time-out interrupt entrance register assigned to the computer (table 4-4). Unless otherwise specified, the time-out interrupt is generated after a time period of one to two seconds has elapsed. The length of time period is computed by: time = 1/1024 x 2N seconds, where N may be any integer from to 30. Note that only on intercomputer channels will time out interrupts occur. Buffer Without Monitor During a buffer without monitor, data words are transferred sequentially, starting at a given address through a terminal address on the specified input or output channel. No monitor interrupts occur at the completion of the buffer. FUNCTIONAL SCHEMATICS The functional schematics are detailed block diagrams of the logic circuits that are required to perform a specific function. Figure 4-33 illustrates the basic symbols that are used in making up the functional schematic for the CP-642B. The inverter or driver (fig. 4-3 3 A) is an amplifier that causes signal inversion. The logic term, 10J09, is the notation that identifies that unique logic circuit. The card type notation, 135 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 LOGIC OR UNIQUE TERM CARD TYPE CARD LOCATION 5 J 37F CHASSIS COORDINATES A. INVERTER OR DRIVER C. FLIP-FLOP (With Indicator Driver) INDICATES LOW NPUT OR OUTPUT REQUIRED TO SATISFY LOGIC CONDITIONS 11J03 2050 5J34E AND OR B. LOGICAL AND and OR GROUNDED RETURN LINE TWISTED PAIR INPUT INTERCOMPUTER I/O CHASSIS CARD LOCATION. NORMAL I/O CHASSIS CARD LOCATION. D. I/O NOMENCLATURE 124.425 Figure 4-33.— Typical logic symbols. 2070, identifies the type of card (of a possible 83 different types). The card location term, 5J37F, specifies the jack on a chassis that the card is to be plugged into. Card locations will be discussed later in this chapter. Figure 4-3 3 B illustrates the logic symbols that are used for AND and OR circuits. The small circles on the inputs and outputs are used to indicate that a low logic level is required to satisfy the logic condition. Figure 4-33C shows the symbology for a flip-flop and a special circuit called an indicator driver (used to light front panel neon lamps). In the logic term 0XJ13, the X is to be replaced with a 1 to specify the set side, or a for Jhe clear side. Figure 4-33D illustrates the special nomenclature used with I/O chassis printed circuit cards. In the logic term 46Qg4, the lower case g is used to indicate that the chassis number should be inserted in place of the g to refer to a 136 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) specific chassis. This eliminates duplication of 1 I/O chassis functional schematics. The lower case c and n beside the symbol are used to indicate whether the chassis is an intercomputer I/O chassis or a normal I/O chassis. Figure 4-34 is a representative functional schematic. The input signal description, source logic element, and source figure number are normally located on the top of the schematic. The input signal description for pin 14 of 1 1 J03, L => MC, is interpreted as "a low signal level means master clear." Clock phases are identified by and the phase number, e.g., 02. The signal output logic destination, figure number and signal description are usually located at the bottom of the page. PARTS LOCATIONS Figure 4-35 illustrates the locations of the movable plugs and the memory and logic chassis for the CP-642B. The movable plugs mate to corresponding jacks mounted on the sides of the [chassis. The plugs are numbered sequentially [from the front of the cabinet to the back on the ! left and right sides, respectively, then from top I' to bottom. The main power supply for the computer is located under chassis A13 and is mounted on 1 the cabinet bottom. This power supply provides the d.c. voltages used by the computer logic and memory circuits. There is a separate console power supply that produces the voltages for the i indicators, switches and relays on the operator's console. The plenum assembly on the rear of the cabinet is an air space that also holds the blowers and heat exchanger (for a water cooled cabinet). Removal of the blower and/or heat exchanger requires that an inner plate (referred to as inner skin) inside the computer cabinet be removed. Refer to the appropriate technical manual for these procedures. The I/O and power connections are shown in figure 4-36. These plugs are mounted on top of the computer cabinet, and the top cover must be removed to have access to them. THE "9" INDICATES THE ASSOCIATED INPUT OR OUTPUT CHANNEL OR THE ASSOCIATED CORE MEMORY CHASSIS AS APPROPRIATE (USED TO ELIMINATE REDUNDANCY). 71C16 (7) X 10J6 P43 46 P38 12 5J6 6 VI >--l CHASSISA JACK 16M2> 0XJ13 FF 2020 SJ56B an ^ 37J03 2150 5J16A interchassis i connection •unique term for flip-flop "x"=^"o"or"i" indicates low output when flip-flop is set -INDICATOR DRIVER CIRCUIT 124.426 Figure 4-34.— Representative functional schematic. 137 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Note: PLENUM ASSEMBLY ON REAR. MAIN POWER SUPPLY IS BELOW | P4 | | P3 | | P12 | | P11 | P2 | | PIO | |P20| | P19 | P18 | [P2B| j P27 | P26 | | P36 | | P35 | P34| | P44| |P43 | P42| [ P52 I i P51 | P50| | P60 | | P59 | P58 | |P66| P65] LJP70J |_P69j |P74| P73 | IP78I P77| |P82| P81 | Lip P9 EH] LHH] EsD |P49| P57 BOTTOM OF CHASSIS A13. OPERATOR CONTROL- PANEL INPUT/OUTPUT CHASSIS' CONTROL 8 ARITHMETIC Al A2 A3 A4 "A5 A6 ^A7 THIN FILM MEM0RY-^A8 A9 A10 Alt A12 A13 CORE MEMORY CHASSIS ooooooooooooooooooo oo gooooooooooooooggoc oooooo OOOOOO a, en OOOOOOO C fy g> O OOOOOO ^ ^ OOOOOOO " rri OOOOOOOOOOOOOOOOOOO O ,- , ^ r^ OOOOOOO O ' — ' ^b'fe^gg^ ooooooo $S>V» l~~ LHUCpD cedceei 1 P13 | | P14 ] P15 1 |P16| I P21 I I P22 | P23||P24| |P29||P30| P31 | | P32 | |P37| | P38J |P39| |P40| | P45 | | P46 | P47 | | P48 | |P53||P54| P65| |P56| |P61 | |P62| |P63| |P64| [p6jj [pie] [P71 | [m\ FtT) ED |P79| [psqj [P83J HE LEFT SIDE FRONT RIGHT SIDE Figure 4-35.— Chassis and plug locations. 124.427 Test Point Location Each logic element has a test point at its output (fig. 4-34) that is connected to a test block on the front of each chassis as illustrated in figure 4-37A. From the test point designation on the functional schematic, the test point can be located exactly. For example, test point 10J6 of logic element 18J03 (fig. 4-34) is located on test block 10 (fig. 4-37 A) coordinated J6 (fig. 4-3 7B). The chassis number is not specified in the test point designator since it is the same as the logic element. CARD LOCATION ON A CHASSIS Each computer chassis is divided into seven card rows (A through G) and 62 card columns. Figure 4-38 is a diagram of a partial chassis map that is used to locate a specific card. MANUAL OPERATIONS The computer logic provides for manually writing into and reading from memory using the front panel controls. These provisions are intended for use during maintenance procedures and for testing and debugging programs. The following steps detail how to use these provisions with the Q register. However, similar operations are accomplished using the A register and its related instructions. Manual Write, Single Word (1 ) Master clear the front panel (2) Set AfEn in Active Seq indicators (3) Set U = 14030 yyyyy (Store Q to address specified by yyyyy) (4) Set Q = word to be stored (5) Press OP STEP (6) Press START-STEP. Computer stores word in Q to address specified by UL. Manual Write, Consecutive Words (1) Master clear the front panel (2) Set AfEn 138 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) J34 J35 P85 P86 J36 P87 J53 J 37 P88 J54 J38 P89 J56 ,.P98 : :: J24 J23 J22 J21 J20 J19 J18 J17 J5 Jl J42 J 39 P90 J40 P91 J41 P92 FRONT J28 J27 J26 J25 J33 J14 J13 JIO J9 J6 J2 J32 J31 J30 J29 J16 J15 J12 J11 J8 J7 J4 J3 J55 P97 Legend: CABINET I CONNECTOR | FUNCTION Jl and J17 '.. CHANNEL INPUT/OUTPUT J2 and J18 CHANNEL 1 J3 and J19 . CHANNEL 2 J4 and J20 CHANNEL 3 J5 and J21 CHANNEL 4 J6 and J22 CHANNEL 5 J7 and J23 CHANNEL6 J8 and J24 CHANNEL 7 J9 and J25 CHANNEL 10 JIO and J26 CHANNEL It J11 and J27 CHANNEL 12 J12 and J28 CHANNEL 13 J13 and J29 CHANNEL 14 J14ond J30. ..... CHANNEL 15 J15 and J31 CHANNEL 16 J16and J32 CHANNEL 17 J33 COMPUTER SET CONTROL INTRODUCER J34 THROUGH J41 8 .. . . INTER-CHASSIS P85 THROUGH P92 CONNECTORS J42 EXTERNAL REAL-TIME CLOCK J53 MOTOR GENERATOR (REGULATED 400Hz POWER) J54 SHIPS POWER (UNREGULATED 400Hz POWER) J55/P97 AC POWER DISTRIBUTION J56/P98 BLOWER POWER DISTRIBUTION CABINET CONNECTOR J1 and J17 J2 and J18 J3 and J19 J4 and J20 J5 and J21 J6 and J22 J7 and J23 J8 and J24 J9 and J25 J10and J26 J11 and J27 J12and J28 J13and J29 FUNCTION Channel Input and Output Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 10 Channel 11 Channel 12 Channel 13 Channel 14 CABINET CONNECTOR FUNCTION J14 and J30 Channel 15 J15 and J31 Channel 16 J16andJ32 Channel 17 J33 Computer Set Control Introducer J34 through J41 Inter-Chassis Connector and P85 through P92 J42 External Real-Time Clo J53 Motor Generator (Regu lated 400-Hz Power) J54 J55/P97 J56/P98 Ships Power (Unregu- lated 400-Hz Power) AC Power Distribution Blower Power Distribution Figure 4-36.— I/O and power connections. 124.428 139 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 J9 JtO J11 J12 J13 J14 J16 J16 J 17 J18 J19 CHASSIS A1 THROUGH A7 J9 JtO J11 J12 J 16 J16 CHASSIS A8 J6 J6 J7 J8 CHASSIS A9 THROUGH A13 A. TEST POINT BLOCKS J10 ABCDEFGHIJKLMMO o oooo o oo O O I o I O I j ^-(6J)1> 10J6 B. TEST POINT COORDINATES Figure 4-37.— Test point locations. 124.429 61 62 \ 02N03 49 04G10 127 OR 2013 01W29 83 00W29 83 "* 2222H 2000-* 11F47 57 21F36 IF36 / 3-3-2 2060 •LOGIC ELEMENT UNIQUE TERM -FIGURE NUMBER OF LOGIC ELEMENT LOCATION -ENGINEERING INFORMATION CARD TYPE -UNUSED LOGIC CIRCUIT UNUSED CARD JACK 124.430 (3) Set U = 70100 00003 (Repeat next instruction— the repeat count of 3 is used only to enable the repeat mode) (4) Set DISCONNECT B7 up (5) Press OP STEP (6) Press START-STEP (Activates repeat mode) (7) Set U = 14030 yyyyy (yyyyy = lowest address of desired storage locations) (8) Set Q = word to be stored (9) Press START-STEP. Computer stores word in Q to address specified by UL. To store additional words at consecutive addresses, clear Q, enter new word in Q and press START-STEP. Manual Read, Single Word (1 ) Master clear the front panel (2) SetAfEn (3) Set U = 10030 yyyyy (Enter Q with contents of address specified by yyyyy) (4) Press OP STEP (5) Press START-STEP. Computer enters Q with (yyyyy). Manual Read, Consecutive Words (1) (2) (3) (4) (5) (6) (7) (8) Figure 4-38.— Partial chassis map. Master clear the front panel Set AfEn Set U = 70100 00003 Set DISCONNECT B7 up Press OP STEP Press START-STEP Set U = 10030 yyyyy (Enter Q with contents of address specified by yyyyy. yyyyy = lowest address of storage locations) Press START-STEP. Computer enters Q with (yyyyy). To read next sequential address, press START-STEP. MANUAL TESTS There are several manual tests that are used to assist in trouble isolation. These tests use the manual read and write procedures previously described. Some of the tests are briefly described in the following paragraphs. Detailed description and operating procedures are left to the appropriate technical manuals. 140 Chapter 4-NTDS UNIT COMPUTER CP-642B/USQ-20(V) 5 Test This test exercises the computer's ability to mte any desired pattern of ones and zeros into 11 core memory without using any memory ddress to store the test. This test uses a speated 55 instruction that is manually loaded l U. It does not write into control memory and an perform its operations at any cycle rate. The 5 test requires that test point 5J11H4 be rounded. Grounding any other test point may ause memory damage. lemory Capacity Test The memory capacity test checks core lemory by causing the quantity stored at each ddress to be the address itself. Therefore, when lemory is read out, the contents will be the ame as the address. lagnetic Core Cycling Test This test permits the checking of a particular /ord and its associated circuitry. The program ontinually reads the same address so that the /aveforms can be checked to isolate the nalfunctioning circuits. ^ore-Read Marginal Check The core-read marginal check uses the 55 est to check memory under marginal onditions. By means of the margin switches, he signals to the sense amplifiers are increased low margins) or decreased (high margins) in /idth. With an increase in width, less signal is lipped, and with a decrease in width, more ignal is clipped and less signal is available to the amplifier; therefore, greater sensitivity is required of the amplifier to pass the signal. Repetition Rate Test This test establishes that the memory is capable of operating properly at a maximum repetition rate. It uses a repeated enter Q instruction which has a cycle time of four us (250,000 memory references per second). Cycle Time Test The cycle time test checks the control memory cycle time by measuring the time between the leading and trailing edges of a signal to ensure that the cycle time is less than 700 ns at 50 percent amplitude. SUMMARY The CP-642B is divided into the four functional sections explained in some detail in this chapter: Control, Arithmetic, Memory and Input/Output. In the simplest terms each of these sections performs the operations that are generally associated with its name. The control section provides the timing, instruction translation, and coordination of operations between the other sections. The arithmetic section performs the arithmetic logical operations of the computer. The 1/0 section allows the computer to communicate with peripheral devices or other computers. Although it relies on the control section for timing, the 1/0 section has its own control function and may operate in parallel with the rest of the computer. The memory section provides the computer with permanent storage area for programs, constants, and buffered 1/0 data. 141 CHAPTER 5 NTDS PERIPHERAL EQUIPMENT Peripheral equipment handles data before or after the computer uses it. The terms ancillary or auxiliary equipment are synonymous. Peripheral equipment covers all on-line (i.e., communicates directly with the computer) equipment, and in some applications, might also include off-line equipment. However, in this text, peripheral equipment will only refer to on-line equipment. Off-line equipment is considered to be in a separate category known as electronic accounting machines (EAM). Within the NTDS, the identifier "peripheral equipment" is further restricted to equipment that can load, store, or directly control the computer program(s). NTDS peripheral equipment includes the RD-243 Magnetic Tape Unit, the RD-231A Paper Tape Cabinet (Unit), the OJ-212(Vl) Teletypewriter, the C-3675A System Monitoring Panel, and the MX-3195 Universal Keyset. The peripheral equipment block diagram shown in figure 5-1 illustrates the manner in which these devices are usually connected in the NTDS. This block diagram may vary slightly between installations with the addition of switching units. The keyset central multiplexer (KCMX) unit shown in figure 5-1 is usually considered a data conversion device and will be treated as such later in this text. For now, think of the KCMX as an interface or switching equipment that will select a keyset and pass the information to the computer. MAGNETIC STORAGE Magnetic storage is an important aspect of data processing. In order to adequately explain even one piece of magnetic storage equipment (the RD-243 Magnetic Tape Unit), it is first necessary to survey the entire subject area. PRINCIPLES OF MAGNETIC STORAGE Magnetic storage principles are generally based upon the fact that a current can be generated in a conductor when there is a change in the lines of force that cut through it. Conversely, change a current in a conductor, and there is a change in the lines of force that emanate from it. Rotating a conductor in a magnetic field creates a current. Changing the physical distance between a conductor and a source of magnetic flux also produces a current. TYPES OF MAGNETIC STORAGE DEVICES.— Of the four general types of magnetic storage devices, three (tape drives, disk files, and drum units) depend upon a change in the physical distance between a conductor (a read/write head) and a source of magnetic flux (the magnetic oxide surface) to induce a current that is detected by read circuits. Core memories (the fourth type) are rigid structures in which X-Y drive currents combine to force the core at their cross-coordinate to change state if a logic "1" exists there. The impedance given to the drive currents while a "1" core changes state affect the induced current in the sense line. This causes the read circuits to set a corresponding "1" in the memory register (Z register). This destructive readout technique for core memories requires a write operation to follow a read operation to replace the contents. The other three types of magnetic storage devices do not destroy memory contents with a 142 Chapter 5-NTDS PERIPHERAL EQUIPMENT MAGNETIC TAPE UNIT RD-243 m w i ' i t \) V TELETYPE*! 0J-212(V1) COMPUTER A CP-642B SYSTEM MONITORING PANEL C-3675A COMPUTER B CP-642B * b TELETYPE *2 0J-212(V1) i i i i A n T ' v \ PAPER TAPE UNIT RO-231 KEYSET CENTRAL MULTIPLEXER (KCMX)CV-2036 d t UNIVERSAL KEYSET MX- 3195 124.431 Figure 5-1.— NTDS peripheral equipment block diagram. read operation. Data is recorded as magnetized jpots on the surface. The change in flux patterns between adjacent spots on the surface is detected by the read/write head as a very small current. There is no change in the spots :hemselves (unless a current is being supplied to the head from the electronic section on a write Dr erase operation). Lines of force created by write currents would cause a change in the magnetic patterns on the surface and, if strong jnough, would entirely cancel the previously [recorded pattern. When write or erase currents jire too weak, some of the prerecorded patterns on the surface retain their polarity. This causes a Condition known variously as sound-on-sound ! 'audio recordings), print-through, or add-on j-ecording. This is not a desirable condition in 'magnetic recording of digital information. If a write current is too strong, the expanded flux field will overlap adjacent fields or surface areas and produce a condition known as crosstalk. This is not a desirable condition either. BASIC RECORDING TECHNIQUES.-The principles of RZ (return to zero) and NRZ (nonreturn to zero) recording techniques are covered in chapter 6 of Digital Computer Basics. In general, NRZ is found in newer equipment since it allows for higher bit densities on the recording surface. RZ and NRZ recording techniques are incompatible with each other. RZ detects the direction of flux change between adjacent spots as either a 1 or a 0. NRZ detects the fact that there was a change, in either direction, as a 1 (no change is a zero). RZ 143 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 requires an initial period during write operations to switch to a zero polarity if a "1" is to follow another "1", or to switch to a one polarity if a "0" is to follow a "0". During read operations, the logic must be inhibited from reading data during each initial phase. If a read enable occurs during the wrong half-portion of a RZ initial and data frame, a "1-0" or a "0-1" sequential pattern would not be read at all, while a "1-1" or a "0-0" pattern would be read as a l's complement for each bit. To prevent this, RZ devices often incorporate a timing track to aid the logic in determining which are the data frames. These timing tracks are called sprocket tracks with most RZ-type tape drives, and are called clock tracks with disk files or drum units. Some NRZ-type devices also use timing tracks. As an example, most RZ or NRZ disk files and drum units have clock tracks. Equipment with timing tracks usually keeps count of the number of clock phases encountered in the timing track during a read operation. If a clock phase is lost somewhere, the count at the end will be odd. Some equipment even checks to see if two polarity changes in the timing track are consecutively in the same direction. Such occurrences are not normal and are reported by the equipment to the computer as sync (synchronous) errors in the equipment's external interrupt word. Sync errors mean some of the data read may be invalid as a result of reading the wrong half-cycle. REDUNDANCY.- Redundancy begins with a certain number of information bits. Any additional bits required which can aid in detecting a loss, gain, or change in the information bits are redundant in nature. There are different types of redundancy in use. Some are a hardware function (produced automatically by the equipment). Some are a software option (programmed into the computer). In general, if a single redundant bit is used to indicate that all data bits were summed and found to be even or odd, it is called a parity bit. Odd parity is named because all data bits were summed and found even, but by setting the parity bit the total (including the parity bit) became odd. Even parity converts odd count sums to even. Lateral parity in tape drives is the parity bit within each frame. Longitudinal parity is the parity bit(s) that follows a complete block of data. A check-sum is normally a software function where an extra word is put on at the end of a data block, which is the sum of all the words in the block. On a read operation, the words are summed again and compared with the last word read by the computer program-or the complement of the sum is used, causing the total of all words read to always add to zero. Redundant mode is a hardware function and is so named because every data bit is written or read twice, either bit-by-bit, octal-by-octal, frame-by-frame, or word-by-word. The format depends upon the equipment design. MAGNETIC STORAGE DEVICES As mentioned previously, there are currently four widespread types of magnetic storage devices. The magnetic core memory, already dis- cussed, is one type. The RD-243 Magnetic Tape Unit is another type, and will be discussed in this chapter. A disk file, the RD-281, will be covered in chapter 5 of DS 3 & 2, Vol. 2. The Navy does not employ magnetic drum units on a large scale, and these will not be dealt with in this text. An introduction to magnetic storage devices appears in chapter 6 of Digital Computer Basics. TERMINOLOGY. -Several imprecise terms are utilized in familiarizing personnel with the capabilities and limitations of a particular device. Words like large, medium, or small memory capacity; or high, medium, or low speed; or fast, medium, or slow access or data recovery times are not uncommon. These are comparison terms and most often are based upon (1) how this device compares to other equipment of similar design. (2) how it compares to other types of peripheral equipment within a system configuration, or (3) how it compares to the computer itself. Magnetic storage devices are generally compared to other magnetic storage devices. As an example, tape drives are often regarded as having the largest memory capacity, with core memories having the smallest of the four types. Yet computer core memories are regarded as medium or large when compared with the storage capacity of other peripheral devices. 144 Chapter 5-NTDS PERIPHERAL EQUIPMENT Also, disk files and drum units exist that far exceed the storage capacity attributed to tape drives. On data recovery times, magnetic core mem- ories are often regarded as the fastest, though in actual fact many disk files and drum units are faster. However, some provision is required to make superfast equipment compatable with slower equipment, since I/O transfer times are !set by the speed of the slower equipment. Additionally, the computer's data transfer rate is not a constant, but varies with the demand for memory access from the clock, control, arithmetic, and I/O sections. If the demand is high, the data transfer rate per I/O channel decreases. If the computer's rate drops below the minimum level that the magnetic storage device is able to maintain, a loss data error will occur on read operations, or a missed frame error will occur during write operations. These errors are usually detected by the magnetic storage device's logic arid indicated to the computer as a status bit in the external interrupt word that follows a data transfer. IpRINCIPLES OF MAGNETIC STORAGE DEVICES Magnetic storage devices, such as magnetic tape drives, disk files, and magnetic drums generally rely upon a few simple precepts. The first is that a change in flux induces a current. The second is that a change in distance between two objects, with at least one of them being magnetized, will produce a change in flux. These two principles enable read/write heads to supply :'i current when fixed magnetic patterns on a prerecorded surface move past them. This is the basic read operation. A third precept, that an slectrical current will produce a magnetic field, Enables the re ad/ write heads to realign the Patterns of magnetic flux on the tape, file, or irum surface when a current is driven through the coils in the heads. If information is contained in the magnetic patterns, this would be a write operation. If the pattern is bssentially neutral, it is considered an erase ^operation. Direct Current erase operations Convert all flux patterns to the same polarity for |;he length and width of the surface where they ire applied. Alternating Current erase operations scramble the magnetic flux patterns on the sur- face so much that no discernible magnetic pat- tern remains. Chapter 6 of Digital Computer Basics amplifies magnetic recording principles. BASICS OF MAGNETIC STORAGE DEVICES.-In most magnetic storage devices, the heads, whether erase, read, write, or read/write, are "fixed" during a read or write operation. The relative motion between heads and surface is supplied by mechanics to the oxide surface. This surface is generally a form of "rust" of a metal alloy having desirable magnetic characteristics. The oxide is uniformly spread and adhered to some type of backing, and may also be coated in some applications. In disk files and drums the backing is usually a rigid surface. With tape drives, the backing is a strong, flexible tape, such as Mylar, which is wound on a reel. Magnetic recording surfaces are delicate, sensitive to dust and other airborne contaminants, and subject to wear whenever physical contact results in friction. Disk files and drum units offer superior protection to their surfaces in comparison to tape drives. Therefore, comments in this text on maintenance and in chapter 8 of Digital Computer Basics are primarily in regard to tapes. One additional note concerning all oxide surfaces: Do not handle unless necessary. Avoid touching the oxide surface, particularly with disk files and drums. Human skin contains oils and acids; it sheds and carries contaminants, and is, in general, harmful to both the oxide surface and the precision mechanics used in the equipment. Clean thoroughly all surfaces after contact following prescribed techniques. Mylar tape is sensitive to extremes of heat, sweating and sticking together on the reel and even shrinking and shriveling when overheated. Mylar may become stiff or even brittle when too cold. The flexible adhesive may soften, sweat, or run when overheated, or harden and lose its flexibility or ability to adhere when chilled. Increased molecular activity caused by heat or by sudden impact could cause domain realignment of the oxide coating and subsequent loss of information. Excessive strain on the tape will cause it to elongate, losing its uniform width and thickness. Airborne contaminants, which may be gaseous, droplets, or particles in nature, 145 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 may be attracted to the tape by static charges built up through tape movement and friction. These contaminants may chemically or mechanically attack the tape or transport. Lack of proper maintenance and prolonged neglect of tape transports and/or magnetic tapes will result in deteriorated equipment and system performance. MAGNETIC TAPE MAINTENANCE RESPONSIBILITIES The basics of magnetic tape are covered in chapter 6 of Digital Computer Basics. Additionally, there are certain terms, tests, tape upgrading techniques, and equipment used in providing improved tape performance and increased lifespan. There are also certain tests, test tapes, and both electrical and mechanical adjustments that are designed to maintain magnetic tape drives (also called transports) at optimum performance levels. Tape maintenance is normally a data processing technician responsibility, though DSs are responsible for their own maintenance tapes. Tape drives are a DS maintenance responsibility, though DPs often perform normal cleaning tasks as a part of their operator responsibilities. In addition, DSs may be required to support equipment needed by DPs in their tape maintenance program. A grasp of the entire subject area is required for proper maintenance support. MAGNETIC TAPE MAINTENANCE.- There are several steps involved in magnetic tape maintenance, each one covered by a term. The term will be followed by a brief description of the step involved. Storage.— Storage containers are provided for magnetic tape reels. These help reduce the pos- sibility of contaminants or humidity from affect- ing tapes. Tapes are always stored on end rather than on their side to prevent possible reel warpage or tape settlement on one reel edge. Extreme tape settlement can cause an elongated crease in the tape surface the full length of the tape. Cleaning.— Tape cleaning is accomplished by machine, not by hand. Some tape transports provide a limited degree of tape cleaning effort. Others provide none. A special machine, the tape cleaner, is provided where required for this function. The tape cleaner normally performs two functions: First, the oxide side of the tape is "shaved" by a series of razor edges to remove loose oxide and embedded particles. Next, the tape on both sides is wiped down with a cleaning solution and wiped again to remove any oxide or contaminants that remain. The cleaning solution may be applied by a dip, a wick-feed, or an impregnated gauze surface. Ethyl alcohol (90% or better) is often used as a cleaner for both tapes and tape drives, though the recommended agent should be used whenever possible. Tape cleaners do not alter the magnetic flux patterns of a tape, and theoretically can clean even tapes containing saved information. However, this is not a normal procedure and should not be attempted until a test effort supports the possibility, and even then only if an actual need exists. Stripping.-Different sections of the tapes wear at different rates. The section near the beginning of the tape label receives the greatest amount of wear, with the wear rate progressively dropping off in sections toward the middle, then again toward the last part of the tape. Stripping a tape involves cutting away enough of the leading section of tape to remove an excessively worn or badly damaged area. Maintenance tests generally reveal a high incidence of errors where a tape section has gone bad. When no errors are encountered, entry into a good section of the tape is indicated, and the tape can be stopped, separated, and the bad section removed from the takeup reel and discarded. The good section can then be looped securely by several turns onto the takeup reel and a new BOT label inserted. For best results, some of the good section should be discarded also to eliminate areas that are approaching the wear limit. This will extend periods between stripping actions and will also result in fewer tape errors when operating. Tapes less than 600 feet long are generally discarded as being too limited in storage area. However, these tapes can still serve DSs as "mechanics" tapes to be discussed later. !46 Chapter 5-NTDS PERIPHERAL EQUIPMENT Sections of tapes are not spliced together to create new tapes for several reasons: First, tape splices are generally the weakest point in a tape and could separate, resulting in tape spill, ipossible transport damage, and loss of data on either side of the separation where respliced if 'cutting or trimming is required. Second, tape I splices are poor areas for performing write or iread operations and appear as "bad spots," which must be programmed around. Third, the wear factor for spliced sections of tape will not I be proportional, but will be universally bad or poor at this point. If any section wears out, another splice would be required, 'with |continuing decline in performance and reliability. Information on a tape is generally lost whenever any of these actions are taken. Tape Cling.— Tapes can build up static charges under a variety of conditions, and they lalso can adhere layer-to-layer from changes caused by temperature, humidity, or long shelf life. This tendency to cling can seriously affect tape performance and must be coped with. The first step is to determine the probable cause(s) if possible. The second step is to restore any tapes immediately required by the operating system. IThe third step is to take corrective steps to cope with the cause(s). The fourth step is to insure that all tapes are properly restored to usefulness. The foregoing steps will probably be a joint operator/maintenance personnel operation. Probably the best single solution to tape cling is to use the tape cleaner. The unwrap-wrap, unwrap-wrap action of moving the tape from one reel to another and back will I eliminate static cling, while the cleaning action should counteract cling from other causes. Another technique is to perform a series of wrap-unwrap operations with the tape transport. This can be accomplished at high speed with transports having both wind and rewind functions. For transports having only a rewind function, the feed reel can sometimes be mounted on its reverse face as the takeup reel and rewound onto an empty reel mounted as the feed reel. The reels would then be switched to their normal positions, reversing the faces in the process (the feed reel would now have the correct face out). A second rewind would restore the tape properly to the feed reel. A third technique is to gently rap the tape reel against some fixed surface, rotating and alternating between the two sides from time to time. This is accomplished in somewhat the same manner of rapping a tight jar top with a knife handle to loosen it. This may loosen some static cling and cause the tape layers to shift. It may even loosen cling or adhesion due to other causes. However, severe rapping could result in information loss. A fourth technique is to simply transfer stored tapes to a suitable environment and to check them periodically to see if they have recovered. Degaussing.— Degaussing a tape involves a machine that applies a varying strength a.c. induced magnetic field to a tape. The result will be the total destruction of any stored data on the tape and the complete nullification of all magnetic flux patterns. The domains will be scrambled, and the tape will be totally unpolarized. Degaussing a tape can serve two purposes: (1) it provides for a complete tape erasure when desired, and (2) it eliminates the accumulation of stray flux patterns on the tape that result in a rise in background tape noise levels. These flux patterns can sometimes resist the efforts of the small tape transport erase head to cancel them. Certification.— Certifying a tape is the final stage in most tape maintenance programs. Tape certification involves the use of a tape certifier machine that performs digital and analog evaluations of a tape against calibrated standards which are far in excess of the operational requirements for most tape transports. Every fraction of the tape is subjected to intense scrutiny as to its ability to record high bit densities, retain flux patterns, and be demagnetized. The tape certifier will shave and clean the tape prior to testing it, check background noise levels, and check bit parallelism (skew) across the tape. It also leaves the tape completely erased. The tape certifier permits operator monitoring and intervention when any spot on the tape fails to pass. The operator is shown the exact failing spot, can determine the cause through a microscope, and can take appropriate action. It could be a small particle embedded 147 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 that can be cleaned or gently scraped away. It could be a pinhole in the tape or a spot where all the oxide wore away, in which case the tape may be separated with the smaller section discarded, or with both sections retained on separate reels. Any tapes that are certified as being error-free will probably give months of satisfactory service. Tapes that are certified and found to be of too poor a quality for use can either be given to maintenance if needed, or destroyed. Tape destruction for systems running classified material is normally to strip the tape entirely off the reel and have it burned with other classified documentation. Tapes that are certified as marginal in some respects are evaluated individually. Some experience is needed with the equipment, the tapes, and with system requirements before a determination can be correctly made on tapes in this category. Certifying a tape does not just measure its capabilities, but does a great deal to restore its full potential. The machines mentioned here are not universally employed. Many commands cannot provide them to every computer system. Some are available periodically, to outside requests. In general, DPs provide operator functions for these machines, and DSs provide for maintenance. The tape certifier, in particular, requires extensive maintenance effort to keep it functioning at optimum levels. TAPE TRANSPORT MAINTENANCE.— Every tape transport is somewhat unique. It is built to certain tolerances. It is also subject to wear, deterioration, and component value changes. With these variables in mind, certain adjustments are designed into the equipment, certain tests were devised to determine when readjustment was necessary, and certain standards were established to insure that the end product was the one desired. The Data Systems Technician is responsible for knowing which tests to use, what adjustments to make, and insuring that the equipment is kept up to standards. Basically, there are two classes of adjustments for tape transports, electrical and mechanical. The order of adjustments would normally be to perform all electrical checks and adjustments that are independent of mechanical settings, to then perform the mechanical adjustments, and finally, to perform the mechanically-sensitive or compensating electrical adjustments. The technical manuals are usually very thorough in this area, and additional guidelines on maintenance frequency and procedures are provided by 3-M Maintenance Requirement Cards (MRCs). Adjustments. -While procedures vary from one design to another, and may even differ between systems, certain types of adjustments tend to always surface. Among these adjustments are: electrical: voltage levels delays mechanical mechanical head (using a skew transport "mechanics" adjustments tape) stop-start times electrical: read levels (using a "skew" tape) write levels (using a "levels" tape) electrical head skew: read skew (using a "skew" tape) write skew (using a "levels" tape)* ♦Setting write levels and write skew, and using a "levels" tape creates a "Is" tape. A "mechanics" tape is one that is unsuitable as a storage medium because of poor quality. It is ideal for making mechanical adjustments, because these sometimes result in further tape damage that would ruin an otherwise good tape. A "skew" tape is an exceptional quality tape that has been prerecorded with all Is data under exacting laboratory conditions. It provides a uni- versal standard for tape transport adjustments. It should never be written on unless replaced and downgraded to the status of a "levels" tape. A "levels" tape is any tape believed or found to be of exceptional quality. It has uniform width and thickness, the oxide surface is 148 Chapter 5-NTDS PERIPHERAL EQUIPMENT apparently unblemished, and consistent signal levels can be observed by oscilloscope for the width and length of the tape. A levels tape is necessary to accurately set write levels, and to provide a "Is" tape (sort of an in-house "skew" tape). The word "skew" means to be distorted or to have an oblique course. This accurately describes the relationship the bits that form each | frame of data across the different tape tracks ■ can assume to each other if tracks of the head iare not aligned properly across the tape. Unfortunately, common usage has distorted the original meaning of this word when referring to magnetic tape units. "Properly skewed," for instance, must be read as meaning that any skew has been corrected. Two other words, "deskew" and "reskew," have been introduced in some literature on this subject. In some instances these have only succeeded in making the matter more complicated. For correct usage, these three i words should be employed in the following ways: Skew— A transport is "skewed" if its tracks are not aligned parallel to each other. A tape can be "skewed" if it is not running straight across I the heads, or if the bits forming each frame are not aligned parallel to each other. Deskew-A transport or tape has to be "deskewed" when any problems regarding skew have been corrected. Reskew— A process of removing any artificial methods of deskewing so that the natural skew of the transport can be used as the starting point of deskewing adjustments. The tape used in deskewing adjustments is known both as a "skew tape" and as a "deskewing tape." The use of deskewing is obviously a better choice, since this tape has no skew. However, common usage has made "skew tape" acceptable. When reading this text, or any other on this subject, remember that these three words are sometimes used interchangeably, and that the meaning of the word must be taken from its context. Compatibility. -The overall purpose for these various adjustments and tapes can be expressed in one word: compatibility. The goal is to achieve uniform tape recordings that can be read by any tape transport that is designed to handle a tape of that nature. Compatibility must be achieved in two directions. One direction is time. Previously written tapes must still be readable in the present, and currently written tape will have to be readable in the future. The other direction is a lateral exchange between tape transports. This lateral exchange is marked by three milestones: (1) achieves compatibility with a single transport's own read and write circuits, (2) achieves compatibility between all transports within a system, and (3) achieves compatibility between systems. An extension from each milestone along the time axis is a necessary step. Expressed in sequence, the steps would read as follows: (1 ) Establish compatibility between the read and write circuits of each transport, once the read circuits have been adjusted to the standard provided by the skew tape. (2) Insure that the transport can still process representative tapes it previously wrote and can still pass maintenance tests. (3) Insure that the transport is compatible with other transports in the system by exchanging tapes. Reading each other's "Is" tapes and scoping the skew and levels circuits would provide some indications of the degree of compatibility, but a better way is to use a compatibility test that reads blocks of test data from a tape, then adds blocks of test data to be also read by it and by the next transport. These test tapes are called compatibility tapes. (4) Insure that the transport is still compatible with prior tapes written by the other transports. Old "Is" tapes, or old compatibility tapes can be used for this purpose. Loading old program tapes or processing old data tapes might be sufficient if no better technique is at hand. (5) Insure that the transports in one system are compatible with those of another system. Here a need exists for standardized test data tapes and compatibility programs, or program tapes, or processible data tapes will have to suffice. If none of these can be provided or used, an exchange of "Is" tapes may have to take place. 149 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 (6) *Same as (5), except the emphasis is again on older tapes. Obviously, each step greatly increases the amount of testing that must be done. A compromise is required at some point between what is needed, what is wanted, and what would just be nice to have. Experience on the equipment will result in the deletion of steps that are apparently excessively redundant or nonindicative of problem areas, and the standardization of the remaining steps for that system. If the maintenance requirements specified by the MRC cards do not reflect the needs that experience dictates, then a 3-M procedure exists for making this fact known at the appropriate levels. Logs.— Tape logs may be of further assistance to both operating and maintenance personnel. A basic tape log may be developed from the following headers: (1) Recorded On (date and transport) (2) Read On (date and transport) (3) Comments (sync errors, parity errors, warped reel, unusable-permanent error, etc.) (4) Initials Each tape entry would normally start with a single Recorded On entry. As the tape accumu- lates Read On entries and Comments, a history of both the tape and the transports will unfold. Tapes that show a poor history should be re- copies or regenerated (output recreated as a result of a program operation). The tape should then undergo testing to determine if the tape itself caused the problems or if the writing transport made a bad recording. Several tapes showing up bad on just one drive would strongly suggest that drive needs some attention. Tapes with exception- ally good histories should be noted and set aside as possible "levels" tapes when they are finally "scratched." (Scratched is the process of releasing a saved tape so that new information *Steps (5) and (6) are only pursued when a tape exchange between two or more systems is regarded as commonplace. can be stored on it. A scratch tape differs from a blank tape only in that the blank tape has also been completely erased or degaussed.) This technique of maintaining a log for correlation is a good practice, not just for tapes but for equipment too. Good technicians are usually able to retain and organize current events in their heads and can spot these correlations mentally, but this mental exercise is not possible for everyone and certainly does not do several important things: First, it does not provide a history of the system for later reference. Second, it does not make full use of the facts and observations other personnel may have. Third, it does not help other individuals to acquire the same ability to assemble and correlate facts. Establishing Intersystem Compatibility.— An occasion may arise when a one-time exchange between two systems is required. A case in point would be one ship requiring a new copy of the operational program from another ship. Operational commitments may prevent a second chance for a tape exchange. The problem is actually one with two parts: (1) provide a good program tape for the second ship, and (2) establish intersystem compatibility for the purpose of this transfer. The solution, therefore, is also in two parts: (1) write a good copy using a "levels" tape and the best (highest demonstrated degree of compatibility) transport, and (2) generate a "Is" tape on that same transport to accompany it. In this way, if the program tape is found to be incompatible in the second system, a single transport can be readjusted using the "Is" tape as if it were a "skew" tape. Then, the program tape can be read and copied onto a tape mounted on the second system's best transport. Following this, the readjusted transport (picked because it is currently thought to be the "worst" in the system) would undergo readjustments based on the normal skew tape. These adjustments will, of course, improve its performance and would probably be required shortly anyway. The process from start to end, barring complications other than establishing compatibility, will probably take less than half a working day. Most of the time required would involve adjustments of the one transport. On 150 Chapter 5-NTDS PERIPHERAL EQUIPMENT exchanges of this sort, the receiving system has to either provide its own tapes or swap two tapes in exchange. The latter methods requires less time for the two ships to be in contact. The principles discussed here are pretty much machine independent, though they do not pertain in equal degree to every type of tape transport. In fact, they may even apply to tape certifiers where adjustment procedures were discussed (after all, they also are tape handlers). TAPE FORMATS AND HEAD ARRANGEMENTS.-Several heads are in contact with a tape surface simultaneously. One is an erase head which is used to clear a tape section of previous data before new data is written on it. It is deenergized during read operations. There may be just one other head on a particular transport. If so, it is a dual function re ad/ write head. That is, it responds to flux variations on a read operation, and generates new flux patterns during a write operation. It always appears after the erase head, or there may be two heads in addition to an erase head. In this case, both are functionally read/write heads, but one is probably exclusively used as a read head and the other exclusively as a write head. The order of heads for this system would be erase-write-read. This permits the tape to be erased, then written on, then checked by the read head in a single write operation. This technique is known as read-after-write and can only be employed by transports having three or more heads. Most three-head transports do a [ — , — , read] during a read operation. However, some use the write head during a read operation too. This permits a [ — , read, read] (tell me twice) operation, a [ — . checkread, read] operation, or [ — , read, checkread] operation. Checkread operations are used as comparisons for the data detected by the read head. The read and write heads are multitrack heads. The erase head is a single track head that erases the full width of the tape. PHYSICAL FORMAT OF THE TAPE.- The number of tracks a tape transport has, whether it is using the RZ or NRZ recording technique, whether the supply (or feed) reel is A-wound (oxide side in) or B-wound (oxide side out), the size and shape of the tape hubs, or the width of the tape, all these factors and others, depend upon equipment design and specifications. Here again, certain consistencies emerge. The area on a tape which is required to produce one bit of information per track is usually called a frame, whatever its actual size. Its size is usually measured as the number of bits per track (or frame count) per inch and is called bit (or frame) density. A frame would consist of all the bits, either ones or zeros, that are parallel across the number of tracks. A group of frames on a tape, which is separated from other groups of frames by unrecorded sections of tape, is referred to as a block (or record). However, since the word "record" takes on a different meaning in software applications, only the term "block" will be employed here. The unrecorded sections between blocks are called interblock gaps (IBGs, or IRGs if "record" terminology is employed). Blocks vary in size, depending upon the number of computer words they contain. IBGs are constant in size, being approximately 3/4" long for most tape equipment. No matter what its tape speed is, a transport must be able to stop, then start again within a single IBG area. It must stabilize at normal tape speeds before encountering the leading edge of the next block. This makes stop-start mechanical adjustments very critical in tape equipment, especially as tape speeds go up. Read/Write Functions.— A computer word is usually much larger than the number of tracks in a transport. Therefore, tape transport logic separates the computer word into "bytes" and writes each byte as one or more separate frames. It also supplies any parity or redundancy bits requested, and there may be a separate sprocket track for timing purposes. Sprocket tracks when used appear near the center of the tape to reduce the degree of skew error if a problem exists in the transport's adjustment. Computer words are normally written with the most significant byte first. The order in which computer words are reassembled depends upon whether a read forward or a read reverse function is being used. Write functions only occur while going forward, but read functions for many transports can be selected for either 151 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 direction. The problem would then be for the computer program to correct the order of bytes and word sequences once the data is read into the computer. All the words contained in one block on tape are usually accomplished in one write operation. Each write operation normally produces a separate block. Most techniques for writing a block of data involve a computer output buffer operation. Most techniques for reading back the data involve computer input buffer operations. Computer input operations may read all or just part of the data contained in one tape block. Tape Labels.— Two physical labels are affixed to either end of the tape. One is called a beginning of tape (BOT) label; the other is the end of tape (EOT) label. Most transports use highly reflective glue-backed labels which are attached to prescribed areas of the tape, while the RD-243 Magnetic Tape Unit (the tape transport covered later in this chapter) uses a transparent tape insertion. The standard way of "sensing" these labels is a photoelectric arrangement where light is reflected from (or passed through) the label and used to trigger an output from a photoelectric cell. Many transports may also use a special one-frame block of data on the tape which is detected by the logic circuits for the transport as a special condition called a tape mark or file mark. The transport can either read or write this special mark on the tape, and will write the mark when instructed to do so with a function word, or generate a status condition automatically when reading the file mark. Since they are blocks of data, FMs (file marks) are separated from adjacent data blocks by IBGs. Programmed applications usually involve the use of FMs to group data blocks into "files" on the tape. The end of the last file is commonly identified by two consecutive FMs. This makes it unnecessary to erase any data left on the tape beyond this point, a step that would be necessary if no software limit were set on the tape to prevent the current program from accidentally accessing data that may still exist from previous tape applications. The use and recognition of file marks is not designed into the RD-243 logic. SOFTWARE TERMINOLOGY.-Special data blocks are used in some systems to provide information on either the tape (called a tape label) or on a file (called a file label). Computer subroutines write or respond to these data blocks as special conditions in much the same manner that transport logic looked at file marks. Records (as data blocks were once known) are now considered to be the sum amount of information known on a particular subject. Records may require one or more blocks of data when recorded on tape. In thinking of an office file, a data block corresponds to a sheet of paper. A record corresponds to one or more sheets of paper stapled together (a letter would be an example of a record). A file corresponds to a manila folder containing one or more records. A file drawer corresponds to the physical limits of storage one reel of tape possesses. These correlations are nearly universal because most current forms of data storage are developed directly from the office file concept. The only significant changes are: much faster and more reliable processing, full use of automated equipment, and tremendous increases in data storage limits at all levels (block, record, file, and tape). Even tape storage can be compacted to about the scale of library stacks, resulting in tremendous data storage potential in a limited physical area. COMMONLY USED TERMS WHEN GROUPING BINARY NUMBERS.-There are six terms that are commonly used to describe the manner in which binary data is usually grouped. Some of these groupings are physical, meaning that equipment handling binary data have been designed to work with so many bits of data at one time. Other groupings are merely figurative, meaning that the binary information is thought of, or treated, as if it belonged to a group by personnel working with it or programs designed to handle it. An example of a physical grouping would be a computer word. A computer is designed to handle so many bits of information as a single unit, called a word, and the size of the word is determined by the computer under discussion. The CP-789 computer uses an 18-bit word, and also has a 36-bit double-word capability. The CP-642B 152 Chapter 5-NTDS PERIPHERAL EQUIPMENT computer has a 30-bit word, with 15-bit half-word capability. An example of a figurative grouping of data is the method of mentally grouping binary bits by threes, and "reading" the result as if it were an octal number. The six terms commonly used to describe binary groups are: (1) bit, (2) word, (3) frame, (4) byte or date byte, (5) codes, and (6) fields or data fields. The first three are physical terms: Bit refers to a single physical binary position, word refers to a physical dimension of the computer to handle a composite unit of binary bits, and frame is a dimension of tape equipment to read or write several bits simultaneously using separate channels or "tracks" on the tape. The fourth term, byte, can refer to either a physical or figurative grouping of binary data. An octal byte would be three bits used together. A hexadecimal byte would be four bits used together. A byte could also represent the number of bits that can be stored in a frame of tape, or be subunits of a computer word when it is uniformly broken up into smaller units by executing various logical in- structions. A byte can also consist of "n" number of bits, grouped together to represent 2 n unique numerical values, called "codes." It would require only 26 unique codes to represent the letters of the alphabet, A-Z, another ten codes to represent the numbers 0-9, and whatever number of addi- tional codes would be necessary to represent punctuation marks, arithmetic operations (+, -, x, *, =), and any other specialized symbology desired ($, %, &, #, @). A byte that represents data con- tained in 2 n bits is usually referred to as a "data byte" to prevent any accidental confusion with a byte description representing a physical dimen- sion, if both occur in the same literature. "Code" can also have physical and figurative meanings. For example, a physical description might state, "the external function code for performing a write operation . . .," which would be the unique code bits contained in the computer's external function word that would cause some device to initiate a write operation. "The letter A would be represented by an 06 8 code in the field data codes, while it could also be represented by a 24 8 code if using XS-3 Codes." This is an example of a figurative use for the word code. The terms "field" or "data field" refer to groups of codes that have some connection with each other. Sometimes the codes within a field may be modified or replaced, in which case the term "field" may merely refer to an area where different codes may be used together as needed. Depending upon the number of codes involved, a field may involve only a portion of a single computer word, or may extend sequentially through a series of figurative bytes that occupy a large number of computer words. TROUBLESHOOTING TAPE EQUIPMENT.- Correcting problems in tape transports should be done following established maintenance practices and using the six-step troubleshooting technique for electronic equipment. An important maintenance time saver is to always consider the most probable cause. If a tape transport is giving trouble, the most probable cause is oxide deposits. Thoroughly clean all surfaces that come in contact with the tape and wipe down the transport area in general. If problems persist, the next most probable cause is a bad tape. Replace with a tape known to be good and try again. The suspected bad tape could be used on other transports to determine if it is indeed bad. If the problem persists with the transport, the most probable cause is a loss of compatibility. This would probably be a result of a minor change in stop-start time, electrical skew, read/write levels, or combinations of any of these. The next step is to mount the appropriate tapes and run the appropriate tests and observe signal waveforms on an oscilloscope. At this point the problem will probably have sur- faced or will have been systematically eliminated. In equipment of this nature, logic problems do not occur as frequently as problems related to cleanliness or adjustment. However, an observant eye is needed to spot any indication that a logic problem may exist, and to prevent needless time being wasted chasing down "probable causes" when the problem is elsewhere. This completes the introduction to magnetic storage principles, tape transports in general, and data storage and troubleshooting principles as they pertain to tape transports in general. The next section will go into the particulars of one specific type of tape transport, the RD-243 Magnetic Tape Unit. 153 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 STANDBY TOGGLE SWITCH BEHIND DOOR and PANEL DC POWER and BLOWER POWER INDICATORS UPPER TAPE TRANSPORT UNIT 1 MAGNETIC TAPE UNIT1 LOWER TAPE TRANSPORT UNIT 2 MAGNETIC TAPE UNIT 2 MAGNETIC TAPE CONTROL PANEL Qaop a ooaao & . MAGNETIC TAPE UNIT 1 CONTROLS TAPE TRANSPORT CONTROL PANEL MAGNETIC TAPE UNIT 2 CONTROLS DC POWER and BLOWER POWER TOGGLE SWITCHES Figure 5-2.-RD-243/USQ-20(V) Magnetic Tape Unit. 154 124.203 Chapter 5-NTDS PERIPHERAL EQUIPMENT RD-243/USQ-20(V) MAGNETIC TAPE UNIT The RD-243 Magnetic Tape Unit shown in figure 5-2 is a large capacity, medium speed auxiliary storage device used primarily for program loading. Real-time data can also be extracted from the system and retained by the RD-243 for later processing and interpretation. The RD-243 is a return-to-zero dual transport, each having one erase and one read/write head (no read-after-write capability). It uses 1/2" width tape on UNIVAC hubs with "B" WIND (oxide side out). On this tape it will format frames consisting of six data tracks, a sprocket (timing) track, and an eighth track used for an odd parity bit (parity mode) or as a second sprocket track (redundant mode). The two transports function independently of each other. Extracted data from the system would not be stored on the same tape with the programs. The program tape normally stays mounted while the system is in use to facilitate a manual reload if a program fault occurs. One or two computers can communicate with the RD-243, as illustrated in figure 5-1. This capability is a logic function known as duplex control. Only one of the computers can be in control of or communicate with the RD-243 at any given time. Data transfers between the computer and the magnetic tape unit (MTU) use 30 parallel bits. Data is recorded (written) onto the tape only when tape motion is forward. Data may be read in either forward or reverse tape direction. Read and write operations have a tape velocity of 112.5 inches per second; rewind operations (high speed reverse motion) move tape at 225 inches per second. FRONT PANEL CONTROLS On the front of the MTU are two control panels, magnetic tape control panel (fig. 5-3) and tape transport control panel (fig. 5-4). The magnetic tape control panel is used to control the overall operation of the MTU. The OPERATION MODE switch is used in the Normal position for operation. The other positions of the switch are used for testing the MTU. The SPEED SELECT switch (and LO SPEED ADJ) control the master clock rate. Normal Run is the operating position of this switch; the other positions are used for testing. The TRANSPORT ADDRESS switch determines which tape transport is designated 1 or 2. In the normal position, the upper tape transport is 1 and the lower transport is 2. In the reversed position, the transport numbers are reversed with number 2 then being considered on top, number 1 on the bottom. These transport numbers must be used when programming the MTU. The MASTER CLEAR pushbutton is used to clear all registers and control circuits. The CYCLE STEP and PHASE STEP pushbuttons are used when the SPEED SELECT switch is in the step position. Pushing the CYCLE STEP button will cause the clock to generate one complete cycle running from 01 through J04. Pushing the PHASE STEP button will cause generation of a single sequential clock phase (01, 02, 03, or 04). Depressing, then releasing the TEST/CLEAR pushbutton will test the error counter, then clear the ERROR COUNTER indicators. The STATUS indicators are used to indicate the condition of the MTU. TIMING, SYNC, and PARITY are used to indicate errors occurring with tape motion. The IMPROPER indicator is lighted when the program attempts to have the tape transport execute an illegal operation. Improper conditions exist when any of the following actions are attempted: (1) Neither transport is selected (2) Both transports are selected (3) The selected transport cannot perform the indicated function because: (a) tape at EOT (for move FWD instruction) (b) tape at BOT (for move REV* instruction) (c) master tape mounted (file protect ring inserted in supply reel rim) (for WRITE instruction) (d) tape transport power off (any instruction) (e) not in AUTO mode (any instruction) *REWIND is used to initialize a transport by placing it at BOT. For this reason the logic is in- hibited from detecting an improper condition if the tape is already situated there. No tape motion would occur beyond tape labels in any case. 155 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 b® r \ O o o o O o o o o 1 29 28 27 26 25 24 23 22 21 20 o o o o o O O o o o 19 16 17 16 15 14 13 12 11 10 CLEAR C o o o o o o o o o o 9 8 7 6 5 4 3 2 1 r - 1 I l/u 1 O O o o o o 48 44 43 42 41 40 INT IDR OOR o o o o o o o o o 35 34 33 32 31 30 active REPLY CLEAP o 25 8 o 23 o 22 o 21 o 20 clear: 1 — OUPLEXER CONTROL — | o o o o o IN ^ CONTROL Vj o IS 14 13 12 11 10 A B NEUTRAL o o o o o o o o REQUEST Q o 6 4 3 2 1 PR ASSI3N. 1 o o O o o o o o o o 5 4 3 2 1 CLEAR X 2 1 CLEAR R/W SF°' ' o o "o o ■o o o o o o ' E10 E11 T1 T11 T12 T13 T14 T16 T < 6 T17 Tie I ), -. 1 TART FUNCTION 1 I EN o O o o o TO T1 T2 T3 T4 T20 T21 T22 r o~ o o o o 1 DENSITY FORMAT WRITE STATUS o 3IREC REWIND UNIT 2 UNIT1 CLEAR IDLE ' o —\ r O O O o' IMPROPER PARITY SYNC TIMINO CLEAR 4 3 2 1 ' o o o /■ NHIBITX — INHIBIT Y § lo 2-^r^ rz SPEED ^ A ' 1 , HI , SPEED NORMAL — « — TEST TO 5— dk iTE MAI NORMA . RUN ' CLEAR OPERATION MODE SPEED SELECT ) Figure 5-3.— Magnetic tape control panel. 156 124.432 Chapter 5-NTDS PERIPHERAL EQUIPMENT WARNING: these switches must BE OFF WHEN INSTALLING OR REMOVING TAPES TO AVOID INJURY TO THE OPERATOR . * LOWER TRANSPORT NOTE: * - THESE SWITCHES ARE NOT REVERSED BY TRANSPORT ADDRESS SWITCH. ■ MAGNETIC TAPE UNIT 1 — < o o o o FWD REV REWIND AUTO o o o o o BOT EOT READY MASTER SELECTED TAPE MAGNETIC TAPE UNIT 2 o o o o FWD REV REWIND AUTO o o o o o BOT EOT READY MASTER SELECTED TAPE o STOP- CLEAR o STOP- CLEAR DC CURRENT DC VOLTAGE OVER TEMP ALARM SHUT OFF o • MARGINAL CHECK- To® ELAPSED TIME — POWER | DC BLOWER ON OFF LAPSED TIM E (0.4) \ T -265A (O-Z) 245B (O-Z) . (0-2) \ -MS (0-2) -15 (0-20) MONITOR Figure 5-4.— Tape transport control panel. 124.433 157 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 TAPE LEVEL SENSOR ARM (Locked Position) TAKE-UP REEL HUB VACUUM BUFFER COVER (Open) TAPE LOAD HANDLE MASTER TAPE RING CONTACT MASTER TAPE SWITCH TAPE LEVEL SENSOR ARM (Locked Position) LOCKING LEVER TAPE TENSION ARM Position) VACUUM BUFFER BOT LAMP READ/WRITE HEAD COVER (Open) TAPE DRAG ASSEMBLIES READ/WRITE HEAD LOWER CAPSTAN EOT LAMP 2 LOWER PINCH ROLLER PAY-OUT REEL HUB LOCKING LEVER TAPE TENSION ARM (Tape Load Position) Note: 1. SENSES CLEAR LEADER AT BEGINING OF TAPE. 2. SENSES CLEAR LEADER AT END OF TAPE. 124.434 Figure 5-5.— Tape transport with reels removed, covers open and tape tension arms in load position. 158 Chapter 5-NTDS PERIPHERAL EQUIPMENT The FUNCTION REGISTER indicates which tape transport is performing what function. The START FUNCTION and END FUNCTION indicators display information pertaining to the control status of the MTU. The other indicators are for the registers and timing chains concerned with data transfer to and from the MTU. The tape transport control panel (fig. 5-4) controls tape motion on a selected tape | transport. There are four power switches on this ! panel. The two on the top control the power to I the upper and lower tape transports. The I transport switch must be in the OFF position when a tape is being mounted or removed to prevent possible damage to tape and/ or injury to personnel. The DC CURRENT and DC VOLTAGE meters are used with the MONITOR switch to check the power supplies of the MTU. These meters only give approximate values and should not be used for power supply alignment. The ELAPSED TIME meter displays the time power has been applied to the MTU. The pushbutton-indicators for the top and bottom units perform identical functions. The STOP/CLEAR button stops tape motion and removes the tape transport from the automatic mode, which puts it in the manual mode. The FWD, REV and REWIND buttons cause tape motion in the desired direction. Depressing AUTO places the tape transport in the automatic mode. It then becomes available for computer reference and is operational. The SELECTED indicator indicates that the tape transport is being referenced. The MASTER TAPE indicator is illuminated when a magnetic tape reel with a master tape ring is mounted on the lower tape mount. A master tape ring is a small flat ring that is inserted in the rim of a tape reel to prevent writing on the tape, and limits its use to movement and read operations. The ring depresses a microswitch beside the lower tape mount and disables the write function for that transport. Most tape transports, other than the RD-243, require that the ring be inserted in the groove on the back side of the inner reel rim in order to perform a write, rather than to inhibit it. This change occurred in newer transport systems because the "ring-in write lockout" technique might result in inadvertent writes on protected tapes if the ring accidentally fell out during handling without immediate detection. The new approach required that the ring be inserted to enable a write operation, and a ring that accidentally was missing caused no serious consequences. Thus, a ring that is called a WRITE LOCKOUT RING for transports similar to the RD-243, would more correctly be referred to as a WRITE RING for systems using the later technique. When illuminated, the READY light indicates that the transport is operational. The EOT (End of Tape) and BOT (Beginning of Tape) indicators are illuminated when the tape is at these points and the clear sensor area on the tape is over the appropriate sensor lamp. Tape Transport Mechanics Refer to figures 5-5, 5-6, and 5-7. The mechanical system that drives the tape in the RD-243 MTU will be briefly described. The tape reels provide the necessary tape storage for the system. The hubs rotate in either direction, to feed or take up the tape as needed. The tension arms control the speed and direction of the respective hub rotations. As shown, the tension arms are centered in their range of movement. If a capstan/pinch roller assembly pulls the tape away from the tension arm, the arms draws in and causes the hub to rotate to provide more tape to the tension arm. At the same time, the excess tape is being added to the opposing tension arm, causing it to move out. The outward movement causes the hub on that side to rotate and take up the excess tape. The farther the tension arms move from their centered positions, the faster the respective hub rotates until a balance is achieved between tape being pulled away and tape being added to the tension arm. The tension arms are, therefore, a coarse tape buffer system that absorb and release tape as necessary between the reel/hubs and the capstan/pinch roller assemblies. If the tape should bind or break, the effect would be to cause the tension arms to do one of three things: (1) be stabilized near the center range, (2) be drawn to the innermost position, or (3) be extended to the outermost position. The most likely result is that the arms will be thrown to their outermost positions. Because of this, limit switches at the extreme inner and outer range limits of tension arm movement will 159 Chapter 5-NTDS PERIPHERAL EQUIPMENT Legend: UPPER BRIDGE ROLLER ASSEMBLY EXIT ROLLER BOT LAMP UPPER DRAG PAD LOWER DRAG PAD EOT LAMP ENTRANCE ROLLER TAPE LOAD POSITION TAPE RUN POSITION LOWER BRIDGE ROLLER ASSEMBLY 49.362 Figure 5-6.— Tape threading diagram. 160 Chapter 5-NTDS PERIPHERAL EQUIPMENT TAPE LEVEL SENSOR ARM TAPE TENSION ARM (Run Position) TAKE-UP REEL TAPE LOAD HANDLE PAY-OUT REEL TAPE DRIVE ASSEMBLY TAPE LEVEL SENSOR ARM TAPE TENSION ARM (Run Position) 124.435 Figure 5-7.-Tape transport, ready condition. automatically shut the transport down, and automatic brakes in the hubs will prevent further tape movement until the situation is corrected. An additional buffering system appears between the tension arms and the capstan/pinch roller stations. A small vacuum chamber maintains a small loop of tape within it to further smooth out the effects of abrupt changes in the tape movement. The vacuum chambers are referred to as the fine buffering system. All tape movement is initiated by the capstan/pinch roller assemblies. Tape is pulled across the heads by the capstan/pinch roller assembly mounted on the receiving side. To change the direction of the tape movement, it is 161 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 only necessary to energize the pinch roller assembly on the opposing side, and cause the tape to be pulled across the head in the opposite direction. The capstan/pinch roller assemblies are referred to as the primary drive mechanics. The capstans provide a constant tape speed, the pinch roller assemblies provide capstan/tape contact, the vacuum chambers act as a fine buffer system to isolate the tension arm adjustments from the primary drive mechanics, and the tension arms further isolate changes in hub movement from affecting the primary drive mechanics. The drag pads provide a constant braking force to the tape and precisely stop the tape in a specified distance once the activated capstan/ pinch roller assembly is released. As soon as power is removed from a transport, a brake is applied to both hubs. This is to prevent accidental tape spillage if the tape breaks. A break in the tape would free the tension arms, which would abruptly fly to their outermost positions and activate an emergency power off switch. This would cause the hubs to stop rotating immediately. Whenever power is being supplied to the transport, the hubs are positioned by servo mechanics. Attempting to turn the hubs or reels by hand will change the amount of tape maintained in the corresponding tension arm. This will produce a tension arm movement and result in an error voltage that will cause the hub to rotate to correct the condition if possible. Attempting to turn a reel or hub either by hand or by manipulating the tension arm with transport power on may cause tape breakage or even bodily injury due to a whiplash response. To cause tape movement with the power on, use the manual FWD, REV, or RWD controls provided. When power is off, the tape can be moved by manually turning the hubs, although some resistance will be felt from the hub brakes. To prevent strain on the tape, rotate each hub simultaneously using both hands. The sensor arms ride (follow) the tape down into the reels and detect when approximately 1/4 of the tape remains (about 100 feet). In some MTUs, the take-up reel sensor arm slows high speed forward movement and generates a low tape (NEAR EOT) status condition, while the supply reel sensor arm slows high speed reverse (RWD) movement and generates a high tape (NEAR BOT) status condition. The RD-243 MTU does not report high or low tape status, and only uses the take-up reel arm to slow its only high speed instruction, which is RWD. The supply reel sensor arm is not used in the RD-243 application of this transport, and the sensor arm may be taped back against its stop for convenience with no adverse effect on equipment performance. MOUNT A TAPE The parts involved in tape mounting are referred to by the nomenclature shown in figures 5-5, 5-6, and 5-7. (1) Turn tape transport power to OFF. Place the tape level sensor arms against the stops. The arms should lock in this position. These arms are used to prevent a whiplash effect on the tape when it is stopped, by slowing down the tape when there is only a 1/4-inch thickness of tape left on the reel (approximately 100 feet of tape left). (2) Raise the locking lever on the upper hub to an approximately vertical position by grasping the knob in the center of the hub and pulling straight out. (3) Place an empty tape reel on the take-up (upper) hub. Note that a notch on the inner diameter of the reel hole will be engaged by the projection on the lower front end of the locking lever when the hub is locked. (4) Lock the reel to the hub by returning the locking lever to its original horizontal position! (5) Repeat step 2 with the lower hub. (6) Mount the program tape on the lower (payout) hub. Note that the free end of the tape hangs down from the right side of the reel. (7) Lock the reel to the hub as in step 4. Ensure that the projection on the lower front of the locking lever is engaged properly with the notch on the reel. (8) Rotate the tape load handle clockwise. Ensure that the tape tension arms are toward* the center of the tape transport. (9) Pull the tape upward from the left side of the payout reel to the left side of the take-up reel, press the free end of the tape against the inner hub area of the take-up reel. A finger may be used if cutouts in the reel side allow access, 162 Chapter 5-NTDS PERIPHERAL EQUIPMENT or the eraser end of a pencil can sometimes hold the tape to the inner hub surface. A very common approach is to allow the free tape end to dangle over the inner hub curvature and to rotate the hub rapidly, which will cause the tape to adhere to the hub portion of the reel. Gradually add more tape while rotating the reel until the overlaps hold the tape firmly. Do not slip the free end of the tape into the slot in the reel. Do not secure the tape in any manner. (10) Holding the tape against the reel's inner hub, turn both reels by hand and wind the tape until the free end is held in place by the tape overlapping itself. Then rotate both reels by hand clockwise to wind on three more turns of tape. Threading the tape in this manner does have one drawback: The tape can be damaged if allowed to rub against the tape load handle. This is not a critical problem if care is taken and only the tape leader is involved. The leader is that portion of the tape that appears before the BOT label, or after the EOT label. The labels are transparent tape inserts for the RD-243 MTU. To prevent the tape from rubbing against the tape load handle, some of the tape slack can be looped over the lower roller on the lower tension arm, and left there while tape is wound manually between the reels. (11) Open the vacuum buffer cover and the read/write head cover. ( 1 2) Rotate the payout reel clockwise to obtain a loop of about two feet in the tape. (13) Beginning at the top, near the takeup reel, lay the tape into the tape load position shown in figure 5-6. (14) Ensure that the tape lies in the grooves between the tension arm rollers and the stationary rollers which are part of the bridge roller assemblies. Ensure that the tape is in the back grooves above and below the tape head and is flush against the tape read/ write head. Ensure that the tape passes under the BOT lamp and above the EOT lamp; it may easily get threaded wrong at these positions, especially at the EOT lamp, because of slack. (15) Rotate the payout reel counterclockwise to take up any slack in the tape. (16) Close the vacuum buffer cover and the read/write head cover. (17) Rotate the tape load handle 180° counterclockwise. (18) Manually rotate the take-up reel counterclockwise until its tape tension arm is in the run position shown in figure 5-7. (19) Manually rotate the payout reel clockwise until its tape tension arm is in the run position shown in figure 5-7. (20) Look for the transparent (clear) part of the tape leader. Rotate the reels as necessary to position the transparent part of the tape leader [this is the BOT (Beginning-of-Tape) indication] onto the take-up reel. (21) Release the tape level sensors from lock position. (22) Place MAGNETIC TAPE UNIT 1 (or UNIT 2) POWER toggle switch to ON (fig. 5-4). At this point the sounds of electric motors and of air suction should become apparent. After a momentary pause, the tension arms and hubs should jump into motion to compensate if the tension arms are not in their midrange arc correctly. This brief activity should cease, and the position of the tape in the transport should be briefly scanned for apparent problems. Opening the vacuum chamber cover should cause slight jerking in both tension arms as the tape loop is lost in both vacuum buffer chambers. The same jerky action of both tension arms will show that a tape loop reformed in the respective vacuum buffer chamber when the cover is closed again. Once this initial inspection is complete, the transport is ready to be tested manually. Until a motion command is involved, the only activity of the transport that should be apparent is the continued suction of air, and the nonstop rotation of the capstans. (The vacuum pump and capstan motor are always energized when power is applied to the transport.) (23) Depress MAGNETIC TAPE UNIT 1 (or UNIT 2) FWD indicator button. This engages the forward (upper) pinch roller. Allow tape to run forward for 10 to 20 seconds, examining it as it runs to ensure that tape is correctly seated in the grooves around the tension arms, rollers, and read/write head. (24) Depress STOP-CLEAR indicator button to stop the tape. Make any needed corrections in threading after turning power OFF. Then restore power to the transport and repeat step (23). (25) Depress the appropriate REWIND indicator button to rewind tape. This engages both the reverse pinch roller and the high speed 163 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 winding in the capstan motor. REWIND motion should be twice as fast as FWD motion, unless just a few tape wraps are on the take-up (upper) reel. Tape will stop when clear leader passes under BOT lamp. Make any needed corrections in threading after turning power OFF. Repeat steps 23, 24, and 25 until tape runs smoothly. (26) Depress MASTER CLEAR button once. (27) Depress MAGNETIC TAPE UNIT 1 (or UNIT 2) AUTO indicator button. Observe that indicator is illuminated. If indicator is illuminated, MAGNETIC TAPE UNIT 1 (or 2) is ready for automatic operation by the computer. TAPE REMOVAL To remove tape from the transport, complete the following steps: (l)Stop tape movement and initiate the manual mode for the appropriate transport by pressing its STOP-CLEAR button. (NOTE: Though the manual controls for the transports are marked for MTU 1 and MTU 2 on the tape transport control panel, these controls are not affected by the normal-reverse switch on the MTC panel. The upper switches, marked for MTU 1, always correspond to the upper transport, even when it has been readdressed as MTU 2 by use of the reverse position on the normal-reverse switch. The same holds true for the lower manual controls with respect to the lower transport.) Initiating the manual mode means that the transport can still respond to commands generated by the manual pushbuttons and switches on the tape transport control panel, but not to commands from the magnetic tape control panel or from the computer. The AUTO light for the appropriate transport will be extinguished. Unlike alternate ways of stopping tape movement (power off, MASTER CLEAR, or forcing an End of Function sequence), the STOP-CLEAR button does not run the risk of tape damage (as might an abrupt power off), affect the alternate transport (as would a MASTER CLEAR), or involve current operations (as would forcing an End of Function sequence). It is the ONLY method that should be employed to effect manual control over one transport while the other transport is to be left accessible by the computer. Tape movement should stop immediately, at which point depress the manual REWIND button. Wait until the tape's rewind motion stops. (2) Set the MAGNETIC TAPE UNIT 1 (or 2) POWER toggle switch to OFF. Move the sensor arms back against their stops so that they are free of the reel rims. (3) Rotate tape load handle 180° clockwise. (Tape tension arms move toward center at this time, leaving loops of slack sticking out.) (4) Rotate take-up reel clockwise to remove slack at upper tape tension arm. (5) Rotate payout reel counterclockwise to remove slack at lower tape tension arm. (6) Open vacuum buffer cover and read/write head. (7) Gently pull tape away from and free of read/write head, vacuum buffer, entrance and exit rollers, and tape tension arms. Allow the freed tape to hang in a slack loop. (8) Rotate the payout reel counterclockwise to take up the slack loop. Make sure that the tape will not drag against the tape load handle (see one method for preventing this in figure 5-6, view A). (9)Manually rotating both reels counterclockwise, rewind the remainder of the tape onto the payout reel. A recommended method for doing this is to turn both reels by hand at the same time, maintaining even tension on the tape so that a smooth motion occurs (the tips of the fingers will provide sufficient friction to turn the reels if they are pressed firmly against the side of the reel. A small circular indentation in the reel plastic can be used for a pivot point.) (10) Lift the hub locking lever. (11) Remove the reel of tape. Replace reel in can and store in accordance with ship's procedure. OPERATIONAL CHARACTERISTICS The MTU is placed in an operational condition by an operator who mounts the tapes, turns on the power and sets up the normal operating mode. After these manual operations, 164 Chapter 5-NTDS PERIPHERAL EQUIPMENT the MTU may be controlled by the program. Generally, all programmed use of the MTU must conform to a standard reference sequence-obtain control of the MTU, perform the desired functions and release control of the MTU. All programmed commands from a computer to the MTU are sent in a 30-bit EXTERNAL FUNCTION word (fig. 5-8). The lower three bits are used by the duplexer section of the MTU to establish or release control of the MTU. All the other bits are used by the tape transport control section to determine the tape transport to be used, the density of storage (number of bits per inch), the type of format (NTDS or Parity) and the operation to be performed. The MTU logic has priority circuits that permit one designated operation to have preference over another. For instance, duplex functions override anything else designated, Master Clear overrides any of the motion read or write instructions, and selecting both transports simultaneously generates an improper condition that overrides either transport being selected. In addition, request control overrides release local, while release local and release remote, or release remote and request control, can be executed simultaneously. The latter is the normal procedure for one computer to "demand" control from the other. Only the function determined to have precedence by the logic will be performed. An interrupt is sent to the computer to indicate a STATUS word is on the lines after 29 14 13-12 11 10 9 8 7 6 5 4 3 2 1 NOT USED o UJ CO REQUEST CONTROL 1 REQUEST NO REQUEST TAPE TRANSPORT SELECT TT1 SELECT TT2 1 1 RELEASE REMOTE 1 RELEASE NO RELEASE DENSITY RELEASE LOCAL HIGH HI LOW o CO z> 1— o 1— o z 1 RELEASE NO RELEASE FORMAT REDUNDANT RECORDING PARITY FORMAT 1 1 N ON IASTER CLEAR IASTER CLEAR MASTER CLEAR DIRECTION REVERSE 1 FORWARD WRITE/READ 1 WRI1E. READ REWIND 1 REWIND NO REWIND REWIND WITH L/0 1 REWIND WITH L/0 NO REWIND WITH L/0 124.436 Figure 5-8.— External Function word format. 165 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 each operation, except Master Clear, Release Remote, or Release Local. The status word informs the computer of any normal and/or abnormal conditions that may have occurred following the previous operation. With two exceptions, the status word will always follow the completion of the previous operation. The first exception is the detection of an improper condition, in which case the previous operation is simply aborted. The second exception would be for a rewind operation, in which case the status word interrupt occurs immediately after the rewind motion is initiated, instead of being delayed until the tape reaches BOT and stops. The bit structure of the Status word enables the computer to determine if the previous operation was successfully completed and if the computer is in control of the MTU. The Status word format is shown in figure 5-9. The program must check that the interrupt from the previous operation has been received before a second External Function is sent. 29 26 27 26 25 24 23 NOT USED oo CONTROL ACKNOWLEDGE ACKNOWLEDGE NO ACKNOWLEDGE OUTPUT TIMING ERROR ERROR NO ERROR INPUT TIMING ERROR ERROR NO ERROR SYNC ERROR ERROR NO ERROR PARITY ERROR ERROR NO ERROR IMPROPER CONDITION 1 IMPROPER CONDITION NO IMPROPER CONDITION NOTE: ALL ZEROS EQUAL END OF NORMAL FUNCTION 124.437 Figure 5r9.— Status word format. Write Procedures The controlling computer must always execute a Write function in the forward direction and in the following sequence: (1) Initiate an Output Buffer on proper output channel (the size of the buffer will determine the length of block to be written). (2) Send an external function word with the Write and other pertinent bits selected. (3) Receive and process the status word interrupt. Read Procedures The Read function requires the following sequence of the events: (1) Initiate an Input Buffer on the proper input channel (size of the buffer area should be large enough to cover the length of block to be read and preferably be the exact size of the data block). (2) Send an external function word with the Read and other pertinent bits selected. (3) Receive and process the status word interrupt. In the Write and Read procedures, step 2 need not immediately follow step 1 but may occur at any time thereafter. The important point to remember is that the buffer (input or output) must be initiated prior to the external function (Read or Write) being sent. The reason for this is that if the MTU is prepared to write or read data before the computer has successfully initiated a buffer, an output timing error or input timing error will occur. By initiating a buffer first, these timing problems should not occur. Tape Formats Figure 5- 10a shows approximately how a tape section would appear if it were dipped into a container of magnetic film developer and then exposed to air, allowing the fluid to evaporate. The tiny metal particles held in suspension by the fluid are responsive to magnetic lines of force and would align themselves according to 166 Chapter 5-NTDS PERIPHERAL EQUIPMENT TRACK SEPARATION GAPS BIT DENSITY 256 TO 1800 FRAMES PER INCH. LONGITUDINAL PARITY CHECK FRAME FOLLOWS LAST DATA FRAME. INTER BLOCK GAP(IBG) C^ 3/4" COMPLETE TAPE ERASURE-^ BY ERASE HEAD LONGITUDINAL- PARITY CHECK FRAME (ODD PARITY) FOLLOWS LAST DATA FRAME NO DATA INDICATES IBG TRACK SEPARATION GAPS FLUX POLARITY W/REFERENCE TO SPROCKET TRACK TIMING IDENTIFIES ONESO's). BIT DENSITY RD-243) 210 OR 130 FRAMES PER INCH. INTER BLOCK GAP(IBG) C^3/4" NO ^SPROCKET INDICATES IBG FLUX POLARITY W/REFERENCE TO SPROCKET TRACK TIMING IDENTIFIES ZEROS METALLIC REFLECTIVE TAPE FOR BOT ^ r BOT DELAYED S IBGC^3" V. DATA. BLOCK TO TAKE-UP REEL .DATA BLOCK IBG C^ .75" I iiiiiir DATA. BLOCK FILE MARK" DATA BLOCK IBG C^ .75 IBG C±L .75 or IBG CzL 3.5 IBG C^ .75 TO SUPPLY REEL METALLIC REFLECTIVE TAPE FOR EOT ® 124.438 Figure 5-10— Views of Magnetic Tape Recording, a. Non-Return to Zero vs Return to Zero, b. Tape Layout. 167 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 the flux patterns on the tape. These particles are easily smeared or wiped away, but would transfer intact to the surface of a clear adhesive tape if it were applied carefully. Warning: This section of tape will be unacceptable for further read/write operations and must be detached from the remainder of the reel of tape before being developed. Figure 5-1 Ob shows the general layout of a tape if its entire length (many hundreds of feet) could be viewed at once. The BOT and EOT labels are detected with photosensing devices. Some transports use a reflective gummed tape that can be affixed directly to the tape (usually the nonoxide side). The RD-243 uses a transparent section of 1/2" Mylar tape 2 or 3 inches long, spliced into the oxide-coated tape. Enough tape extends beyond these labels in both directions to wrap firmly about the two reels. The blocks of data are not normally viewable but are shown for clarification. Records (consisting of one or more blocks) are a software function and not apparent in this view. Normally, the first block would identify the total number of blocks in the record, or the last block would contain data identifying itself as the end-of-record block, or record size would be standardized as one or more blocks of data for that system. File marks (not available with the RD-243) separate files (groups of records) on the tape. Some systems use two adjacent file marks with no data blocks between them to mark the end-of-files (no valid data beyond this point). An end-of-files identifier prevents a continuing search to the end of tape (EOT) label when the data field has been exceeded. It also prevents accidental processing of any data that is on the tape beyond the point of the last file. The data storage limits of magnetic tape are highly variable. Some of the more obvious factors are the bit densities of each block that is written, the number of tracks used on the tape for data storage, the overall length of the tape, and the number of blocks that can be written into the tape's overall length. Other influential factors are the format in use (Parity or Redundant), the number of frames per block (which affects the block size), and any special formatting or redundancy features that are introduced automatically by the system software. Another consideration is that a 1,200-foot tape is usually less than 1,200 feet, partly due to wraps on each reel before the BOT and EOT labels are affixed, and partly because its overall length may be shortened further by stoppings, where bad portions of tape are removed from the total length. As a general rule, the shortest block of data that can be written on magnetic tape would consist of one computer word, since this is the minimum output that most computers can achieve in terms of data. The maximum block length would be the maximum number of words that the computer can output in one continuous buffer, which for the CP-642B computer, would be its total memory, or 32,768 words. Use of the Redundant format would double the frame count in the block, which would also double the block length. (Actually, programming techniques exist that permit a continuous buffer output to be achieved with most computers, but this software feature is usually limited to a few maintenance program applications, and calls for the computer to continuously transmit repetitive data outputs. The lower limit of one complete word, and the upper limit of the entire computer memory contents, are considered valid in practi- cal applications). Recording Formats The RD-243 is capable of recording data in either of two formats. Redundant (also called NTDS) or Parity (also called UNIVAC) format. Both formats rely on channel 1 (figure 5-11) being odd parity. Bit position 2 10 of the external function word (fig. 5-8) is used to select the format which will be used. PARITY FORMAT.-Figure 5-1 la shows one 30-bit word (bits 29 through 0) written on tape in Parity format. Each 30-bit computer word is written in five 6-bit frames. Using Parity format, information is written by the program in blocks of 24 words to be compatible with other systems. Each frame contains six data bits (channels), a parity (P) bit (channel), and a sprocket (S) bit (channel), which is used for timing. 68 Chapter 5-NTDS PERIPHERAL EQUIPMENT EFFECTIVE HEAD MOVEMENT 11 ■ , *• 1 1 1 W Uin-l/t *• 1 29 27 24 25 S p 26 28 23 21 18 19 s p 20 22 17 15 12 13 s p 14 16 11 9 6 7 s p 8 10 5 3 1 s p 2 4 2 4 7 6 8 1 5 3 CHANNEL FRAME 1 2 3 FWD ® 29 27 27 28 S s 29 28 26 24 24 25 S s 26 25 23 21 21 22 S s 23 22 20 18 18 19 S s 20 19 17 15 15 16 S s 17 16 14 12 12 13 S s 14 13 11 9 9 10 S s 11 10 8 6 6 7 S s 8 7 5 3 3 4 s s 5 4 2 1 s s 2 1 4 7 6 8 15 CHANNEL legend: numbers = 2" value of computer word. s- sprocket (timing track). p« parity (set if total of data bits in frame is even, clear if total of data bits in frame is odd. NOTE: TRACKS ARE STAGGERED FOR REDUNDANT (NTDS) MODE WRITEUP. FRAME 1 2 3 4 5 6 7 8 9 10 FWD 124.439 Figure 5-11.— Tape Formats, a. Parity Format, b. Redundant Format. REDUNDANT FORMAT.— Using Redun- dant format, information is written on tape in blocks that may vary in size, depending upon factors contained in the program. The length of a block is established by the program when the buffer is initiated. As illustrated in figure 5-1 lb, each frame on tape contains six data tracks (channels), two sprocket (S) bits (channels), and three data bits, each one duplicated in two dif- ferent tracks. This method requires ten data frames to store one computer word. Channels 1-8 in figures 5-1 la and 5-1 lb correspond to the tape head channel numbers. DENSITY.— The density of recorded data is determined by bit 1 1 of the external function word (fig. 5-8). This refers to the number of recorded bits per inch or frames per inch of tape. High density recording is 210 frames per inch (1680 bits per inch). Low density is 130 frames per inch (1040 bits per inch). The density in bits per inch takes into account that two channels per frame are used either as sprocket bits or sprocket and parity bits. The actual number of computer words that can be stored in each inch of tape excluding IBGs) can be determined by the two following methods: 1. Using the recording density given in frames per inch apply the following formula; recording density (frames per inch) frames per computer word* = computer words per inch *In the redundant mode where two data tracks represent one bit, the RD-243 would require twice as much tape (excluding IBGs) to write the same number of words as were written in the parity mode. 2. Using the recording density given in bits per inch, apply the following formula; recording density (bits per inch) Data Levels (bits per frame)** x Frames per computer word* ♦See previous explanation of redundant and parity modes of operation. * There are eight channels per frame of tape on the RD-243 of which six are data bits in the parity format. 169 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 COMPUTER A A STATUS (S) REGISTER r IF COMPUTER B A I/O CONTROL DUPLEXER > COMMUNICATION (C) REGISTER ERROR DETECTION [From Vorious Circuits) BUFFER (Z) REGISTER EXCHANGE (X) REGISTER ERROR COUNTER PARITY TRANSLATOR MAGNETIC TAPE CONTROL WRITE COUNTER READ/WRITE CIRCUITS CONTROL OF DATA FLOW Jk_ FUNCTION (F) REGISTER TAPE TRANSPORT CONTROL TAPE TRANSPORT «— i) t t t START-OF- FUNCTION SEQUENCE READ/WRITE SHIFT SEQUENCE END-OF- FUNCTION SEQUENCE TAPE TRANSPORT 2 Figure 5-12.— MTU functional block diagram. 124.440 BLOCK DIAGRAM The MTU is made up of four major sections (fig. 5-12): a duplexer, a tape transport control, a magnetic tape control, and two tape transports. The duplexer allows the MTU to be time-shared between two computers without the aid of manual switching. The magnetic • tape control transfers data, under control of a computer, in either direction, between the computer and the magnetic tape handlers. In a write operation, the magnetic tape control disassembles 30-bit computer words into either of the two formats suitable for recording on 170 Chapter 5-NTDS PERIPHERAL EQUIPMENT tape. In a read operation, the data from the tape is reassembled into 30-bit words and sent to the computer. There are circuits within the magnetic tape control which perform timing error or improper condition detection as well as parity checks. The tape transport control accepts data from the computer, via the magnetic tape control, and determines if the specified tape transport can perform the requested function. If the function can be executed, it then provides the necessary control signals to the tape transport. Also contained within the tape transport control are manual controls for tape selection and movement. The tape transport section contains the tape drive mechanism and read/write heads. Duplexer The duplexer ensures that only one computer is communicating with the MTU at any time. It interprets requests for control by a computer (external function codes) to determine if the request can be met. It is a function of the duplexer to grant or refuse control of the MTU to computers which request it. Control will be granted upon request when the MTU is in a neutral state (i.e., not being controlled by either computer). For example, if computer A requests control and the MTU is under control of computer B, the request will be "remembered"; control will be granted to computer A when computer B releases control. It is also possible for one computer to take control away from the other by using the Release Remote external function. This external function is provided for use in the event of a malfunction, either equipment or program, in the controlling computer. The input/output control section of the duplexer is also used to send Input Requests, Output Requests and Interrupt signals to the computer, and receives Input Acknowledge, Output Data Acknowledge, and External Function signals from the computer. It uses the Output Data Acknowledge and External Function signals from the computer to provide enables for gating computer output data, and external function codes (other than duplexer i control codes) into the Communication (C) register of magnetic tape control. The Input Acknowledge signal from the computer is used to determine when the input data and Input Request signal, or status interrupt word and Interrupt Signal may be dropped from the C register and control lines, respectively Magnetic Tape Control Magnetic tape control (MTC) interprets computer external function codes to determine the type of operation required and communicates with the tape transports. Another function of MTC is the assembly of computer words from frame data (bytes) when reading from tape, and the disassembly of computer words into frame data (bytes) when writing on the tape. MTC uses the Start of Function, Read/Write Shift and End of Function sequences to aid in controlling the MTU. START OF FUNCTION SEQUENCE. -The Start of Function sequence decodes the external function codes of the controlling computer and determines if MTU conditions will allow the new operation to proceed. It initiates appropriate delays to allow the tape transports to get up to speed, either generates a long gap (if at BOT), or the second half of a short gap to separate blocks of data on the tape, etc. It then initiates the Read/Write Shift sequence. READ/WRITE SHIFT SEQUENCE.- If a write operation is specified, the Read/Write Shift sequence requests a data word from the computer. For Write (parity or UNIVAC mode), the Read/Write Shift sequence disassembles the 30-bit data words into five six-bit groups (or bytes) for writing onto the magnetic tape, beginning with the upper six-bits and proceeding to the lower six-bits. As the disassembly process begins on the current word, a request for another word is transmitted to the computer. Writing continues until the computer fails to respond to an Output Request within a specified time, at which time the Read/Write Shift sequence exits to the End of Function sequence. For a Read operation, the Read/Write Shift sequence assembles every five frames of data contained on the magnetic tape into a 30-bit computer word, and repeats this operation for as many frames as there are in a single block of 171 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 data (actually, until an IBG is detected by the absence of sprocket bits). The function word for the read operation must specify the format in which information is written on the tape. A Write (Redundant or NTDS mode) operation would cause the Read/Write Shift Sequence to disassemble the received 30-bit word into three-bit groups (half-bytes) 10 times, and to duplicate each bit within the six-bit frame when writing it. Read (Redundant) operations would reassemble ten frames of data into one 30-bit computer word, using a "1" in either bit position as a data "1" in assembling the half-bytes. When MTC has fully assembled a 30-bit word, an Input Request is transmitted to the computer to initiate a data transfer. If the Input Request is already up, indicating that the previously assembled word was never accepted by the computer, a timing error exists and will be indicated by the Input Timing Error (ITE) bit in the status register being set at this point. The previous data word is lost when the currently assembled word is transferred to the C register for output to the computer. The Input Request signal remains up to signal the computer that a word is still ready for input by the computer. The Input Timing Error status, in the interrupt word that the computer will receive once the read operation is complete, will inform the computer that one or more words were not included in the buffer and were lost due to timing problems or the use of a buffer that was smaller than the number of assembled words found in the data block. An Output Timing Error (OTE) occurs when the first computer word has not been received at the point where the first frame of data is to be written. Not having a word to write inhibits a proper write, but has still caused tape motion and some erasure by the tape head. Another OTE condition will occur when a subsequent word has not been received from the computer at the correct point of disassembling and writing it. This OTE condition is inhibited from appearing in the status word since the failure of the computer to respond with another output word may simply mark the end of the buffer. The MTC's End of Function sequence would terminate to write operation with an IBG. However, if an Output Data Acknowledge signal is received from the computer after the End of Function sequence is initiated, an OTE status would be indicated in the interrupt word, showing that a timing problem occurred in that the unwritten portion of the buffer was not available soon enough to the MTC for it to include it in the data block being written. For the RD-243 (and other MTUs covered in this text), only one data block can be written per external function write instruction. Assembly begins on the next word while waiting for the computer to acknowledge receipt of the current word on its input lines. Reading continues until an extended absence of data indicates an End of Block. If MTC contains an incomplete word at an End of Block, an OUT OF SYNC error is transmitted to the computer in the status word at the End of Function. END OF FUNCTION SEQUENCE.-The End of Function sequence causes MTC to be reset for the next operation (new external function code). It initiates a delay to provide the first half of the End of Block spacing on the tape [which is also known as interblock gap (IBG)] and also causes a Status word interrupt (End of Normal Function) to be sent to the computer. (Interblock gaps are discussed in detail in chapter 5 of DS 3 & 2, Vol. 2, as they relate to the RD-270(V) Magnetic Tape Unit.) REGISTERS AND COUNTERS OF THE MTC. -MTC is made up of the following registers and counters, with the appropriate switches and indicators for each mounted on its front panel (upper right panel of MTU): (1) Communications register— The communications (C) register is a 30-bit input/output buffer register for data exchange with the controlling computer. All data, nonduplex external function codes*, and Status words must pass through this register when coming from or going to the computer. f*Duplex codes involving the lower three bits of the external function word from the computer are not gated into the C register, but are gated directly into the duplex section of the MTC. The reason for this is that the MTU will ignore any nonduplex commands from a computer that is not in control, but must be able to respond to 172 Chapter 5-NTDS PERIPHERAL EQUIPMENT duplex commands from either computer at all times. This is the reason simulated "external function" operations involving duplex codes are not effective when manually inserting them into the C register, and the reason why manual control of the duplex section must be done directly through the duplexer control on the MTC panel (fig. 5-3).) (2) Function register— The function (F) register receives the external function codes (nonduplexer) from the C register and retains the specified function during the operation, while informing tape transport control of the action desired. (3) Status register— The status (S) register accumulates, from various circuits, any error information which will be sent through the C register, accompanied by an interrupt signal, to the controlling computer at the end of the ordered function. An interrupt condition, which involves sending the current status conditions as an interrupt word to the computer (if not inhibited by computer programming), may indicate present or previous errors under different circumstances. An improper condition, for instance, usually occurs at the start of a new operation, and usually involves an external function word that indicates an operation is to be performed that is invalid under current circumstances. This might be described as a "present condition," since the presently desired operation has not been (and will not be) performed. A write operation, which might generate errors involving OTEs (output timing errors), parity, or timing problems, would be sent to the computer after the write operation was completed. The interrupt might also indicate a normal termination of a write operation. Depending upon the viewpoint, this might be considered a "previous" operation or the "currently completed" operation. A read operation, on the other hand, might have status indications that not only refer to the read operation itself, but might reflect any errors of the previous write operation that placed that block of data on the tape. A status word following a read operation would indicate either an AND condition, where both the preceding write and the read operation are completed j properly, or it would indicate a NOR condition, where either the read OR the preceding write did NOT complete properly. (4) Buffer register— The buffer (Z) register is a 30-bit register used for assembly and disassembly of computer words. For assembly (reading), it receives the data frames one at a time from X and shifts them to their proper position to form a complete word. For disassembly (writing), it receives the computer word from the C register and shifts it into the X register six bits at a time for writing on tape, beginning with the upper byte or half-byte. (5) Exchange register— The exchange (X) register (6-bits) function varies with the mode of operations (Read or Write) and with the format in use. In Read operations, X receives data from the Read/Write heads six bits at a time (one frame of data) and transfers a byte of half-byte of data to Z- where a complete 30-bit word is assembled. The operation is reversed for Write operations. It uses the Parity Translator for generation of parity bits and checking for errors. It also uses a Write Counter to control frame periods. (6) Parity Translator— The parity translator is used when writing in Parity format to supply an odd parity bit for each frame. When reading Parity format, it checks each frame for odd parity. If any frame shows even parity, it indicates an error to the error counter and the S register. When writing in Redundant format, the parity translator's output is always a "1" for each frame. Since a constant "1" matches the bit in the sprocket track in all respects, this bit is referred to as the "redundant" sprocket bit for the redundant mode. (7) Error Counter— The error counter counts signals from the parity translator whenever a parity error is detected. The content of the error counter is displayed on the front panel, and no other use is made of it. (8) Write Counter- The Write Counter is used for controlling the frame period during write operations and for measuring elapsed time in both read and write operations. This enables the detection of timing errors and End of Block. (9) Read/Write circuits— These circuits handle the data words between the eight channels on the read/write head and the X register for each tape transport. 173 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 ZERO OFFSET TO UPPER SERVO AMPLIFIER MODULE ^- POWER IN" TAPE BREAK a BIND INTERLOCK SWITCHES TAPE LOAD HANDLE TAPE _J LOAD ~\ INTERLOCK SWITCH POWER, RETURN TAPE BREAK a BIND INTERLOCK SWITCHES -ERROR SIONAL REFERENCE T1 POWER TRANSFORMER SERVO MODULATOR SUPPLY SWITCH -I TAKE-UP FORWARD INPUT . REVERSE INPUT ■ ZERO OFFSET TO LOWER , SERVO AMPLIFIER MODULE T2 MODULATOR SUPPLY TRANSFORMER REFERENCE SOLENOID DRIVE MODULE PINCH ROLLER SOLENOID BOT SENSOR 1 ^L TAPE DRA6 PAD ERASE HEAD J EOT/BOT AMPLIFIER MODULE — z — FROM -WRITE CONTROL ENABLE TAPE DRA6 PAD EOT SENSOR PINCH ROLLER SOLENOID >LTC LESEHD: ELECTRICAL CONNECTIONS MECHANICAL CONNECTIONS 124.441 Figure 5-13.— Tape transport block diagram. Tape Transport Control Tape transport control determines if the specified tape transport can perform the function requested by MTC. If the function is legal, tape motion is initiated; if not, MTC is informed that an improper condition exists and the function cannot be executed (e.g., a write command at EOT). Tape Transports The mechanical transports consist of: components of the (1) A tape storage and supply system (tape reels) (2) A servo system that controls the tape reels (tape hubs) (3) A servo control mechanism (primary inputs taken from placement of the tension arms) (4) Two tape buffer systems (two tension arms and two vacuum chambers) to isolate the coarse movements of the servo system from the primary drive mechanics (5) Primary drive mechanics, consisting of two 2-speed capstans and two pinch roller assemblies (the capstans provide instant tape acceleration and constant tape speed, while the pinch roller assemblies determine the direction of tape movement) 174 Chapter 5-NTDS PERIPHERAL EQUIPMENT (6) Two positive braking systems (drag pads for the tape; automatic power-off brakes for each hub) (7) Two heads: one erase, and one read/write (no read-after-write capability) head with 8 tracks on it (8) Condition sensing elements that will detect BOT, EOT, low tape supply, tape breakage, or binding, tape load and write lockout conditions. Figure 5-13 is a functional block diagram of the tape transport. Associated with each tape transport is a drive electronics unit that contains the plug-in modules used with the transport. These modules determine such things as: (1) Rotating speed and direction of each hub servo motor (primary inputs from the i tension arms) (2) Which pinch roller (forward or reverse) is ;to be energized (3) If BOT or EOT is sensed (4) If write lockout is set Tape transport operations are controlled by the computer via the MTC and tape transport control (TTC) logic. For maintenance and testing purposes, operation of each tape transport may be controlled manually. TAPE STORAGE AND SUPPLY.- Primary tape storage is provided by two 10-1/2 inch tape reels mounted on hubs. Tape threaded between tension arm rollers and bridge rollers provides secondary tape storage to buffer the effects caused by sudden changes in tape motion. Other secondary buffer storage areas are provided by [the vacuum buffer chambers (fig. 5-5) which smooth out any remaining jerkiness not handled by the tension arms. These secondary tape storage systems isolate the slower responding tape reels from the quick-response primary drive mechanics. Tape motion is caused when the solenoid in jone of the pinch roller assemblies is energized, bringing the attached pinch roller in to press the magnetic tape against the adjacent revolving ^capstan. This action causes the motion of the capstan to be transferred to the tape. The two capstans are powered by a single capstan motor, but revolve in opposite directions, so one pinch roller acts as the forward pinch roller, and the other acts as the reverse pinch roller. Tape motion will continue as long as the pinch roller keeps the tape against the capstan, and the capstan is revolving. The pinch rollers and the capstans make up the primary drive mechanics for the transport. The tape storage and supply system adds tape to and removes tape from the primary drive mechanics at a rate determined by the operating speed of the capstans when a pinch roller assembly is energized. The amount of tape on the tension arms is initially determined by the primary drive mechanics (which causes outward or inward deflection of the tension arms). The deflection of the tension arms, in turn, controls the servo hub motors, and these, in turn, rotate the tape reels. Movement of the tape reels compensates for the shift of tape from one tension arm to the other and brings the tension arms back toward their midrange positions. Starting, stopping, and direction of rotation of the servo hub motors is controlled solely by the position of the tension arms with respect to their midranges. When the FWD pinch roller is energized, so that the tape moves from the bottom tension arm to the upper tension arm, the lower tension arm moves inward from its midrange position as tape is drawn from it, and the upper tension arm moves outward from its midrange position as tape is added to it. Movement of these tension arms is detected by a potentiometer on each tension arm shaft assembly. The potentiometer generates an error signal, the polarity of which depends on whether the amount of tape on the tension arm decreases or increases, and whether the resulting direction of offset was inward or outward. The error signal is amplified and fed to the appropriate direction windings of the servo hub motor closest to that particular tension arm. The servo hub motor rotates, and its direction of rotation will either draw tape from the tension arm if it has excess tape on it (outward movement of the tension arm), or add more tape to the tension arm if it has lost tape (inward movement of the tension arm). As the tension arm moves farther from its midrange position, the speed of the servo hub motor closest to it increases. Eventually, a point is reached where 175 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 the speed of the servo hub motor is sufficient to cause tape/reel speed to equal tape/ tension arm speed, and the tension arm will be stabilized in its arc of movement. This condition will continue with only slight changes until the engaged pinch roller is deenergized, at which time the tension arms return to their midrange positions as a result of the reels still rotating, but this return will result in the movement of the servo hub motors and tape reels first slowing, then stopping, as the tension arms move to their midranges. Changes in tape direction are controlled by the pinch roller assemblies and the opposite direction of rotation of the respective capstans. Once tape begins moving, the tension arms are offset by changes in the amount of tape that "plays" between the tension arm rollers and the bridge rollers. Movement of each tension arm controls the respective tape hub servo motor, causing the tape to be fed or taken up on the tape reels as needed. However, misfortunes sometimes occur. The tape can break, or bind and wrap tightly about one of the capstans, or suffer other mishaps. The mechanics of the transport must be protected as much as possible from damage that could be incurred when one of these things happens. The most probable result of any irregular operation would be that the tape would break. If this occurs, the tension arms will lose their tape restraints, and fly outward toward their outer stops. Dashpots have been installed to slow this movement and absorb some of the excess energy before the stops are reached. Limit switches are also effected near the outer extremes of the tension arm movement and automatically shut off all power to the transport. Finally, the hub brakes are automatically engaged by the power loss and prevent further hub movement, effectively preventing the reels from spinning feeely and spilling tape all over the deck. The photoelectric cells used in detecting BOT (beginning of tape) and EOT (end of tape) are intended primarily to insure that the tape cannot run off of either reel once it has been properly mounted. Tape movement is automatically inhibited immediately upon reaching the EOT label when moving forward, and inhibited immediately upon reaching BOT when rewinding or moving in reverse. Thus, from BOT it is only possible to go forward, and from EOT it is only possible to rewind or go in reverse. The BOT label also provides the initial reference point from which all subsequent blocks of data, separated by IBGs, can be located. The positions of the BOT and EOT photocells place the BOT detection point above the heads, and EOT below the heads. When BOT is sensed, most of the tape is on the supply (lower) reel, and only the leader is on the take-up (upper) reel. Tape movement at this point can only be from the supply reel to the take-up reel (generally upward movement). The EOT photocell, mounted below the heads, stops tape as soon as all the usable tape has been transferred to the take-up reel. Since each photocell is positioned at the lag end of the direction of movement that it is meant to control, the clear cellophane labels will be detected before they reach the vicinity of the heads, and the oxide-coated tape will stop with the heads always within the region between the two labels. The effect would be like this: to supply reel EOT [-HEADS] BOT to take-up reel limits of usable tape The long arrows indicate which direction the reels are in from the heads. The short arrows indicate the direction of tape movement controlled by the photocell station mentioned above each. The brackets mark the limits of tape movement across the heads. If tape were at BOT after loading, it would look like this: all usable BOT to [tape on supply reel-— HEADS] LABEL take-up reel (direction of next movement BOT SENSE (photocell) If the tape were at EOT, it would look like this: to EOT all usable supply LABEL [HEADS— tape on takeup reel] reel (direction of next movement EOT SENSE (photocell) 176 Chapter 5-NTDS PERIPHERAL EQUIPMENT When the tape is in use, the heads can be positioned anywhere within the limits of the two brackets: [tape on supply reel-- HE ADS- tape on takeup reel] VACUUM BUFFER. -The vacuum buffer (fig. 5-5) isolates tape on the tension arms from the tape in the drive system. The buffer has two chambers, each of which has a large rectangular vacuum port in which the tape forms a loop. The tape loops in through the open side as air is drawn through the small circular port in the corner and the series of tiny bleeder ports located on the rear wall of each chamber. When power is applied to the tape transport, a partial vacuum, created by the vacuum blower motor sucking air through the circular and bleeder ports, draws a loop of tape into the upper and lower chambers as shown by the dotted line in figure 5-6, view B. Vacuum pressure is such that tape tension created by the tension arm springs is balanced when the tape loop in each chamber leaves approximately half the tiny bleeder ports uncovered (outside the ■seal created by the tape loop). If too many bleeder ports are left uncovered, the vacuum will drop in the sealed off portion of the vacuum chamber and allow the tension arms to pull some of the tape from the chamber. If too much tape is removed, the additional bleeder ports that are then covered will increase the vacuum suction in the chamber and cause more tape to be drawn from the tension arm. The vacuum chambers smooth out small, jerky movements of the tape and prevent possible tape slippage and positioning errors at the heads, while the tension arms compensate for major tape movements. The entrance and exit rollers (fig. 5-6, view B) insure that the tape stays : positioned over the entire open end of the vacuum chambers. When a forward command is applied to the ! system, the lower chamber is the supply chamber (removed tape "-increased .vacuum) and the upper one is the take-up | (added tape »■ lower vacuum) chamber. [(Reverse commands create the opposite Ijcondition. As soon as the inertial (resistance to change) of the tension arms is overcome during changes in tape motion, the loop will quickly return to its balance point. TAPE LEVEL SENSOR ARMS.-The tape (upper) sensor arm is positioned against the tape to prevent a whiplash effect of the tape from occurring during a RWD (high speed movement) of the tape by a sudden stop at BOT. Contacts of the upper tape sensing arm (fig. 5-13) switch are used to deenergize the speed change relay during a rewind operation when only a 1/4" thickness of tape remains on the take-up reel. The lower arm is not in use for the RD-243. DASHPOTS.-Dashpots, a form of shock absorber, prevent the tension arms from striking their stops with great force if the tape breaks. The dashpots help prevent two possible aftereffects that might follow a violent stop of the tension arms. First, they help prevent the tension arms from being bent. Second, they help prevent the tension arm cables in the rear of the transport from bouncing and possibly jumping free of their pulleys. The tension arm cables link the tension arms to the tape load handle. Evidence that a cable has jumped its pulleys is seen when a tension arm remains against its outer stop and is not pulled in by a turning of the tape load handle. This problem is easily corrected when it occurs by releasing the tape load handle (turning it to the point of least tension), gaining access to the rear of the transport, and while the affected tension arm is brought in away from its outer stop manually, taking the slack in the cable and placing it back over the pulley. TAPE DRIVE.— A single two-speed a.c. capstan motor is coupled by a belt and pulley arrangement to both the upper and lower capstans on the drive plate assembly. The motor is energized when 60 Hz power is applied to the tape transports. The capstans are continuously rotating, the upper capstan counterclockwise and the lower capstan clockwise. Tape is not driven until the forward (upper) or reverse (lower) pinch roller solenoid is energized, causing the respective pinch roller to force tape against a rotating capstan. The pinch roller solenoids are energized when a select (Forward 177 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 or Reverse) signal is issued by the computer (or manually from the front panel). This signal is applied to ground through the solenoid drive module in the drive electronics unit. Since approximately 3 amps are required by the solenoid to force the pinch roller against the capstan, be careful when working on or around the pinch roller solenoid. SPEED CHANGE RELAY.-The speed change relay applies power to the high-speed winding of the single capstan motor that controls both capstans when energized. This relay is energized only by the Rewind select signal from the computer or the front panel, and results in a rewind tape speed of 225 ips. The relay is deenergized by the upper high -tape sensor arm and results in rewind tape motion being slowed from 225 ips to 1 12.5 ips. HUB MOTORS.-Power for turning the tape hubs is delivered by upper and lower servo motors. Each motor has two fields (one each) to provide for clockwise (CW) and counterclockwise (CCW) rotation so that tape may be payed out or taken up from storage in either direction. In the event that power is suddenly removed from the tape transport (e.g., tape breakage), a spring loaded brake will stop the reel motors. READ/WRITE HEAD.-An eight track magnetic head provides the write and read sensing elements for the MTU. The head is mounted on a base that is attached to the drive plate. The head, mounting base, and tape through guides mounted on the base are precision machined, and repair is considered beyond the capabilities of field personnel; therefore, the head must be replaced as a unit. These heads are very expensive, while a complete overhaul including recrowning of the head surface is approximately one-fifth the cost of a replacement. When a tape head is removed, do not strip it of any parts before shipping it to a repair facility. The EIMB Communications Handbook (NAVSHIPS 0967-000-0010) service notes, and EIB 689 and 753 have detailed instructions on replacing the read/write heads. EIB 796 is a reference pertaining to removal of piece parts from the head. Drive Electronics Unit There are two drive electronics units, one behind the transport area for each transport. These can be assessed by loosening the Allen head bolts in the right corners of the respective transport and swinging the transport out on the hinge that supports the left side. Each drive electronics unit contains most of the analog circuitry required by the mechanics of the respective transport, and these are mounted on six separate printed circuit cards, or "modules" as they are frequently called because of then- analog natures and large sizes. Of the six modules, five can be assessed and removed from the front of the drive electronics unit with the transport swung open. The sixth is mounted to the rear of the others and is not accessible from the front. Each module is of the "plug-in" type, and suitable extension cards are available if it is necessary to access points on a module during troubleshooting or adjustment. Figure 5-14 is a simplified block diagram of the drive electronics unit. SOLENOID DRIVE MODULE (fig. 5-14).— Circuits for energizing the forward or reverse pinch roller solenoid, and for generating the zero offset signals used in the servo amplifiers, are contained on the solenoid drive module. A forward or reverse signal from the tape transport control (TTC) is applied to the solenoid drive module and causes an output to one end of the forward or reverse pinch roller solenoid. This completes the energizing circuit through the solenoid and causes appropriate tape motion. The zero offset signal output determines the servo amplifier operating reference voltage and results in offsetting the tension arms while tape is being driven. SPEED SELECT MODULE (fig. 5-14).- The speed select module has circuitry used to energize or deenergize the speed change relay. The speed change relay has been discussed' previously in this chapter. EOT/BOT AMPLIFIER MODULE (fig. 5-14).-The EOT/BOT amplifier has two identical circuits, one for BOT and one for EOT signals. These signals are amplified and coupled to TTC by the EOT/BOT amplifier. 178 Chapter 5-NTDS PERIPHERAL EQUIPMENT SPEED CHANGE RELAY * SPEED ,* TAPE TRANSPORT CONTROL UNIT 1 OR 2 ^ MODULE ^ Hi => BOT/EOT ^ BOT SENSOR ^- EOT/BOT AMPLIFIER MODULE ^ ^ EOT SENSOR - "■ '■' -w TO SERVO MOTO CW/CCW WINDIN : » - . ^ ERROR FROM ^ UPPER SERVO AMPLIFIER MODULE 4 TENSION ARM P ZERO ' OFFSET n* INHIBIT i REI r ERENCE SERVO MODULATOR SUPPLY MODULE j C~i > ^ SOLENOID DRIVE MODULE ^ FORWARD 60 Hz ^ REVERSE POWER — O r v T INHIBIT \ ZERO LOWER SERVO AMPLIFIER MODULE fe ERROR FROM TENSION ARM TO SERVO MOTOF CW/CCW WINDINC TO FWD/REV Plf* OFFSET \ * W 1* CH ^ ROLLER SOLENOID Note! DRIVE ELECTRONICS UNIT FUNCTIONS ARE WITHIN BLOCKS WITH HEAVY LINES. Figure 5-14.— Drive electronics unit simplified block diagram. 124.442 SERVO MODULATOR SUPPLY MODULE (fig. 5-14).— The servo modulator supply generates square wave reference and inhibit signals for the servo amplifier modules. The reference signal directs the error signal (from the tension arms) to the proper amplifier, and the inhibit signal directs the power output from the servo amplifier to the cw or ccw winding of the servo motor. The servo system uses constant amplitude, variable width square wave pulses to regulate the speed of the servo motors. When a very low speed is required, the pulses look like this: n ■*- pulse width As the speed is increased, the pulses look like this: pulse width I- 1 The average voltage is, therefore, raised, even though the peak voltage does not vary. The servo modulator supply module generates the square wave reference voltage. The servo amplifier takes the reference voltage and varies the pulse width according to the potentiometer 179 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 value derived from the tension arm position offset. The direction of the offset determines which winding, cw or ccw, receives the voltage input in each servo motor. This technique produces much better control of the servo motors at low speeds than can be achieved with a variable d.c. voltage. The peak voltage value insures that the motor does turn at low speeds, while the narrow pulse prevents continued acceleration to peak speed. As a result, the servo motor alternates between an acceleration period and a coasting period, with the length of each period dependent upon the pulse width ratio. The mass of the motor produces an inertia that smooths out the disjointed motion into an average speed, which is proportional to the average voltage. SERVO AMPLIFIER MODULE (fig. 5-14).— Two servo amplifier modules control the direction and speed of the servo motors that drive the upper and lower tape reels. These servo amplifiers operate under control of the solenoid drive and servo modulator supply modules. Each servo amplifier receives an error signal proportional to the extent the respective tension arm is displaced from its null position, and converts the error signal into power to drive the respective servo motor. The reference signal sends the error signal to the correct amplifier, and the inhibit signal directs the power output to the proper directional winding in the servo motor. The zero offset signal into the servo amplifiers determines the operating reference voltage and the directional offsets of the tension arms during tape motion. MANUAL OPERATIONS There are several manual or offline operations that may be used for testing or maintenance requirements. These procedures are based on the assumption that the tape transports have been checked and are operating properly. Successful completion of the manual operations indicates that the magnetic tape control and the tape transports are operating correctly, with the possible exception of those circuits used in I/O transfers with the computer(s) and the duplex functions. The offline procedures consist of a general preparatory sequence of steps that are modified for individual operations (e.g., Write, Parity Format, Low Density, TT1). When using the offline procedures, or any test procedure, check for errors using the error indication circuits. The Status register will directly display error types. By observing the contents of the C register during a Read operation, erratic operation of the Read (or the previous Write) operation may be noted. Timing errors, although indicated by the Status register, are best analyzed when they occur during computer controlled operations because the front panel controls cannot be switched fast enough during manual operations, and this may generate invalid timing error indications. The general preparatory sequence and some of the individual operations are discussed in the following paragraphs. Figures 5-3 and 5-4 illustrate the controls that are used for manual operations. The basic reasoning behind manual testing is NOT to free the computer for other work. When the computer is available, it should be used as a means of testing online equipment since it is much more effective at doing this. However, if the computer is not available, then manual testing can be used as a means of testing most of the equipment parameters that are required for computer operations. This excludes the I/O and duplex capabilities of the equipment, and the I/O section in the computer related to that channel. Therefore, the objective normally involved with manual testing is to try and duplicate those parameters (functions and circuits) that are required for computer operations as closely as possible, even though exact duplication is clearly not possible. General Preparatory Sequence The objective of a manual operation is to reemploy most of the circuitry needed for online operations again in the offline mode. This will help verify that these circuits are working properly. For this reason, the manual mode requires that an external function word for the desired operation be manually inserted into the C register, and then for the RD-243 , be made to act on that word as if it came from one of the computers. The following is the procedure by which this can be done: (l)At the Speed Select switch, select any speed other than STEP (actually, the step 180 Chapter 5-NTDS PERIPHERAL EQUIPMENT position could be used, but the numerous inputs then required from either the CYCLE STEP or PHASE STEP switches limit use of this position except for specific maintenance situations). (2) Depress Master Clear. (3) Rewind the desired transport in order to initiate FWD operations from BOT. Otherwise, move tape forward for several minutes for REV or RWD operations. (4) Set selected tape transport in Automatic. (5) Set Tape Transport Address to correspond to the transport number that will be used in the external function word (step 9). (6) At the duplexer controls under the In Control, depress either A or B. (7) Set the Operation Mode switch to Inspect EF. This permits an external function word to be inserted manually into the C register. (8) Under I/O CONTROL, depress REPLY. This will condition the logic to respond as if the contents of the C register were an external function word received from a computer at the completion of step (10). (9) In the C register, manually set the external function bits required to initiate a specific function (fig. 5-8). This is the step at which the general sequence will vary for the type operation desired. (10) Rotate the Operational Mode switch to I/O Inact. This inhibits I/O signals with the computer and also initiates tape motion. The contents of the C register (which currently still contains the external function instruction from step (9)) will be the source of data first written on tape during execution of a write operation. (1 1) For a write operation, the C register may now be cleared or its contents altered at any time to write a specific word on tape. If unchanged, the function code from step (9) will remain and also be used as the data word. At this point, the technician can elect to insert his own test data through the C register for a write operation, or read back and compare his own test data with either a forward or a reverse read operation. Since tape is already in motion at this point, the function code that had been inserted into the C register would occupy the first portion of the block being written for a write operation. It will also be the first data reentered into the C register on a subsequent read, and the last data read from the tape on a reverse read. A read operation will always show the function code used during the previous write operation, since this is the information that was actually recorded on tape. A standard pattern used in testing a transport manually is to start a write operation, then clear the C register to eliminate the write code in it. Then, one by one, each data bit of the C register is set by pressing the correct indicator button, maintaining an even rhythm from one to the next. When all the bits of the C register are lit, the clear button is pressed again to blank the register. The write operation is then terminated (as will be explained shortly). The next operation might be a reverse read of that same data block. If this occurs, the data being read from tape will be in exactly the opposite sequence, word for word, of the data as it was written in that block. This means the following should be observed for the previous block: (i) Cleared C register (all bits extinguished, although tape is moving) (ii)All bits lit (end of bit sequence encountered first) (iii) Each bit going out in sequence, in rhythm, in the opposite order as were lit during the write (iv)All bits extinguished again (entered the area written after the first time the C register was cleared during the write) (v) Write Function code bits in C register (vi)Tape stops, with C register clear If the next operation is a forward read, to go over the same data block again, the appearance of the C register should be exactly the same as during the write, and the tape will stop at the end with the C register clear again. A final adjustment is made to the assembled word to put it in the same bit order as written before sending it to the computer for a read reverse operation. This means every word has all 30 bits in the same internal order, although the word order changes between forward and reverse read operations. At the end of any read or write operation, the final act of the MTC logic is to clear the C register prior to the preparation and sending of the interrupt word to the computer. If in the manual (offline) mode, no interrupt word is 181 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 prepared or sent to the computer. If online, the C register is again cleared once the interrupt word is accepted by the computer. The C register, therefore, normally appears in a cleared state, except when actually involved in read or write operations. For a write operation, tape motion will continue until EOT is detected, or until step 1 2 is executed. In the read mode, tape motion will also cease at an End of Block (IBG detected). (12) To terminate a write operation, set the Operation Mode switch to INSPECT EF. This will terminate the transfer of the C register contents to the read/write head and initiate an EOF (end of function), which will produce an EOB (IBG). (13) Depress I/O Control Clear to clear Int and Active, which are set at EOF. (14) Depress Neutral. Return to step (8) if another operation is to be initiated. An alternative sequence replaces steps (7)— (10), and (12)— (14). If this sequence is used, the Operation Mode switch remains in the I/O Inact position. Substitute the following steps for (7)-( 10) above. (7) Set the desired function code into the Function Register directly by use of the Density, Format, Write, Direct, Rewind and Unit 1 or Unit 2 pushbutton switches. (8) Insure that a conflicting set of conditions does not exist when the buttons are pressed. Otherwise, the RD-243 will generate an Improper Condition after step (10). (9) For write operations, place the desired data word to be written into the C register at this point. (10) Press the T2 pushbutton under the start function sequence. This initiates the start function sequence after the point where the C register contents would normally be transferred to the Function Register, so the condition of the function remains as set in step (7). The tape will begin moving at this point. Step (11) remains the same. For steps (12)— (14), substitute the following step : (12) Depress T20 in the End Function sequence. Each method has its own advantage. The first one most closely parallels the approach used when under computer control. The second is slightly easier to use, and avoids problems that sometimes appear when attempting to switch the operation Mode switch quickly from one position to another. Switching the Operation Mode switch too slowly can produce invalid errors in the status bits and the error counter. Switching too strenuously has sometimes resulted in damaged switches or knobs. The first method in performing various operations will be described. Write Operations To perform a "Write l's — Parity format— Low Density- 1 Block— on TT1" operation, execute steps 1 through 8 of the general preparatory sequence. Then perform the following steps: (9) Set bits 12, 10, and 5 in the C register (10) Set the Operation Mode switch to I/O Inact ( 1 1 ) Set all the bits in C (12) Terminate the function after three or four seconds. This sequence will write one block of "l's" in parity format and low density. A whole tape of "l's" may be written by omitting step 12. This technique is especially useful in preparing some of the test tapes used during some of the alignment and maintenance procedures. (Note: This does not include skew tapes— see earlier portion of chapter for explanation of tapes.) Read Operations Magnetic tape on the RD-243 may be read either forward or reverse. If the tape is to be read in the forward direction, it must be positioned at the beginning of the block to be read. If it is to be read reverse, the tape must be positioned at the end of the block to be read. With the same tape correctly positioned, it may be reverse read by performing steps 7 through 10 of the general sequence and modifying step 9 by setting bits 1 2 (for TT 1 , or 13 for TT2), 10, and 9. When tape motion 182 Chapter 5-NTDS PERIPHERAL EQUIPMENT begins, all bits of C will be set, but only bits 1 2 (if TT1, or 13 if TT2), 10, and 5 will be set when tape motion stops. This, of course, is the function word recorded at the beginning of the previous write operation. Note that the bit order is unchanged during a reverse read, but that the word order is backwards. Check the Status register for a parity or sync error and the Error Counter for any accrued parity errors. In the read forward operation, with the tape correctly positioned, bits 12 and 10 of the C register must be set in step 9. During and after tape motion, the indications are the same as a read reverse operation, except that the C register contents will appear in reversed sequence. Special Write Techniques: (1) Slow-Speed Writes— Once a write operation has been initiated, the Speed Select switch can be rotated to any low-speed position to observed word disassembly (data transfer from C to Z) as the information is being written on tape. Tape motion remains constant, so slowing the write circuitry down effectively reduces the bit density on the tape by a wide margin. This data cannot be recovered correctly on subsequent reads, so this procedure is only of benefit for analyzing behavior of the circuitry during a write operation. (2) Checking the error counter, or counting frames per block— Depressing and holding the Parity indicator during a write operation will cause improper parity to be written on tape. This step causes the parity bit to be generated for every frame of data, regardless. A subsequent read would then encounter parity errors in those frames where the data bits are of odd parity, and the parity bit is set. This information may be used to check the error counter during a subsequent read operation because improper parity is detected on the improper parity frames. By making every frame odd parity during the write, the error counter can be made to show the total number of bytes read. (3) Repeated manual operations— It is possible to write short blocks of data on tape, or to read these blocks again in either direction, at a rate controlled by the manipulation of the Operational Mode switch. This technique requires that bits governing the function desired be held set (or left clear) in the C register, while the Operational Mode switch is manipulated back and forth between Inspect EF and I/O Inact positions. These bits form the manual function code in the Inspect EF position, and also form the data in the I/O Inact position for a write operation. For a subsequent read operation, either forward or reverse, these bits form the manual function code in the Inspect EF position, and will include bits governing the previous write being set as data is read from tape in the I/O Inact position. The size of the blocks is determined by the length of time the switch is left in the I/O Inact position. Any subsequent read of these blocks will require that the entire block be accessed and the following IBG be entered. Basically, this means that repeated manual reads cannot be accomplished at a faster rate than was used during the write, although no limitation restricts the use of slower read rates if desired. The method by which one person can perform a write or forward read is to fan the fingers of either hand (normally the right) over the buttons of the C register to hold the necessary buttons of the C register depressed, while at the same time holding the REPLY button depressed with the thumb (the thumb has to be doubled back slightly if using the right hand). The other hand is then left free to manipulate the Operational Mode switch. The status indications are not affected by bits in the C register being held depressed. A problem occurs when an attempt is made to perform repeated manual reverse reads. C9, which controls reverse operations, is too far from the REPLY button for most individuals to reach both with one hand without straining. This makes it necessary for two hands to manipulate the C register and the REPLY button. Another person would then have to assist with the Operational Mode switch. One person can do this operation, but this necessitates grounding a testpoint in the chassis for the C9 flip-flop. It is usually more convenient just to have two people work together at this point. (4) Manual erase operation (d.c. type erasure of tape)— A tape may be completely erased on the RD-243 in the following manner: (a) Depress In Control, A or B (b) Depress Write indicator on the Function Register. This will set a write 183 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 condition into a portion of the circuitry and enable the erase head. T2 is NOT pressed, so the rest of the write operation is inhibited. Once tape motion is initiated (next step), the erase head will erase the tape, but no data, sprockets, or parity bits will follow. (c) On the transport control panel, depress SELECTED and FWD for the tape transport holding the reel of tape to be erased. (d) Tape erasure will continue until tape motion is stopped, either by a STOP-CLEAR, MASTER CLEAR, or detection of EOT. Special Read Techniques Refer to step C under special write techniques above. Reading a series of short blocks continuously and/or checking the fast reversal characteristics of the transports may be done by depressing and holding Reply, bits CI 2 or CI 3 and CI 1 (if parity format). Direction is controlled by bit C9. After selecting I/O Inact with the Operation Mode switch, tape motion forward or reverse is controlled by bit C9 while holding the others constant. Parity errors are recorded by the Error Counter. Sync errors may be observed in the Status register. The Sync indicator lights briefly between successive blocks if sync errors are occurring. Details of the manual operations previously described and many others may be found in the troubleshooting section of the appropriate technical manual. The procedures discussed are but a few of the many troubleshooting aids that are available to a good technician who will stop to think for a few minutes before starting to work. ADJUSTMENTS AND ALIGNMENTS The adjustments of a magnetic tape system are intended to achieve optimum performance of the system when used with available tapes, and while conforming to the standard tape format that has been adopted for the equipment and the system. The standard format involves the size of the IBGs, bit density, type of labels used, etc. There are many different indications that these adjustments may need to be performed: Status and/or program indications, poor start/stop time, no tape motion, tape reels "jitter" when stopped, tension arms not centered with no tape motion, a chattering noise from the pinch roller when tape is moving, etc. These are just a few of the ways that it is possible to tell if some adjustment is needed. An unusual note to the air suction sound (a low pitch instead of the normal high pitch, or a harsh vibrant sucking sound) would suggest that a tape loop is not properly formed in one of the vacuum chambers. The possibility of needed repairs must always be considered, and careful watch must be maintained for telltale signs. A squeal, or rubbing sound might indicate a bad bearing. The sounds of a labored motor or the absence of a familiar sound might mean binding parts or blown fuses. A cool circuit or motor might mean loss of input power. Overheating can be detected by checking relative heat outputs from the same elements in similar equipment, and especially by smell if severe overheating or burning is evidenced. Skin touch, or measuring heat rise close to uncalloused skin is usually adequate for checking relative heats. Avoid directly touching any area that could be energized or that might be subjected to severe overheating until adequate safeguards have been taken. Secure power to equipment whenever possible, and approach area gingerly to check for sudden sharp rises in temperature. Have a qualified individual nearby to assist and to act as safety man in case of injury. Because of strong air circulation currents found in most installations, smoke is often not visible, and the apparent source of the heat may be quite a distance from the actual source. In this case, only by getting very close to the source can the sense of smell be completely trusted, or the forced air circulation system be momentarily secured. The smell of something overheating or burning should be reacted to instantly. Even though it may be difficult to pinpoint the source of a burn smell, the smell itself is usually the first clear indication of a major malfunction in some item of equipment. It is important to isolate the source before the smell becomes generalized to a large area. 184 Chapter 5-NTDS PERIPHERAL EQUIPMENT The detail of how to make these adjustments and repairs is left to the appropriate technical manuals; only a brief discussion of the purpose for certain adjustments is made in this text. The terms that have become associated with the adjustments will also be explained. Special Tools All the adjustments for the RD-243 Tape Transports can be made with standard tools that should be available in any electronics maintenance shop (with the possible exception of the four spring scales). Because there has been some difficulty in obtaining these scales, the current Federal Stock Numbers are provided here. Mfg. part number FSN 16 ounce scale Chatillon No. 516-500 6635-717-1307 0- 2 pounds Chatillon No. 516-1000 6635-791-5915 0- 20 pounds Chatillon No. 719-20 6635-647-3371 0- 50 pounds Chatillon No. IN50 6670-675-4987 Check these stock numbers prior to ordering to ensure that they are still valid. Terminology An adjustment in computer terminology has been required with the growth of the data processing field. For example, the computer (through the medium of the MTU) writes a stream of 30-bit words onto a magnetic tape during a buffered output operation. These words are grouped on the tape with no separation between the last frame of one word and the first frame of the next. When the last word is written, the write operation stops, but the tape continues moving a short distance, which erases a small section of tape that follows the written frames of data. Initially, these grouped frames of data, representing one or more computer words, were called a record, and the erased gap between the records was called an interrecofd gap (IRG). Now because of a terminology change these groups of frames are referred to as a block, the gap as an IBG, and groups of blocks pertaining to the same subject as a record. Groupings of records become a file, and files are usually separated on magnetic tape by file marks (a single even-parity frame of data containing a 17 8 code not available with the RD-243). Another example of a terminology change is write protect rings (also called file protect rings). These rings seat in the back of the supply tape reel in a transport such as the RD-243, and when installed, cause an interlock to prevent a write operation from occurring on that tape. The trouble is the rings sometimes fall out or are inadvertently removed, allowing write operations to occur on saved tapes, which erase the previous contents. A technological change now requires most tape mechanisms (the RD-243 is an exception) to have a ring installed before a write operation can occur— no ring means no write. Rings for these transports are identified as write rings. The combined Start/Stop distance of a transport determines the size of the IRG during a write operation, and permits the transport to hesitate between blocks with the option of moving in either direction during a read operation. The Stop/ Start distance is a function of the Start/Stop times, which must be adjusted and measured properly in order to achieve proper transport operation. The instrument used in measuring Start/Stop times is the oscilloscope, and an oscillator (usually a built-in feature of most MTUs) is used to generate a repetitive sequence that can be viewed on the crt. The oscillator output is fed into the motion controls of the transport (FWD or REV) and to the Trigger input circuit (Sync circuit) of the oscilloscope. The trace shown on the cathode-ray tube (crt) is taken from a read amplifier circuit of one of the tracks of the read/write head (a two head transport) or the read head (a three head transport). The crt will show one of two displays, the Start time or the Stop time (figure 5-15), 185 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 -MEASURE START TIME HERE \\ nil n i J / \ V J\ ifflj 1 V inn i V A. START MEASURE STOP TIME HERE B. STOP Figure 5-15.— Start/stop time waveforms. -UNDESIRED BOUNCE 124.443 depending upon the synchronization of the oscilloscope, which is done using the + or - Slope adjustment. Actual measurement is made between the time the circuit is told to start (or stop) the tape motion, which is also the sync input, and the time the tape motion actually starts (or stops). The trace shows the data received through the head during periods of tape motion. This measurement is the physical time it takes the transport to respond to commands from its motion control circuits, and these must be adjusted mechanically. The centimeter grid on the face of the crt and the TIME/CM switch setting determine the time interval being measured. For the RD-243, the Start time should be set at 1.8 ±0.1 ms; Stop time should be 1.2 ±0.1 ms. The oscillator in the MTC logic is variable, and can be connected by jumper wires to other test points. An output of at least 10 Hz is necessary in order to build a useful display on the crt. The highest frequency output of the oscillator circuit should be limited by the maximum variations the tape mechanics can withstand before problems are likely to result. In order to receive a useful output from the read head when making these adjustments, a tape with all l's data and no IBGs is required. Because mechanical adjustments that may severely affect the tape in use are in progress during the setting of stop-start time, it is strongly recommended that a tape be used that is judged unsuitable for any other function ("mechanics" tape). 186 Chapter 5-NTDS PERIPHERAL EQUIPMENT Bias As with other circuit types, transistor circuits can be thought of as requiring two distinct voltage level inputs for proper operation: the operational voltage level, which controls behavior of components in the circuit itself, and the input or "trigger" voltage level, which must alter the circuit function. To some extent, these two voltage levels are interdependent, and both have a certain tolerance range. This means that as long as the voltages do not exceed the limits of that range, the circuit should function as intended. A bias is a means of adjusting the voltage threshold at which the circuit will be "triggered" by an input voltage. The trigger bias adjustments in the RD-243 determine the sensitivity of the read circuitry in reading data from tape: too sensitive, and background noise on the tape may be picked up; not sensitive enough, and some of the data may be lost. The bias adjustments for the marginal test levels are used to set the high and low marginal voltages. (Chapter 2 discussed marginal testing and its use in locating "aging" components.) If improperly set, the marginal test will not reliably indicate potential problem areas. Time Delay There are five time delays associated with the RD-243: Read, Reversal, Stop, Erase, and Write. These delays are used to insure that the respective section of tape is positioned over the read/write and erase heads at the correct point in time for the intended operation. Drag Pad The drag pad adjustments are set to provide eight to nine ounces of pressure on the tape as it is moving across the read/write heads. The purpose of the drag pads is to provide braking force to the tape to stop it quickly when the pinch rollers deenergize. The drag pads are always in contact with the loaded tape and interact slightly with pinch roller measurements, and with each other (one drag pad acts primarily as a FWD brake while the second serves as the REV brake). Figure 5-6 illustrates the position of the drag pads with the read/write head door open. Bridge Rollers These adjustments are used to obtain proper tracking of the tape through the bridge roller assemblies and to or from the tape reels. The bridge roller assembly locations are shown in figure 5-6. EOT/BOT Sensors These adjustments set the levels required to cause an output from the EOT/BOT amplifiers and stop tape motion. Dashpots These are adjusted to ensure that the tension arms strike each stop gently, but still move rapidly without any hesitation. The dashpots prevent tension arm damage and untracking of the tension arm cable if the tape breaks or the tape load handle is released improperly. Reel Brakes The reel brake adjustment checks the drag produced by the reel brakes to stop the tape reels when power is interrupted. This prevents tape spill by the feed reel and tape breakage by the other reel if the tape was moving when power was lost. Vacuum Buffer Chamber There is an adjustment screw for each of the four small circular ports in the vacuum chamber. The adjustment of these screws is a critical factory adjustment, and they are to be altered only by factory personnel. There are several conditions that could adversely affect the formation of the proper tape loops in the vacuum chamber. Some of these are: dirty buffer area, air leakage caused by a loose divider located between the vacuum buffer chambers, or a bad vacuum blower motor. 187 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Mechanical Head Skew Checks of head alignment would occur at this point if required. Normally, head alignment will only change if the head has been replaced. While the equipment technical manual is more precise about how a specific head adjustment is to be accomplished, there are some general rules to be followed. First of all, as with any object, the head exists on three axes simultaneously. These can be labeled top-to-bottom, left-to-right, and front-to-back. There are two measurements associated with each axis. One is the distance the head lies along that axis. The second is the angle of tilt the head has along that axis. For instance, the head has to be a certain distance out from the transport surface. This is distance along the front-to-back axis. The degree of tilt is supposed to be 0° from the perpendicular (or 90° ±0°) to be exactly skewed on that axis. This particular adjustment is normally done with shims (bits of metal inserted as spacers). Changing this adjustment could very easily affect either or both of the other two axes, causing the head to sit too high or low, too far left or right, or even to tilt slightly clockwise or counterclockwise. Changing the alignment on one axis means carefully checking all three axes to insure they are within the tolerances specified. Be sure to follow the procedure given in the technical manual when replacing or adjusting a head. Pinch Roller Checks and Adjustments Adjustment of the pinch roller solenoid assembly (fig. 5-16) is divided into five procedures: skew, return force, parallelism, drive force and capstan clearance. Each of these procedures has its own set of checks and adjustments. SKEW.— Skew refers to the angle at which tape passes over the read/write head. "Perfect" skew (i.e., 0° skew, or a non-skew condition) is such that the parallel lines of the tape edges are perpendicular to a line across and parallel with the read/write segments of the head. The angle with which the pinch rollers contact the capstans (tape moves between the pinch roller and the capstan) will affect the tape motion and skew. Watch the tape as it travels to a pinch roller from the tape troughs on the tape head assembly; a buckling of one edge may be BACKSTOP SUPPORT SECURING SCREWS RETURN STOP SETSCREW- -RETURN STOP SCREW PINCH ROLLER (Rubberized •TRANSPORT PANEL ■REAR MOUNTING- SCREW -UPPER CAPSTAN BELT ' v Roiol ion is ClOCkmlll In Reor View) ■ FLYWHEEL 124.444 Figure 5-16.— Pinch roller solenoid assembly (Upper assembly shown). 188 Chapter 5-NTDS PERIPHERAL EQUIPMENT noticed. Check for severely out of round pinch rollers when tape is moving by listening for an audible clattering sound. Out of round pinch rollers may also be detected by adjusting the pinch roller to make positive contact with the capstan and manually turning the pinch roller to determine if uniform resistance is felt at all points. Check for a visible groove (in the pinch roller) the width of the tape. Look for grooved or marked capstans. Check for a wobbling action (vertical end play) by rapidly energizing and deenergizing the pinch rollers. Check for loose or worn capstan belts. Use a machinist's square to determine if the pinch roller is square with the drive plate. RETURN FORCE.- Return force is a measurement of the pinch roller's ability to quickly move away from the tape when the pinch roller solenoid is deenergized. If the force is too weak, movement away from the tape may be slow and cause unwanted tape movement and result in a slow stop time. If the force is too strong, it will work against the solenoid driving force and decrease its effectiveness (this could affect start time). The return force is checked at point X of figure 5-16 and should be between 13 and 1 5 ounces. Parallelism may be affected by this adjustment. PARALLELISM. -This refers to the relationship between the pinch roller and the capstan; proper operation requires them to be as perfectly parallel to each other as possible. Clearance between the pinch roller and the capstan should be the same at both ends of the pinch roller. Deviation, which is the amount by which parallelism is off, should not exceed 0.001 inch. Recheck the return force after this adjustment is made. DRIVE FORCE.-Drive force is the actual pressure that the pinch roller exerts on the tape to move tape between the pinch roller and the capstan. Drive force is used to overcome return force when the solenoid is activated and the pinch roller is brought into contact with the tape. Drive force is, therefore, stronger than return force, but must be measured as the difference of the drive force and the return force. In addition, drive force varies in strength directly with the distance the pinch roller moves. The farther the pinch roller moves towards the tape, the stronger the drive force as a result of increased proximity of the magnetic fields in the solenoid. When properly positioned, the drive force will register between 7-9 pounds when the solenoid is energized and the pinch roller is in contact with the tape. This is verified by using a spring scale to attempt to pull an energized pinch roller away from tape and stop tape movement. The attempt is to make the pinch roller just barely "break away" from the tape, and as a result, the drive force measurement is also known as the breakaway force measurement. Point "X" in figure 5-16 is used for measuring breakaway force. PINCH ROLLER TO CAPSTAN CLEARANCE.-This adjustment affects the start time of the tape, and the amount of drive force exerted on the tape. If the deenergized position of the pinch roller is too far from the capstan, start time will be slow because of excessive travel of the pinch roller while energizing the pinch roller solenoid. This slowness will cause the electronic delays to lapse too soon, before tape is up to speed. In addition, the increased gap will result in too much pressure on the tape, which can stretch tape, wear down the pinch roller surface, and cause the pinch roller bearings to go bad. If the pinch roller is too close to the capstan, excessively fast start time may cause premature movement of tape. This will increase the IBG, or the lesser tape pressure may cause tape slippage. The pinch roller to capstan clearance should be 0.006 ±0.001 inch. Electrical Head Skew Another form of misalignment could be caused by minor variations between channels on a head as a result of slightly imprecise machining, wear, and other factors. Delay lines can retard the faster channels to synchronize them with the slower ones. This is called electrical deskewing (or just electrical skew). To check mechanical skew with an oscilloscope, electrical skew should be "reskewed" or nullified (reduced to zero effect), and a tape read that possesses good frame alignment. 189 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 Normally, this would be a skew tape, but skew tapes are not available for the RD-243. A compromise is necessary at this point, and usually this means that one transport is selected to generate a "Is" tape, which will be used by all the transports in the system as if it were a skew tape. Selecting the best transport should be based on judgment gained from working with these particular transports. It can be verified by writing a "Is" tape on each transport and reading each tape in turn on each transport, then selecting the tape that shows up the best on the most transports. The tapes when written require the transports to be electrically skewed. When read, the transports should be electrically reskewed (have the electrical skew nullified). Electrical deskewing should then proceed from the worst drive up to the best drive. Admittedly, there is a great deal of work and effort involved here. The alternative to not making the effort is to not establish a compatibility standard within the system, then to always be faced with tapes that can only be read on certain drives, older tapes that can no longer be read by the system, and uncertainty as to whether new tapes will be readable in the future. The RD-243, with one d.c. erase head and one 8-track read/write head, cannot have its write circuits electrically skewed separately. It does not have the data that would be picked up by a separate read head with which it could monitor a write operation (read-after-write function). If a transport's read circuits are skewed to a system compatibility standard, and compatibility is lost between the transport's read and write functions in the process, then that transport should be restricted to read operations only until the situation is verified. A head replacement might eventually be required if the problem appears to be in that area. By restricting this transport to "read only" operations, it will not be responsible for incompatible tapes being introduced into the system. The RD-243 is also a low density machine. Some transports must be able to read or write densities as high as several thousand BPI (bits per inch). The RD-243, with either 130 or 210 BPI, does not have especially critical skew requirements. In other words, some degree of compatibility should always be present. At some point, sufficient compatibility will be obtained within a system to make further extensive effort unnecessary. If a proper foundation has been established, maintaining system compatibility will be comparatively easy from that point on. The transport initially selected for the simulated skew tape should make two all Is tapes. One would be a system Is tape by which all transports in the system would be adjusted. The second would be a standard Is tape, which is held in reserve. When the system Is tape appears to have aged beyond desirable limits, a transport would be reskewed, using the standard Is tape. It would review Is tapes written by each transport in the system. The best Is tape would be selected as the new system Is tape. More than one standard Is tape and/or systems Is tape can be created and maintained if desired. None of these tapes should be labeled as a skew tape, since none of them will actually have sufficient control in their production to be that exact. Changes will continue to creep into the system, but some changes counteract each other, while others can be slowed or prevented from being as extreme in their effects. A program of preventive maintenance scheduling that staggers the periods when each transport is skewed so that only one is done at a time will not cause serious consequences. Doing them all simultaneously may result in total loss of compatibility with older tapes. If it becomes apparent under normal usage that one drive cannot read certain tapes, steps can be taken to correct the situation. On the other hand, if none of the drives can read certain tapes (and this is more likely to occur if they are all reskewed at about the same time), there is very little that can be effectively done to correct the situation. Tape Transport Cleaning The technical manual recommends that the transports be cleaned every eight hours of operation. Experience with system transports indicates that more frequent cleaning may be required, depending upon demands on the equipment and conditions of the tapes. One indication that the tape transports may need cleaning is the Parity error display on the front panel. If Parity errors occur, clean the 190 Chapter 5-NTDS PERIPHERAL EQUIPMENT transports before troubleshooting for logic or mechanical malfunctions. Maintenance Programs In most systems, maintenance programs are stored on magnetic tape. This is particularly true in NTDS, where the only alternate way of loading programs is through the painstaking task of reading them from paper or Mylar tape on the OJ-172(V)/UYK I/O console, the RD-231A/USQ-20(V) or through the paper tape reader in the teletypewriter. In NTDS, maintenance programs are maintained on one tape (or set of tapes), while the system operating programs (OP programs) are maintained elsewhere. A library of master maintenance tapes should always be kept separate from working copies of the maintenance tapes. This will insure that a usable copy of the maintenance programs are available to be reproduced if a working copy is inadvertently damaged. Maintenance programs are discussed in detail in chapter 4 of DS 3 & 2, Vol. 2. However, since magnetic tape is the storage medium, it might be best to cover the sequence required to obtain a specific program and load it into the computer in the NTDS system while the concepts of magnetic tape storage are still fresh in your mind. The following steps establish a basic procedure for either a system or a maintenance program from magnetic tape: (1) perform computer's RD-243 bootstrap. This loads the first block of data found on the tape mounted on transport #1 (either normal or reverse). (2) upon successful load of the first block of data (which is the utility program), control is transferred automatically from the bootstrap program to the utility program. (3) manually insert required parameters into the utility program (via the computer's front panel or the system monitoring panel) to designate which utility function is to be employed and in what manner. One of the utility program's functions is the ability to call other programs from the same tape by use of a "call number." The call number corresponds to the position the program occupies on the tape with respect to the utility program. Call number 1 is the next program. 191 Call number 12 is eleven programs beyond call number 1. In this manner any number of programs can exist on one tape and be available to the operators or maintenance personnel. Documentation should give the parameters, functions, and call number of each program available within a system. Some programs are designed to exist in the computer memory alongside the utility program. This permits use of the utility program again when the next program is wanted. Some programs overload the utility program and do not contain the ability to call other programs themselves. It would be necessary to rebootstrap the computer to obtain other programs when this occurs. See chapter 4 of DS 3 & 2, Vol. 2, for additional information on programs. RD-231A/USQ-20(V) PAPER TAPE UNIT The RD-231A Paper Tape Unit (PTU) shown in figure 5-17 is used in a computer system as a peripheral device for reading or punching information for a computer. It may also be used offline as a tape duplicating device. The computer data is stored by punching holes into a ribbon of tape. The photoelectric reader is connected to the computer by one normal input cable and is adapted to function as an input device. The high speed punch (HSP) is adapted to function as an output device. The PTU is connected to one normal computer output cable which carries punch data and external function codes and one normal computer input cable which carries reader data. In a multicomputer installation, the PTU cables are connected to manual switches to facilitate switching the PTU between computers. Data transfer between computer and PTU takes place in the buffer mode with one frame (seven bits) being transferred during each buffer operation. These seven bits occupy the lower portion of the computer I/O word. For more efficient use of a computer's memory, a software program would normally be required to assemble and disassemble PTU frame data during I/O operations. For example, a 30-bit computer DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 bit (P) in the 2 6 position (paper tape's seventh level position) in order for each byte to become an odd parity frame on tape: 124.215 Figure 5-17.-RD-231 A/USQ-20(V) Paper Tape Unit. would have five six-bit bytes of data per 30-bit word: Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 30-bit computer word The program would have to break this format down into five separate I/O words with the byte data in the lower 6 bits, and add an odd parity Upper 23 bits Lower 7 bits Word 1 : Ignored P Byte 1 Word 2: Ignored P Byte 2 Word 3 : Ignored P Byte 3 Word 4: Ignored P Byte 4 Word 5: Ignored P Byte 5 30-bit I/O word format The PTU would only accept the lower 7 bits, and from these five words, would punch the following frames of data: Frame 1 : Frame 2: Frame 3 : Frame 4: Frame 5: When reading a tape that had been punched in this format, the computer would have to read a frame of tape and check for odd parity five times, then assemble those five bytes that have been recovered back into a single 30-bit word. The usual practice is to use the A, Q, and AQ left and/or right shift instructions when breaking the word down into bytes, or when assembling a word from bytes. Refer to table 4-2 concerning shift instructions for the CP-642B computer, or to NAVEDTRA 10088 (series), Digital Com- puter Basics, for shift instructions for the CP-789 computer. The punch and reader circuits for the PTU are independent of each other, and read and punch operations can be done simultaneously. 192 Chapter 5— NTDS PERIPHERAL EQUIPMENT The reader can be seen (fig. 5-17) protruding through the top of the cabinet on the left-hand side. The tape guide mechanism of the reader is level with the top plate of the cabinet. The door below and directly in front of the reading station provides access to a tape reel holder. A punched tape is inserted in the reel holder which positions the tape for threading through the reader. The reel holder is mounted on a sliding track. When the track is extended outward, a tape reel placed on the axle of the holder will be in the correct position for feeding into the reader. Tape is advanced through the reader from the front to the back of the cabinet. After having been read, the tape spills into a receptacle provided at the left side of the cabinet. The high speed punch (HSP) unit is located in the right-hand section of the cabinet behind the door. The punch unit is mounted on a sliding track that may be extended outward to allow maintenance. The blank tape used by the punch is stored in a reel holder attached to the punch frame. A pully arrangement guides the move- ment of the tape from the supply reel to the punching station. From the punching station, the punched tape passes through a steel conduit and empties into the receptacle at the side of the cabinet. FRONT PANEL CONTROLS The operating controls (fig. 5-18) are located on a descending slope of the cabinet face and are made up of switch indicators and one toggle switch. The Reader On, Punch On and their associated Clear pushbuttons act as on-off con- trols for the reader and punch. The Fault in- dicator is lighted only by command from the computer (indicates Reader-to-Computer error). The associated Clear button is used to clear the Fault indicator. The Computer-Copy toggle switch and the Start and Stop buttons are used in offline opera- tion. In the offline mode, a tape is placed in the reader, and the toggle switch is set to Copy. Then the Start button is depressed, and the punch unit copies the information from the reader. The Stop button is used to stop the copy operation. The Power On indicator is lighted when power is applied to the PTU. The power switch is located directly behind the control panel on top of the cabinet. The Tape Feed switch is used —3 © READER PUNCH SBBB' • © ® © ON FAULT ON © © © CLEAR CLEAR CLEAR : copy : © O © : START COMPUTER STOP ..' ' ;: § © © : m POWER ON TAPE FEEO MANUAL CLEAR 1 124.445 Figure 5-18.— PTU front panel controls. to feed blank tape from the punch (make a leader). The Manual Clear switch is used to master clear all operations. OPERATIONAL CHARACTERISTICS The PTU is capable of utilizing paper tape in 5/8, 7/8, or 1 inch widths. These widths corre- spond to 5-, 7-, or 8-level tapes. In NTDS, all the paper tapes are of the 7-level 7/8 inch type or 5 -level 5/8 inch TTY tape. This seven level tape is illustrated in figure 5-19. A frame of tape is made up of the holes in a line across the tape. Tape levels are parallel to the tape edge. The tiny holes labeled FH are the feed holes (10 per inch) which appear once per frame, and are used to pull the tape through the punch. They are also used for frame timing in the tape reader. A seven level tape contains two octal digits (bioctal) with one level extra. This utility level may be used for parity or control information, as desired. If used for parity information, the seventh level pro- vides a means of distinguishing zero data frames from blank (no data) frames. The leader portion of the paper tape would normally be composed of blank frames, which when read into the 193 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 m 7/8" .100" 6 5 4 3 2 10 qooo oooo H K-072" H p— ^T .046" • .394" " -GUIDE EDGE 00" o o o o o o o O O O \s> LEADER o o o o o o o o o o o o o O O O O O I PL EMPTY FRAME (ALL'O'S") FULL FRAME (ALL "I'S") Figure 5-19. — Seven level punched tape. O o O i O 2 O (FH) 3 4 O 5 6 I HIGHER L ORDER f OCTAL I DIGIT /UTILITY LEVEL DATA LEVELS L EVELS ■FRAME 164.41 COMPUTER INPUT WORD COMPUTER OUTPUT WORD 29-*- TAPE LEVEL 6 TAPE LEVEL 5 TAPE LEVEL 4 TAPE LEVEL 3 TAPE LEVEL 2 TAPE LEVEL I TAPE LEVEL 29- 10 INPUT ERROR FUNCTION CODE DISABLE READER FUNCTION COOE DISABLE PUNCH FUNCTION CODE TAPE LEVEL 6 ENABLE REAOER FUNCTION COOE TAPE LEVEL 5 ENABLE PUNCH FUNCTION COOE TAPE LEVEL 4 MASTER CLEAR FUNCTION CODE TAPE LEVEL 3 TAPE LEVEL 2 TAPE LEVEL I ~J TAPE LEVEL Figure 5-20.— PTU word format. 124.446 computer (or written by the computer) would be 000 000 2 in positions 2 6 through 2° of the input (or output) word. If odd parity data were con- tained in the frame, the computer would read (or write) 1 000 0002 for zeros data in that frame, where the 1 would be the parity bit. The position of each frame is marked by the presence of a feed hole, since this is an automatic function of the punch feed cycle. If a section of tape does not contain feed holes, or if the FH circuity malfunctions or the photolamp is out for any reason, it would be as if the entire width of tape were blank and no data levels existed on the tape as far as the reader circuitry is concerned. Tape movement would be continuous until either a feed hold were sensed, or tape had been com- pletely run out of the reader. The use of a parity bit, or some other form of redundancy to verify punched tape data, is considered essential in most applications. The 194 Chapter 5— NTDS PERIPHERAL EQUIPMENT addition of verifying data must be a software function, since neither the punch station nor the reading station has the physical capabilities of performing this fucntion itself. Punched data is normally verified by having the completed tape inserted into the reading station and read back into the computer, where the inputted data can be checked frame by frame against the data just outputted. Once a tape has been verified as being punched properly, the verifying data that was inserted into the tape format by the punch program can be used to verify a proper read of the tape when performed by other programs. The computer communicates with the PTU by external function words and data words. The formats for these words are shown in figure 5-20. Note that data (input/output) is contained only in the lower seven bit positions. This cor- responds to the tape levels. The computer output word also is used to carry the external function commands. BLOCK DIAGRAMS The block diagram for the RD-231 is il- lustrated in figure 5-21. When the computer desires to begin an operation, it must select the desired equipment (reader or punch) by use of the external function codes to gate the informa- tion to or from the PTU. The photoelectric reader (fig. 5-22) detects each level of the tape by means of eight photocells mounted beneath the tape. Each photocell responds to light from the single lamp mounted above the tape if a hole exists in its cor- responding level. One of these photocells is used to detect the feed holes (one for each frame) which are used to synchronize reading of the other levels in that frame. By using a smaller hole for the feed hole, the reader is able to read tapes correctly despite minor problems that may affect skewing of the holes in each frame. The smaller feed hole also reduces the intensity of the detected light for the feed holes, and a dim or dirty lamp will be evidenced by failure to detect frames (no timing pulse) before a point will be reached where data loss from any of the other photocells is likely to occur. Once a frame of data is read from the tape, the reader logic then PAPER TAPE UNIT MANUAL CONTROLS HSP « PUNCH DATA REGISTER (7 BITS) AND 4 <> ® COMMAND AND DATA CONTROL FUNCTION CODES (6 BITS) AND PTR T " READER DATA REGISTER (7 BITS) Y COMPUTER OUTPUT CABLE Y COMPUTER INPUT CABLE 124.447 Figure 5-21. — PTU functional block diagram. transmits the information found punched in the tape to the computer. This transfer is done via the reader data register, and the transfer is done one frame at a time. An Input Data Re- quest (IDR) is generated by the command and data control section for each frame sent to the computer. The computer accepts the informa- tion as a 30-bit word, with the upper bits that are not in use appearing as zeros. An Input Acknowledge from the computer informs the control section when the frame has been ac- cepted. The HSP receives data from the computer via its data register. It converts the data signals received into the mechanical energy needed to punch a corresponding pattern of holes into one frame on the tape. An Output Data Request (ODR) is then generated by the control section to inform the computer that the punch is ready to accept another transmission. 195 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 A. DIGITRONICS READER WITH READER MECHANISM DUST COVER REMOVED EXCITER LAMP CAPSTAN (DS1) READY/ LOAD SW (S2) RC2 PINCH ROLLER ASSEMBLY PHOTODIODE HEAD TAPE BRAKE GUIDE ASSEMBLY B. DIGITRONICS READER WITH TAPE GUIDE PLATE REMOVED 124.448 Figure 5-22.— Digitronics Photoelectric reader. 196 Chapter 5— NTDS PERIPHERAL EQUIPMENT The control panel is used to indicate the status of operations, and when desired allow manual control of these operations. DIGITRONICS PHOTOELECTRIC READER The photoelectric reader unit is made up of a tape feed mechanism, an optical projection system, a light-sensitive reading device, and a transistor amplifier section. The photoelectric reader unit is capable of reading 240 frames per second. The function of the reader, as a unit, is to sense the information contained on a punched tape and to present this information in the form of electrical signals to the logic portion of the paper tape unit. To perform this function, the reader is provided with a tape feed mechanism which moves the tape past the reading station (composed of the optical projection system and the light-sensitive reading device). When a frame of information is moved into the reading sta- tion, the light generated by the optical projec- tion system passes through the holes punched in the tape. The light passing through the punched holes activates the photodiodes that are directly below the tape. 1 he photodiodes which make up the light-sensitive reading device, generate an electrical signal which is amplified by the tran- sistor amplifier section and sent to the logic cir- cuits. Reading Station The reading station is designed to read punched frames of data from either paper tape or opaque Mylar plastic tapes. It will then either make the information read from the tape available for computer input, if in the COM- PUTER mode (i.e., configured to communicate with a computer); or the reading station can make read data available to the punch station for copying tapes, when in the COPY mode. The reading station consists of the optical projection system and the light-sensitive reading device. The tape used with the reading station can be either 5-level or 7-level tape. Each level refers to the number of data levels that can be used with the tape. For instance, a 5-level tape means that each frame can consist of data bits 2° through 2* (plus the feed hole level). Each level also refers to the width of the tape, where each level represents 1/8 inch. For this reason the 5-level tape is 5/8 inch wide, and a 7-level tape is 7/8 inch wide. The number of tape levels used does not have to be the maximum allowed for the tape width. The standard tape available for use with the RD- 231 A PTU is 7/8 inch paper tape. This tape can be used for 5, 6, or 7 levels. The RD-231A con- tains a 5-LEVEL/7-LEVEL selector switch on the top which determines which level will be accepted by the reader. Another method used to limit the number of data levels in use on a paper tape is the software features of the program used with the RD-231A. If a data level is not to be used during a read operation, the program should ignore the corresponding data bit in the received data word. If a data bit is not to be used during the punch operation, the corresponding data bit of the computer word must always be zero. For those data bits that have no corre- sponding data level on the tape (2 8 -2 29 ), any ONEs data is ignored during a punch operation, and these bits are read back as all ZEROs during a read operation. Use of fewer than five levels of data is technically feasible, but usually undesirable, since this would require increased tape length to retain the same volume of information. Five levels were standardized years ago for the teletype systems, and the retention of 5-level capability in the RD-231A permits continued compatability with this standard. Six-level tape can be used for bioctal code or TTY code with a parity bit and 7-level tape can be used for bioctal code with a parity bit or ASCII code. The most commonly used tape format is bioctal 7-level tape. The bioctal data appears in the lower or rightmost six bits and the seventh level can be used as a "utility" bit. Depending upon the program involved, the utility level can be designated for use as a marker to indicate which frame contains the upper six bits of a new data word. It can be used as a parity bit to main- tain odd parity for each level, or it can be used in whatever other manner is desired by the pro- grammer. In addition to the data levels on the tape, there is also a feed hole level that always appears between data levels 2 2 and 2 3 . The feed hole level occurs once per frame of data, and is smaller than the hole used for a data level. One addi- tional photocell is required to detect the feed holes, and this provides the timing that is used 197 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 when each frame of data is read. A space for the feed hole is achieved by allowing only 1/10 inch of width on the tape for the actual data level, in- stead of using the 1 /8 inch width that would be indicated by the tape width. This allows enough additional space for a feed hole in each data frame. The photoelectric reader reads the content of one frame of dala from the tape at (he com- mand of the computer. The Input Acknowledge signal from the computer allows the reader to advance the tape to the next frame of data and to read its contents. The tape is positioned by a capstan/pinch roller mechanism and brake mechanism. The tape feed flip-flop on the logic chassis controls the operation of the pinch roller solenoid and the brake solenoid. When the tape feed flip-flop is set, the pinch roller solenoid relay puller is energized. When the tape feed flip-flop is clear, the brake solenoid relay puller is energized. The capstan drive motor is ener- gized whenever power is applied to the paper tape reader and a reader enable external func- tion word is sent by the associated computer. In normal operation, the commands from the com- puter to read the next frame usually follows so closely behind the deactivation of the pinch roller solenoid that the solenoid does not have sufficient time to deenergize. The result is that during input operations with its associated com- puter (usually, but not always, involving a multi- address buffer), the tape moves continuously through the reader. Otherwise, movement would be marked by starts and stops which is what oc- curs when the paper tape unit is in the COPY mode of operation. This happens because the punch operates at 60 frames per second. As long as primary power is applied to the paper tape unit, the incandescent lamp in the photoelectric reader is on. The capsan motor, however, which turns the tape drive capstan, is not started until the reader is selected, either manually or by the computer, as an input device. When the tape to be read is threaded into the reader, any portion of the tape leader may be positioned over the reading station. Selection of the reader starts the drive motor, and the tape moves forward automatically until a feed hole is encountered. The presence of light sensed by the feed hole photodiode activates the tape feed control circuit to stop the tape. The tape comes to rest with the feed hole and data holes (if the frame is not empty) positioned directly over the photodiodes unless a subsequent request for another frame of data is present. Tape Feed Mechanism The reader tape feed mechanism is composed of the pinch roller assembly, the tape guide assembly, and the brake assembly. The pinch roller assembly drawing (figure 5-23A) shows an exploded view of the pinch roller assembly. When the tape feed flip-flop is set in the control logic, a logic LOW from the clear side of the tape feed flip-flop is inverted and sent as a HIGH to activate the relay puller card, which in turn activates the pinch roller solenoid. The pinch roller clamps the paper tape to the rotating capstan and moves the tape forward. As soon as a feed hole is sensed by the photodiode read assembly, a logic signal is transmitted via two delay lines to the clear side of the tape feed flip- flop. When the tape feed flip-flop is cleared, a logic HIGH from the clear side of the tape feed flip-flop is inverted and is transmitted as a LOW to the pinch roller solenoid relay puller, which causes the deactivation of the pinch roller solenoid. At the same time as a LOW is sent to the relay puller card for the pinch roller solenoid, a HIGH is sent to the brake assembly solenoid relay puller which energizes the brake (fig. 5-23B). This stops forward tape motion with the tape lined up in the tape reading station. The tape feed flip-flop controls both the brake solenoid and the pinch roller solenoid so that only one of these solenoids can be activated at a time. As mentioned previously, during normal operation the tape moves through the tape-feed mechanism at such a rapid speed that it is in con- tinuous motion from the start to the end of the tape. The tape guide assembly provides a means of adjusting the width of the tape path for various sizes of paper tapes. It contains a switch (READY/LOAD SWITCH-S2) (fig. 5-22), which disables the pinch roller solenoid relay puller when the tape guide is not set to the READY position. This keeps tape from being inadvertently read when the tape guide is not properly closed. When data read from this frame of tape is sent to the associated computer, the computer sends an Input Acknowledge signal back to the paper tape unit to indicate that it has read the data. The IA through the reader control circuits 198 Chapter 5-NTDS PERIPHERAL EQUIPMENT PINCH ROLLER PINCH ROLLER SPRING HEX NUT A. PINCH ROLLER ASSEMBLY BASE PLATE B. BRAKE ASSEMBLY SOCKET HEAD MOUNTING SCREWS 124.449 Figure 5-23.— Exploded view of Reader tape feed mechanisms. 199 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 FEED HOLE PIN FRONT PLATE BACK STOP RETAINING PLATE PUNCH BLOCK (Stripper GUIDE PLATES SPACER STUD MOUNTING SCREWS PIN CHUTE TO CHAD BOX SPROCKET WHEEL (Not Shown) Figure 5-24.— Punch block. 124.450 sets the tape feed flip-flop and the tape is again placed in motion until a feed hole is detected. As previously described, the tape-feed flip-flop will be cleared, the brake applied, data sent to the computer and the entire cycle will be repeated until the tape has been completely read. HIGH SPEED PUNCH The HSP is a device that transposes 7 bits of computer data into a pattern of holes punched in a tape at a rate of 60 frames per second. Figure 5-24 illustrates the punch block assembly. The mechanical action of moving the punch pins is controlled by electromagnets (fig. 5-25), one for each of the eight levels on the tape (one feed hold, six data, and one utility level). These magnets are energized by the punch control cir- cuits according to a pattern specified by the computer. If the magnet is energized, the move- ment of its armature allows unimpeded travel of the punch pin for that level. The activation of the punch magnets must be synchronized so that the data pattern may be established before punching. This synchronization is controlled by the magnetic revolver. The magnetic revolver is made up of a plate attached to one end of the punch motor with a magnetic disc mounted on the plate. A slotted frame with two reading heads surrounds the plate and magnetic disc. When the plate rotates, the magnetic disc passes the reading heads and generates the required timing signals. The timing signals indicate the relative position of the punching mechanism in 200 Chapter 5-NTDS PERIPHERAL EQUIPMENT BLOCKING PAWL PUNCH BAIL DRIVE LINK ARMATURE OF ENERGIZED PUNCH MAGNET ECCENTRIC PORTION OF MAIN SHAFT PUNCH BAIL SHAFT BLOCKING PAWL LINK ASSEMBLY STOP PLATE STOP PLATE LONG TOGGLE ARM SHORT TOGGLE ARM PUNCH PIN DRAG LINK ARMATURE OF DEENERGIZED PUNCH MAGNET 124.451 Figure 5-25.— Punching mechanism. its cycle. The tape is punched when the tape is stopped, and output data from the computer is accepted while the tape is advancing. When the punch is selected, the punch motor is turned on and the punching mechanism begins its cycle of operations. The registers are cleared and an Output Data Request signal is sent to the computer by a pulse from Reading Head 2, indicating that the punch is prepared for the first transmission. A frame of data is then transmitted to the punch data register by the computer, and the information is accompanied by an Output Acknowledge signal which gates the data into the register. A pulse from the magnetic disc passing Reading Head 1 allows the information to be punched. A subsequent pulse from Reading Head 2 clears all registers, and another Output generated. Punching Station Data Request signal is While reading the following discussion of the punching station, note and keep in mind the relationship of the punch pins shown in figures 5-24 and 5-25. The pins shown by both figures are the same pins. The blocking pawls for the tape feed mechanism and the punching mechanism are used to prevent their respective actions from occurring. When a blocking pawl is considered "engaged," it has engaged the linkage involved in a manner that will cause the driving force of the linkage to be deflected to one side, instead of 201 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 being applied to the task at hand as when the blocking pawl is not engaged. The linkage is able to flex to one side through several pivot points, similar in function to the human leg with its thigh, knee, and ankle joints. The side movement would correspond to a "knee bend," and, in fact, the centermost joint is referred to as the "knee." A look at the punching mechanism (fig. 5-25) shows an eccentric drive mechanism (the punch bail drive link) to provide up-down motion to the linkage, a long toggle arm (the "thigh"), the knee, and ? short toggle arm (the "leg"). The "ankle" portion of the short toggle arm terminates in a drag link, which acts to keep the linkage aligned over the punch pins. The punch pins are then driven down through the paper tape on a down motion of the linkage (similar to the stomping action of the human leg when the knee is kept stiff), and lifted again on the up motion of the linkage by an underlip on the drag link. The outer knee shown in figure 5-25 would flex to the left when bent, and the linkage for the next pin is shown flexed to the right. By alternating the directions for knee movement from pin to pin, a more compact design was possible. The blocking levers on the upper portion of the long toggle arms have springs attached to keep the knee stiff when the blocking pawl is not engaged, and a hole is to be punched (see point A in figure 5-25). This same blocking lever would be engaged by the blocking pawl to provide twisting action on the long toggle arm's upper pivot that results in a knee bend and no hole punched (see point B in figure 5-25). The armatures of the respective punch magnets are energized on Is data, which disengages the blocking pawl for the corresponding linkage, and permits a hole to be punched in the appropriate level of tape. The punch magnets are deenergized on 0s data, so the blocking pawl for the respective linkage is left engaged, the knee bends, and no hole appears in the respective level. When no data is present to be punched, the blocking pawls are all engaged, and the motion of the eccentric drive is wasted in knee bends for all the linkages except the feed hole linkage. The feed hole linkage does not use a blocking pawl, so the punch pin is driven up and down continuously for feed holes. The punch pin for feed holes will move up and down r~L ARMATURE OF TAPE FEED MAGNET BLOCKING PAWL FEED PAWL ADJUSTABLE LINK FEED PAWL SPRING FEED WHEEL RATCHET (Attached to Sprocket Wheel) DETENT ROLLER ARM 124.452 Figure 5-26.— Tape feed mechanism. through the same hole in the paper unless tape feed occurs. The blocking pawl for the tape feed mechanism is shown in figure 5-26. Like the linkage for the punch pins, there is a long and short toggle arm, knee, and magnet with armature. There is also an eccentric drive for up-down motion which is connected to the upper pivot of the long toggle arm, but this is not shown in figure 5-26. The "ankle" of the short pivot arm is connected through additional linkage to a ratchet that turns a toothed gear. The ratchet will move up and down to advance the tooth gear in precise increments of one tooth per frame per revolution of the shaft, provided that the blocking pawl is not engaging the blocking lever. Energizing the tape feed magnet will, therefore, cause the ratchet gear to turn to advance tape during the period when tape is not being punched (down motion with ratchet engaged), and to stop tape during periods when tape is being punched (up motion with ratchet disengaged), as long as the tape feed magnet remains energized. 202 Chapter 5-NTDS PERIPHERAL EQUIPMENT A manual lever is shown in figure 5-26 that will move the tape feed magnet's armature to disengage the tape feed blocking pawl when pressed. This permits tape to be run out through the punch whenever and as long as this lever is pressed down. Since the feed hole pin is constantly being driven, tape that is run out this way will have feed holes in it. Tape created in this way is frequently referred to as a "leader" to distinguish it from unpunched tape. Since a no-hole frame of data would appear as 0s data, the use of a special tape format, such as odd parity, is frequently employed to distinguish 0s data from leader tape. In addition, the tape feed magnet may be energized by a remote pushbutton switch mounted on the control panel. Thus, tape may be advanced without opening the door of the cabinet. ADJUSTMENT AND LUBRICATION Mechanical malfunctions can usually be prevented by proper adjustments and/or lubrication of the moving parts. Specific adjustment and lubrication details are discussed at length in the appropriate technical manual. However, there are some general rules that should be observed. Before attempting any adjustment procedures for the HSP, rotate the motor shaft slowly in its normal direction (clockwise from the front). Check for freedom of movement and to ensure that there is no binding of the parts. While making the required adjustments, remember that improper adjustments may cause the equipment to be seriously damaged in a matter of seconds if power is applied. Rotate the shaft again to check for binding before applying power. Read the applicable portion of the technical manual before attempting any adjustment. After the adjustment, retighten any screws or nuts that were loosened to facilitate the adjustment. The HSP should be thoroughly lubricated every month or 160 hours of use, whichever occurs first. Avoid overlubrication so that oil or grease will not drop or be thrown on other parts. Also, make certain that no oil or grease accumulates between the armatures and magnet pole faces or between contact points. Wipe excess lubricant from the armatures and pivot points. Use only SAE 10 (light machine oil) oil or light grease for lubricant. The punch should be cleaned after every eight hours of punching. Cleaning is accomplished by removing the front cover and using a vacuum cleaner. Remove as much of the dust and tape chips as possible with the vacuum; then blow the remaining dust and tape chips from the punch. After cleaning, apply one drop of oil to each punch pin entering the punch block. 0J-212(V1)/UYK TELETYPEWRITER The OJ-212 Teletypewriter, also called TTY, is the only input/output device in the NTDS that provides a permanent record (hard copy) of data exchanges. Because of the slow speed of the teletype units, the TTY use is restricted to maintenance testing, whereby it provides a simple means of communication between the computer and a maintenance technician. The only on-line application of the TTY in NTDS is with Link 14. The information that is printed for Link 14 will be discussed in greater detail later in the text. Data presentation by the TTY may be either a printed page or a punched tape. The OJ-212, previously known by the designation of AN/UGC-13 (MOD), is made up of six basic units: a keyboard, a page printer, a typing reperforator, an auxiliary typing reperforator, a transmitter-distributor and an adapter. The teletype is shown in figure 5-27. (1) Keyboard— A set of manually operated keys which generate coded electrical impulses that can be sent to the other teletype units, as specified by the front panel controls. (2) Transmitter-Distributor— This unit reads perforated paper tape and converts the data into coded electrical impulses which can be sent to the other TTY units or the computer via the keyboard. It is also controlled by the front panel. (3) Page Printer- This unit accepts TTY codes from the keyboard, transmitter-distributor (T/D) or the computer and prints the characters 203 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 AUXILIARY REPERFORATOR CONTROL PANEL ADAPTOR CONTROL PANEL KEYBOARD MAINTENANCE PANEL i. TEST PANEL ADAPTER CHASSIS (BEHIND COVER) 1.217.13 Figure 5-27.-AN/UGC-13(MOD) Teletypewriter. or executes the specified functions (e.g., line feed or carriage return). (4) Typing Reperforator-The typing reperforator accepts TTY codes from the keyboard or the T/D and punches the character code on paper tape. It also prints the character on the tape above the hole pattern. (5) Auxiliary Typing Reperforator- This device performs the same operations as the typing reperforator. It is used to monitor external data lines while an operator is using the keyboard to prepare tapes on the typing reperforator. (6) Adapter— Since the TTY uses standard teletype (5 Level) codes in a serial markspace 204 Chapter 5-NTDS PERIPHERAL EQUIPMENT pattern and the computer uses parallel digital codes, an adapter logic chassis is provided to convert from teletype to computer format and from computer to teletype format. This logic chassis is normally the only maintenance interest in the TTY of the Data Systems technicians. Usually the mechanical units of the TTY are maintained by Radiomen with a teletype repair NEC. BASIC TELETYPE CIRCUIT The basic teletype circuit or loop is shown in figure 5-28. The power supply produces a constant level d.c. current (referred to as loop current) that is used to drive the printer. Depressing any key on the keyboard will permit current flow in a specific format that will cause an associated character to be printed or function to be performed. Teletype Signals The format of the signal generated by pressing a key is illustrated in figure 5-29. The KEYBOARD PRINTER POWER SUPPLY 124.454 Figure 5-28.— Basic teletype loop. TIME START I 2 3 4 5 STOP I 1.197 Figure 5-29.— Mark and space signals in teletype. signal is divided into seven time units. The shaded area of figure 5-29 represents mark pulses, which are periods of current flow, and the clear area represents space pulses, which are periods of no current flow. Of the seven units of a teletype signal, five are numbered and called intelligence units. The first unit is the start pulse and is always a space. A space is distinguishable since periods of nontransmission involve current flow. The last unit is the stop pulse and is always a mark. These seven units make up the start-stop method of teletype communication. The start-stop pulses are used to synchronize the teletype machines, and the intelligence pulses hold the information. Notice that the first six units in figure 5-29 are the same length, but the seventh (stop) unit is longer. Each of the first six units requires 13.47 msec for transmission, and the seventh requires 19.18 msec in 100 word per minute teletype communications. The unit time decreases as the word per minute reference increases (Table 5-1). Keep in mind that the teletype codes are serial data as opposed to computer parallel data. The mark-space codes for all the characters and functions of a teletype are illustrated in figure 5-30. The octal codes on the right of the chart are the codes sent by the computer to produce the corresponding teletype code. The teletype codes shown are standard and used in all teletypes. The octal codes may or may not be unique for the OJ-212 machine. The start-stop pulses are generated automatically by the adapter each time a computer code is sent. The basic teletype is designed to work in conjunction with other machines of the same nature. The keys on the keyboard each code pulse trains that open and close a series loop connecting all the keyboards together. Thus, any key pressed on any of the connected keyboards affects the total circuit. The printer and the reperforators are also connected in the loop, and these react to the voltages developed across their impedances by the loop current. A single variable voltage source for the circuit is adjusted to provide the necessary loop current needed for proper circuit operation. The source voltage must be raised to compensate for additional machines and/or increased line losses, or lowered 205 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 c k. a 'Is:,;,, H.l a I C 'E 3 uS .2 — 3 O C ra •a a CO c o W a> Z CD a j o k. £ v> ^ to 3 LU _c 0J ra '5 •o CO 3 I 1 ■o o < & k. a> E E o o k> 8 at n D V 3 1 E c o 'E 3 c 0) w ra "O c ra E? ra 5 1= U o k. 3 LU and Military U U.S.-AII Users U.S. Military- Limited Use 0) g £ Vt >• CO 1 CO 1- o U 4-> CO 3 c o ra k. a> a o O i- 0) E k_ o LL 1 "O k. ro TJ C ra *■> CO < co' 3 M ■o C 1- g a CO « s ** ^ , CO S> 2 CO I 2L5 f - T— *"• r- ^ "O ai o o in r*» LO in' LO LO ■5 - 1 CM CM CO CO CO CM LO S3 v> -2 .e i- £ CC co .E c a> -1 » » «* co r» a> £1 » tart a ive Ci ulses CM CM o o o LO co' CO 0) CM CM CM CM CM ^ T" T - CO ra ML. Q. c I o z ■o 3 3. If) CO CO CM CM n 00 L$ LO o o o CO ^f **' 5* 0) a ra c *- £ o 2 S * * +- ■♦- CO. ++H-+ 8 o o © o s co' CM o CO O CO O CO a - .E O a S CO CO '* «* 3 3 3 3 D CM r>»' r» LO r* CM rs" r- CM rW CM . (0 J. S .£ 'jS W *5 ra Q. 9 2; E | = ° i 8 ° 8 o k ra w ra „ ra M • •» „ -o aj ■o o 3J C o u u II! ass » v « ■= ■= r 11 206 Chapter 5-NTDS PERIPHERAL EQUIPMENT TRANSMITTED TELETYPEWRITER SELECTING PULSES PAPER TAPE CODES START 1 2 3 4 5 STOP LETTERS FIGURES SYMBOLS OCTAL ■ ■ 1 . Ck> H 05 g| BHi j i 32 1 \ II L| II m Of r w ID Hfi m m b (OLLLJ *-w> <-*» II 7 ~\A \t 1? V 9 \ t X / 27 ' L *' «LI m i>rACL ■ U^ -BLANK 8 00 ujz -LETTERS * 37 2 2 -riGunts ■■' * 5j r~ II ^ 6 a t- Ol 3 (E K Ui ►- z ui o o UI _l » o z u «J »- 3 0. z 1 TO ALL CIRC TER z o u z 3 U. — _l * 1 < Ul a UI -1 > O 1- Z V) V UI O 3 < o ►- H 3 « - Ifi < a 1! 1 I INPUT DATA AND INTERRUPTS TIT OUTPUT DATA AND EF CODES l -i OD < Z III K M UI 3 a UI ct 3 a. z FUNCTION TRANSLATOR i 1 UI _l ■ < z UI z. TER CLOCK TIMING TIMING CHAIN 1 TTY ADAF TO ALL CLOCKED CIRCUITS AUXILIARY TYPING REPERFORATOR AUXILIARY LINE RELAY - » i 1 1 r >( ^iu- l U ItSI ru 1 ^ PAGE PRINTER \ KEYBOARD / T t CONTROL SWITCH TRANSMITTER - DISTRIBUTOR 1 * o KT 3 1 1/ T* 1 r T 1 1 K Oy — < KT . TYPING REPERFORATOR Si i TTY ! • k Figure 5-38.-TTY and adapter block diagram. 212 124.453 Chapter 5-NTDS PERIPHERAL EQUIPMENT codes received from the computer, one bit at a time, to the TTY under control of the timing chain. For input to the computer, serial bits from the TTY are sequenced into the data flow register (DFR) under control of the timing chain. Another function of this register is to handle various control codes (external functions and interrupts) which are sent and received by the adapter. Control Interface This section handles the control signals to and from the computer which are necessary for the transfer of data between the TTY and the computer. All incoming data is synced with the adapter clock timing. The Output Acknowledge signal will disable the Output Request signal, start the Timing Chain and enable data into the DFR. The Input Acknowledge signal disables either the Input Request or the Interrupt signal. Function Translator The function translator translates the external function codes sent by the computer into enable signals to perform the function that is specified by the program. External function codes are stored in the DFR when the external function signal is received by the control interface unit. Timing Chain The timing chain produces timing signals that are used to select, in proper sequence, the data bits which are sent from the adapter to the TTY. The timing chain also diverts the data coming from the TTY into proper bit positions in the DFR. When inputting to the computer, a start pulse from the TTY enables the timing chain. When the complete TTY code is assembled, a stop pulse disables the timing chain and causes an Input Request signal to be generated by the Input control interface circuits. When receiving data from the computer, the Output Request is enabled until an Output Acknowledge is received. The Output Acknowledge disables the Output Request and enables the timing chain. The timing chain will then produce start and stop pulses for the TTY. When the stop pulse is generated, the Output request signal will again be enabled. Clock Timing The clock timing circuits generate the timing signals necessary for the proper operation of all clocked adapter circuits. Manual Controls The manual controls provide control of the various operations performed by the adapter. These controls also contain circuits which allow the computer to control the power for operating the TTY motors and to produce control signals and interrupt codes which are sent to the computer. Auxiliary Line Relay The lower portion of figure 5-38 shows the block diagram for the TTY and adapter. The Auxiliary line relay is built into the TTY cabinet, and all information to external equipment (communications or other teletypes) passes through it. The auxiliary line relay makes the OJ-212 compatible with other teletype equipment. To operate with Link 14 communications equipment, the output of the TTY is connected, through the auxiliary line relay and a patch panel, to the transmitter and receiver as illustrated in figure 5-39. Changing Paper To insert a new roll of paper in the machine, first shut off the power. Press cover release pushbutton and lift cover. (Refer as necessary to figs. 5-40 and 5-41.) Push back paper release lever, lift paper fingers, and pull paper from platen. Lift the used roll from machine and remove spindle from core of used roll. Insert spindle in new roll. Replace spindle in spindle grooves with paper feeding from underneath roll toward operator. Feed paper over paper straightener rod, down under platen, and up between platen and paper fingers. Pull paper up a few inches beyond top of platen, and straighten it as though straightening paper in a typewriter. Then 213 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 I COMPUTER U I I I J INTER- COMPUTER N-H CONNECTION PANEL 1 T ! i I COMPUTER t* I I I I J PRINTER ADAPTER 4—4 H AUXILIARY i I I TELETYPEWRITER (S)| I I J AUXILIARY LINE RELAY I 0J-212(V1) v I PATCH PANEL ANTENNA RADIO COMMUNICATION EQUIPMENT Figure 5-39.— Teletypewriter system for NTDS. 1.219 PAPER PAPER STRAIGHTENER FINGERS ROD PAPER RELEASE LEVER Figure 5-40.— Paper roll removed. 1.220 214 Chapter 5-NTDS PERIPHERAL EQUIPMENT PAPER FINGERS PLATEN PAPER STRAIGHTENER ROD UNDER PAPER PAPER RELEASE LEVER SPINDLE 1.220 1.221 Figure 5-41.— Paper roll inserted. lower paper fingers onto paper and pull paper release lever forward. While inserting paper, avoid disturbing the ribbon or the type box latch. After paper is in place, check to see that ribbon still is properly threaded through ribbon guides. Also check to make certain that type box latch has not been disengaged. It should be in a position holding the type box firmly in place. Close cover. Open window lid by sliding latches together. Bring up the end of the paper and close window lid with paper feeding out the top of it. Changing Ribbons To replace a worn ribbon in the typing unit, press the cover release pushbutton and lift the cover. (Refer as necessary to fig. 5-42 and 5-43.) Lift the ribbon spool locks to a vertical position, and remove both spools from ribbon spool shafts. Remove the ribbon from the ribbon rollers, ribbon reverse levers, and ribbon guides. Unwind and remove the old ribbon from either of the spools. Hook an end of the new ribbon to the hub of the empty spool, and wind the ribbon on the hub until the reversing eyelet near the ribbon's other end is on the spool. If the ribbon has no hook at this end, the spool will have a barb that should be used to pierce the ribbon to secure it to the second spool. Replace both spools on ribbon spool shafts, making sure that they settle on spool shaft pins and that the ribbon feeds from the front of the spools. Turn down ribbon spool locks to a horizontal position to lock spools in place. Thread ribbon forward around both ribbon rollers, through the slots in the ribbon levers and ribbon guides. Take up slack by turning free 215 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 RIBBON SPOOL LOCK (VERTICAL POSITION) RIBBON SPOOL SHAFT RIBBON REVERSE LEVER 1.222 Figure 5-42.— Ribbon spool mechanism. •RIBBON SPOOL SHAFT and LOCK -RIBBON SPOOL ■PLATEN HANDWHEEL RIBBON SPOOL SHAFT and LOCK- RIBBON SPOOL- RIBBON ROLLER- 124.461 Figure 5-43.— Ribbon inserted. spool. After slack has been taken up, check to make certain that ribbon still is properly threaded through ribbon guides, and that the reversing eyelet is between spool and the reverse lever. Also see that the type box latch has not been disengaged. It should be in position, holding the type box firmly in place. Turn the paper up a few inches by pressing down and turning platen handwheel. Close cover. Open window lid, bring up the end of the 216 Chapter 5-NTDS PERIPHERAL EQUIPMENT PANEL CONTROL READOUT DISPLAY DISPLAY CONTROL ACCESS COVER MESSAGE KEYS WORD KEYS 124.209 Figure 5-44.-MX-3195(V)/USQ-20(V) Digital Data Introducer. paper, and close window lid, with paper feeding out on top of it. MX-3195(V)/USQ-20(V) DIGITAL DATA INTRODUCER The digital data introducer (universal keyset or simply keyset) shown in figure 5-44 provides a means of supplying the NTDS computers with manually entered data which is characterized by a relatively low data rate (volume and speed). The keyset is interfaced to the NTDS computer through the keyset central multiplexer (KCMX), discussed in chapter 3 of DS 3 & 2, Vol. 2. The keyset is designed to provide standardized key- board and readout (visual indicator) facilities which may be easily adapted to various subjects when manual entry of data or control information 217 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 for the system is required. The adaptation is ac- complished by changing a plastic overlay with etched labels that fits over the message, word and data keys, and by changing an address selector switch. The former is for visual identification of the current operational mode, and the latter informs the computer of the mode currently in use. These overlays and the address selector switch will be discussed in greater detail in a later chapter of this text. FRONT PANEL CONTROLS AND OPERATIONAL CHARACTERISTICS The front panel controls of the keyset are illustrated in figure 5-45. Across the top of the S> ® MESSAGE ® 2) — WORD - DATA 2) 3 4 O 7 DIM BRIGHT PANEL POWER ON +26 VOC 0- 7 — | TEST ADDRESS ^ (^ © © ^ 115 VAC 400 CYL 1 TEST S 4 '* T DIM BRIGHT DISPLAY ® CLEAR r o ERROR WAIT TRANSMIT o © MESSAGE © WORD DATA ® © © © © © © © © © © © © © © Figure 5-45.— Keyset control panel. 218 © © 124.462 Chapter 5-NTDS PERIPHERAL EQUIPMENT panel are the message, word, and data displays. These displays are broken down into positions, and each position is marked by a slightly frosted lens upon which images can appear. The source of these images is the 1 2-lamp module and film clip that are mounted behind each display position. When one of the lamps is lit, the light from it will shine through a corresponding part of the film mounted in front of it, and cause the film image to appear in reverse on the back of the frosted lens. The operator, who is seated facing the other surface of the lens, sees the image correctly. The image may be of words, numbers, characters, or messages, or it may be a colored background that can be used in conjunction with another image if two lamps are lit simultaneously, causing both to appear together. It is even possible to construct unique symbols or character shapes with the overlap feature of a 1 2-lamp projection display in some applications, though this is not done with the MX-3195(V). The message and word display are predetermined by the overlay and are usually code words. The data displays are either code words or numerals (0-9). An error caused by hitting several keys simultaneously may go undetected if a valid code results; however, an invalid code will cause a red lamp to be lighted and result in a red display (flood) for that digit position. Beneath the displays are the Panel and Display brightness controls. These switches control the brightness of the lights for the display and keyboard panels. The rectangle between the Panel and Display switches is actually a recessed area of the front panel and has a hinged cover. The Test switch is a rotary switch that is used to select the keyset operating mode. Position 1 is the normal operating mode, and positions 2 through 5 are test positions. The keyset address is a two octal digit number. The program selects the most significant digit (MSD) of the address, and the Address switch determines the least significant digit (LSD) of the address. The Address switch has a round can like cover that should be left in place to prevent accidental changing of the address. The Test and Address switches are an excellent place to start troubleshooting the keyset. If the keyset appears to be malfunctioning, check these switches to ensure that they are in the correct positions before taking further measures. The four Message buttons permit entry of the primary identifier for the data word. This identifier places the data word within a unique grouping of words which together supply a prescribed block of information to the computer program. The eight Word buttons permit entry of a secondary identifier for the data word. This identifier indicates to the program the particular meaning of the data in the data word. The ten Data keys are used to enter six decimal numbers. The data entered may be purely numeric as indicated by the ten decimal numbers engraved on the keys or may include certain data subcoding that would be indicated on the plastic overlay. The keys on this keyboard must be used in a certain order. One Message key must be selected first, then one Word key followed by any six Data keys. Any other order will produce a no data (input ignored) condition. The bit positions for a keyset data word are shown in figure 5-46. The Clear button clears the Error indicator, the data storage register and all the readout displays. The Error indicator is lighted on 29 28 27 26 25 24 23 22 21 20 19 IB 1? 16 15 14 13 12 II 10 | 09 | 08 07 06 05 04 03 02 01 ] 00 > Id Ujl- 2 WORD TYPE DATA WORD DATA WORD DATA WORD DATA WORD DATA WORD DATA WORD < Q. 124.463 Figure 5-46.— Keyset data word. 219 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 computer command and indicates that an error (parity or format) has been detected in a previous data entry. Operator response is normally to reenter the correct data. The Wait light will stay lit from the time the Transmit key was momentarily depressed, until the keyset is interrogated by KCMX. During the time this light is on, all keys on the keyset are locked out, and the only method of clearing the keyset is by placing the Test switch in position 3 or by turning the power off and then on. The Transmit button initiates the control logic which results in the data word being transmitted to KCMX. Operation of this key DOES NOT force transmission; it merely indicates that data is ready and waiting for computer controlled interrogation. If the Transmit key is depressed before all Data entries are made, zeros will automatically be entered as the remainder of the Data entry. Depressing the Transmit key locks out the other keys until the data word has been accepted by KCMX. The number of keysets will vary, depending on the particular installation. At present, five are being used in NTDS. The keysets are connected in series and are interrogated sequentially. Since there is no address identifier in the keyset data word itself (fig. 5-46), the computer's program associates the data word with a unique address in the KCMX (chapter 3 of Vol. 2). The KCMX may also be selected to transmit keyset data to the computer as interrupt data, in which case a por- tion of the data word is replaced, by the KCMX, with a unique identifier showing which keyset originated it. If the data does not conform to expected standards, the program produces a reasonableness error, lights the Error light on the keyset and rejects the data. BLOCK DIAGRAM The block diagram for the keyset is shown in figure 5-47. A typical keyset data entry is made by selecting nine keyboard keys in a fixed sequence: 1 message, 1 word, 6 data, then transmit. Each key, except for transmit, is assigned a binary code, as it is depressed by the diode encoder circuits. The Message, Word and Data entries are translated to two, three, and four-bit (respectively) binary numbers and placed in the data storage register for temporary J i DIODE ENCODERS 29 BITS PARITY CORRECTOR MESSAGE KEYS WORD KEYS 115V 400 CYCLE, 3(1 JJJ. POWER SUPPLY t t t t DATA KEYS i — r -26VDC TO ALL CIRCUITS TRANSMIT KEYS + 26V0CT0 READOUT DISPLAY 8 CLEAR RELAY PULLER CIRCUIT CLEAR KEY CONTROL RELAYS DATA STORAGE REGISTER READOUT DISPLAY ERROR INDICATOR 1 ERROR CIRCUIT 1 WAIT INDICATOR CLEAR RELAY PULLER CIRCUIT READ SIGNAL KEYSET DATA KCMX 124.464 Figure 5-47.— Keyset block diagram. storage prior to transmission to KCMX. During the data entry, parity corrector circuits maintain odd parity for the binary coded information being assembled in the data storage register for subsequent transmission (fig. 5-46). The order of data entry is restricted to a fixed sequence due to the action of the control relays, which, in turn, enable and disable the three groups of keyboard keys. The control relays also control the order in which the readout displays are selected. The data entry is considered complete and correct if the code words and decimal information intended for transmission to KCMX are indicated in the readout displays. An error occurring in the data entry process will be indicated by incorrect data shown in the readout display. Data transfer is initiated by depressing the Transmit button, causing an Enter signal to be placed on the keyset's Enter line to the KCMX. Depressing the Transmit button disables the 220 Chapter 5-NTDS PERIPHERAL EQUIPMENT keyboard data keys and lights the Wait indicator until a Read signal is received from the KCMX. Data transfer occurs when the computer requests (external function code) that the KCMX interrogate the keyset. As a result of this interrogation, the keyset's Enter line is monitored. If the Enter signal is present, KCMX transmits the Read signal, which effectively connects the keyset's data storage register to the data cable. The Read signal transfers the data from the storage register to KCMX. The KCMX then transmits the data word to the NTDS computer, using normal I/O interface signals. The order of interfacing signals (signals between the different equipment) must, therefore, be: (1) Keyset to KCMX: "I am holding a message for you" (ENTER signal is up) (2) Computer to KCMX: "Interrogate Keyset for possible data for me" (external function acknowledge (EFA) signal up for KCMX function code) (3) KCMX to Keyset: "I can accept your message now" (READ signal returned to Keyset) (4) KCMX to Computer: "I have a Keyset message for you" (input data request (IDR) signal up) (5) Computer to KCMX: "Message received" (input acknowledge (IA) signal up) Of course, it is understood that each step is dependent upon the successful completion of the previous steps. Otherwise, the sequence would vary as the presence or absence of data, or the need for that data, dictates. The keyset senses the end of the Read signal and initiates a partial clearing of its circuits through the clear relay puller circuit. The Control relays, Wait indicator, and Data portion of the Readout Display are cleared; however, the data remains displayed in the Message and Word units to remind the operator as to the subject of the last data entry. An Error signal will be sent to the keyset (depending on KCMX's mode of operation) if KCMX detects a parity error in the data transmission or by the computer via KCMX if bad parity or wrong data is detected. A new data entry is possible only after the keyset has been master cleared by the Clear button. This clears the Message and Word displays and the Error indicator if it was illuminated. TROUBLESHOOTING Generally, incorrect operation of the keyset will be evidenced in several ways; the data entry will not be correctly displayed in or cleared from the Readout Displays. The KCMX, or computer, may indicate a high percentage of data transmissions have bad parity or lack reasonableness from a given keyset. In the first case, the trouble probably is in the keyset. In the second case, the trouble may be due to faulty operation of KCMX, faulty data cables and connectors, or the trouble may be in the keyset. Additional indications of faulty operation will be noted by failure of the Wait and Error indicators to operate correctly. There are two special purpose units of test equipment that may be used to troubleshoot the keyset. The Introducer Tester TS-1539/USQ-20(V), or "keyset tester", is used to supply the signal and monitor functions normally provided by KCMX. The Converter Tester TS-1 53 8/USQ-20(V) is used in conjunction with the keyset tester to check the keyset operation under marginal input power conditions. The keyset tester (front panel shown in figure 5-48) provides a means of testing a keyset apart from the KCMX, and of isolating a fault to the keyset while eliminating the KCMX, and possibly the data cables, as a source of the fault. The data cables must be suspected too, if the malfunction seems to exist between two pieces of equipment joined by data cables. Any multiwire cables used with test equipment are highly suspect, since they are attached and removed frequently. When troubleshooting data cables, it is advisable to think in terms of a possible open lead, shorted pins, lost ground return, or loose (intermittent) connection in either connector as perhaps causing the symptoms that have been observed. This is particularly true if the cables have recently been moved or replaced. Cable runs can sometimes be bypassed in an effort to isolate problems to the cable itself, but the only means of actually locating problems within the cable is with a series of resistive readings to determine 221 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 - PARITY -i i— MESSAGE - -WORD- i-r«miT-i I — MfcJK>Abfc— i I nunu i DIGIT ONE- 229 2 28 2 27 DIGIT THREE 226 2 2 5 2 2 4 DIGIT FOUR- 223 2 22 2 Z1 2 20 DIGIT FIVE 216 2 M 2 13 2'2 2lt 2 10 2 9 28 27 2 6 2 5 2* 3 4 ® 2 I / . i-ENTER-ii READ ~~~.M^ 6 ^"V SPECIAL .375A0A 375A0B © ADDRESS '^ .37SA0C SPARE ^^ DIGIT TWO — 2'» 2' 8 2' 7 2 ,B DIGIT SIX 23 2 2 2 1 2° POWER- ON ON • 124.465 Figure 5-48.— Keyset tester control panel. continuity (current paths) between identical pins in each connector and resistive readings from either end of the connector to other connectors and to the shielding to determine if any shorts have occurred. This is a time consuming task, but it is absolutely necessary if problems are suspected in a cable. Sometimes a cable will be found that has unused leads left either open or shorted. These indicate a sloppy attitude in assembling the cable, but would not be indications of a defective cable. This makes it necessary to verify the function (if any) each pin connector has been assigned when checking a cable. One technique that can be used with long cables is to short two pins at one end momentarily while checking continuity between the identical two pins at the other end with a meter. A low resistance should be read when the pins are shorted, and an open circuit should be read when the short is removed. This technique requires two technicians working harmoniously together with carefully coordinated movements, signals, or an adequate means of communication between them. The keyset tester is equipped with the following features: (1) It contains a 30-bit display to visually indicate the output of the data storage register. (2) It provides either an intermittent or a constant Read signal for transferring the contents of the data storage register to the keyset tester. The Read signal also checks the clear relay puller circuit. (3) It provides either an intermittent or a constant Error signal for activating the keyset error holding circuit. (4) It is capable of checking the isolation diodes associated with each storage element of data storage register. The converter tester (front panel shown in fig. 5-49) has three primary functions. It will provide 1) manual control of input line voltage to the equipment under test, 2) meter indication of line-to-line output voltages, 3) a variable source impedance for decreasing the positive 15-volt d.c. output of the equipment under test. The converter tester can be used to test other NTDS equipment such as the RD-243 magnetic 222 Chapter 5-NTDS PERIPHERAL EQUIPMENT A A — 4 u © 115 VOLTAGE ADJUSTMENT COARSE ® ® * SPARE cD ® FINE OUTPUT VOLTAGE ADJUSTMENT _^ INCREASE OUTPUT VOLTAGE ® * # 2-3 1-2 I 1-3 ® © © I — nl ^ WJ Figure 5-49.— Converter tester control panel. 124.466 tape unit. Refer to the appropriate technical manuals for instructions. Figure 5-50 illustrates the manner in which the special test equipment and the keyset are connected to perform marginal testing. Information is entered into the keyset and displayed on the keyset tester to be checked for accuracy. Then the keyset is cleared or an error signal is sent from the test set with the results of both operations being observed on the equipment. The converter tester may be used to vary the voltages as needed to simulate failing or marginal components' and introduce additional factors in the troubleshooting. C-3675A/USQ-20(V) SYSTEM MONITORING PANEL The C-3675A shown in figure 5-51 is one of five system monitoring panels (SMP) presently being used with the NTDS. The major differences between these five SMP's are limited to cabinet construction and physical locations of some of the computer control switches. All five operate the same way logically and perform KEYSET MX-3195(V)/USQ-20(V) KEYSET TESTER TS-1539/USQ-20(V) POWER KEYSET INPUT IN POWER CABLE CONVERTER TESTER TS-1538/USQ-20(V) ©®@J^ NOT USED SHORTING PLUG REMOVED FROM J4 AND INSERTED IN J3 WHEN CONVERTER TESTER IS USED. ADJUSTABLE POWER Figure 5-50. -Cabling diagram for marginal operation testing. 124.467 223 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 CONTROLS AND INDICATORS LOGIC CHASSIS ANO BLOWER 124.210 Figure 5-51.-C-3675A/USQ-20(V) System Monitoring Panel. identical functions; therefore, only the C-3675A will be discussed in this text. The SMP is a self-contained computer control and monitoring device, incorporating features of a keyset, but also providing a means of establishing remote control of and monitoring the more significant operations of each computer in a particular data processing system. A system may consist of two, three or four computers, that can be controlled by one SMP. Computer operations performed by the SMP are divided into the following three groups. (1) Remote computer operations— A group of system monitoring controls is provided which duplicates some of the major computer controls for each computer, such as bootstrap, master clear, run, stop, etc. These functions are found on the SMP monitor control panel. (2) Computer function commands— These commands are generated by the SMP keyset and are used for directing a portion of the operational program in a particular computer to perform certain operational functions. These are software functions, as opposed to the hardware functions available at the monitor control panel, and as such these are only functional with the appropriate software (the system program is loaded). (3) Fault and computer indications— A group of indicators is provided which displays the communications faults between the computer and associated peripheral units or within the computer itself. These indicators also display amplifying information necessary to operate and monitor the computer system. FRONT PANEL CONTROLS Up to four separate monitor control panels (fig. 5-52) provide duplicate computer controls, one for each system computer. These controls permit the operator to load, reload, or control programs and to start, stop, or modify (by use of the selective stop or jump switches) the computing operations in any of the system computers. The monitoring panel also displays amplifying information for determining what conditions are occurring in a computer or system. This is done using the neon indicator reg- ister on the upper portion of the monitor control panel. This 1 5-bit register coincides with the upper 15 bits of the computer output channels assigned to the SMP. The com- puter can place an external function on the associated channel EXF line and this will cause the SMP to display the upper 15 bits of the function word. The SMP will continue to display the last word received until another 224 Chapter 5-NTDS PERIPHERAL EQUIPMENT 14 13 12 11 10 CL. SPECIAL MASTER CLEAR STOP ENABLE A SEQ 8 EL JUMP1 SELJUMP2 SEL JUMPS FAULT JUMP <& <6> <8> tg) L.ST0P5 SEL. STOPS SEL.STOP COMPUTER A (§) (Q) ' @ BOOTSTRAP START ONLINE HISH SPEED FAULT STOP 4 SEL.ST0P5 SEL. STOPS SEL.STOP 7 If 124.468 Figure 5-52.— Monitor control panel. word is sent. The computer program is able to use this feature as a means of communicating infor- mation to the operator. For example, the utility program uses rapidly shifting strings of light to show tape motion of the program tape trans- port. If the string is moving left ("up") in the register, the tape is moving forward. If the string moves right ("down") in the register, the tape is moving backward. Another example is the blink- ing of bit 16 (LSB of the neon indicators) to in- dicate that the operational program has been loaded but has not yet been started ("initiated") in the corresponding computer. When bit 16 for each computer is flashing, the operator knows he can then initiate the multicomputer program. This is discussed in further detail in chapter 4 of Vol. 2. The fact that the program is running is indicated by a changing display. The 1 5 neon indicators across the top of the panel also provide a visual display of information which reflects the operation (proper or improper) of a particular computer, subsystem or peripheral device. They also provide computer reply indications for the SMP operator. Indications will vary, depending upon function and program involved, but in many cases can be interpreted easily in that they are intended to help the operator keep his place as he makes a series of entries. For instance, if three entries were required, the program might show a 00001, 00002, and 00003 prior to each entry. Or the program might show 00001, 00002, 00004, in which case the first bit represents the first entry, the second bit represents the second entry, etc. If computer addresses are involved, the display might be of the present address being referenced, or the next address to be referenced. Whatever the indication is, it usually means that a change to the contents is performed each time to mark when the manually entered data via the keyset portion of the SMP has been acted on by the computer. If the indications cannot be readily understood by the operator in terms of the task being performed, the Systems Operations Manual (SOM) for the operational program contains information on all SMP displays and operator entries. 225 DATA SYSTEMS TECHNICIAN 3 & 2, VOLUME 1 i The information displayed by these indicators is constantly updated by the operational program when it is running. The On Line toggle switch activates the monitoring panel controls for the associated computer and causes the computer maintenance panel controls to be disabled, provided that the Local/Remote indicator lamp on the computer maintenance panel has not been removed, and that the com- puter is not running on margins (chapter 4). The Bootstrap Start and Special Fault Jump switches correspond to the Auto Recovery switch (down and up positions respectively). The other indicators and switches correspond to the labeling and operations of the indicators and switches on the computer maintenance panel. COMPUTER SELECT DISPLAY COMMAND DISPLAY IDENTIFIER/CODE DISPLAY i 1 1 1 1 CLEAR WAIT XMIT 1 COMPUTER SELECT COMMAND IDENTIFIER/CODE CMPTR A OPER CONT TRAIN CONT INITIALIZE 7 RECEIVE 6 AMPLIFY 9 CMPTR B RECOVERY MODIFY PROS W/ DATA 4 SEND 5 RESUME 6 DATA OUTPUT DATA INPUT LOAD 1 STOP 2 CLE»R 3 TRANS DATA ALARM DISPLAY 124.469 Figure 5-53.— SMP keyset panel. The keyset panel and display indicators (fig. 5-53) are located immediately beneath the monitor control panels. This keyset keyboard is used in the same manner as the keyset previously described, except the labels are different. The Computer Select keys (4) determine which computer is to be referenced. One of the Computer Select keys must be the first entry. One of the eight Command keys must be the second entry. Any six of the Identifier/Code keys may be selected as the third button action, in which case the Identifier (as it is called) acts to modify the command (second input). The remaining five inputs could be a data code to be used in conjunction with the command/identifier by the designated computer, or they might be further identifiers, depending upon the program interpretation. The functions of the Command and Identifier/Code keys are dependent upon the installation requirements of the system program. The function of the Transmit and Clear buttons and the Wait indicator have previously been described. Note that there is no Error indicator on this keyset. Data entry errors are displayed in the neon indicators of the monitor control panel. The error display is usually 77777 8 (all bit indicators lighted), but this is a program function and may be changed. The keyset entry prior to transmission is displayed in the keyset display indicator panel above the keyboard. OPERATIONAL CHARACTERISTICS The SMP operates as a peripheral device in a computer system, and as such it must use external functions (from the computer) and interrupts (from the SMP) to transfer data. Data from the SMP are called Action Codes and contain the information entered at the keyset. Action Code format (fig. 5-54) is the same format (bit positions) as the data from any keyset, but again the labels are different. To transmit information from an operator to the computer, the information must first be entered into the keyset and displayed in the Identifier/Code displays (fig. 5-53). After it is verified and corrected, the Transmit button is depressed, and an interrupt signal is generated. This interrupt lights the Wait indicator and notifies the computer that data is on the lines to 226 Chapter 5-NTDS PERIPHERAL EQUIPMENT 29 28 | 27 26 | 25 | 24 23 | 22 | 21 20 19 18 | 17 16 15 14 13 12 11 | 10 | 09 1 08 07 | 06 | 05 | 04 03 | 02 ] 01 00 >- CL. CMPTR SELECT COMMAND IDENTIFIER CODE IDENTIFIER CODE IDENTIFIER CODE IDENTIFIER CODE IDENTIFIER CODE IDENTIFIER CODE 124.470 Figure 5-54.-SMP action code format. 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 cr o o Q Z ro cr o Q z CM cr o i— «t o Q Z cr o i— t Equipment Textbook Assignment: pages 48 through 59 Learning Objective: Recognize the basic principles of test equipment maintenance and test equipment safety precautions . 3-1. Electronic test equipment aids a DS technician in analyzing the performance of his assigned equipment by comparing the obtained measurements with standards established by the 1. commanding officer 2. Chief of Naval Material 3. equipment manufacturer 4 . type commander 3-2. Which of the following parts create magnetic fields which could contribute to errors in test equipment readings? 1. Transformers and generators 2 . Magnetrons 3. Heavy current conductors 4. All of the above Items 3-3 through 3-5 are to be judged True or False. 3-3. The advantage of test equipment which uses batteries for primary power is that no voltages of lethal potential exist. 3-4. When in doubt, the DS technician should consult equipment instruc- tion sheets when using measure- ment instruments that are calibrated for a particular job. 3-5. Normally, test probes not designed for a specific test equipment should not be used with that equipment. Learning Objective : Determine the use of the shorting bar on electronic test equipments and identify personnel safety precautions when making test measurements . 3-6. Which of the following character- istics does NOT apply to the Fluke Differential Voltmeter? 1. The ground post is connected directly to Earth ground potential whenever the line cord is properly mated with a properly grounded a.c. power receptacle 2. It is equipped with a two-wire line cord for shipboard use 3. It is equipped with a three-wire line cord for shipboard use 4. Personnel using this meter must check for conflicts in grounding before connecting the common side of the input to the ground binding post with the shorting bar 17 3-7, 3-8, What precedence is used when checking equipment equipped with a two-prong power cord with a differential voltmeter? A. Equipment is energized B. Test lead is connected to the equipment chassis C. The two-prong plug is reversed D. Voltmeter reads line voltage 1. 2. 3. 4. A, B, C, D A, C, B, D B, A, D, C A, D, C, B If no line voltage is measured after the equipment with a two-prong power cord has been energized, which of the following actions are carried out? Learning Objective : Recognize the basic application principles of test equipment . State the basic functions of a cathode-ray oscilloscope including the linear time base, nonlinear time base, synchronizing , and safety precautions used with this equipment. 3-11. Which of the following factors require that a DS technician be knowledgeable in the application of test equipment? 1. Faulty equipment repair 2. Preventive maintenance tasks 3. Placement of new equipment into operation 4. All of the above 3-12. Which of the following data would NOT be found in the Test Equipment Handbook of the EIMB? 3. 4. Check for defective test lead Connect the common and ground leads between the meter and the chassis of the equipment to be tested Make test measurements 2 and 3 above 3-9. Under which of the following conditions should the shorting bar NOT be connected to the common terminal when making equipment measurements? 1. When measuring any power line voltage 2. When measuring a.c. potentials having both sides of the line "hot" with respect to ground 3. When measuring voltages in an equipment having a B minus common ground line 4. All of the above 3«-10. Which of the following is NOT a good safety practice to follow when making test measurements on equipment? 1. Do not use test equipment known to be in poor condition 2. Use both hands only when servicing live equipment 3. Make sure you are not grounded when adjusting or measuring equipment 4. Use precaution when measuring voltages 3-13, 3-14, 1. Equipment installation standards 2. Personnel safety hazards 3. Data on specific test equipment models 4. Maintenance hints The electrostatic cathode-ray tube (CRT) employs (a) current , to deflect the electron voltage beam, while the electromagnetic CRT employs (bj current, voltage, for this purpose. resistance 1. (a) current (b) resistance 2. (a) current (b) voltage 3. (a) voltage (b) current 4. (a) voltage (b) resistance Which of the following functions is the electrostatic-deflection cathode-ray oscilloscope capable of displaying and/or performing? 1. Graphs of rapidly changing voltages 2. Data concerning frequency values, phase differences, and voltage amplitude 3. Localizing sources of distortion by tracing signals through electronic circuits and isolating troubles to particular stages 4. All of the above 18 3-15. Oscilloscopes are used to produce a graphical display of simple and complex voltage variations which contain frequency components ranging from 1. zero to 50 GHz 2. zero to 50 MHz 3. zero to 50 kHz 4. zero to 50 Hz Items 3-16 and 3-17 are to be judged True or False. 3-16. 3-17. 3-18, The plug- in unit of an oscillo- scope contains the power supplies, horizontal amplifier, sweep gen- erator, main vertical amplifier, CRT, calibrator, and the controls associated with these circuits. A multichannel plug-in unit of an oscilloscope provides two separate traces on the CRT which allows two functions to be displayed simul- taneously. The elapsed time or waveform dura- tion on an oscilloscope is repre- sented on the (aj vertical, horizontal axis in either whole or parts of a second, and the amplitude, quan- tity, or intensity of the waveform is represented on the (b) vertical, axis in either whole horizontal or parts of volts or amperes. 3-20. When analyzing and interpreting a waveform on the screen of a CRT, the signal is compared as a function of 1. another signal of known characteristics 2. another signal of unknown characteristics 3. horizontal deflection 4. vertical deflection 3-21. In most oscilloscope applications, the unknown signal is applied to the (a) axis. vertical, horizontal The (bj axis is vertical, horizontal used for known function, and the characteristics are usually (c) with respect linear, nonlinear to time. 1. (a) Vertical (b) Horizontal (c) Nonlinear 2. (a) Horizontal (b) Vertical (c) Nonlinear 3. (a) Vertical (b) Horizontal (c) Linear 4. (a) Horizontal (b) Vertical (c) Linear Items 3-22 and 3-23 are to be judged True or False. 1. (a) Horizontal (b) 2. (a) Horizontal (b) 3. (a) Vertical (b) 4. (a) Horizontal (b) horizontal 3-22, vertical vertical horizontal Item 3-19 is to be judged True or False. 3-19. Any portion of the waveform on an oscilloscope extending below the horizontal reference line is con- sidered positive, while any por- tion extending above the horizontal reference line is considered nega- tive. 3-23. One advantage of using a non- linear time base in the form of a sine wave is that it allows easy and accurate measurement of phase angles and frequency calibration of electronic equipment. To lock the oscilloscope sweep generator to the frequency of the test signal for synchronization, a portion of the test signal is applied to the input of the sweep generator. 19 3-24. For which, if any, of the follow- ing reasons should the oscillo- scope case NOT be removed when using or maintaining the oscillo- scope? 1. The case should always be removed 2. It could possibly expose volt- ages that could cause a fatal shock 3. It reduces shielding of the oscilloscope which could allow stray pickup from external fields to be ampli- fied and displayed on the scope 4 . Both 2 and 3 above Items 3-25 and 3-26 are to be judged True or False. Learning Objective : Recognize the basic construction, capabilities, operating principles 3 and the primary operating controls of the AN/USM-281A Oscilloscope. 3-30. In addition to displaying wave- forms, the AN/USM-281A Oscillo- scope is capable of accurately measuring which of the following? 1. Rise time and magnitude of a waveform 2. Time difference between any two points on a displayed waveform 3. Time comparison of two separate waveforms 4. All of the above 3-25. 3-26. 3-27, Extreme caution should be taken when handling a CRT, because undue stress or rough handling could cause the tube to implode. If a CRT is broken, contact should be avoided with the internal fluorescent coating as it is extremely toxic. When centering the electron beam (spot) of an oscilloscope, the intensity control should be turned Refer to figure 3-2 in the textbook while answering items 3-31 through 3-34, 1. 2. 3. 4. to a brightness which will prevent burning the screen coating counterclockwise clockwise off Items 3-28 and 3-29 are to be judged True or False. 3-28. The length of the ground lead can affect oscilloscope displays when checking radiof requency signals, because the inductive reactance factor of the ground lead may place the oscilloscope circuits above RF ground. 3-29. When dealing with circuits designed to operate above ground, it is imperative that the oscilloscope remain in its case. 3-31. Which of the following character- istics is NOT contained or pro- vided by the oscilloscope assembly of the AN/USM-281A Oscilloscope? 1. Circuitry for projecting a beam onto the CRT screen and the controls to adjust intensity, focus, and hori- zontal position of the beam on the CRT 2. A dual channel vertical amplifier containing circuitry for producing vertical deflection 3. A horizontal amplifier to amplify the selected time base signal and provide a linear deflection voltage to the horizontal plates of the CRT 4. The power switch, scale illumination control, and two calibrated output jacks 20 3-32 Which of the following controls is/are provided by the base and time delay generator of the AN/USM-281A Oscilloscope? 1. Front panel controls to provide a selection of four modes of operation; main sweep only, mixed sweep, delayed sweep, and single sweep 2. Controls for selecting automatic or triggered time base, trigger source, polarity, level, and frequency range 3. A calibrated ten-turn control for precise measurement of the delay time to the start of the delayed sweep 4. All of the above Which of the following observations is the dual channel vertical amplifier of the AN/USM-281A Oscilloscope capable of displaying? 1. Simultaneous viewing of two separate waveforms 2. Viewing one waveform on either of two channels 3. Both 1 and 2 above 4. Simultaneous viewing of the same waveform on both channels Item 3-34 is to be answered True or False. 3-33. Refer to figure 3-3 in the textbook while answering items 3-35 through 3-49. For items 3-35 through 3-37, match the function performed by the oscilloscope assembly of the AN/USM-281A Oscilloscope in column B with the primary operating control or switch which selects that function listed in column A. All responses in column B are not necessarily used. SWITCH B. FUNCTION 3-35. HORIZONTAL 1. Selects the POSITION internal time base 3-36. MAGNIFIER 2. Determines which 3-37. DISPLAY time base signal is applied to the horizontal amplifier Consists of two knobs, one for fine adjustment and the other for coarse adjustment Determines the gain of the horizontal amplifier and is used to expand the trace 3-34. The dual channel vertical amplifier of the AN/USM-281A Oscilloscope provides for ' combining two waveforms on one trace to produce the algebraic sum or difference of the two waveforms. 21 For items 3-38 through 3-40, match the function performed by the oscilloscope assembly of the AN/USM-281A Oscilloscope in column B with the primary operating control or switch which selects that function listed in column A. All responses in column B are not necessarily used. A. CONTROL/ SWITCH 3-38. EXT CAL 3-39. EXT SENS 3-40. A.c.-d.c. switch B. FUNCTION 1. Determines the type of coupling for an external signal 2. Determines the intensity of the electron beam 3. Connects the horizontal amplifier input to the EXT INPUT connector through a variable resistor 4. Connects the HORIZONTAL amplifier input to the EXT INPUT connector For items 3-41 through 3-4 3, match the function performed by the time base and delay generator of the AN/USM-281A Oscilloscope in column B with the control or switch which selects that function listed in column A. All responses in column B are not necessarily used. CONTROL/ ' SWITCH 3-41. SWEEP MODE 3-4 2. NORM 3-4 3. AUTO B. FUNCTION 1. Provides a sweep only when a trigger signal is present 2. Determines the type of main sweep operation 3. Provides only one sweep when triggered 4. Provides a free running sweep when no trigger is present or a triggered swe ep i f a trigger signal greater than 50 Hz is present 22 For items 3-44 through 3-46, match the function performed by the time base and delay generator of the AN/USM-2 81A Oscilloscope in column B with the control or switch which selects that function listed in column A. All responses in column B are not necessarily used. CONTROL/ * SWITCH CONTROL/ SWITCH B. FUNCTION 3-47. DISPLAY 3-44. TIME/DIV 1. Determines the voltage level 3-48. VOLTS/DIV 3-45. TRIGGER LEVEL of the input waveform at 3-49. VERTICAL 3-46. DELAY (DIV) which the main or delayed sweep will be triggered MAGNIFIER For items 3-4 7 through 3-4y, match the function performed by the dual channel vertical amplifier of the AN/USM-281A Oscilloscope in column B with the control or switch which selects that function listed in column A. All responses in column B are not necessarily used. B. FUNCTION Used with the main TIME/DIV switch to determine the delay time before the start of the delayed time base 1. Used to expand the vertical trace 2. Switches the polarity of the vertical display 3. Selects the type of vertical display to be used 4. Controls the calibrated input attenua- tion for both channel A and B amplifiers 3. Provides fine adjustments for the main and delayed sweep speeds 4. Selects the main sweep speed 23 Learning Objective : Using a functional block diagram along with the textbook, identify the functions of the various circuits of the AN/USM-281A Oscilloscope . Refer to figure 3-4 in the textbook while answering items 3-50 through 3-66. 3-50. Which of the following circuitry, contained in the oscilloscope assembly, has no relationship in producing intensity for the CRT? 1. Low voltage supply 2. Horizontal amplifier 3. High voltage supply 4. Gate amplifier 3-51. Which of the following circuitry is NOT used in producing internal horizontal deflection? 1. Horizontal amplifier 2. Internal trigger amplifier 3. Horizontal preamplifier 4. Main and delayed trigger generator 3-52. The horizontal amplifier section accepts an external or internal time base signal and (a) amplifies , the signal to the attenuates (b) current, voltage to produce the level required (c) horizontal displacement of the CRT vertical beam. 1. (a amplifies (b current (c vertical 2. (a attenuates (b, voltage (c 1 vertical 3. (a attenuates (b current (c horizontal 4. (a amplifies (b voltage (c horizontal 3-53. Which of the following functions does the output of the gate amplifier cause when applied to the control grid of the CRT? 1. The CRT beam to be cut off during retrace 2. The CRT beam to be cut off during switching when operating in dual channel chopped mode 3. Intensity modulation of the CRT beam is produced when a Z-AXIS input is applied 4. All of the above 3-54. The calibrator outputs are useful in adjusting and trouble- shooting the oscilloscope. Which of the following types of wave- form does it provide to the front-panel connector? 1 . Sine wave 2 . Sawtooth 3 . Square wave 4 . Any of the above Item 3-55 is to be judged True or False. 3-55. The main and delayed sweep and the main and delayed gate output amplifiers are double-stage, cathode-follower amplifiers that accept main sweep, main gate, delayed sweep, and delayed gate signals and provide a low impedance output to four rear- panel connectors. 3-56. What circuit in the dual channel vertical amplifier boosts the signal to the level necessary to drive the vertical deflection plates in the CRT? 1. Output amplifier 2 . Gate control 3. Sync amplifier 4. Channel A and/or B input amplifier 24 3-57. 3-58 3-59 Which of the following circuits provides the control signal to the gate control circuit to determine which vertical channel is displayed? 1. Blanking amplifier 2. Gate amplifier 3. Multivibrator 4. Calibrator In the two alternate modes of operation, the multivibrator is (a) and stable, unstable, bistable switches only when triggered by the time base triggering signal, causing the multivibrator to switch channels at (b) random the completion of each sweep 1. (a) stable (b) the completion of sweep each 2. (a) bistable (b) random 3. (a) unstable (b) random 4. (a) bistable (b) the completion of sweep each In the ALT B TRIGGER and CHOP B TRIGGER modes of operation, the (a] channel B, composite vertical signal is amplified by the sync amplifier and supplied to the (b] output amplifier, time base and delay generator 1. (a) composite vertical (b) output amplifier 2. (a) channel B (b) time base and delay generator 3. (a) channel B (b) output amplifier 4. (a) composite vertical (b) time base and delay generator 3-60. Which of the following statements is INCONSISTENT with the function of the main trigger generator and amplifier? 1. The main trigger generator may receive a trigger signal from an internal, external, or line source 2. The main sweep generator receives a sharp negative trigger pulse 3. While in the NORM or SINGLE mode, the main trigger generator produces a trigger output even though it receives no input trigger 4. The trigger generator produces a trigger output in the absence of an incoming signal when it is in the AUTO mode 3-61. When the main sweep generator receives a trigger from the main trigger generator and amplifier, it produces a (aj negative, positive rectangular gate pulse and a (bj going sawtooth negative, positive voltage. 1. (a) negative (b) positive 2. (a) negative (b) negative 3. (a) positive (b) negative 4. (a) positive (b) positive 3-62. The purpose of the sawtooth voltage produced by the main sweep generator is to 1. drive the vertical deflection plates 2. drive the horizontal deflection plates 3. attenuate the rectangular gate pulse 4. amplify the rectangular gate pulse 25 Item 3-6 3 is to be judged True or False. 3-6 3. The delayed trigger generator and amplifier section is designed to receive a signal from an internal, external, or AUTO source . 3-64. Which of the following functions is performed by the delayed trigger generator and amplifier when an internal or external signal source is selected? 1. It amplifies the incoming trigger signal 2. It compares the incoming trigger signal to the preset trigger level set by the delayed TRIGGER LEVEL control 3. It produces a sharp negative output pulse to the delayed sweep generator 4. All of the above Items 3-65 through 3-6 7 are to be judged True or False. 3-65. The delayed sweep output is applied through the sweep display switch to the horizontal amplifier in the MIXED, DELAYED, or AUTO sweep modes . 3-66. When an AUTO source is selected, the delayed sweep cycle is terminated when the sweep voltage reaches a predetermined level and switches the delayed trigger and amplifier section to the disabled gate condition. 3-67. The variable capacitance across the internal resistance of the probe used with the AN/USM-281A Oscilloscope must be adjusted in order to accurately measure high frequency signals or fast rising waveforms . 26 Assignment 4 Test Equipment Textbook Assignment: pages 60 through 78 Learning Objective : Identify the various uses and functions of the Multimeter AN/PSM-4. 4-1. What warning device is included with the high voltage probe of Multimeter AN/PSM-4 to indicate the presence of high voltages? 1. Buzzer 2. Circuit breaker 3. Fuse 4. Light 4-2. Which of the following measure- ments can be made directly with Multimeter AN/PSM-4? 1. Capacitance; 1 mfd 2. A.c. current; 150 milliamps 3. D.c. current; 5 amps 4. Frequency; 15 kHz 4-3. What is the maximum d.c. voltage that can be measured with Multimeter AN/PSM-4 and the high voltage probe? 1. 500 V 2. 1,000 V 3. 5,000 V 4. 10,000 V 4-4. Which of the following components is NOT in the d.c. voltmeter circuit when the red test lead is connected into the 1000 VDC jack? 1. Common jack 2. Function switch S-101 3. Range switch S-102 4 . Meter movement 4-5. Assume that the meter is set for measuring d.c. voltages in the 250-volt range. If range switch S-102 is then switched from the 250-volt position to the 500-volt position, what circuit change enables the meter movement to indicate d.c. voltages in the 500-volt range? 1. The connections to the meter movement are reversed 2. The resistance connected in series with the meter movement 3. The resistance connected in parallel with the meter movement 4. A different meter movement is selected 4-6. 4-7, What value of a.c. voltage is indicated by the meter? 1. Average 2 . Maximum 3. Peak-to-peak 4. Root-mean- square (rms) Range switch S-102 is NOT in the d.c. current circuit when the meter is set to measure 1. 1 - 100 yA 2. 1 - 10 mA 3. 100 - 1000 mA 4. 1 - 10 A 27 4-8. Multimeter AN/PSM-4 contains circuit adjustments which permit the meter to indicate a.c. and d.c, volts, d.c. currents, and resistances. Actually, the basic meter movement directly measures only 1. A.c. voltage 2. D.c. voltage 3. D.c. current 4. Resistance 4-9. What is the normal setting of function switch S-101 for measuring d.c. volts? 1. ACV 2. DIRECT 3. OUTPUT 4 . REVERSAL To answer items 4-10 through 4-13, select the proper test lead connections and switch positions in table 4-1 for making the measurement indicated in each item. Table 4-1. Test lead connections and switch positions for Multimeter AN/PSM-4, 4-10 65 - 75 mA, d.c. 4-11 4-13, A. Black test lead in COMMON B. Red test lead in +V MA OHMS C. Red test lead in +10 AMPS D. Red test lead in 1000 VDC E. High voltage probe in +5000 VDC F. S-101 at REVERSAL G. S-101 at DIRECT H. S-101 at ACV I. S-101 at OUTPUT J. S-101 at DC uA MA AMPS K. S-101 at R x 1 L. S-101 at R x 10 M. S-101 at R x 100 N. S-101 at R x 1000 0. S-101 at R x 10000 P. S-102 at 2.5V 100 pA Q. S-102 at 5 V 1 MA R. S-102 at 10 V 5 MA S. S-102 at 25 V 10 MA T. S-102 at 50 V 50 MA U. S-102 at 100 V 100 MA V. S-102 at 250 V 500 MA ; w. S-102 at 500 V 1000 MA/AMPS 4-14 1. A, B, G, T 2. A, B, G, M 3. A, B, J, U 4. A, C, J, V 5 - 10 ohms 1. A, B, K 2. A, B, 3. A, B, I, Q 4. B, D, N, P 4-12. 500 - 750 volts, d.c, 1. A, B, F, w 2. A, D, G 3. A, D, H 4. A, E, H 10 - 12 volts, a.c. (a.c. voltage portion of mixed a.c. and d.c. voltages) 1. A, B, G, R 2. A, B, L, S 3. A, B, H, S 4. A, B, I, S The zero ohms adjustment on Multimeter AN/PSM-4 is made by 1. shorting the test leads together and turning the ZERO OHMS control until the meter reads zero ohms 2. turning the ZERO OHMS control until the meter reads zero ohms before touching the test leads to anything 3. placing a standard resistor between the test leads and turning the ZERO OHMS control until the -meter reads zero ohms 4. placing the resistor to be measured between the test leads and turning the ZERO OHMS control until the meter reads zero ohms 28 Learning Objective : Recognize the capabilities , uses, advantages , and functions of the Electronic Multimeter AN/USM-116C. 4-15. Electronic voltmeters such as the AN/USM-116C have a characteristic high input impedance. A signifi- cant advantage of this feature is that it enables an operator to 1. make current measurements without inserting the meter into the circuit 2. make a.c. voltage measurements that are practically indepen- dent of the frequency of the voltage 3. make voltage measurements without adding an appreciable load to the circuit 4. measure d.c. voltages in the range of .01 to 1.0 volts and currents in the range of 20 to 200 microamperes For items 4-16 through 4-19, associate the function performed by the AN/USM-116C Electronic Multimeter given in column B with the switch that selects that function listed in column A. Responses in column B are used only once. A. SWITCH B. FUNCTION 1. 4- ■16. FUNCTION 1. The black knob SELECTOR serves to balance the multimeter 2. 4- -17. RANGE SELECTOR for proper accuracy when measuring d.c. 4- -18. Blue OHMS volts, a.c. volts, scale and ohms and the red knob permits 3. 4- -19. ZERO ADJ secondary adjust- ment of the low a.c. voltage ranges 4. 4-20. What measurement requires a probe with a diode inside it? 1. A.c. volts 2. D.c. volts 3. D.c. current 4. Resistance Item 4-21 is to be judged True or False. 4-21. The meter movement is connected across a balanced bridge circuit so that it measures the amount of unbalance in the bridge caused by the voltage that is being measured. 4-22. What section does NOT make use of the bridge circuit? 1. A.c. voltmeter 2. D.c. voltmeter 3. Milliammeter 4. Ohmmeter Learning Objective : Specify the various uses, capabilities , advantages , and functions of the Model 803D Differential Voltmeter. 4-23. For which of the following functions is the Model 803D Differential Voltmeter used? Highly accurate measurements of a.c. voltages from 0.001 to 500 volts Highly accurate measurements of d.c. voltages from zero to 500 volts (or up to 30,000 volts using the precision voltage dividers) Comparison of an unknown voltage with an internal reference voltage and indication of the difference in their values All of the above 2. Determines the type of measure- ment to be made 3. Determines the desired range of a particular measurement 4-24. The Model 803D Differential Voltmeter can be used as a 1. vacuum tube voltmeter (vtvm) 2. precision potentiometer 3. megohmmeter for measurement of high resistance 4. meter for all the above Used for all resistance measurements 29 Item 4-25 is to be judged True or False, 4-25. An advantage of the Model 803D Differential Voltmeter is that it will not load the circuit under test once a balance (null) condition has been reached. For items 4-26 through 4-29, associate the function performed in column B with the Model 803D Differential Voltmeter control or switch listed in column A. Responses in column B are used only once . 4-30. When using the Model 803D for d.c. differential voltmeter operation, a (a) minute warmup period two, ten should be allowed so the meter components will stabilize and the internal 500 volt reference supply should be adjusted for (b) zero, def] .ection. maximum 1. (a) ten (b) maximum 2. (a) two (b) zero 3. (a) ten (b) zero 4. (a) two (b) maximum 4-26, 4-27. 4-28. 4-29, . CONTROL/ SWITCH B. FUNCTION CALIBRATE 1. Set to the vtvm control position for determining the RANGE approximate switch value of unknown voltage prior NULL to differential switch measurements A, B, C, D, and E voltage readout dials 2. Used with the OPERATE/CALIBRATE switch to vary the output of the 500 volt d.c. reference supply 3. Provides an in-line readout of the amount of internal refer- ence voltage necessary to null the unknown voltage 4. Selects the desired voltage range or an A.C. NULL MULTIPLIER Information for items 4-31 and 4-32. The Model 803D is set for d.c. differential voltmeter operation and the internal 500 volt reference supply has been adjusted for meter deflection. The NULL switch is in the vtvm position and the RANGE switch has been set to allow an on-scale reading. 4-31. The approximate value of the unknown voltage is indicated on the upper meter scale as 450 volts. Which decimal light will be illuminated? 1. Above dial A 2. Between dial A and B 3. Between dial B and C 4. Between dial C and D Items 4-32 and 4-3 3 are to be judged True or False. 4-32. Refer to table 3-1 in the text- book. When the NULL switch is successively set to more sensitive null ranges, the voltage readout dials are adjusted for zero meter deflection in each null position and the measured voltage is read directly from the five voltage readout dials. 30 4-33. For a.c. measurements, the Model 803D operates essentially the same as for approximate and accurate d.c. measurements, after the a.c. input voltage has been converted to a d.c. voltage by the a.c. to d.c. converter. Refer to figure 3-16 in the textbook while answering items 4-34 through 4-38. For items 4-34 through 4-36, associate the functions which take place in the d.c. vacuum tube voltmeter given in column B with the device or network in the vtvm listed in column A which performs these specific tasks. All responses in column B are not necessarily used. 4-34, 4-35. 4-36. , DEVICE/ NETWORK Null detector D.c. attenuator Meter B. FUNCTION 1. Uses the taut- band suspension principle 2. Modulates, amplifies , rectifies, and filters the d.c. signal input to produce a d.c. output 3. Loads the circuit being tested, once a balance (null) condition has been reached 4. Reduces the voltage span of each range to a common usable range 4-37. Which of the following functions of the Model 803D zero to 500 volt d.c. reference supply is INCONSISTENT with its operation? 1. The output of the 500 volt power supply is applied directly to the attenuator for the 500 volt d.c. range, while in the 50, 5, and 0.5 volt d.c. range, the range divider reduces the voltage to 50, 5, and 0.5 volts before it is applied to the attenuator 2. For any a.c. range, the range divider always reduces the voltage to 50 volts 3. The attenuator divides its input voltage (500, 50, 5, or 0.5 volts) into 50,000 equal increments, any number of which may be selected by setting the five decades with the voltage readout dials 4. The primary reference is a battery used to calibrate the 500 volt supply 31 4-38. Which of the following character- 4-41. istics of the a.c. to d.c. con- verter circuits of the Model 80 3D is INCONSISTENT with its operation? 1. The attenuator is used to reduce the a.c. input voltage by a factor of 10 or 100, as required to restrict the operational amplifier input 4-42. to 5 volts maximum for full scale inputs of 50 and 500 volts respectively 2. The operational amplifier contains three resistance- capacitance coupled amplifier stages with high positive feedback, which is used to make the rectification characteristics of the diode linear and stable 4-43. 3. The pulsating d.c. produced by the rectifier is filtered to obtain a d.c. voltage that is proportional to the average value of the a.c. input voltage 4. A diode in the rectifier- filter circuit is used to convert the unknown a.c. 4-44. into pulsating d.c. Learning Objective: Describe the use and operation of the AN/USM-207 Electronic Counter. What is the standard output fre- quency of the Radio Frequency Oscillator 0-1267/USM-207? 1. 1 MHz 2. 10 MHz 3. 10 kHz 4. 100 kHz Which of the following operations requires the use of the Radio Frequency Oscillator 0-1267/USM- 20 7 when an external standard signal is not applied? 1. Totalizing 2. Time interval 3. Period of cyclic signal 4. Frequency ratio Which of the following frequencies may be used as an external standard input to the AN/USM-207? 1. 1 MHz or 10 MHz 2. 100 kHz or 1 MHz 3. 10 kHz or 100 kHz 4. 1 kHz or 10 kHz In what frequency range does the Electronic Frequency Converter CV-1921/USM-207 permit the measurement of signals with a greater sensitivity than is pos- sible with the basic counter? 4-39. Which of the following frequencies is a standard output signal of the AN/USM-20 7 electronic counter? 1. 15 kHz 2. 200 kHz 3. 1000 kHz 4. 5 kHz 4-40. With an input frequency of 800 kHz to the AN/USM-20 7, which of the following frequencies is available as an output frequency? 1. 10 Hz 2. 2 Hz 3. 8 Hz 4. 4 Hz 1. 100 MHz to 500 MHz 2. 35 MHz to 100 MHz 3. Hz to 500 MHz 4. Hz to 35 MHz 32 For items 4-45 through 4-48, associate the functions performed by the front panel controls of the AN/USM-207 given in column B with the switch or device that selects that function listed in column A. Responses in column B are used only once. For items 4-49 through 4-51, associate the functions performed by the front panel controls of the AN/USM-207 given in column B with the switch that selects that function listed in column A. All responses in column B are not necessarily used. SWITCH/ DEVICE B. FUNCTION 4- -45. FREQ. A L. Indicates in input green when the connector signal applied to the converter 4- -46. SENSITIVITY INPUT connector switch is sufficient to provide a 4- -47. LEVEL meter valid digital readout and 4- -48. FREQUENCY indicates in red TUNING-MC when the input switch signal is insuf- ficient or questionable , incorrectly attenuated, or the mixed frequen cy is incorrect Selects a mixing frequency for heterodyne frequency measurement Selects source of input signal in frequency, frequency ratio, and totalizing modes of operation 4-49, 4-50. 4-51, A. SWITCH STD FREQ OUT switch (red) STBY position of POWER switch STD FREQ OUT switch (black) B. FUNCTION 1. Selects measure- ment or scaling mode of operation in conjunction with positions of SENSITIVITY switch and time base switch 2. Selects the frequency ratio measurement in the 10 8 position when used with the FUNCTION switch 3. Selects the frequency that appears at the SCALE OUT connec- tor on the rear panel 4. Energizes the radiofrequency oscillator Accepts an external signal for frequency and frequency ratio measurements , totalizing, and obtaining scaled outputs 33 4-52. 4-53. 4-54, 4-55. 4-56, What is the input frequency range of the AN/USM-20 7 when the Elec- tronic Frequency Converter CV-1921/USM-20 7 is installed? 1. 100 MHz to 500 MHz 2. 35 MHz to 100 MHz 3. 1 Hz to 500 MHz 4. 1 Hz to 100 MHz What is the output frequency range of the Electronic Frequency Con- verter CV-19 21/USM-20 7? 1. 35 MHz to 100 MHz 2. 5 MHz to 100 MHz 3. 1 MHz to 10 MHz 4. Hz to 100 MHz What is the input frequency range of the Electronic Frequency Con- verter CV-1921/USM-207 when used for frequency conversion? 1. 100 MHz to 500 MHz 2. 35 MHz to 100 MHz 3. Hz to 500 MHz 4. Hz to 35 MHz Precision timing signals in the AN/USM-20 7 are provided by the 1. scaler 2. gate control 3. "A" amplifier 4. 1 MHz and 10 MHz multiplier Which of the following functional sections of the AN/USM-207 divides the standard frequencies for use in other sections? 1. Scaler 2. Gate control 3. Electronic Frequency Converter CV-1921/USM-207 4. 1 MHz to 10 MHz multiplier Learning Objective : Specify the purpose and methods of testing semiconductor devices . Item 4-58 is to be judged True of False. 4-58. 4-59. 4-60, Transistors are capable of operating in excess of 30,000 hours at maximum rating without failure and are often soldered in the circuit in much the same manner as resistors and capacitors . While testing a semiconductor, it is determined that the for- ward resistance value is 40 ohms . The diode may be con- sidered good if the back resistance is 1. more than 400 ohms 2 . more than 4 ohms 3. less than 400 ohms 4. less than 4 ohms When diode feren is in test large testing a semiconductor with an ohmmeter, a dif- t resistance measurement dicated when the ohmmeter leads are reversed. The r value is called (a) negative, resistance and the smaller back value is called (bj positive, forward resistance . 1. (a) back 2. (a) negative 3. (a) back 4. (a) negative (b) positive (b) positive (b) forward (b) forward 4-57. Which of the following functional sections of the AN/USM-20 7 controls the counting time of the count decades? Scaler Gate control "C" amplifier "A" amplifier 34 Figure 4-1. Characteristic oscilloscope curves 4-61. Which of the characteristic oscilloscope curves in figure 4-1 represents a normal diode? 1. A 2. B 3. C 4. D 4-62. Which of the characteristic curves in figure 4-1 represents a normal zener diode? 1. A • 2. B 3. C 4. D 4-6 3. Under which of the following conditions may a transistor be removed from or inserted into an electronic circuit? 4-64, 4-65, Transistor circuits, other than pulse and power amplifier stages, are usually biased so that the emitter current is from (a) 0.5 to 3, milliamperes and the 3 to 15 collector voltage is from (b) 3 to 15, volts. 30 to 150 1. (a) 0.5 to 3 (b) 30 to 150 2. (a) 3 to 15 (b) 30 to 150 3. (a) 0.5 to 3 (b) 3 to 15 4. (a) 3 to 15 (b) 3 to 15 Which of the following forward to back resistance ratios, (a) C to B, (b) B to E, and (c) E to C, would indicate a normal transis- tor? 1. 2. After all power has been removed from the circuit After jumpers have been placed between the transistor leads and ground Any time necessary Only when there is no input signal applied to the circuit 1. (a) 500:1 (b) 500:1 (c) 1:1 2. (a) 500:1 (b) 500:1 (c) 500:1 3. (a) 450:1 (b) 1:1 (c) 500:1 4. (a) 500:1 (b) 500:1 (c) 480:1 35 Learning Objective: Describe the use and operation of Semiconductor Test Set AN/USM-206A. 4-66. Which of the following transistor parameters are tested with the AN/USM-206A? 1. Collector leakage, cutoff frequency 2. Collector leakage, maximum power dissipation 3. Collector leakage, transistor current gain 4. Emitter to base reverse voltage, transistor current gain 4-67. In addition to the test made by the AN/USM-206A in the previous item, which of the following measurements is the set capable of testing? 1. Resistance appearing at the electrodes 2. Shorted or open diodes 3. Forward transconductance of field effect transistors 4. All of the above 4-68. When testing a transistor in the AN/USM-206A, which of the following is set to the type of transistor being tested? 1. BETA CAL control 2. FUNCTION switch 3 . METER 4. PNP/NPN switch 4-69. While testing a transistor, when is the BETA XI position of SI used? 4-70, 4-71, 4-72 4-73. When will the best accuracy on the BETA X10 scale be obtained while testing a transistor on the AN/USM-206A? When the OHMS than 50 ohms When the OHMS than 50 ohms When the OHMS than 300 ohms When the OHMS than 300 ohms E-B is less E-B is greater E-B is less E-B is greater While testing an in-circuit diode with the AN/USM-206A, the meter pointer deflects up-scale past the mid-scale point. What does this indicate? 1. The circuit impedance is over 2 5 ohms 2. The diode is normal 3. The diode is open 4. The PNP/NPN switch is in the NPN position The following current measure- ments were taken from the tips of four soldering irons to ground. Which iron is acceptable for use on transistorized circuits? 1. Iron #1, microamperes 2. Iron #2, 100 microamperes 3. Iron #3, 500 microamperes 4. Iron #4, 1 milliampere The following measurements were taken in the test circuits of four ohmmeter ranges. Which range is acceptable for use on transistorized circuits? 1. When the beta is 10 or less 2. When the beta is 10 or greater 3. When the meter reads in the red box on the top scale 4. When the meter reads full scale on the top scale 1. R x 1, 150 milliamperes 2. R x 10, 15 milliamperes 3. R x Ik, 2.25 milliamperes 4. R x 10k, 0.225 milliamperes 36 Assignment 5 NTDS Unit Computer Textbook Assignment: pages 79 through 102 Learning Objective: Recognize the basic functions and characteristics of the Digital Data Computer CP-642B/USQ- 20 (V) and specify the purpose of the various front panel controls . 5-1. Refer to figure 4-1 in the text- book. Which of the following chassis assignments is INCONSIS- TENT with the Digital Data Computer CP-642B/USQ-20 (V) ? 1. Input/output chassis - Al through A4 2. Logic (control and arithmetic) chassis - A5 through A7 3. Thin-film memory chassis - A8 4. Core memory chassis - A9 through A14 5-2. Which of the following is NOT a functional section of the CP-642B? 1. Control 2. Arithmetic 3. Card read/punch 4 . Memory 5-3. The input/output section of the CP-642B can communicate on (a) 5-4. The CP-642B has a valid repertoire of (a) flexible single address 62, 80 instructions that may be modified by (b) index registers. 7, 16 1. (a) 62 (b) 16 2. (a) 80 (b) 16 3. (a) 62 (b) 7 4. (a) 80 (b) 7 5-5. Which of the following character- istics of the CP-642B maintenance and control console is INCONSIS- TENT with its operation? 1. It permits manual initiation of various operations 2. It displays an operational status of peripheral equipment 3. It requires no monitoring during normal operation 4. It displays a detailed report of the internal status of the computer 16, 32 I/O channels with provisions for (bj speed inter- high, low, high or low face with all I/O transfers in parallel. 1. (a) 16 (b) high or low 2. (a) 32 (b) high or low 3. (a) 16 (b) high 4. (a) 32 (b) low 37 For items 5-6 through 5-9, match the function performed by the mode of operation given in column B with the mode switch listed in column A. Responses in column B are used only once B. OPERATION Allows the computer to execute one instruction at a time (usually for program debugging) Allows the computer to be operated on a one clock phase at a time basis Allows the computer to operate at normal high speed A. SWITCH 5-6. Load 5-7. PHASE STEP 5-8. OP STEP 5-9. RUN For items 5-13 through 5-15, match the function performed by the various switches or indicators given in column B with the switch or indicator listed in column A. All responses in column B are not necessarily used. 5-13. 5-14, 5-15, A. SWITCH MASTER CLEAR pushbutton LOCAL CONTROL indicator RUN indicator B. FUNCTION 1. Glows green when the computer is in high-speed operation 2. Will reset most of the flip-flops in the computer, including the register indica- tors, when the computer is not in the RUN mode Locks out all interrupts and places the computer in a condition for initial program loading from a selected peripheral device For items 5-10 through 5-12, match the function performed by the various switches given in column B with the switch listed in column A. All responses in column B are not necessarily used. A. SWITCH B. FUNCTION 5- ■10. STOP switch 1. Selects the boot- strap program 5- ■11. PHASE REPEAT switch which will be executed during manual initiation in the LOAD mode 5- ■12. AUTOMATIC RECOVERY 2. Directs the switch computer' s activity after a program fault Active only if the PHASE STEP mode has been selected 5-16, When lighted, it indicates that the computer is being operated from the maintenance panel Used to vary the speed of opera- tion when the computer is in the PHASE STEP or OP STEP modes and the START- STEP/RESTART switch is in the up position The (a] C register rotary two , four switches allow switching between (b) C registers and the four, eight C register indicator-switches. 1. (a) four (b) eight 2. (a) two (b) eight 3. (a) four (b) four 4. (a) two (b) four When operated, disables the high-speed operation of the computer 38 5-17. Which of the following labeled register indicator-switches display the bit positions of the associated register? 1. K3, K2, C, and R 2. B, S, Q, and A 3. D, X, Z, and U 4. All of the above 5-18. How are the designator indicator- switches useful to a technician troubleshooting the CP-642B computer? 1. Faulty peripheral equipment is indicated 2. If an overtemperature condition prevails, the OVER TEMP WARNING is lighted 3. A timing point in a predetermined sequence of events is specified 4. All of the above 5-19. Which of the following is NOT an ACTIVE SEQ used to denote the sequence currently being performed? 1. Af 2. Bf 3. Cf 4. I/O 5-20. The g designator is used 1. to specify which master clock phase is currently active 2. with a repeat instruction to specify how the operation is to be repeated 3. to specify the channel number for external function acknowledges and output data acknowledges 4. for extended arithmetic operations 5-21. Refer to figure 4-2 in the textbook. There are a total of (a) I/O channels and 16, 17, 18 (b) I/O control signals from ^T"8 flip-flops that specify a particular function on the indicated channel. For items 5-22 through 5-24, match the functxons performed by the I/O indicator- switches given in column B with the indicators listed in column A. All responses in column B are not necessarily used. A. INDICATORS 5-22. MN PRI indicators 5-2 3. SUB PRI indicators 5-24. TRANS (I/O translator] indicators B. FUNCTIONS 1. When set, indicates that the A final sequence has been enabled 2. Provide a visual indica- tion of the current I/O operating mode 3. Determine the operating mode (input or output) of the I/O section 4. Indicate which channel on which chassis has precedence 5-25. Which of the following actions is INCONSISTENT with the operation of the disconnect circuit and its three associated switches? 1. The ADV P switch inhibits the incrementing of the P register 2. The B7 switch inhibits decrementing the B7 register during the repeat mode of operation 3. The RTC switch inhibits incrementing the real-time clock 4. None of the above Items 5-26 and 5-27 are to be judged True or False. 5-26. The three selective jump switches allow automatic selection or omission of predetermined program sections in conjunction with the 61 or 65 instructions . 1. (a) 16 (b) 8 2. (a) 18 (b) 4 3. (a) 16 (b) 4 4. (a) 17 (b) 8 39 5-27. The selective stop switches allow program monitoring when used in conjunction with appropriate 61 and 65 instructions. 5-28. How many red stop indicators will normally glow at the end of a subroutine when some action is required by the operator, such as supplying additional data required for the solution of the problem? 1. One 2. Two 3. Three 4 . Four Learning Objective : Identify the basic instructions contained in a computer program including terms, symbols , and word formats. 5-29. What is the purpose of the large repertoire of instructions listed in table 4-2 in the textbook? 1. It provides the means for directing the computer to perform the mathematical operations involved in solving problems in real-time 2. It is used to instruct the computer to perform the data processing necessary for initiating and maintaining communications between, or control of, compatible external equipment 3. It provides the computer with constants, decision-making capabilities, and an I/O capability 4 . All of the above For items 5-30 through 5-33, associate the term or symbol meaning given in column B with the term or symbol listed in column A. Responses in column B are used only once. TERM MEANING 5-30 5-31, 5-32. 5-33, ^ Symbol a (a) (a)i 1. The initial content of a 2. The content of a 3. Any register or memory location 4. "means" or "implies that" For items 5-34 through 5-37, associate the term or symbol meaning given in column B with the term or symbol listed in column A. Meanings in column B are used only once. TERM 5-34. (a) n 5-35. °L 5-36. Operand 5-37. y (lower case) B. MEANING 1. The lower 15-bits of a 2. The n th bit of the content of a 3. Operand designator - lower 15-bits of the instruction word - U. 4. That which is operated upon 40 For items 5-38 through 5-40, associate the term or symbol meaning given in column B with the term or symbol listed in column A. All responses in column B are not necessarily used. 5-38, 5-39, TERM Y (upper case) 5-40. LY (a) B. MEANING 1. The operand (regardless of source) 2. The contents of memory address Y 3. The logical product of Y and the contents of a register or memory location 4. Address of the operand - usually formed by y + (index register) 5-41. An instruction word for the CP-642B computer is made up of parts called (a) bits, and each of these designators specify a (b) general, particular function for the computer to perform for that specific instruction. -43. A. DESIGNATOR 5- Designator f 5- -44. Designator j , 5- -45. Designator k, 5- -46. Designator b Refer to table 4-3 in the textbook. For items 5-43 through 5-46, match the designator interpretation given in column B with the designator listed in column A. Responses in column B are used only once. B. INTERPRETATION 1. Specifies which B regis- ter, if any, will be used to modify the y operand designator (same for Format I and Format II) 2. Specifies for the function code exactly where the operand will come from before, and/or where it will be stored after the in- struction is executed, and whether it is 15- or 30-bits in length (same for Format I and Format II) 1. (a) bits (b) particular 2. (a) designators (b) particular 3. (a) bits (b) general 4. (a) designators (b) general 5-42. The CP-642B computer uses a fixed instruction word length of (_a) divided 15-bits, 30-bits into (b) designators. three, five 1. (a) 15-bits (b) three 2. (a) 15-bits (b) five 3. (a) 30-bits (b) five 4. (a) 30-bits (b) three Specifies the general opera- tion to be performed by the computer (same for Format I and Format II) Used for jump or skip opera- tions, index register specifications , and repeat status inter- pretations for Format I and specifies the I/O channel number for Format II 41 Learning Objective : Identify the primary signal transfer paths between the control section, arithmetic section, input/output section, and memory section using the block diagram shown in textbook figure 4-3. 5-51. 5-47. 5-48. 5-49 5-50 5-52, What section of the CP-642B com- puter obtains instruction words and operands from the memory section, directs arithmetic functions, and makes certain decisions? 1 . Memory 2. Input/output 3. Control 4. Arithmetic Which of the following operations is performed by the arithmetic section? 1. Timing of computer operations 2. Location of stored information 3. Initiation of instructions 5-53. 4. Logic operations specified by the instruction word Data used during an arithmetic operation is stored in what section? 1. Memory 2 . Input/output 3. Control 4. Arithmetic (in registers) The I/O section contains a priority system for channel activation, allowing the (aj numbered channel lowest, highest the highest priority and a sub- priority dependent upon the function to be performed in (bj order an ascending, a descending of priority; real-time clock, external interrupt, external function, output data, and input data. 1. (a) Lowest 2. (a) Highest 3. (a) Highest 4. (a) Lowest (b) descending (b) ascending (b) descending (b) ascending In what section are programs stored? 1. Input/output 2 . Memory 3. Control 4 . Arithmetic The storage locations of the CP-642B computer contain (a) 32,6 72,* __ available addresses out 32,768 of the main memory, (b) 56, 64 addresses for the control memory, and (c) addresses for the 32, 64 selected bootstrap memory. 1. (a) 32,672 (b) 64 (c) 32 2. (a) 32,768 (b) 56 (c) 32 3. (a) 32,672 (b) 64 (c) 64 4. (a) 32,768 (b) 56 (c) 64 The bootstrap memory is one which is 1. hardwired by the manufacturer into the computer circuitry 2. fed into the computer memory by a peripheral device 3. loaded manually into the computer memory and consists of a subroutine which may be used many times 4. loaded manually into the computer memory and comprises the main body of instructions 5-54. Which of the following operations can NOT be performed with boot- strap memory? 1. Retention of numerical constants 2. Retention of instructions 3. Bootstrap memory storage 4. Main memory or control memory storage 42 Learning Objective : Specify the various operations performed by the control section of the CP-642B computer while referring to the functional block diagram shown in textbook figure 4-4. 5-55. Which of the following actions is INCONSISTENT with manual operation of the control section? 1. The control section supplies timing, translation, and sequencing required for all computer functions 2. Lighted indicators are kept under surveillance to isolate possible logic malfunctions 3. The computer performs instruc- tions of an entire program at a high rate of speed, stopping only at programmed stops 4. Circuit conditions are controlled by the use of pushbutton switch-indicators and control switches 5-5! 5-56, 5-57, Which register in the control section holds the instruction that is presently being executed after receiving its input from the memory data register (Z)? 1. U 2. R 3. P 4. B What is the octal value of f if bits 2 28 , 2 27 , and 2 25 are set (1) and bits 2 29 , 2 26 , and 2 24 are clear (0)? 1. 011010 2. 282725 3. 32 4. 23 5-59, 5-60. Which of the following statements is INCONSISTENT concerning instruction word translation and interpretation? 1. Translation of the branch condition designator j works in the same manner as the f code translator and produces enables to appropriate circuits throughout the computer 2. The k translator translates for the value of the k designator and combines this value with values of f to provide specific function translation 3. The b designator specifies which of the seven B registers (addresses in the control memory) is used for indexing and incrementing or indexing and decrementing 4. The operand address designa- tor y is the upper 15 bits of the instruction word stored in U For store instructions, what term specifies the memory location for storage when k= 1, 2, 3, 5, 6, or 7? 1. y - Bb 2. Y + Bb 3. y + Bb 4. Y - Bb What three values of k are NOT used for replace instructions? 1. 2. 3. 4. 1, 2, and 3 4 , 5 , and 6 0, 4, and 7 2 , 4 , and 6 43 5-61. Which register and its associated translator select the specific memory address? 1. S 2. R 3. P 4. B 5-66. The sequence control consists of (a) flip-flops which six, eight includes an enable flip-flop that allows operation to (b) begin , stop and recycle if certain conditions exist. 5-62. Refer to figure 4-5 in the text- book. What is the approximate L (low) time of each clock phase within the master clock period? 1. 680 nanoseconds (ns) 2. 340 ns 3. 170 ns 4. 130 ns (measured at the 50% amplitude points of the clock phase waveform) Item 5-63 is to be judged True or False. 5-63. Computer controls can be inhibited from a remote control panel as well as by the console controls. 5-64. The initial main timing (MTi) consists of (a) flip-flops and 6, 12 when operating with Ai enables from (bj sequence control, command the next instruction is enables read from the selected memory address and placed in U. 1. (a) 6 (b) command enables 2. (a) 6 (b) sequence control 3. (a) 12 (b) command enables 4. (a) 12 (b) sequence control 5-65. Which of the following functions is NOT characteristic of final main timing (MTf)? 1. It operates with enables from sequence control 2. It provides timing for the store portion of replace and return jump instructions 3. It provides timing for miscellaneous functions of instructions 4. It generates command enables to allow sequential control of computer operation 1. (a) eight (b) begin 2. (a) eight (b) stop 3. (a) six (b) begin 4. (a) six (b) stop For items 5-67 through 5-70, associate the function performed by sequence control given in column B with the sequence listed in column A for automatic operation of the computer. Responses in column B are used only once. A. SEQUENCE B. FUNCTION 5- ■67. MT with A 1. Provides timing to perform the 5- ■68. MT with B arithmetic and logical func- 5- ■69. C sequence tions specified by the current 5- ■70. MT with D instruction 2. Performs the store functions for certain store instruc- tions 3. Reads the next instruction and performs preliminary operation modification 4. Obtains the operand and initiates arithmetic functions 44 5-71. Which of the following subse- quences are initiated by the C sequence to perform the function indicated? 1. Read Y (obtain specified operand) 2. Store Y (control the store function) 3. Interchange AQ (controls interchange of contents of A and Q) 4. All of the above 5-72. Which of the following functions of the control adder is INCONSISTENT with its usage? 1. Normal adder operation allows end-around carries to produce a counter circuit 2. During adder operations (+1) + (-1) = +1 3. The control adder is used with the registers of the control section 4 . During counter operations (+1) + (-1) = +0 5-73. The program address register P is used to (a_) the read, store address of the memory location to be referenced and through the use of the (b) register and the R, S control adder, the contents of P are incremented to provide successive memory addressing. 1. (a) read (b) R 2. (a) store (b) R 3. (a) read (b) S 4. (a) store (b) S 5-74. Which of the following character- istics of the control register B is INCONSISTENT with its operation? 1. It is used to increment the contents of P through the use of the SET B = +1 command 2 . It functions through the control adder as an adder input register to update the contents of UL 3. It works in conjunction with and serves the same basic purpose as the seven B registers contained in the memory section 4. It functions through the control adder as an adder input register to update the contents of Z 5-75. Inputs to the R register are from (_a) the P, the Z, either the P register with an output to or Z the control adder for modifica- tion by the contents of the (b) register. B, U 1. (a) P (b) B 2. (a) Z (b) U 3. (a) either the P or Z (b) B 4. (a) either the P or Z (b) U 45 Assignment 6 NTDS Unit Computer Textbook Assignment: pages 103 through 124 Learning Objective : Identify the various operations performed by the arithmetic section of the CP-642B computer while referring to the functional block diagram shown in textbook figure 4-6. 6-1. Which of the following sequences from the control section primarily commands the arithmetic section functions? 1. D 2. C 3. B 4. A 6-2. For positive numbers to be manipu- lated, the sign bit (bit 29) is (a) , for negative clear (0) , set (1) numbers the sign bit is (b) , clear, set and for square root operations no sign bit is used and the entire 30-bits are treated as a (c) negative, number . po sitive 1. (a clear (0) (b set (c positive 2. (a 1 set (1) (b clear (c positive 3. (a clear (0) (b set (c negative 4. (a set (1) (b clear (c negative 6-3. Which of the following functions take place in the A register (accumulator) ? 1. It holds the augend prior to and the sum after the add operation 2. it performs the ADD Q and the SUBTRACT Q operations 3. It holds the minuend prior to and the difference after the subtract operation 4. 1 and 3 above 6-4. Which arithmetic section register holds the addend or subtrahend during add or subtract operations? 1. A 2. D 3. W 4. X 6-5. Arrange the information given below in the sequence in which it occurs in the arithmetic section registers. A. X and D are combined B. A is transferred to X C. X and D result is transferred to A D. Augend and addend are contained in A and D respectively 1. A, B, C, and D 2. D, C, B, and A 3. D, B, A, and C 4. C, A, D, and B 46 Which of the following registers are combined to hold the product after multiplication operations or to hold the dividend prior to division operations? 1. A and X 2. Q and W 3. A and Q 4. A and W Which of the following character- istics of the arithmetic section is INCONSISTENT with the selector and register functions? 1. The K registers (Kl, K2, K3) function as a shift counter for all arithmetic operations that involve shifts (multiply, divide, square root, and shift instructions) 2. The W register has an indica- tor which allows the operator to inspect the contents of the register during debugging and maintenance operations 3. The Si and S2 selectors are control gates that allow an increased number of inputs to A and W to be used 4. The X and W registers are used for exchange of data within the arithmetic section and for communicating with the remaining sections of the computer The subtractor is a logic matrix that combines the contents of the (aj registers to A and D, X and D produce the difference or logical sum of their outputs and it uses (b) Refer to table 4-5 in the textbook while answering items 6-9 through 6-11, binary, one's complement binary arithmetic. 1. (a) X and D (b) 2. (a) One's complement binary A and D (b) 3. (a) One's complement binary X and D (b) 4. (a) Binary A and D (b) Binary 6-9, 6-10 6-11. 6-12 What half subtract (HS) result is formed by the subtractor for the operation 010011 - 100111? 1. 000101 2. 010011 3. 110100 4. 111010 What borrows are produced by the subtractor for the operation 010011 - 100111? 1. 111011 2. 110001 3. 011001 4. 010011 Which of the following combinations will enable borrows to be prop- agated? 1. X fi D 2. X = D = 1 3. X = D = 4. Any of the above Refer to figure 4-8 in the text- book. If section IV of the sub- tractor generates a borrow and section V cannot satisfy the borrow, to which of the follow- ing sections will the request be propagated? 1. I 2. II 3. Ill 4 . None of the above Learning Objective : Identify the char- acteristics and functions of the memory section of the CP-642B computer including the special functions and types of storage for the main, control, and bootstrap memories . 47 For items 6-13 through 6-15, match the functions of the memory systems within the memory section of the CP-6 4 2B computer given in column B with the memory system listed in column A. All responses in column B are not necessarily used. 6-13. 6-17, 6-14 6-15, A. SYSTEM B. FUNCTION Main 1. A high-speed memory thin-film memory which serves as Control the storage medium memory for indexing and input/output Bootstrap control memory 2. Contains 32,768 possible 30-bit locations 3. A core storage memory which is used for the storage of programs , constants, and input/output data 4. Used for the storage of critical instructions and constants, and provides automatic recovery in the event of program failure, and the automatic initial loading of programs 6-16. When data is referenced from the magnetic core storage system, a portion of which is contained in each memory chassis in a (_a_) manner nonsequential, sequential and the data is (b) dumped, retained by the system when power is removed from the computer. 6-18 6-19 6-20 6-21, Which of the following storage locations is reserved for the main memory? Refer to table 4-4 in the textbook. 1. 00000 8 through 00077 8 2. 00200 8 through 00537 8 3. 00600 8 through 77777 8 4. All of the above In the main memory system, which of the following specifies one of the storage locations when a specific storage location in memory is referenced? 1. The S translator 2. The Z register 3. The S register 4. Memory control What is the total approximate time required for one main memory reference and the delivery of the data from storage? 1. 2. 3. 4. 1 ps 2 us 5 us 4 ps The magnetic cores require a current of (a) mA for a 200, 400 period of (b) us to switch .8, 1.2 them from one stable magnetic state (1 or 0) to the other. 1. (a) 200 (b) .8 2. (a) 400 (b) 1.2 3. (a) 200 (b) 1.2 4. (a) 400 (b) .8 Refer to figures 4-10 and 4-11 in the textbook. Which of the following lines pass through each magnetic core? 1. The X and Y read/write lines 2. Either a vertical or horizontal inhibit line 3. A diagonal sense line 4. All of the above 1. (a) sequential (b) dumped 2. (a) nonsequential (b) retained 3. (a) sequential (b) retained 4. (a) nonsequential (b) dumped 48 6-22. The state of magnetization of a core is induced by the current in the 1. diagonal sense line 2. X and Y drive lines 3. vertical drive line 4. horizontal drive line Items 6-23 and 6-24 are to be judged True or False. 6-2 3. If the core was originally in the state, the magnetizing force will cause a flux change in the core to occur and the output state will change to 1. 6-24. The pulses associated with the restore function are called write or restore pulses and are of the same polarity as the read pulses. (a) 6-25. A memory plane has 16,3847X2,76 8 memory cores which are located at the intersection of the horizon- tal and vertical conductors and it requires (b) memory two , four planes to store all the main memory addresses for one bit position. 1. (a) 16,384 (b) two 2. (a) 16,384 (b) four 3. (a) 32,768 (b) two 4. (a) 32,768 (b) four Refer to figures 4-13 and 4-14 in the textbook while answering items 6-26 and 6-27. 6-26 A memory plane is divided into (a) quadrants and each four, eight quadrant contains a (b) 128 x cores 64 x 64, array of magnetic 6-27. How are the inhibit lines of a memory plane threaded? 1. Horizontally for the upper level and vertically for the lower level 2. Horizontally for quadrants 1 and 2 upper level, 5 and 6 lower level, and vertically for the remaining quadrants 3. Vertically for quadrants and 3 upper level, 4 and 7 lower level, and horizontally for the remaining quadrants 4. Vertically for quadrants 1 and 2 upper level and 5 and 6 lower level and horizon- tally for quadrants and 3 upper level and 4 and 7 lower level 6-2 8. Which of the following charac- teristics of a memory stack is INCONSISTENT with its design or function? Refer to figure 4-15 in the textbook . 1. The storage elements of the main memory are contained in five memory stacks, each stack containing £ll the 32,672 addresses required for the storage of a six- bit segment of a 30-bit word 2. A memory stack contains 12 memory planes (six upper level and six lower level) , two endboard assemblies, and a centerboard 3. Access circuits to a memory stack are made through the centerboard and the endboard 4. The diode modules mounted on the endboard assemblies are used to enable the drive lines 128 1. (a) four (b) 128 x 12i 2. (a) eight (b) 128 x 121 3. (a) four (b) 64 x 64 4. (a) eight (b) 64 x 64 49 6-29. For core selection, a (a) coincident half-amplitude , full-amplitude current pulse is generated in each selected row and column, which results in the core that has been addressed receiving an attenuated, a full-amplitude pulse. Refer to textbook figure 4-16. Full amplitude An attenuated Coincident half-amplitude A full-amplitude Full- amplitude A full- amplitude Coincident half-amplitude An attenuated 6-32. 6-30 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) If read pulses are applied when the selected core is in the state, a voltage of (a) 6-33. 55 mV peak (b) 10 mV maximum, is induced in the line and the core inhibit, sense magnetization (c) is changed to 1, remains 1. (a) 55 mV peak (b) Sense (c) Remains 2. (a) 10 mV maximum (b) Inhibit (c) Is changed to 1 3. (a) 55 mV peak (b) Inhibit (c) Is changed to 1 4. (a) 10 mV maximum (b) Sense (c) Remains 6-34, Refer to figure 4-17 in the textbook while answering items 6-31 and 6-32. 6-31. Which of the following circuits is/are NOT part of the S trans- lator? 1. The inhibit selector 2. The sense amplifiers 3. The X and Y line selectors 4. The X and Y group selectors Use the information given below to arrange in sequence the output of the sense line. A. Each sense circuit connects the output of the sense windings in a bit-plane (two memory planes) to a sense amplifier B. The sense amplifiers connect the outputs from the memory planes to the sense register C. The sense register connects to the Z register 1. B, c, A 2. c, A, B 3. A, B, C 4. B, A, C The inhibit circuits are used during the (a) cycle read, write to prevent writing into a wrong address in (b) memory, storage by counteracting X and Y drive line pulses for core selection. 1. (a) Write (b) storage 2. (a) Read (b) storage 3. (a) Write (b) memory 4. (a) Read (b) memory The control memory is a 64 word, 30-bit, (a) memory core, thin-film witt l an access time of (b) 333 ns, and [ a total cycle time of 4 ys (c) . 667 nx, 5 ys 1. (a) Thin- film (b) 333 ns (c) 66 7 nx 2. (a) Thin-film (b) 4 ys (c) 5 ys 3. (a) Core (b) 333 ns (c) 5 ys 4. (a) Core (b) 4 ys (c) 677 nx 50 Items 6-35 and 6-36 are to be judged True or False. Refer to figures 4-18 and 4-19 in the textbook. 6-35. A thin-film stack has a total of seven planes, consisting of a unifluxor plane, four thin-film planes, and two transformer diode planes. 6-36. The thin-film planes in a stack consist of an upper and lower cover, an upper and lower wiring array, and a spacer with four subtrates that separates the wiring arrays. 6-37. The direction of the preferred axis of a thin-film magnetic device is determined during its construction by the 1. pattern formed by the film spot 2. orientation of the film spot on the substrate 3. direction of an applied magnetic field 4. thickness of the film spot 6-38. The torque which aligns the mag- netism in a film spot parallel to its preferred axis in the absence of external stimuli is produced by the 1. bit current 2. residual magnetic field 3. longitudinal field 4. traverse field 6-39. Refer to figure 4-20 in the textbook. Which of the following magnetic field vectors determine the direction of the final stable state of magnetization of the film spot? 1. The direction of A 2. The direction of B 3. The direction of C 4. None of the above Refer to figure 4-21 in the textbook while answering items 6-40 and 6-41. 6-40. What conditions in the word and bit lines initiate the storing of a "1" in a film spot? 1. No current in the word lines and current in the bit line 2. Current in the word lines and no current in the bit lines 3. Current in the word line and bias in the bit lines 4. Current in the word lines and bit current in the bit lines 6-41. For thin-film memory, reading a location in which a "1" has been stored produces 1. a "1" state in the address spot 2. a zero output from the "and" circuit 3. an induced voltage in the sense lines 4. a zero output from the sense amplifier Refer to figure 4-22 in the textbook while answering items 6-42 and 6-43. 6-42. In control memory word selection, the activated word drive line (aj all 30-bits nullifies, switches to determine their output and the word current is applied in the (b) direction opposite, same during the read and write cycle. 1. (a) nullifies (b) same 2. (a) switches (b) opposite 3. (a) nullifies (b) opposite 4. (a) switches (b) same 51 6-43. During the write cycle, what causes the bit current to have a negligible effect on the spots that have not been selected by a word current? 1. It produces a magnetic field in the opposite direction 2. It produces a magnetic field in the same direction 3. It produces a magnetic field in a traverse direction 4. It cancels the magnetic field Item 6-44 is to be judged True or False. 6-44. The basic difference between a write and a restore operation is whether or not the information is written back into memory the same as it was read out or whether it is new information. 6-45, 6-46 6-47, Which computer section supplies the address to determine which word line is activated each time control memory is initiated (which in turn performs a complete read/write cycle)? 1. Control 2. Arithmetic 3 . Memory 4. Input/output During the read portion of the cycle, the data register (ZO) is (_a) and during the cleared, set (b) portion of the write, restore cycle, the contents of the ZO register are stored in the specified film stack locations. 1. (a) cleared (b) restore 2. (a) set (b) write 3. (a) set (b) restore 4. (a) cleared (b) write When the sense amplifiers are strobed and the outputs are gated in the ZO register, what is the timing pulse called that is used to ensure that the optimum signal level is obtained before data is transferred? 1. Holding pulse 2. Standard pulse 3. Strobe pulse 4. Amplifier pulse Refer to figure 4-24 in the textbook while answering items 6-48 through 6-50, 6-48. When the sense amplifiers are not strobed and the film stack outputs are not gated into the ZO register, to which of the following parts of the word may the strobe disable be applied? 1. The upper half 2. The lower half 3. The entire word 4. Any of the above 6-49. During a read operation, 6-50. (a) one set, of the sense amplifiers both sets are (b) and disabled, enabled (c) ^_ word is one-half the, the entire gated into the ZO register. 1. (a both sets (b enabled (c the entire 2. (a one set (b disabled (c one-half the 3. (a both sets (b enabled (c one-half the 4. (a one set (b disabled (c the entire Data to be written into a control memory location during a write operation would be placed into which portion of ZO disable? 1. The lower 15-bits 2. The upper 15-bi.ts 3. All 30-bits 4 . Any of the above 52 Refer to figure 4-25 in the textbook while answering items 6-51 through 6-58, 6-55, 6-51, 6-52. The control memory address register (SO) is a (a) seven-bit, register which is loaded 30-bit by the control section SO selector (b) after, at the same time the control memory is initiated. 1. (a) seven-bit (b) after 2. (a) seven-bit (b) at the same time 3. (a) 30-bit (b) after 4. (a) 30-bit (b) at the same time Which of the following statements is INCONSISTENT with the functions of the two word current generators (WCG) or their relationship with other circuits in control memory addressing? 1. The SO address bit 2 6 determines which WCG is selected 2. Address group 100-177 selects control memory, while boot- strap addresses 540-577 select Program I or Program II 3. The WCG outputs enable the word current diverters (WCD) 4. The primary current for the transformer selectors is supplied by the line charger Items 6-53 and 6-54 are to be judged True or False. 6-56, 6-57, The eight line transformer selectors (LTS) enable one of the eight word line transformers from the group designated by the 1. bits 00, 01, and 02 of SO 2. word current timing 3. transformer selectors 4. octal translators The 128 word line transformers generate the word current which is used to (_a) read and write, read in the control memory, or write and to (b) only in the read, write bootstrap memory. 1. (a) read and write (b) read 2. (a) read or write (b) write 3. (a) read or write (b) read 4. (a) read and write (b) write Which of the following actions is INCONSISTENT with the functions of the control section? 1. It supplies the address and sets the inhibit flip-flops which determine to what portion of the data that the strobe disables apply 2. It supplies computer timing to cycle completion once the memory cycle has been initiated 3. It initiates control memory 4. It loads Z0 for the write operation and samples the contents of Z0 for the read operation 6-5 3. The primaries of the transformer selectors for bootstrap and control memory are selected by two word current diverters. 6-54. The word current diverters are selected by the outputs from the word current generators and bits 03, 04, and 05 of the SO register. 53 6-58. Which of the following statements is INCONSISTENT concerning the functions of the memory cycle? 1. The word timing and bit timing flip-flops control the enabling and disabling of the word and bit lines 2. The specified word line is enabled before the read portion of the cycle 3. The word line remains enabled only until the completion of the read portion of the cycle 4. The bit lines are enabled only during the write/restore portion of the cycle Item 6-59 is to be judged True or False. 6-59, 6-60, A unifluxor memory has a non- destructive readout type of storage and is used primarily for program fault recovery. Each program card in bootstrap memory contains (a) words of 32, 64 (b) bits each. 15, 30 1. (a) 32 (b) 15 2. (a) 32 (b) 30 3. (a) 64 (b) 15 4. (a) 64 (b) 30 Item 6-61 is to be judged True or False 6-61, 6-62, The principle used for the storage of data in the bootstrap memory is that a current through a conductor will induce a nearly equal and parallel current in another conductor placed very close and parallel to it. Which of the belt buckles in figure 6-1 would result in no output? A B C A and B 6-63 6-64 Which of the belt buckles in figure 6-1 would represent a 1? 1. A 2. B 3. C 4. B and C Which of the belt buckles in figure 6-1 would represent a zero? 1. 2. 3. 4. A B C A and C WORD CURRENT ♦ V//AAA VM-y h \ A'///,: : SENSEiSUTPUr VfA ^JZ LINE /CURRENT" [ // V/A -V/a 2&A-::/,;.}=-\r ■ , , .^ Figure 6-1. -Belt Buckles 54 Items 6-65 and 6-66 are to be judged 6-66. Memory stacks are constructed True or False. in a manner which makes repair by field maintenance personnel 6-65. In the load mode of operation, a routine task in the event of the PROGRAM I/PROGRAM II toggle stack damage. switches are used to select either of the two programs. 55 Assignment 7 NTDS Unit Computer and NTDS Peripheral Equipment Textbook Assignment: pages 12 4 through 14 5 Learning Objective : Recognize the various functions performed by the input/output section of the CP-642B computer. Identify the various circuits and devices of the input/output section using a block diagram. Determine the signal paths between the input/output section and peripheral equipment and the signal paths between two computers . 7-1. The transfer of data to and from the computer is via (a) input and (b) 8, 16 16, 32 output channels with data being transferred in a (cj parallel mode. 15-bit, 30-bit 1. (a) 16 (b) 8 (c) 15-bit 2. (a) 32 (b) 16 (c) 30-bit 3. (a) 16 (b) 16 (c) 30-bit 4. (a) 32 (b) 8 (c) 15-bit Items 7-2 through 7-4 are to be judged True or False. 7-2. By changing the fast interface/ slow interface circuit cards, any or all of the four chassis can be designated a high-speed chassis or a slow-speed chassis. 7-3. The input/output section functions synchronously with the computer program. 7-4. Command transfers in the input mode are referred to as external function words , and in the output mode as interrupts. For items 7-5 through 7-7, match the basic priority purpose given in column B with the basic priority system listed in column A. All responses in column B are not necessarily used. PRIORITY 7-5, 7-6 7-7. Function priority Group priority Channel priority B. PURPOSE 1. Sends a signal to the exter- nal equipment indicating that a request has been processed 2 . Used to establish which request or interrupt is to be processed first 3. Used to establish which channel on a particu- lar chassis will be granted priority 4 . Used to establish which chassis containing a request for priority will be acknowledged first 56 7-8. 7-9, 7-10, Input data words (peripheral units into the computer) and output data words (from the computer to peripheral units) represent (a_) alpha, numeric, data and this data alphanumeric transfer is in a parallel mode. (b) 15-bit, 30-bit Refer to figure 4-30 in the textbook while answering items 7-11 through 7-17. For items 7-11 through 7-14, match the functions performed in an input/output channel given in column B with the channel circuit or device listed in column A. Responses in column B are used only once. 1. (a) alpha (b) 15-bit 2. (a) numeric (b) 30-bit 3. (a) alphanumeric (b) 30-bit 4. (a) alphanumeric (b) 15-bit Control words specify the type of operation that is to be performed and are sent from the computer to the 1. peripheral units 2. input selectors 3. arithmetic section 4. control section Interrupt signals, which accompany external interrupt words , are sent from the (a) computer, control section, to the (b) peripheral units CHANNEL B, FUNCTION 7- -11. I/O control 1. Provides the circuits necessary gating, through 7- -12. Input data program gener- gates ated enables , for signals and 7- -13. I/O selector data from the I/O section to 7- -14. I/O translator memory computer, control section, peripheral units and indicate to the computer a special condition which exists on a corresponding I/O channel. control section peripheral units control section computer peripheral units control section peripheral units computer 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) 2. Provides trans- lation to establish the priority of the input signal and the prior- ity of the channel requesting the I/O function 3. Provide the gating, timing, and monitor control for I/O data transfers 4 . Provide a storage medium for input data to the computer until such time as the computer logic is capable of processing this data as directed by the I/O control circuitry 57 7-15. The channel selector always grants priority to the (a) 7-16 7-17, lowest, -numbered channel within highest a group and the group selector always grants priority to the (b_) -numbered group. lowest, highest 1. (a) lowest (b) highest 2. (a) highest (b) highest 3. (a) highest (b) lowest 4. (a) lowest (b) lowest Which of the following function priorities is NOT in the proper sequence as evaluated by the priority and access circuits? 1. Advance real-time clock 2. External interrupt 3. Input monitor interrupt 4. Output monitor interrupt Which of the following registers is provided for each group or chassis to store output data until the associated peripheral device is capable of processing it? 1. C 2. D 3. U 4. Z Refer to figure 4-31 in the textbook while answering items 7-18 through 7-22 7-18. Each cable connecting input channels to the computer from peripheral equipment contains (a) input data lines and 16, 30 (b) input control lines. 4, 8 1. (a) 16 (b) 4 2. (a) 16 (b) 8 3. (a) 30 (b) 4 4. (a) 30 (b) 8 Refer to table 4-6 in the textbook while answering items 7-19 through 7-22. 7-19. Which of the following sequence of events occur immediately after the computer sets the out- put data acknowledge line, indicating that the data is ready for sampling? 1. The computer initiates output buffer for given channel 2. The peripheral equipment samples the data line 3. The peripheral equipment detects the output data acknowledge 4. The computer places infor- mation on the data lines 7-20. Which of the following sequence of events occur immediately before the computer detects the input data request? 1. The computer samples the data lines at its convenieno 2. The peripheral equipment senses the input acknowledge line 3. The peripheral equipment places a data word on the data lines 4. The peripheral equipment sets the input data request line to indicate that it has data ready for transmission 7-21. Which of the following sequence of events occur immediately after the computer places the external function code on the data lines? 1. The peripheral equipment detects the external functioi acknowledge and samples the external function code 2 . The computer sets the exter- nal function acknowledge line to indicate that the external function is ready for sampling 3. The peripheral equipment sets the external function request line when it is ready to accept the external function code 4. The computer detects the external function request 58 7-22. Which of the following sequence of events occur immediately before the computer detects the external interrupt request signal and at its convenience, stores the external interrupt word? 1. The computer sets the external interrupt enable when it is ready to accept an external interrupt for a given channel 2. The computer drops the external interrupt enable 3. The peripheral equipment sets the external interrupt request line to indicate that an external interrupt code is on the data lines 4. The peripheral equipment detects the external interrupt enable Refer to figure 4-32 and table 4-7 in the textbook while answering items 7-23 and 7-24. 7-2 3. For intercomputer command word transfer, which of the following sequence of events occur immediately after computer B recognizes the external function acknowledge as an external interrupt request and accepts the command word? 1. Computer B clears the external interrupt enable line, stores the command word in the status word location, and sets the input acknowledge line 2. Computer A recognizes the external interrupt enable as an external function request and places the external function code on the data lines 3. Computer A recognizes the input acknowledge as a resume and clears the external function acknowledge line 4. Computer B sets the external interrupt enable when it is ready to accept a command word from computer A 7-24. For intercomputer data transfer, which of the following sequence of events occur immediately before computer A sets the ready line to indicate that the data is on the lines? 1. Computer B recognizes the ready signal as an input data request signal and, at its convenience, accepts the data word 2. Computer A places data on the data lines 3. Computer B sets the input acknowledge line 4. Computer B initiates an input buffer, and computer A initiates an output buffer for the required channel Item 7-25 is to be judged True or False, 7-25. Input/output operations must be substantiated by program control throughout the buffer process. 7-26. Which of the following actions are provided by program control to initiate an input/output function? 1. The program sets the active flip-flops for the specified channel 2. The program stores a control word in a fixed memory location 3. The program sets the active flip-flops for the desired function 4. All of the above 7-27. Concerning input data request (IDR) , which of the following input/output sequences occurs immediately after enables are supplied to write the word on the data lines into memory? 1. An input acknowledge signal is sent to the peripheral device 2. The control word is written back into its assigned address 3. The active flip-flop is cleared if this is the last word to be read in 4. The control word is updated 59 7-28. I ! c ; i- 1 7-29. Concerning the output data request (ODR) , which of the following sequence of events occurs immediately before the word is read from the address specified and placed on the data lines? 1. The control word is written back into its assigned address 2. An output acknowledge signal is sent to the peripheral device 3. The active flip-flop is cleared if this is the last word to be transferred 4 . The control word is updated The external interrupt request (EIR) flip-flop is (a) .1 J to si i I cleared, set by master control or program control and the external inter- rupt hold (EI Hold) flip-flop is (b) cleared (also) , set (also) by master clear or program control . 1. (a) cleared (b) cleared also 2. (a) cleared (b) set 3. (a) set (b) cleared 4. (a) set (b) set also Items 7-30 and 7-31 are to be judged True or False. 7-30. The output of the EI request gate is transmitted to the channel priority register to determine priority of the channel. 7-31. Internal interrupts serve primarily to synchronize the computer program with initiation of input/output transfers and to signal the occurrence of an error. 7-32. Which of the following is a primary function of interrupts from external sources? 1. To transmit or receive data 2. To notify the computer when an error has occurred 3. To synchronize the computer program with the readiness of peripheral devices (or other computers) 4. All of the above 7-33. Internal interrupts are generated when 1. inhibit flip-flops are set and monitor flip-flops are clear 2. monitor flip-flops are set and inhibit flip-flops are clear 3. monitor and inhibit flip-flops are set 4. monitor and inhibit flip-flops are clear For items 7-34 through 7-36, match the functions performed by the various operating modes given in column B with the operating modes listed in column A. All responses in column B are not necessarily used. 7-34, 7-35 7-36 A. MODES B. FUNCTIONS Input 1. Holds the word in mode the output regis- ter associated Output with the specified mode channel until a resume signal is Interrupt received or until mode a specified time (internal has elapsed and external) 2. Initiated by a programmed in- struction when either the com- puter receives an external interrupt and the associated external interrupt code word or when it receives an input data request and the associated data word 60 Initiated when the programmed instruction specifies a data transmission to a peripheral device Causes the com- puter to discon- tinue the running program and to execute the in- struction located in one of the permanently assigned entrance registers For items 7-37 and 7-38, match the functions performed by the operating modes given in column B with the operating modes listed in column A. All responses in column B are not necessarily used. A. MODES B. FUNCTIONS 7-37. Buffer 1. Causes the com- with puter to discon- monitor tinue the normal sequence and to 7-38. Buffer execute the without instructions monitor obtained from the core memory address 2 . Data words are transferred sequentially, starting at a given address through a termi- nal address on the specified input or output channel with no monitor inter- rupts occurring at the completion of the buffer 3. Caused by either executing an illegal function code or by a time-out interrupt on any of the intercomputer channels 4. Data words are transferred sequentially, starting at a given address through a termi- nal address, on the specified input or output channel and at completion causes an internal monitor interrupt to the input, output, or external function monitor interrupt entrance register assigned to the input or output channel Learning Objective : Recognize the logic circuits that are required to perform a specific function and identify the basic symbols that are used in making up the functional schematic for the CP-642B computer , 7-39 7-40. 7-41, Refer to figure 4-33A in the textbook. In the illustrated inverter or driver, the logic or unique term is identified by (a) , the type of card 7, 10J09 is identified by (b) , and 137 2070 the chassis and jack that the card is to be plugged into is specified by (c) 37F, 5J37F 1. (a) 10J09 (b) 2070 (c) 5J37F 2. (a) 7 (b) 13 (c) 37F 3. (a) 10J09 (b) 2070 (c) 37F 4. (a) 7 (b) 2070 (c) 5J37F Refer to figure 4-33B in the textbook. The small circles on the AND circuit indicate a (a) input is required to high, low satisfy the logic condition and the small circle on the OR circuit indicates a (b) high, low output is required to satisfy the logic condition. 1. (a) low (b) low 2. (a) low (b) high 3. (a) high (b) high 4. (a) high (b) low Refer to figure 4-33C in the textbook. In the illustrated flip-flop giving logic term 0XJ13, the (a) is replaced X, J with a (b) to specify the 0, 1 set side, or a (c) for the clear side. 0, 1 1. (a) J (b) 1 (c) 2. (a) J (b) (c) 1 3. (a) X (b) 1 (c) 4. (a) X (b) (c) 1 61 ( > ! '■'. ;i ;:' " 7-42. Refer to figure 4-33D in the 7-46, textbook. Assume a normal I/O chassis card location in chassis A2 . What would be the (a) logic term, (b) card type notation, and (c) card location? 1. (a) 460g4 (b) 2078 (c) 2J2N 2. (a) 46024 (b) 2070 (c) gJ2C 3. (a) 460A24 (b) 2070 (c) 2J35D 4. (a) 46024 (b) 2078 (c) 2J2C 7-43. Refer to figure 4-34 in the text- book. Concerning the inverter circuit, (a) which pin requires a low output to satisfy the logic condition, (b) where is the output test point of the circuit, and (c) to which jack on chassis 5 is the card plugged into? 1. (a) 7 (b) 15D4 (c) 37F 2. (a) 6 (b) 14J6 (c) 5J 3. (a) 7 (b) 14J6 (c) 37F 4. (a) 6 (b) 15D4 (c) J03 7-47, Learning Objective : Recognize the parts locations of the movable plugs of the CP-642B computer and determine the out- put test points. Item 7-44 is to be judged True or False. 7-44. The main power supply for the computer provides the d.c. voltages used by the computer 7-48, logic circuits, memory circuits, and the indicators, switches, and relays on the operator's console. 7-45. Refer to figures 4-34 and 4-37 in the textbook. The test point 14J6 of logic element 11J03 is located on test block (a) , coordinates (b) 11, 14 J6, 34E 1. (a) 11 (b) 34E 2. (a) 14 (b) J6 3. (a) 11 (b) J6 4. (a) 14 (b) 34E Refer to figure 4-38 in the textbook. Each computer chassis is divided into (a) 7 card rows (A through G) , 12 card rows (A and (b) card through L) 62, 80 columns 1. (a) 7 card rows (A through G) (b) 80 2. (a) 12 card rows (A through L (b) 62 3. (a) 7 card rows (A through G) (b) 62 4. (a) 12 card rows (A through L (b) 80 Learning Objective : Identify the pro- cedures for manually writing into and reading from memory using the front panel controls . Which of the following steps is taken for manually writing a single word immediately after setting U = 140 30 yyyyy? 1. Set AfEn in Active Seq indicators 2. Press START-STEP 3. Press OP STEP 4. Set Q = word to be stored Which of the following steps is taken for manually writing consecutive words immediately before setting DISCONNECT B7 up? 1. Press OP STEP 2 . Set AfEn 3. Set U = 70100 00003 4. Press START-STEP 62 7-49. Which of the following steps is taken for manually reading a single word immediately after master clearing the front panel? 1. Press OP STEP 2. Set U = 100 30 YYYYY 3. Set AfEn 4. Press START-STEP 7-50. Which of the following steps is taken for manually reading con- secutive words immediately before setting U = 100 30 YYYYY? 1. Press OP STEP 2. Set AfEn 3. Set DISCONNECT B7 up 4. Press START-STEP Learning Objective: Specify the various manual tests used to isolate malfunc- tions and hold checks in the CP-642B computer. For items 7-51 through 7-53, match the functions performed by the various manual tests given in column B with the type of manual tests listed in column A. All responses in column B are not necessarily used. A. TEST B. FUNCTION 7- •51. 55 test 1. Uses the 55 test to check memory 7- ■52. Memory capacity test 2. under marginal conditions Continually reads 7- -53. Magnetic core cycling test the same address so that the wave- forms can be checked to isolate the malfunctioning circuits For items 7-54 and 7-55, match the functions performed by the various manual tests given in column B with the manual tests listed in column A. All responses in column B are not necessarily used. TEST B. FUNCTION 7-54, 7-55. Repetition rate test Cycle time test Checks core memory by causing the quantity at each address to be the address itself Exercises the compute r • s ab i 1 i ty to write any desired pattern of ones and zeros into all core memory without using a memory address to store the test 1. Permits the checking of a particular word and its associated circuitry 2. Uses a repeated enter Q instruc- tion which has a cycle time of four ys (250,000 memory references per second) 3. Measures the time between the leading and trailing edges of a signal to ensure that the cycle time is less than 700 ns at 50 per cent amplitude Learning Objective: Identify the online peripheral equipment associated with the NTDS computer system while ref- erencing a block diagram. Specify the basic functions of the peripheral equipment. 7-56. Which of the following is NOT an online NTDS peripheral equipment? 1. Teletypewriter 2. Electronic accounting machine 3. Magnetic tape unit 4. System monitoring panel 7-5 7. Which of the following actions concerning computer programs are specialized NTDS peripheral units of equipment capable of perform- ing? 1. Loading 2. Storing 3. Directly controlling 4. All of the above 63 Item 7-58 is to be judged True or False. Item 7-62 is to be judged True or False. 7-58. The keyset central multiplexer (KCMX) is an interface that selects a keyset and passes the information to the NTDS computer. Learning Objective : Specify the basic principles of magnetic storage , including tape drive, disk files, drum units, and core memories . 7-59. Which of the following actions will produce an electrical current? 7-62. In three of the four magnetic storage devices, data is recorded as magnetized spots on the sur- face and a change in the flux patterns between adjacent spots on the surface is detected by the read/write head as a very small current. 7-6 3. What undesirable condition occurs when the write or erase currents are too weak in the magnetic recording of digital information? ■ I p i B 1. Locating a conductor in a magnetic field 2. Rotating a conductor in a magnetic field 3. Varying the physical distance between a conductor and a source of magnetic flux 4 . Both 2 and 3 above 7-60. Which of the following types of magnetic storage devices does NOT depend upon a change in the physical distance between a conductor (for example, a read/ write head) and a source of magnetic flux, such as magnetic oxide surfaces? 1. Disk files 2. Drum units 3. Core memories 4. Tape drives 7-64, 7-61. For core memories, the (a) tive, nondestructive technique requires a destruc- readout (b) 7-65, read, write operation to follow a (cj read, write operation to replace the contents, 1. (a) Nondestructive (b) Write (c) Read 2. (a) Destructive (b) Write (c) Read 3. (a) Nondestructive (b) Read (c) Write 4. (a) Destructive (b) Read (c) Write 1. Some of the prerecorded patterns on the surface retain their polarity 2. The audio is completely suppressed 3. Cross talk is produced 4. The flux field will overlap adjacent fields or surface areas An undesirable condition which occurs in nondestructive read- out when the write current is too strong is that a (a) diminished, flux field is produced expanded and a condition known as (b) cross, talk results, bias 1. (a) Expanded 2. (a) Diminished 3. (a) Expanded 4. (a) Diminished (b) bias (b) bias (b) cross (b) cross Compared to the return to zero (RZ) system, the nonreturn to zero (NRZ) recording technique allows for 1. lower bit densities on the recording surface 2. higher bit densities on the recording surface 3. slower rise time 4. faster rise time 64 7-66. The return to zero technique detects the direction of flux change between adjacent spots as (a) , and the 1, 0, either 1 or nonreturn to zero technique detects the fact that there was a change , as (b) . 1, 1. (a) 1 (b) 2. (a) either 1 or (b) 1 3. (a) (b) 1 4. (a) either 1 or (b) For items 7-67 through 7-70, match the action performed by parity given in Column B with the type of parity listed in Column A. Responses in Column B are only used once. 7-71. The redundant mode is a (a) hardware, function and is so named software because every bit is written or read (b_) an infinite number of times, , either bit-by-bit, octal- twice by-octal, frame-by-f rame , or word-by-word . 1. (a) hardware (b) twice 2. (a) hardware (b) an infinite times number of 3. (a) software (b) twice 4. (a) software (b) an infinite times number of A. TYPE B. ACTION 7- -67. Odd parity 1. The parity bit(s) that follows a 7- -68. Even parity complete block of data 7- -69. Lateral parity 2. All data bits are summed and 7- -70 Longitudinal found even , but parity by setting the 7-72 parity bit, the total (including the parity bit) becomes odd Converts odd count sums to even Comparison terms, such as fast, medium, or slow, pertaining to the capabilities and limitations of a particular peripheral device are primarily based on which of the following considera- tions? 1. How the device compares to the computer itself 2 . How the device compares to other equipment of similar design 3. How the device compares to other types of peripheral equipment within a system configuration 4. All of the above The parity bit within each frame in tape drives 65 ' 7-73. Which of the following actions occur (s) when the computer's data transfer rate drops below the minimum level that the magnetic storage device is able to maintain? 1. A missed frame error will occur during a read operation 2. A loss data error will occur on read operations 3. A missed frame error will occur during a write operation 4. Both 2 and 3 above 7-74. All flux patterns are converted by (a) erase operations a.c. , d.c. to the (b] polarity opposite, same for the length and width of the surface where they are applied, and (c) erase operations a.c. , d.c. scramble the magnetic flux patterns on the surface so much that no discernible magnetic pattern remains. 1. (a a.c. (b opposite (c d.c. 2. (a d.c. (b same (c a.c. 3. (a a.c. (b same (c d.c. 4. (a d.c. (b opposite (c a.c. a j |S»fli r '" : i ii ! I I 66 Assignment 8 NTDS Peripheral Equipment Textbook Assignment: pages 145 through 163 Learning Objective : Identify the types 8-6. of magnetic storage used and magnetic tape responsibilities of the DS. Items 8-1 through 8-3 are to be judged True or False. 8-1. The surface of most magnetic stor- age devices is usually an oxide of a metal alloy having desirable magnetic characteristics. 8-2. A tape drive offers better protec- tion to its surface than a disk file or a drum unit. 8-7, 8-3. Two main advantages of Mylar tape are that it is not affected by temperature extremes and it will not stretch. 8-8, 8-4. What is the proper storage method for a magnetic tape? 1. On its side without a container 2. On its side in a container 3. On its end in a container 4. On its end without a container 8-5. Arrange the steps below in the 8-9, proper sequence for cleaning magnetic tape. A. The tape is wiped on both sides to remove any oxide or contam- inants. B. The tape is shaved by a series of razor edges to remove loose oxide and embedded particles. C. The tape is wiped down on both sides with a cleaning solution. 1. A, B, C 3. B, A, C 4. B, C, A 67 Which of the following procedures is/are normally recommended for a damaged magnetic tape of less than 600 feet in length? 1. The damaged portion is dis- carded 2. The undamaged portions of the tape are spliced 3. Both 1 and 2 above 4. The tape is discarded Item 8-7 is to be judged True or False. Concerning magnetic tape mainte- nance, a DS technician is primarily involved with the procedural tech- niques for proper splicing. Which of the following factors might contribute to magnetic tape cling? 1. The shelf life of the tape 2. Adherence due to temperature and humidity 3. Built-up static charges 4. All of the above Which of the following procedures is NOT recommended for eliminating static cling from a recorded magnetic tape? 1. 2. 3. 4. Degaussing Use of magnetic tape cleaner Move the tape from one reel to another reel and then back again Transfer the tapes to a suit- able environment 8-10 b' K i ■ h ; if- : 8 To degauss a magnetic tape, a machine applies a varying strength (a) induced magnetic field a.c , d.c. 8-11 8-12 to the tape which results in the (b) nondes true t ion, total destruction of any stored data on the tape and the complete nullification of all magnetic flux patterns. 1. (a) a.c. (b) total destruction 2. (a) d.c. (b) total destruction 3. (a) a.c. (b) nondestruction 4. (a) d.c. (b) nondestruction Which of the following functions is/are performed by the tape certifier? 1. Shaving and cleaning the magnetic tape prior to testing it 2. Checking background noise levels of the tape 3. Checking bit parallelism (skew) across the tape 4. All of the above Which of the following factors is/are checked during magnetic tape certification? 1. The tape's retention of flux patterns 2. The tape's demagnetization 3. The tape's capability of recording high bit densities 4. All of the above Item 8-13 is to be judged True or False. 8-13. An advantage of the tape certifier is that it requires a minimum of maintenance effort to keep it functioning at optimum levels. 8-14. Which of the following services are NOT provided by or for the tape transport concerning its maintenance in regard to wear, deterioration, and component value changes? 1. Computer readouts which iso- late the transport problem area 2. Special tests performed on the transport 3. Precise standards set for the transport 4. Electrical and mechanical adjustments made to the transport Items 8-15 and 8-16 are to be judged True or False. 8-15. Because of the high degree of accuracy required for tape trans- port mechanical adjustments, a "mechanics tape" is discarded after its initial run to preclude the possibility of reusing a damaged or poor quality tape for subsequent adjustments. 8-16. A "skew" tape is one cf excep- tional quality which h s been prerecorded under exact \ng laboratory conditions w th all "l's" data and which pre /ides a universal standard for tape transport adjustments. 8-17. Which of the following tapes is/ are necessary to accurately set write levels in addition to providing a "l's" tape? 1. A "mechanic's" tape 2. A "skew" tape 3. Both 1 and 2 above 4. A "levels" tape 8-18. Which of the following conditions pertain to the various adjust- ments and tapes in reference to compatibility? 1. Lateral exchange must be achieved between tape trans- ports 2. A currently written tape must be readable in the future 3. Previously written tapes must still be readable 4. All of the above 8-19. Which of the following achieve- ments is/are pertinent to lateral exchange? 1. Compatibility between all tape transports within a computer system 2. Compatibility of tape trans- ports between computer systems 3. Compatibility with a single tape transport's own read and write circuits 4. All of the above 68 For items 8-20 through 8-23, match the type of tapes or test most suitable or recommended (given in Column B) to achieve the desired tape transport com- patibility (listed in Column A) . Re- sponses in Column B are only used once. A. COMPATIBILITY B. TEST/TAPE Item 8-25 is to be judged True or False, 8-25, In establishing intersystem com- patibility, a ship should use its best tape transport in writing a copy and also use the same transport in generating an accompanying "l's" tape. 8-20. Used to estab- 1. A compati- 8-26. A tape transport consisting of lish compatibility bility test an erase head and a dual purpose between the read that reads read/write head responds to flux and write circuits of each transport blocks of test data variations during i i (a) read, write 8-21. separately Used to ensure from a tape, then adds blocks of operation, and generates new flux patterns during (b) that the tape test data an erase, a reaa, transport is to be also operation. compatible with read by it a write the other trans- and by the ports in the next trans- 1. (a) read (b) an erase system by ex- port 2. (a) write (b) a read changing tapes 2. The standard 3. (a) read (b) a write provided by 4. (a) write (b) an erase 8-22. Used to ensure the skew that the trans- tape 8-27. The area on a tape required to port is still 3. Standard- produce one bit of information compatible with ized test per track is commonly called a prior tapes data tapes written by other and com- 1. square transports patibility programs 2. frame 3 . box 8-23. Used to ensure 4. that the trans- Old "l's" tapes or 4. bit count ports in one old com- 8-28. A group of frames (consisting of system are patibility either ones or zeroes) on a tape compatible with tapes which is separated from other . those of another groups of frames by unrecorded system sections of tape is referred to as a 8-24. For which of the following reasons is it important that computer personnel establish and maintain tape logs? 1. They provide a history of the system for later reference 2. They make use of previously noted facts and observations of other experienced personnel 3. They assist other involved personnel in acquiring the capability for assembling and correlating facts 4. All of the above 1. data void 2. block 3. format 4. reference point 69 M 8-29 «' i IP ! 8-30 8-31. The interblock gaps (unrecorded sections between blocks) (a) are about three-fourths of an and must inch long, vary in size be capable of (b) S-32, stopping only, starting only, stopping and ^_ a tape transport within starting a single interblock gap area. 1. (a) are about three-fourths of an inch long (b) stopping and starting 2. (a) vary in size (b) stopping and starting 3. (a) are about three-fourths of an inch long (b) starting only 4. (a) vary in size (b) stopping only The order in which computer words are reassembled depends upon whether a (a) forward or 8-33 8-34, (b) read, write reverse function read, write is being used. 1. (a) read (b) write 2. (a) write (b) read 3. (a) read (b) read 4. (a) write (b) write Read functions for most tape transports can be selected in (a) only a forward, only a reverse, either a forward or a reverse direction, while write functions occur only in a (b) 8-35, 8-36, direction. forward, reverse 1. (a) either a forward reverse or (b) forward 2. (a) only a reverse (b) forward 3. (a) only a forward (b) reverse 4. (a) (b) either a forward reverse reverse or 70 How many consecutive file marks without a data separation usually mark(s) the end of valid data on a magnetic tape? 1. One 2. Two 3 . Three 4 . Four The sum of tape information known on a particular subject is called 1. data blocks 2. subject matter 3. records 4. software Arrange the following computer terms in sequence from the smallest to the largest amount of data storage. A. Record B Tape reel C Data Block D File 1. D, c, B A 2. A, B, c D 3. B, D, A C 4. c, A, D B Of the following, which might refer to a figurative grouping of binary data rather than a physical grouping? 1. Bit 2. Word 3. Frame 4. Byte Which of the following would correctly be described as a "byte"? 1. Subunits of a computer word 2. The data bits of a frame of data 3. Octal or hexadecimal group- ings of binary data 4. Each of the above 8-37, 8-38. 8-39, If a byte of data has a unique numerical value, it may also be referred to as a 1. constant byte 2. numerical byte 3. binary-coded octal 4 . code In order to represent the follow- ing sequence (a) how many unique bytes of data would be required and (b) if the letter A is assigned a value of O2, what would the binary value of the = symbol be? 2 6 10 {letters} {numerals} ABC. . .XYZ 012.. .789+-X7- , : () "%? = (Note: The space is recognized as a special symbol.) 1. (a) Fifty 2. (a) Fifty 3. (a) Forty-nine 4. (a) Forty-nine (b) 110010 (b) 110001 (b) 110010 (b) 110001 If a data field were five bytes long (figuratively speaking) , how many data codes could it hold? 1. One 2. Two and one-half 3. Five 4. Ten 8-43. What is/are the MOST frequent type(s) of problem(s) in mag- netic tape equipment? 1. Cleanliness 2. Adjustments 3. Both 1 and 2 above 4 . Logic problems Learning Objective: Learn the key features of the RD-243 magnetic tape unity its application in NTDS, and how to mount a tape on a transport. 8-44. What is the primary purpose of the magnetic tape unit in NTDS? 1. Program control 2 . Program loading 3. Online operation 4. Offline operation 8-45. What secondary function can the RD-24 3 provide in NTDS? 1. Program parameters 2. Intercomputer interface 3. Operational history 4. Extracted data retention 8-46. Which of the following hub types is used on RD-24 3 transports? 1. IBM 2 . NTDS 3. UN I VAC 4. Standard 8-40. How many computer words may be involved with a single data field? 1. A part of one word 2. One word 3. More than one word 4. Each of the above 8-41. In troubleshooting tape equipment, the most frequently encountered problem probably would be 1. incompatibility 2. electrical skew 3. oxide deposits 4. bad tape 8-42. Which of the following would NOT cause loss of compatibility between tape transports? 8-47. There are (a) tracks in 8-48, seven, eight each frame, of which (b) six, seven are used for data. 1. 2. 3. 4. (a) Eight (a) Eight (a) Seven (a) Seven (b) seven (b) six (b) seven (b) six What logic function provides dual computer access to the RD-243? 1. Interface 2. Duplex control 3. Time sharing 4. Dual function control 1. Read/write levels 2. Electrical skew 3. Change in stop-start time 4 . Bad tape 71 8-49 The RD-243 can (A) B 1 S 8-50 8-52. read only, read at a tape speed of or write (b) 112.5 ips only, either 112.5 ips when tape is moving or 225 i ps in reverse. 1. (a) Read or write (b) Either 112.5 ips ips or 225 2. (a) Read or write (b) 112.5 ips only 3. (a) Read only (b) Either 112.5 ips ips or 225 4. (a) Read only (b) 112.5 ips only The OPERATION mode switch is mounted on which panel of the following panels? 1. The remote transport control 2. The local transport control 3. The magnetic tape control 4. The tape transport control 8-51. In the (a) position, normal, reversed the TRANSPORT ADDRESS Switch would cause transport #2 to be on the (b) . top, bottom 1. (a) Normal (b) top 2. (a) Normal (b) bottom 3. (a) Reversed (b) top 4 . Both 2 and 3 above After setting the SPEED SELECT switch to the step position, which of the following pushbuttons will cause the clock to advance from 02 to 3? 1. The TIMING 2. The TEST/CLEAR 3. The CYCLE STEP 4. The PHASE STEP 8-54. Refer to figure 5-4 in the text: Which power switch (es) must be turned OFF for mounting or unmounting the upper transport? 1. The Magnetic Tape Unit 2 power switch only when the transport address is REVERSED 2. The Magnetic Tape Unit 1 power switch only when the transport address is set to NORMAL 3. The Magnetic Tape Unit 1 power switch under all conditions 4 . Both 2 and 3 above 8-55. Which of the following push- buttons is used to put a tape transport in the manual (offline) mode by taking it out of the automatic (computer) mode? 1. STOP/CLEAR 2. MASTER CLEAR 3. MONITOR 4 . AUTO 8-56. A master tape is identified by what means? 1. A label affixed to the take- up reel 2. An external function from the computer 3. A flat ring inserted into the supply reel rim 4. A pushbutton on the MTC panel 8-57. What does the MASTER TAPE indi- cator signify when lit? 1. This tape can only be read, not written on 2. This tape is only used as a program tape 3. This tape is used for read/ write level adjustments 4. This tape is intended for skew adjustments 8-5 3. Which of the following conditions will cause an "improper condition" status to occur? 1. Selecting neither or both transports 2. A rewind command at EOT 3. A reverse command at EOT 4 . A forward command at BOT 72 PHYSICAL ASSEMBLIES A. Tension arms B. Sensor arms C. Tape hubs D. Tape reels E. Pinch roller assemblies F. Vacuum chambers G. Capstans H. Limit switches ! I. Drag Pads Figure 8-1 For items 8-5 8 through 8-62, select the physical assembly from figure 8-1 that provides the function described in the item. 8-5 8. Feeds out the tape. 1. C 2. D 3. E 4. G 8-59. Stores the tape. 1. A 2. C 3. D 4. F 8-60. Shuts the transport off if the tape breaks. 1. B 2. E 3. F 4. H 8-61. Changes tape direction. A. Place an empty reel on the upper hub B. Place a reel of tape on the lower hub C. Pull the upper hub locking lever straight out D. Pull the lower hub locking lever straight out E. Lock the hub again with the locking lever F. Secure transport power G. Rotate the tape load handle clockwise H. Rotate the tape load handle counterclockwise I. Wrap the free tape end on the takeup reel clockwise several times to secure it J. Place the sensor arms back against their stops to clear the tape reels Figure 8-2 For items 8-64 through 8-67, select the appropriate step(s) from figure 8-2 to complete each phase of a tape mounting operation described in the item. 8-64. The first three steps of mounting a tape should be 1. A, J, D 2. B, D, G 3. F, J, C 4. H, J, E 8-65. The three steps following step C would be 1. A 2. C 3. E 4. G 1. A, E, D 2. A, I, E 3. B, A, I 4. G, I, F ■62. Acts as a fine buffer system, 1. B 2. F 3. H 4. I ■63. Which of the following is actually reported or used in the RD-243? 1. Low tape status 2. High tape status 3. Forward slowdown 4. Rewind slowdown 8-66. Which step requires extra care? 1. B 2. G 3. I 4. J 8-67. By what means is the tape secured to the takeup reel? 1. By multilayered friction 2. By hub slot insertion 3. By reel slot insertion 4. By magnetic attraction 73 ■68. How is tape placed into the tape groove? 1. The free end from the takeup reel is drawn along the groove path 2. The free end from the supply reel is drawn along the groove path 3. The slack from the takeup reel forms a loop that is laid into the groove path 4. The slack from the supply reel forms a loop that is laid into the tape load position 74 Assignment 9 NTDS Peripheral Equipment Textbook Assignment: pages 163 through 176 Learning Obj eative: Once a tape is mounted on a transport, learn the proper way to thread the tape through the mechanism and remove it from the trans- port. 9-1. When properly loaded, the tape should be between the (a) sensor, arm rollers and the station- 9-3. tension ary rollers of the roller assemblies. (b) bridge, pinch 1. (a) sensor (b) bridge 2. (a) sensor (b) pinch 3. (a) tension (b) bridge 4. (a) tension (b) pinch 9-2. The tape must pass (a) the below, above BOT lamp and (b) the EO' under, over lamp. 1. (a) below (b) under 2. (a) below (b) ever 3. (a) above (b) under 4. (a) above (b) over When the tape is properly loaded, where will the transparent leader be positioned? 1. On the outer layer of the supply reel 2 . Under the EOT lamp 3. Under the BOT lamp 4. On the takeup reel 9-4. When the power switch in Magnetic Tape Unit 1 is placed to ON, which of the following will occur? 1. The blower will be activated 2. The pinch rollers will become engaged 3. The hubs will rotate in a for- ward direction until EOT is reached 4. The tension arms will not move 9-5. The FWD indicator button on Mag- netic Tape Unit 1 will cause which of the following to occur? 1. The FWD pinch roller to deener- gize 2. The FWD pinch roller to ener- gize 3 . The tape to become properly seated in the tension arm grooves 4 . Both 2 and 3 above 9-6. Once power is applied to a tape transport, what three steps will assist in verifying that the tape is properly mounted? 1. Run the tape in reverse, then forward, then press the STOP- CLEAR button 2. Run the tape forward, then in reverse, then push the STOP- CLEAR button 3. Rewind the tape, then run it forward, then push the STOP- CLEAR button 4. Run the tape forward, press the STOP-CLEAR button, then rewind the tape 75 9-7. B I.; 1 I. ■' 9-8, 9-9 Which indicator/pushbutton will 9-11 permit automatic operation of the MTU by the computer? 1. MASTER CLEAR 2 . AUTO 3. A IN CONTROL 4. SELECTED When a tape is to be removed, 9-12, what step will place it in manual control (and remove it from com- puter control) without affecting the other tape transport which may be in use? 1. Pressing STOP-CLEAR 2. Reversing Transport Address 3. MASTER CLEAR 4. Pressing T20 in End of Func- 9-13 tion sequence The purpose of rotating each reel independently after the tension arms are drawn in is to 1. release tension in the tension arms 2. feed tape from one reel to the other 3. take up tape slack 4. allow slack for removing the tape from the vacuum chambers 9-14 Learning Objective: To identify program- ming considerations required in the use of the RD-24Z; to recognize the RD-243 tape format. This objective continued in Assignment 10. 9-10. Computer programs control the RD-243 by using which of the following? 1. Status words 2. External function words 3. Data words 4. All of the above The computer sends an EXTERNAL FUNCTION word requesting RELEASE LOCAL, MASTER CLEAR, and REWIND WITH LOCKOUT bits set 9-15 Figure 9-1 Refer to figure 9-1 above and figure 5-8 in the text when answering questions 9-11 through 9-13. Which of the following designated functions would have the highest priority? 1. Duplex 2. Master clear 3. Request control 4. Release control What is the octal coding of the external function word? 00000 00114 00000 00112 00000 00214 00000 00212 Which of the following instruc- tions can be executed simulta- neously? 1. Request control and release local 2. Request control and release remote 3. Release local and release remote 4. Request control, release loca and release remote The RD-243 will generate an inter rupt to the computer after which of the following? 1. Release remote 2. Release local 3. Request control 4. All of the above Refer to figure 5-9 in the text. The RD-24 3 status interrupt word is used to inform the computer when which of the following con- ditions exists? 1. The computer has control 2. The last function was com- pleted normally 3. The last function was com- pleted abnormally 4. Each of the above 76 9-16. Refer to figure 5-8 in the text. Which of the following bits would NOT be pertinent to a write oper- ation? 1. Reverse direction 2. Parity format 3. Low density 4. Tape Transport 1 9-17. Which, if any, of the following statements about the RD-24 3 I/O functions is INCORRECT? 1. The input or output buffer precedes the status interrupt word 2. The external function word precedes the status interrupt word 3. The external function word precedes the input or output buffer 4. None of the above 9-18. What type of errors can be avoided by maintaining the proper sequence when initiating read/write opera- tions? 1. Sync errors 2. Input timing errors 3. Output timing errors 4 . Both 2 and 3 above 9-19. By which of the following does the magnetic film developer leave an imprint on the tape? 1. Oxide adhesion 2. Evaporation deposits 3. Magnetic attraction 4 . Both 2 and 3 above 9-20. By what means would a permanent copy of the developed film nor- mally be made? 1. Applying a "fix" 2 . Photography 3. Tape transference 4. Oxide bonding 9-22. Which of the following statements is true? 1. The RD-24 3 uses double file marks to mark the end of the data field 2. Records are generally made up of one or more blocks 3. Blocks are generally made up of one or more records 4. Blocks and records are synonymous 9-23. What determines the practical upper limit to the number of CP- 642B computer words that can be written into one block on magnetic tape, using Redundant format? 1. Number of available sprockets 2 . Tape length 3. RD-243 bit density format 4. CP-642B memory size Items 9-24 and 9-25 are to be judged True or False. 9-24. The RD-243 uses odd parity for both Parity and Redundant formats. 9-25. NTDS and UNIVAC are synonymous with Redundant. 9-26. The limit of 24 words per block is established by 1. tape width 2. intersystem convention 3. use of the NTDS format 4. maximum buffer length 9-27. Which of the following formulas would yield the number of inches required for storing 210 30-bit computer words in high-density parity format? 210 x 8 9-21. The RD-243 uses a (b) (a) reflective, transparent its BOT and EOT. gummed, spliced tape for 2. 210 x 210 / 210 x 210 x 8 210 4. 210 / 5x8 210 5x8 1. (a) Spliced 2. (a) Spliced 3. (a) Gummed 4. (a) Gummed (b) transparent (b) reflective (b) transparent (b) reflective 77 A. Duplexer B. Tape Transport Control C. Magnetic Tape Control D. Tape Transport lew SB' W Figure 9-2 For item 9-28, refer to figure 9-2. 9-28. What is the order of sections involved from the point where the computer issues an external func- tion word to the RD-24 3 to the point where the tape actually moves? 1 . ABCD 2 . ACBD 3 . ACDB 4 . CABD For items 9-29 through 9-33, match one of the four major MTU sections from Column B with a function it performs in Column A. The MTU sections in Column B may be used more than once. A. FUNCTION 9-29. Eliminates manual switch- ing of the RD-24 3 from computer to computer. 9-30. Distributes data between the computer and the se- lected tape transport 9-31. Checks for improper condition 9-32. Provides for tape movement and read/write capabilities. 9-33. Controls the tape transport. B. MAJOR MTU SECTION 1. Duplexer 9-34. Which duplex function (s) permit (s] one computer to interfere with another computer's use of the RD-243? 1. The release local function 2. The release remote function 3. The request control function 4 . Both 2 and 3 above 9-35. Which section actually converts the computer words into bytes, or bytes into computer words? 1. The duplexer 2. The tape transport control 3. The magnetic tape control 4 . The tape transport 9-36. The Start of Function, Read/Write Shift, and End of Function are used by which section of the RD-243 to control its operation? 1. Duplexer 2. Magnetic Tape Control 3. Tape Transport Control 4 . Tape transport For items 9-37 through 9-40, select the logic section in Column B that performs the function listed in Column A. The logic section in Column B may be used more than once and all sections may not necessarily be used. A. FUNCTION B, LOGIC SECTIOl 2. Tape Trans- port Control (TTC) Magnetic Tape Control (MTC) Tape Trans- port 9-37. Requests data 1, from the com- puter. 9-38. Decodes external 2, functions from the computer. 9-39. Exits to the 3, End of Function sequence. 9-40. Initiates the 4, Read/Write Shift sequence. Start of Function Sequence End of Func- tion Sequence Read/Write Shift Sequenc Function Register 78 9-41. 9-42. 9-43. 9-44. How many frames would a 30-bit word written in (a) NTDS format and in (b) UNIVAC format require? 1. (a) 20 (b) 10 2. (a) 10 (b) 5 3. (a) 5 (b) 10 4. (a) 10 (b) 20 If the Read/Write Shift sequence has assembled a second word com- pletely before the first work has been transmitted to the com- puter, what indication of this will appear in the following status interrupt word? 1. The Improper Condition bit will be set 2. The Sync Error bit will be set 3. The Output Timing Error bit will be set 4. The Input Timing Error bit will be set A computer input terminates, and the computer receives an external interrupt from the MTU indicating an ITE has occurred. What does this signify? 1. That one or more words intended for the computer may have been lost 2. That the computer's input buffer may have been too large 3 . Both 1 and 2 above 4. That the received data is totally in error Under which, if any, of the follow- ing conditions would an OTE condi- tion (i.e., a late or nongenerated output acknowledge signal from the computer) be INHIBITED from appear- ing in the status word after the output buffer terminates? 1. After the first word has been written on tape, and before the EOF sequence is initiated 2. When the MTU is prepared to write the first frame of tape 3. Once the EOF sequence has been initiated 4 . None of the above 9-45. Of the following, which error con- dition, if any, will exist if the MTU ceases to detect data on the tape? 1. An input timing error 2. An output timing error 3. An improper condition 4 . None of the above 9-46. Which of the following error con- ditions would be transmitted to the computer if the final assembled word were incomplete? 1. An improper condition 2. An OUT OF SYNC error 3. An output timing error 4. An input timing error 9-47. The (a) of Function sequence Start, End initiates a delay for the (b) first, half of the IBG and resets second the MTC for the next external function code. 1. (a) End (b) second 2. (a) Start (b) second 3. (a) End (b) first 4. (a) Start (b) first For items 9-48 through 9-51, match the register in Column B with the function in Column A. Responses in Column B are used only once. 9-48, A. FUNCTION B. REGISTER Data nonduplex 1. F external func- tions and status 2. C words all pass through this 3. Z register 4. S 9-49 Retains the cur- rent external function code 9-50. Accumulates error indications 9-51. Uses 30 bits in the assembly and disassembly of words 79 (. ; 1. 1 1 1 fa 9-52. Which of the following will NOT 9-59, be transmitted to the C register? 1. Data 2. Nonduplex functions 3. Status words 4. Duplex control codes 9-53. The status register receives its status indications from which of the following? 1. The magnetic tape control circuits only 2. The duplexer logic circuits only 9-60, 3. Various circuits in the mag- netic tape unit 4. The tape transport control circuits only 9-54. The status register will indicate errors that occurred during which of the following operations? 1. Read 9-61, 2. Write 3. Previous write 4. All of the above 9-55. What register uses 6 bits in the assembly or disassembly of words? 1. The C register 2 . The F register 3. The S register 4. The X register 9-62. 9-56. What does the error counter count? 1. All input timing errors 2. All output timing errors 3. All parity errors 4. All of the above 9-57. What output (s) does the error counter provide? 9-63 1. It provides visual indications of the difficulty 2. It generates both parity and error status 3. It sets interrupt bits to show the number of errors 4. All of the above 9-58. The parity translator provides (a) parity when writing, and odd, even verifies (b) parit reading. odd, even 1. (a) odd (b) odd 2. (a) odd (b) even 3. (a) even (b) odd 4. (a) even (b) even In the NTDS (Redundant) mode, the parity bit is always a (a) and T7~0 as such, has the same phasing as the (b) interblock gap, sprocket trac> , making it effectively a bit redundant sprocket bit. 1. 2. 3. 4. (a) 1 (b) (a) 1 (b) (a) (b) (a) (b) interblock gap sprocket track bi interblock gap sprocket track bi The determination as to whether the tape transport can perform the requested function is made in the 1. duplexer section 2. magnetic tape control section 3. tape transport control sectior 4. tape transport section Which of the following make up the primary drive mechanics? 1. Pinch rollers and hub servo- mechanisms 2. Capstans and hub servomechan- isms 3. Pinch rollers and capstans 4. Hub servomechanisms , pinch rollers, and capstans The sensing elements required for checking such things as BOT, EOT, tape breakage, write lockout, etc are located in the 1. duplexer section 2. magnetic tape control section 3. tape transport control section 4. tape transport section What would be the consequence of power loss to the capstan motor? 1. The transport would immediatel cause an emergency power off condition 2. Only one capstan would be affected, permitting tape motion to still occur in the opposite direction 3. Both capstans would be affected, inhibiting any tape motion in either direction 4. The photoelectric sensors would detect constant BOT and EOT status indications 80 9-64. If a pinch roller assembly would not activate, what would be the consequence? 1. The transport would immedi- ately cause an emergency power off condition 2. Only tape motion in one direction would be affected 3. Tape motion could not occur in either direction 4. The transport would suffer a tape spill 9-65. What areas of the transport are used for some form of tape storage? 1. Tape reels 2. Tension arms 3. Vacuum chambers 4. All of the above Item 9-66 is to be judged True or False. 9-66. The inward and outward deflection of the tension arms is caused by the amount of tape on the tension arms. 9-67. Which of the following would cause a tension arm to move from its midrange position? 1. Tape being added to it by the primary drive mechanics only 2. Tape being removed from it by the primary drive mechanics only 3. Both 1 and 2 above 4. Tape either being added to or removed from it by the move- ment of the tape reels 9-68. Movement of the tension arms is detected by a potentiometer which generates an error signal. Which of the following determine (s) the polarity of the error signal? 1. An increase in the amount of tape on the tension arms 2. A decrease in the amount of tape on the tension arms 3. Both 1 and 2 above 4. The upward direction of the offset 9-69. 9-70 9-71 Outward movement of the upper tension arm takes place when U) tape is added to, tape is removed it, while the lower tension from arm simultaneously moves (b) outward, from its midrange position, inward 1. (a) tape is added to (b) outward 2. (a) tape is added to (b) inward 3. (a) tape is removed from (b) outward 4. (a) tape is removed from (b) inward The direction the tension arms have moved with respect to (a) each other, their midrange positions determines the direction of rota- tion for their servo motors, while each increase in their off- set will result in a corresponding (b) in the hub increase, decrease servo motor speed. 1. (a) each other (b) increase 2. (a) each other (b) decrease 3. (a) their midrange positions (b) increase 4. (a) their midrange positions (b) decrease Which, if any, of the following will cause the tension arm to become stabilized in its arc of movement? 1. The tape reel speed is slower than the tape tension arm speed 2. The tape reel speed is faster than the tape tension arm speed 3. The tape reel speed is equal to the tape tension arm speed 4. None of the above 81 i (■'■ ! ; '{■■'■ '• 3" 1 9-72. What would be the most probable result of an irregular operation of the tape transport? 1. Tape would fly out from the tension arms 2. Power would immediately shut off before any effects would occur 3. Tape would wrap itself around either capstan 4. Tape would break 9-73. Dashpots are used to absorb excessive energy in the (a) tension that miqht arms, hub servo motors otherwise cause damage to the tension arms if the (b) tape breaks, hub brakes fail. 9-74. The initial data reference point is obtained from the (a) BOT, EOT label, which is detected via a/an (b) electromechanical, photoelectric sensor. 1. (a) BOT (b) electromechanical 2. (a) BOT (b) photoelectric 3. (a) EOT (b) electromechanical 4. (a) EOT (b) photoelectric Item 9-75 is to be judged True or False. 9-75. When tape movement stops at either label, the tape section across the head will be oxide coated and positioned between the two labels. 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) tension arms tape breaks tension arms hub brakes fail hub servo motors tape breaks hub servo motors hub brakes fail m 82 Assignment 10 NTDS Peripheral Equipment Textbook Assignment: pages 176 through 189 Learning Objective-continued: To iden- tify programming considerations required in the use of the RD-243; to recognize the RD-243 tape format. Refer to figure 5-6 in the text when answering item 10-1. 10-1. When moving forward, the EOT label will stop (a) reaching before, after the read/write head, and when moving in reverse , the BOT label will stop (b) reaching before, after the read/write head. 1. (a) before (b) before 2. (a) before (b) after 3. (a) after (b) before 4. (a) after (b) after 10-2. Which of the following is/are the purpose (s) of the vacuum buffer? 1. To isolate tape on the tension arm from the tape drive system 2. To smooth out small, jerky movements of the tape 3. To prevent tape slippage and positioning errors 4. All of the above 10-3. A FWD command activates the upper pinch roller assembly. How will this affect the (a) upper vacuum chamber, and (b) upper tension arm? 1. (a) Increases vacuum (b) adds more tape 2. (a) Increases vacuum (b) removes some tape 3. (a) Decreases vacuum (b) adds more tape 4. (a) Decreases vacuum (b) removes some tape Items 10-4 through 10-8 are to be judged True or False. 10-4. The sensor arms on the RD-24 3 are used to slow high speed movement in either direction. 10-5. The dashpots prevent the sensor arms from striking their stops with great force. 10-6. A single capstan motor powers both capstans 10-7. Tape moves as soon as the capstans are energized 10-8. High tape speed in the RD-243 is 225 ips. 83 ■ 10-9. 10-10. 10-11, 10-12, _UL pinch roller The upper, lower is used for the forward direction when the pinch roller solenoid is (b) energ ized, de ene rgized 1. (a) upper (b) energized 2. (a) upper (b) deenergized 3. (a) lower (b) energized 4. (a) lower (b) deenergized What purpose does the speed change relay have in the RD-24 3? 1. It changes tape speed for forward and reverse tape motion 2. It senses changes in direc- tion and speed when they occur 3. It adjusts for changes in bit density selection 4. It affects the rotating speeds of the capstans If the tape breaks and power is suddenly removed from the hub motors, which of the following will occur? 1. An electric brake will stop the reel motors 2. A spring-loaded brake will stop the reel motors 3. The reel motors will reverse their direction 4. The reel motors will not be affected A small scratch across the tracks on the head seems to be the reason one tape transport cannot be adjusted to read or write without errors. The proper procedure to correct this prob- lem would be to 1. polish the area with BRASSO and a soft chamois cloth 2. rub very gently with #150 or finer emery cloth 3. use jewler's rouge and an art eraser, alternately, to polish the head 4. replace the head and return the defective one for re- pairs 10-13, 10-14. Details on replacing the read/ write head can be found in the 1. EIMB, General Maintenance Handbook 2. maintenance section of the technical manual 3. troubleshooting section of the technical manual 4. EIBs The tape transport mechanics are controlled by six (a) modules, sensing elements located in the (b) tape transport, drive electronics unit modules tape transport modules drive electronics unit sensing elements tape transport sensing elements drive electronics unit For items 10-15 through 10-18, select the function from Column B that is per- formed by the module in Column A. Functions in Column B are used only once, 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) A. MODULE 10-15. Solenoid Drive Module 10-16. Speed Select Module 10-17. Servo Modulator Supply Module 10-18. Servoamplif ier Module B, FUNCTION Provides reference voltage to be used for controlling the servo motors Controls the direction and speed of each servo motor Generates zero offset in the servo- amplifier modules for the tension arms Chooses 112.! or 225 ips 84 10-19. Which of the following modules is used to detect tape labels? 1. The solenoid drive 2. The speed select 3. The servoamplifier 4. The EOT/BOT amplifier 10-20. Which module type appears twice in each drive electronics unit? 1. Speed select module 2. EOT/BOT amplifier module 3. Solenoid drive module 4. Servoamplifier module 10-21. Manual operation of the RD-24 3 may NOT indicate proper operation of which of the following cir- cuits? 1. Duplex 2. Input 3. Output 4. All of the above 10-22. What type errors are best analyzed during computer operations rather than during manual operations? 1. Parity 2. ITE 3. OTE 4. Timing 10-25. Which of the following state- ments, if any, best describes the basic objective in manually testing the RD-243? 1. To free the computer for more demanding work 2. To test as many functions as possible 3. To duplicate computer opera- tions precisely 4 . None of the above 10-26. What should be done in order to initiate a reverse or rewind manual operation? 1. Press the REV button on the tape control 2 . Move the tape forward for several minutes 3. Press the REW button on the tape transport 4. Rewind the desired transport 10-27. For manual operations, which, if any, duplexer control must be enabled? 1. A Out Control only 2. A In Control only 3. B In Control only 4. Either A or B In Control, but not both 10-23. The C register will show data errors that occurred during which of the following opera- tions? 1. Read 2. Previous Write 3. Both 1 and 2 above 4. Write 10-24. In the RD-24 3, a manual operation that is intended to simulate a computer operation would be initiated with the function code inserted in the 10-28. If the operator wanted to initi- ate a manual write operation for Tape Transport 1, at which point in the 11-step procedure would he set the necessary bits of the C register? 1. 2. 3. 4. Step 1 Step 7 Step 8 Step 9 1. F register 2. C register 3. Z register 4. start function register 85 ; ■ A manual write operation has been initiated on one transport which was situated at BOT using the first method described in the text. Once tape motion has been initiated and the tape has moved a short distance, the CLR button for the C register is pressed, and each bit is then manually set in the register sequentially from 29 2 through 2 . When the final bit is set, the write operation is manually terminated and the transport is returned to BOT using the RWD button. The following are conditions that can be seen in the C register during subsequent reads of the data block just written, though not necessarily in the order given nor together in the same read operation. During the write operation, the observed order is A, B, C, D, and B again. CONDITION A. The function word for a write operation B. No bits lit C. Sequential lighting of the 29 bits from 2 ' through 2 D. All bits lit E. The function word for a read reverse operation F. Sequential extinguishing of 29 the bits from 2 through 2 10-30 10-31, 10-32, 10-33, Figure 10-1 Refer to figure 10-1 when answering items 10-29 and 10-30. 10-29. During a FWD READ of the data block using method 2 in the text, what order of conditions would be observed in the C register during the period of tape motion? 1. The same as for the write operation 2. The reverse order of the write operation, plus another B 3. B, D, C, B, E, B 4. E, B, C, D, B During a REV READ of the same data block, what order of observable condition will be seen in the C register from before tape motion is initiated (using the first method des- cribed in the text) , until after the point where tape motion ceases? 1. E, B, D, F, B, A 2. E, B, C, D, B 3. E,C,D,B 4. A,B,C,D,B Which, if any, of the following is normally seen in the C regis- ter at the end of a read or write operation? 1. The last external function code from the computer 2. The last data word trans- mitted to or received from the computer 3. The last status word sent to the computer 4 . None of the above Which, if any, of the following conditions will NOT result in the termination of a manual write operation? 1. Setting the Operation Mode switch to INSPECT EF 2. Reaching an IBG on the tape 3. Reaching the EOT label on the tape 4. None of the above If the Operation Mode switch is NOT switched to the INSPECT EF position (the means by which the function can be manually inserted through the C register) , how, if at all, would the function be manually inserted? 1. Directly into the function register (fig. 5-3) 2. Via the computer interface (fig. 5-1) 3. Through the tape transport control panel (fig. 5-4) 4. None of the above 86 10-34 10-35, 10-36. 10-37, The timing flip/flop T2 can be manually pressed to initiate a portion of the (a) , Start and End, function 10-39, End and Start sequences, but the use of the T2 pushbuttom requires that the function desired be already in the (b) register. c, function 1. (a) End and Start (b) Function 2. (a) End and Start (b) C 3. (a) Start and End (b) Function 4. (a) Start and End (b) C 10-40, 10-41. Which of the following reasons makes method 1 of initiating a manual operation of the RD-24 3 preferred over method 2 in some instances? 1. More closely parallels the approach used when under computer control 2. Easier to remember and enter the function desired 3. Eliminates errors that result from slow switch movement 4. Provides a simpler procedure If step 12 is omitted, the pro- cedure outlined under Write Operations in the text can be used for writing Is data on all of the following EXCEPT 1. skew tapes 2 . mechanics tapes 3. levels tapes 4 . 1 ' s tapes The Speed Select switch is use- ful during which of the follow- ing manual operations? 1. Write 2. Rewind 3. Read 4. All of the above Items 10-38 through 10-40 are to be judged True or False. 10-38. Depressing and holding the Operational Mode key during a write operation, will result in an improper parity written on tape . 10-42, The information obtained while checking the error counter dur- ing a write operation can also be used to check the error counter during a subsequent read operation. The Operational Mode switch con- trols the rate at which short blocks of data are written or read from the tape. A technician performs repeated manual write operations by holding the write function bits set in the C register with one hand and manipulating the Opera- tional Mode switch with the other. In what positions would the Oper- ational Mode switch cause the bits of the C register to (a) form the manual function code, and (b) form the data for a write operation? 1. (a) Test T.D. (b) Normal 2. (a) I/O Inact (b) Inspect EF 3. (a) Inspect EF (b) I/O Inact 4. (a) Normal (b) Test T.D. A technician has written a series of data blocks using the repeated manual operation technique, and the Operational Mode switch was left in the position for writing data for approximately three seconds during each block. What would be (a) the fastest rate of recovery possible for this data during a repeated manual read operation, and (b) what would be the slowest rate of recovery possible under the same cond- itions? 1. (a) Any interval faster than three seconds (b) Any interval slower than and including three seconds Three seconds Any. interval slower than three seconds Three seconds Three seconds Any interval faster than three seconds (b) Three seconds 2. (a) (b) 3. (a) (b) 4. (a) 87 10-43, 10-44, i ; ! It'! 10-45, 10-46. 10-47, During repeated forward opera- tions, the arrangement of the manual controls for the C register requires at lease (a) one , two , three hand(s) to keep essential bits depressed in the register, meaning that one (bj free hand, is required to 10-48, other person operate the Operational Mode switch. 10-49 1. (a) One (b) 2. (a) One (b) 3. (a) Two (b) 4. (a) Three (b) free hand other person other person free hand If the repeated operations involve 10-50. reverse, rather than forward movement of the tape, what effect, if any, would this have on the number of people needed for mani- pulating the C register and Opera- tional Mode switch? 1. It would mean that one less person would be required 2. It would mean that more than 10-51, one additional person would be required 3. It would mean that one more person would be required 4 . None Which of the following switches is NOT set during a manual erase operation? 10-52, 1 . WRITE 2. T2 3. SELECTED 4. FWD Refer to the RZ portion of figure 5-10a. Which of the following will NOT be written on tape if a manual erase is used instead of a write operation using all zeros data? 10-53, 1. Parity bits 2. Sprockets 3. Data 4. All of the above Which of the following types of RD-24 3 malfunctions would the sense of smell most likely locate? 1. A poor vacuum suction 2 . A blown fuse 3. A dry bearing 4. An overheated motor 88 What sense would immediately sug- gest that a tape loop has not properly formed in a vacuum buffe chamber? 1. Sight 2. Hearing 3. Touch 4. Smell Which sense is usually adequate for checking the relative temper- atures of various components? 1. Sight 2. Hearing 3. Touch 4. Smell Which of the following changes in terminology is also marked by actual changes in technology? 1. Blocks vs. records 2. IBGs vs. IRGs 3. Write rings vs. write protect rings 4. Each of the above Start/Stop times are used to establish which of the following parameters in an MTU? 1. Size of the IRG 2. Tape speed 3. Bit density 4. All of the above Obtaining either a Start time or Stop time display on an oscil- loscope is simply a matter of 1. switching from EXT to INT trigger 2. adjusting the ± SLOPE switch 3. changing the TIME/CM switch setting 4. reversing the direction of tape motion What type of tape is utilized in making Start/Stop time adjust- ments? 1. Mechanics 2. Levels 3. Skew 4. l's 10-54. What happens if the read circuits on a magnetic tape unit are made too sensitive? 1. Low signal levels, when using tapes of poor quality, are likely to result in a loss of l's data 2. Sources of background noise on the tape may be detected as data 3. Close placement of the read/ write heads will cause write head data to be detected by the read head and result in degenerative feedback in the read/write circuits 4. All of the above 10-59. 10-55. 10-57, 10-58. Which of the following tests is intended for detecting potential problem areas? Operational Trigger Marginal Bias (a) 10-56. The (a) pads are used to brake, drag stop the tape, and are applied to the loaded tape (b) at all times, sometimes 1. (a) Drag (b) sometimes 2. (a) Drag (b) at all times 3. (a) Brake (b) sometimes 4. (a) Brake (b) at all times 10-60 10-61. If tape runs off the takeup reel at the end of a rewind operation, what adjustment (s) is/are probably off? 1. EOT 2. BOT 3. Both 1 and 2 above 4. Dashpot The indications are that proper vacuum pressure is not being maintained in the vacuum chambers . Which of the following corrective operations should NOT be taken by the ship's force? 1. Replace the vacuum motor 2. Reseat the vacuum chamber divider 3. Adjust the vacuum ports 4. Clean the chamber area 10-62, The head alignment involves (a) how many axes of rotation, and (b) how many measurements along each axis? 1. (a) Three (b) three 2. (a) Three (b) two 3. (a) Two (b) three 4. (a) Two (b) two Making a head alignment requires the use of (a] , shims, tapered wedges and the adjustments along one axis will affect (bj only that, each axis. 1. (a) Tapered wedges (b) Each 2. (a) Tapered wedges (b) Only that 3. (a) Shims (b) Each 4. (a) Shims (b) Only that A tape which is correctly aligned to the read/write heads (a) will, will be skewed, but the angle at not which the (b) tape reels and hubs, con- pinch rollers and capstans tacts the tape will affect the tapes skew. Will not Pinch rollers and cap- stans Will not Tape reels and hubs Will Pinch rollers and cap- stans Will Tape reels and hubs Improper operation of the primary drive mechanics (pinch rollers and capstans) results primarily from which of the following con- ditions? 1. Periodic use of maintenance programs 2. Loose movement, uneveness, and evidence of a lack of physical alignment 3. An evidence of wear 4 . Both 2 and 3 above 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) 89 10-63. Return force is used primarily to perform which of the following functions? 1. Return the solenoid to its proper position 2. Return the pinch roller to the tape 3. Allow quick tape stops 4. All of the above 10-64. What adjustment (s) may be altered when setting pinch roller/capstan clearance? 1. Parallelism 2. Drive force 3. Return force 4. All of the above 10-65, Tl I 35 "J IV! Drive force is initiated by solenoid (a) activation, deactivation and is countered by the (b) return , force , break aw a y 1. (a) activation (b) return 2. (a) activation (b) breakaway 3. (a) deactivation (b) return 4. (a) deactivation (b) breakaway 10-66. Which of the following measurement are synonymous? 1. Breakaway and drive 2. Parallelism and return 3. Breakaway and parallelism 4. Drive and return 90 Assignment 11 NTDS Peripheral Equipment Textbook Assignment: pages 190 through 215 Learning Objective : Identify the forms 11-4, of misalignment caused by eleotrioal head skew and the steps used to estab- lish a maintenance program from magnetic tape . 11-1. Which of the following tapes is normally used for checking elec- trical skew? 1. Mechanics 2. Levels 3. l's 11-5. 4 . Skew 11-2. Which of the following tapes must be used for adjusting the elec- trical skew of the RD-24 3? 1. Mechanics 2. Levels 3. l's 4 . Skew 11-3. When deskewing RD-243 transports, the normal procedure is to use a 1 ' s tape written on the £aj drive and to com- 11-6, best, worst mence deskewing operations on the (b) transport . best, worst 1. (a) best (b) best 2. (a) best (b) worst 3. (a) worst (b) best 4. (a) worst (b) worst What would be the results if a compatibility standard did not exist in a system? 1. Old tapes could no longer be read 2. Certain drives could only read specific tapes 3. New tapes would often prove unreliable later 4. All of the above A problem in establishing compati- bility between a transport's read and write circuits would result in what steps being taken until the situation is corrected? 1. Limiting the transport to read operations 2. Limiting the transport to write operations 3. Limiting the transport to erase operations 4. Limiting the transport to offline operations What feature of the RD-24 3 sim- plifies problems of compatibility considerably? 1. Its return to zero format 2. Its use of a clock track 3. Its low density 4. Its bioctal recording technique 91 11-7. What is the MINIMUM number of l's Learning Objective: To learn the basic tapes that should be retained as applications , operational characteristics system deskewing tapes for the of, and specific considerations in using RD-243? the ED-231A paper tape unit in NTDS. 1. One 11-12, 2 . Two only 3. Three 4. Two, and two in reserve 11-8. What factor (s) would affect the frequency of tape transport cleaning? 1. Indication of errors 2. Condition of tapes 3. Frequency of usage 4. All of the above 11-13. 11-14, 11-9. What program is used to load the first block of data on an NTDS program tape? 1. Bootstrap 2. Call number 1 3. Call number 4. Utility 11-10. What program is used to load all subsequent programs from an NTDS program tape? 1. Bootstrap II 2. Bootstrap I 3. Call number 1 4. Utility 11-15, 11-11. If a program occupies the entirety of the computer's memory and con- tains no provisions for calling subsequent programs, what pro- cedure must be followed for loading additional programs? 1. Institute a core dump 2. Make utility calls 3. Rebootstrap the computer 11-16, 4. Load the next program by hand Data transfers between the com- puter and the RD-231A paper tape occupy bits of a seven, thirty ^_^ pair of I/O normal, special cables . 1. 2. 3. 4. (a) Thirty (a) Thirty (a) Seven (a) Seven (b) special (b) normal (b) special (b) normal Thirty-bit words are packed/ unpacked (i.e., assembled/ disassembled) by 1. the computer program 2. paper tape punch logic 3. paper tape reader logic 4. PTU I/O control logic Which tape level is normally used as the parity level on paper tape? 1. First 2. Second 3. Fourth 4. Seventh In figure 5-17 of the text, the recepticle on the left side of the machine is used for which of the following purposes? 1. To catch punch chad from the punch 2. To catch tape from the punch 3. To catch tape from the reader 4 . Both 2 and 3 above The FAULT indicator on the PTU control panel is turned on by which of the following? 1. A signal from the computer 2. A write error 3. A reader error 4. A punch error 92 11-17. What indication is there that a "punched" tape contains data if only zeros have been recorded in the data levels and odd parity is used? 1. The presence of a feed hold in each frame 2. The presence of a utility bit in each frame 3. Both 1 and 2 above 4. The leader portion contains all "l's" 11-18, 11-19, 11-20 11-21, If the photocell for the feed hole level ceased functioning, what effect would this have on tape readability? 1. The computer could only receive the first frame of data from the reader 2. Only even parity frames could be read from tape 3. Only even parity data frames could be read correctly from tape 4. No data could be read from tape at all What would probably be the first indication that a paper tape station needed cleaning, or that the photolamp might be going bad in the reader station? 1. Tape advances and stops in a jerky fashion 2. Tape does not advance to first frame 3. Tape does not move past first frame 4. Tape moves through reader without stopping 11-22. Which of the following statements is true? 1. A maximum of nine holes is allowed across the width of a one-inch paper tape 2. Paper tape widths are mea- sured in eighths of an inch 3. The data levels on paper tape each require a tenth of an inch of actual tape width 4. Each of the above 11-2 3. Suppose a 30-bit computer word of all l's (7777777777 8 ) were sent to the RD-231A during a punch operation, and during a later read operation the same frame of data were read back by a computer that has a 30-bit word size. How many bits would be read back from a (a) seven- level tape, and (b) where would these data bits be posi- tioned in the received word? Seven 000000000000011111112 Seven 11111110000000000 ooo 2 Six 00000000000000 111111 2 Six 11111100000000000000 2 11-24. Suppose a 30-bit word with all l's data were used to write a frame of data on a six- level paper tape, but that frame of data was read back by a com- puter that only had an 18-bit word size. What would the input word contain? The computer sends a single data word of 6210743574 8 to the PTU after selecting a punch operation. What will actually be punched on tape? 1. The upper seven bits 2. The upper six bits 3. The lower seven bits 4. The lower six bits The PTU reader senses holes in the tape by use of 1. electromechanical detection 2. photoelectric sensing 3. ambient sound reflections 4 . microwave penetration 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) 1. 000000000000011111 2. 111111000000000000 3. 111110000000000000 4. 000000000000111111 11-25. Of the several levels of operation that can be used with the RD-2 31A, which of these, if any, permits compatibility with tapes from teletypes? 1. The seven level 2. The six level 3. The five level 4. None of the above, as the RD-2 31A is NOT compatible with tapes produced for or by teletypes 93 11-26. Assume that a seven-level bioctal tape is being planned as the out- put of a new program. What can the seventh level be used for? 1. For either parity or first frame information 2. For both parity and first frame information 3. It can be used as a utility bit 4. Each of the above 11-31. When the reader is stopped, what position does the last data frame received by the computer occupy? 1. One and a half frames beyond the photoelectric diodes 2. One frame beyond the diodes 3. One-half frame beyond the photoelectric diodes 4. Directly over the photo- electric diodes 11-27. The verification of punched data on paper tape must be accom- plished by which of the following? 1. By the program 2. Within the computer 3. Both 1 and 2 above 4. By the reader/punch logic in the RD-231A 11-32. Question deleted. 11-2 8. How many frames of data will the computer read when the computer's buffer control generates an Input Acknowledge signal? 1. 1 2. 5, if Bioctal format is used 3. 10, if Redundant format is used 4. Both 2 and 3 above 11-29. An input from the PTU to the com- puter is marked by abrupt stop/ start motions of the paper tape. Which of the following would be the most probable cause? 1. Delays within the program between inputs 2. Slow computer I/O sequencing 3. An improper reader brake adjustment 4. A slipping reader clutch 11-30. The reader has a tape loaded, the incandescent lamp is on, but the motor is not on. The most prob- able cause is a 11-33. The pinch roller solenoid and the brake solenoid have what timing relationship (s) to each other under normal operating conditions? 1. Only one may be activated at a time 2. Both may be deactivated at the same time 3. Both may be activated at the same time 11-34. There are a total of 11-35, (a) seven, eight punch pins in the HSP, and the (bj ^^_ is notably feed hold, utility different from the remaining holes. 1. (a) Eight (b) utility 2. (a) Eight (b) feed hole 3. (a) Seven (b) utility 4. (a) Seven (b) feed hole Which of the following is/are the purpose (s) of the magnetic revolver? 1. reader has not been selected 2. feed hole photodiode has opened 3. clutch slippage 4. tape jam 1. To provide punch timing 2. To synchronize data transfers from the computer 3. To alternate data transfer and punch cycles 4. All of the above 94 11-36 11-37. 11-38, 11-39, 11-40. When punching a "0" code, the blocking pawl will (a) , and the 11-41. en gage, disengage kn ee wi. LI (b) bend, remain straight 1. (a) engage (b) bend 2. (a) engage (b) remain straight 3. (a) disengage (b) bend 4. (a) disengage (b) remain straight When making mechanical adjust- ments to the HSP , the freedom of the various moving parts should be verified by rotating the motor shaft (a) clockwise, (as seen from counterclockwise the front) (b) manually, with power applied The feed hole punch linkage does NOT have which of the following? 1. Punch pin 2 . Blocking pawl 3. Long and short toggle arm 4. All of the above Which, if any, of the following actions is NOT inhibited by the absence of punchable data? 1. Data hole punches 2 . Feed hole punches 3 . Tape feed 4 . None of the above The tape feed ratchet will be (aj , at the time engaged, disengaged data is actually being punched in the frame of tape. This pos- ition of the ratchet occurs during the interval when the ratchet is advancing to the next (b) . frame , tooth 1. (a) clockwise (b) manually 2. (a) clockwise (b) with power applied 3. (a) counterclockwise (b) manually 4. (a) counterclockwise (b) with power applied 11-42. Proper lubrication of the HSP requires the use of which, if any, of the following? 1. Light machine oil 2. Graphite compound 3. Silicone grease 4 . None of the above , as the HSP uses self-lubricating parts Learning Objective : To learn the function of the OJ-212 teletypewriter and its application in NTDS. 11-4 3. The OJ-212, previously known as the (aj , TTY, UGC-13 (MOD) has an (b ) , online, offline application in NTDS when running Link 14. 1. (a) engaged 2. (a) engaged 3. (a) disengaged 4. (a) disengaged (b) frame (b) tooth (b) frame (b) tooth Use of the manual tape feed will produce which of the following tapes? 1. A completely blank tape (no data and no feed holes 2. An odd parity zeros tape (utility level and feed holes 3. A leader (feed holes only) 4. A utility level tape only 1. (a) TTY (b) online 2. (a) TTY (b) offline 3. (a) UGC-13 (MOD) (b) online 4. (a) UGC-13 (MOD) (b) offline 11-44. Which of the following OJ-212 units is/are a direct maintenance responsibility of DSs? 1. The transmitter-distributor 2. The page printer and keyboard 3. The typing and auxiliary typing reperforators 4. The adapter 95 11-45. 11-46, ' 11-47. 11-48. 11-49 Which of the following is used to drive the teletype printer? 1. A mechanical linkage 2. A constant level d.c. current 3. A constant level a.c. voltage 4. A constant level d.c. voltage A nontransmission period would be marked by (a) 11-50, 11-51. current flow, no , and the first current flow data "1' ' would be marked by a period of (b) current flow, no current flow 1. (a) No current flow (b) No current flow 2. (a) No current flow (b) Current flow 3. (a) Current flow (b) No current flow 4. (a) Current flow (b) Current flow 11-52, In order to clearly distinguish the pulse train, the first pulse must be a (aj , and the mark , space last pulse must be a (b) , 11-53. mark, space 1. 2. 3. 4. (a) Space (a) Space (a) Mark (a) Mark (b) space (b) mark (b) space (b) mark In a basic teletype setup, the various elements of the teletype machines used, communicate through which of the following conditions? 11-54, 1. A constant level of a.c. 2. A constant level of d. c. 3. A constant voltage level of a.c. 4. A constant voltage level of d.c. The OJ-212 pulse train consists of (a) pulses, of which seven, nine (b) are used for data. five, six 1. (a) Nine (b) six 2. (a) Nine (b) five 3. (a) Seven (b) six 4. (a) Seven (b) five Which of the following is/are NOT contained in an OJ-212 loop? 1. A computer 2. An adapter 3. A reperforator 4. A keyboard and printer Assuming that the OJ-212 was just turned on, and the status of the shift (LTRS or FIGS) position is unknown, what would be the minimum number of shifts needed to insure the printer will print all char- acters? 1. One 2. Two 3. Three 4. Four When the OJ-212 is online and in the K-T position, which of the following equipment would be in use? 1. The tape perforator 2. The keyboard 3. The tape reader 4. All of the above Which of the following is NOT a direction of data flow in the OJ-212? 1. Auxiliary reperforator to printer 2. Keyboard to auxiliary reperforator 3. Computer to printer 4. Tape reader to computer The adapter maintenance panel has a switch that is placed in the (a) position when test, offline using the OJ-212 without the com- puter, and an (b) switch to EFR, ACK allow codes which are manually inserted into the indicators on the adapter's panel to simulate a computer output. 1. (a) Offline (b) ACK 2. (a) Offline (b) EFR 3. (a) Test (b) ACK 4. (a) Test (b) EFR 96 11-55, 11-56, 11-57. By select use of the tape reader, keyboard, and reperforator; which of the following operations can be accomplished offline? 1. Delete a section when dupli- cating a tape 2. Insert a section when dupli- cating a tape 3. Obtain a printed copy of a tape while duplicating it 4. All of the above The Teletype Speed WPM switch provides the (_a) coarse, fine adjustment for changing the (bj of the start, length , width stop, and intelligence pulses. 1. (a) coarse (b) length 2. (a) fine (b) length 3. (a) coarse (b) width 4. (a) fine (b) width The line current used for NTDS operation is 1. 10 mA 2. 20 mA 3. 40 mA 4. 60 mA Refer to figure 11-1 when answering items 11-58 and 11-59. 11-58. The letter "A" identifies the code at which of the following circled frame positions? 1. One 2. Two 3. Three 4. Four 11-59. Suppose the reader reading this tape always sensed level 3 as a "zero." How would the group of characters punched in the tape (i.e., ABCDEFGHIJ-?:$3) print out when read? (Note: The LTRS and FIGS keys, represented by arrows on the tape , are not printed out on the printer, but would affect the shift operations of the printer to lower case and upper case if misread. Remember that a "zero" for a 2 2 occurs in each frame.) 1. EFGHIJABCDEFGHIJABCDE 2. 3:&8'-?:$31&8:-?:$3 3. EFGHIJ-?:$3!&8'ABCDE 4. -?4$3$&5'-?4$3 PRINT CHARACTERS CURRENT POSITION OF PUNCH PRINT MECHANISM CURRENT POSITION OF PUNCH PINS , L \ 5 030 108 080/0| A B CODOEOFOG HOIOJ ♦ - P \ $ Soo O O OOOO O (SPROCKET) o0 oooooooooooooo 3 o o o o o o LEVELS / 4 O OOO OO OO OOO t o o (FEED HOLES) 2 2 . BINARY 2' VALUES 2° © ©© © NOTE: TELETYPE CODES ARE FOUND IN FIGURE 5-30 OF THE TEXT. Figure 11-1 97 11-60, 11-61, 11-62. The adapter unit is used to pro- vide communications between the (a) and the 11-64, TTY, data flow register computer in (b) serial or parallel, form. standard 1. (a) TTY (b) serial or parallel 2. (a) data flow register (b) serial or parallel 3. (a) TTY (b) standard 4. (a) data flow register (b) standard The actual format conversion of the information that passes be- tween the teletype unit and the computer is accomplished by which of the following circuits? 1. Function translator 2. Control interface 3. Data flow register 4. Teletype printer Which of the following will take place when an Output Acknowledge signal is received by the adapter? 1. The Output Request signal will be disabled 2. Data will be provided for the data flow register 3. The timing chain will be energized 4. All of the above 11-65 11-66 Of the six functional groups in the adapter, which one generates signals for proper operation of the adapter circuits? 1. Manual controls 2. Function translator 3. Timing chain 4. Clock timing What feature, if any, of the OJ-212 permits its use with com- munications equipment or other teletypes? 1. The adapter 2. The auxiliary typing reper- forator 3. The auxiliary line relay 4 . None When inserting a paper roll and a new ribbon in the OJ-212 insure that the paper unrolls from (_aj and that the the top, underneath ribbon appears across the (b) of the front, b ack spools . 1. (a) the top (b) front 2. (a) the top (b) back 3. (a) underneath (b) front 4. (a) underneath (b) back Items 11-63 is to be judged True or False 11-63. A start pulse from the teletype enables the timing chain which produces timing signals that are used to select data bits that are sent from the adapter to the TTY. Assignment 12 NTDS Peripheral Equipment Textbook Assignment: pages 218 through 228 Learning Objective : To describe the MX-3195(V)/USQ-20(V) digital data intro- ducer; its purpose, functions, and basic applications in NTDS. 12-1. 12-2, The MX-3195(V), or keyset, is designed for (a) manual , automatic data insertions on (b) one, various subject ( s). 1. (a) manual (b) one 2. (a) manual (b) various 3. (a) automatic (b) one 4. (a) automatic (b) various The keyset can be easily adapted to new subject matter by changing its (a) to plastic overlay, keyboard another one with suitable legends, and by changing its address selec- m Jb) tor switch setting, readout format as a means of informing the com- puter of the new mode. 12-3. The use of projection type dis- plays with 12 lamps permits which of the following type displays? 1. Individual letters or number digits 2. Complete words or messages 3. Different background colors 4. Each of the above 12-4. Which of the following displays in the keyset uses projection lamps? 1. Numerals 0-9 2. Code words 3. Red display without symbology 4 . All of the above 12-5. The MSD of the keyset address is determined by the program, input (a) , while the LSD of the 1. (a) plastic overlay (b) address selector switch setting 2. (a) plastic overlay (b) readout format 3. (a) keyboard (b) address selector switch setting 4. (a) keyboard (b) readout format word format keyset address is determined by the (b) . test switch, address switch 1. (a) program (b) test switch 2. (a) program (b) address switch 3. (a) input word format (b) test switch 4. (a) input word format (b) address switch 99 12-6. 12-7, 12-8. Each message consists of a Message key, a Word key, and six Data keys (digits) . Since there are four Message keys, eight Word keys to modify each Message key up to eight ways, and six Data keys to further modify each message/word input up to 10 6 additional ways, the total number of message/word combinations would be , four, eight, thirty-two while a maximum total of one million, eight million, thirty- unique messages could two million be generated if each message/word/ data input had its own particular meaning. 12-9 1. (a) Thirty-two (b) Thirty- two million 2. (a) Thirty-two (b) One million 3. (a) Eight (b) Eight million 4. (a) Four (b) One million A keyset message would consist of which of the following? 1. One of four Message keys 2. One of eight Word keys 3. Any six Data keys 4. All of the above An operational program is being reloaded. This makes it necessary to reenter parameters from one of the keysets, but one particular keyset already shows a data entry and its WAIT light is lit. By which, if any, of the following means can the last entry be cleared and the new entry inserted? 1. By turning the keyset's power off, then on again By putting the Test switch in position 3 Either 2 or 3 above None, a different keyset will have to be used 12-10 Which of the following statements is NOT true of the transmit button? 1. It locks out further keyboard entries until data is accepted by the KCMX 2. It transmits concluding zeros if the entered data word is incomplete 3. It forces computer acknowledg- ment of the prepared message 4. It acts as a ready signal for inputting data to the KCMX Five keysets, all linked to the NTDS computer through one KCMX on one pair of I/O cables, are all communicating with the com- puter independently. By which of the following means is the computer able to identify the source of each input? 1. Each keyset is associated with a unique address in the KCMX 2. Each keyset uses a unique address in the data portion of each message 3. Each keyset is restricted to a unique word format within each message 4. Each keyset is restricted to a unique message format 12-11. Which of the following statements is NOT true? 1. Each message is ready for transmission when the trans- mit key is pressed 2. Each message requires five separate data key insertions 3. Each message requires a word key modifier 4. Each transmission begins with a message key 100 To answer item 12-12, refer to figure 5-46 in the text. 12-12. The automatic use of 12-14, 12-15, 12-16. (a) odd, even parity is included in the (b) MSB, of the data word during LSB transmission. 1. (a) Even 2. (a) Even 3. (a) Odd 4. (a) Odd (b) LSB (b) MSB (b) LSB (b) MSB 12-13. Which of the following signal sequences will occur following the use of the transmit key on the keyset? Note: Keyset signals are in () KCMX signals are in [ ] Computer signals are in { } 1. (Enter), {EFA}, [Read], [IDR], {IA} 2. (Enter), [Read], {EFA}, [IDR], {IA} 3. (Enter), [Read], [IDR], {IDA} 4. (Enter), [Read], {IDA}, [IDR] Which of the following will NOT occur upon keyset data accept- ance by the computer? 1. The Message and Word indica- tors will clear 2. The Data word will clear 3. The Wait indicator will clear 4. The Control relay will clear A new data entry must be pre- ceded by which of the following? 1. A new Message key if it is in a different message group 2. A master Clear of the keyset 3. A new Word key if it is in the same message group 4. All of the above Which of the following will also be tested when using the keyset tester and the converter tester to check out a faulty keyset? 1. The KCMX 2. Data lines used by the tester 3 . The KCMX to computer lines 4. All of the above 12-17. Which of the following should be considered as causing the faulty symptom when troubleshooting data cables? 1. Open leads 2. Shorted pins 3. Loose connections 4. All of the above 12-18. The only means of actually deter- mining where the fault lies in a data cable is to 1. make resistance checks between the number 1 pins of the cable connectors 2. make resistance checks between two parallel wires by one technician 3. make resistance checks between identical pins in the data cable 4. make resistance checks between the units involved Items 12-19 and 12-20 are to be judged True or False. 12-19. A good technique for checking for continuity in long cable runs is to wire the ends of parallel wires together and check the opposite ends to see if the resistance is low. 12-20. The keyset tester is equipped with a write signal that is used to transfer the contents of the data storage register to the keyset tester. 12-21. The converter tester will NOT provide which of the following? 1. Manual control of line voltage to the equipment under test 2. A variable source of imped- ance for decreasing the positive output of the equipment under test 3. Meter indication of line- to-source input voltages 4. An indication of line-to- line output voltages 101 Learning Objective: To learn the functional aspects of the C-3675A/USQ- 20(V) System Monitoring Panel and how it is employed in NTDS. 12-22. One SMP can control or monitor up to how many system computers? 1. One 2. Two 3. Three 4. Four 12-25. The Computer Select 1. A 2. B 3. C 4. H 12-26 A. Message B. Word C. Data D. Clear E. Xmit F. Wait G. Error H. Address I. None of the above The Command 1. A 2. B 3. C 4. H For items 12-27 through 12-30, select the operation in Column B that is being performed by the computer and which corresponds to the monitor control panel display described in Column A. Operations in Column B are used only once. A. DISPLAY B. OPERATIONS Figure 12-1 For items 12-23 through 12-26, refer to figures 5-45 and 5-5 3 in the text, then refer to figure 12-1 above and select the keyset function, if any, that closely resembles the SMP function (s). 12-23. In respective order, the Clear, Xmit, and Wait functions 1. D, E, F 2. E, F, G 3. D, F, G 4. I 12-24. The Identifier/Code 1. A 2. B 3. C 4. H 12-27. LSB flashing 1. Tape moving forward 12-28. Light string 2. Data entry moving up error 3. Program 12-29. 111 111 111 111 loading III2 shown in 4. Program is bit indicator running 12-30. Changing display 102 Assume a particular program (not necessarily an NTDS operational pro- gram) makes use of the SMP for the purpose of permitting the contents of various addresses to be changed by storing data from the SMP into them while the program is running. To use this option, the operator selects the CMPTR A (or B, C, or D) message key, then the MODIFY PROG key. (The MODIFY PROG key inhibits normal program execution until another of the eight command modifiers has been selected.) The identifier key (first digit) will specify first an address (INITIALIZE) , then the upper 15 bits to be stored in that address (W/DATA) , and finally the lower 15 bits to be stored in that address (RESUME) . The lower 5 digits must represent, respectively, either the octal equivalent of the address, or the upper or lower 15 bits being stored in that address. After a CMPTR A (or B,C,D) — MODIFY PROG — RESUME — 5-digit entry, the program automatically prepares itself to up- date the next sequential address. Assume that the following three entries have been made using the SMP: (1) CMPTR A — MODIFY PROG — INITIAL- IZE— 45112 (2) CMPTR A — MODIFY PROG — W/DATA — 13153 (3) CMPTR A — MODIFY PROG — RESUME — 10012 Refer to figure 12-2 in answering items 12-31 through 12-33. 12-31. 12-32. 12-33. Upon completion of the last step, the neon indicators on the moni- tor panel for computer A indicate 100 101 001 001 011 2 . This would probably be as a direct result of an (a) output buffer, from the corn- external function puter showing the (b) next, last address affected by a modify program sequence. 1. (a) output buffer (b) next 2. (a) output buffer (b) last 3. (a) external function (b) next 4. (a) external function (b) last Figure 12-2 Which of the following sequences would probably follow the CMPTR A - MODIFY PROG key insertions in order to begin storing data into address 45117 8 ? 1. INITIALIZE 45117 2. W/DATA 60100 3. RESUME 45117 4. 045117 Which of the following sequences would permit normal computer operations to continue following a modify program sequence? 1. CMPTR A - MODIFY PROG - STOP 2. CMPTR A - MODIFY PROG - CLEAR 3. CMPTR A - RESUME MODIFY PROG - 4. CMPTR A - OPER CONT 103 12-34. The SMP generates data for the computer in the form of (a) , Command Data, Action Codes which are in reality a form of (b) because interrupt, input data of the control signal, generated. Command Data interrupt Command Data input data Action Codes interrupt Action Codes input data 12-35. An Input Acknowledge signal from the computer will clear both the (aj Identifier/Code and Wait, Identifier/Code and displays, but the 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) Command (b) Wait and Select, Command and displays will remain Select lit to make it easier and faster to make consecutive inputs of similar entries. 12-36. What indication would the SMP give an operator when an error condition has occurred on a computer's I/O channel, indica- ting an abnormal condition (such as an equipment failure, or simply a nonrecoverable error) has occurred? 1. The channel number is con- stantly lit in the SMP neon indicators 2. The channel number is dis- played in an on/off fashion in the SMP neon indicators 3. The corresponding bit for the equipment channel is constantly lit in the SMP neon indicators 4. The corresponding bit for the equipment channel is displayed in an on/off fashion in the SMP neon indicators 12-37. Which, if any, of the following would be a special requirement when troubleshooting proper SMP operation? 1. Test equipment 2. Tools and techniques 3. Maintenance programs 4. None of the above 12-38. Question deleted. (a) Identifier/Code and Command (b) Wait and Select (a) Identifier/Code and Wait (b) Command and Select (a) Identifier/Code and Command (b) Command and Select (a) Identifier/Code and Wait (b) Wait and Select 104 COURSE DISENROLLMENT All study materials must be returned. On disenrolling, fill out only the upper part of this page and attach it to the inside front cover of the textbook for this course. Mail your study materials to the Naval Education and Training Program Development Center. PRINT CLEARLY NAVEDTRA NUMBER 10201-B2 COURSE TITLE NRCC DATA SYSTEMS TECHNICIAN 3&2, VOLUME 1 Name Last First Middle Rank/ Rate Designator Social Security Number COURSE COMPLETION Letters of satisfactory completion are issued only to personnel whose courses, are administered by the Naval Education and Training Program Development Center. On completing the course, fill out the lower part of this page and enclose it with your last set of answer sheets. Be sure mailing addresses are complete. Mail to the Naval Education and Training Program Development Center. PRINT CLEARLY NAVEDTRA NUMBER 10201-B2 COURSE TITLE NRCC DATA SYSTEMS TECHNICIAN 3&2, VOLUME 1 Name ZIP CODE MY SERVICE RECORD IS HELD BY: Acti vi ty Address ZIP CODE Signature. of enrol lee 105 A FINAL QUESTION: What did you think of this course? Of the text material used with the course? Comments and recommendations received from enrol lees have been a major source of course improvement. You and your command are urged to submit your constructive criticisms and your recommendations. This tear-wit form letter is provided for your convenience. Typewrite if possible, but legible handwriting is acceptable. Date From: (RANK, RATE, CIVILIAN) ZIP CODE To: Naval Education and Training Program Development Center (Code 314) Pensacola, Florida 32509-5000 Subj: RTM/NRCC Data Systems Technician 3&2, Vol. 1, NAVEDTRA 10201-B2 1. The following comments are hereby submitted: 107 (Fold along dotted line and staple or tape) (Fold along dotted line and staple or tape) DEPARTM ENT OF THE NAVY NAVAL EDUCATION AND TRAINING PROGRAM DEVELOPMENT CENTER (Code 314) PENSACOLA, FLORIDA 32509-5000 POSTAGE ANO FEES PAID NAVY DEPARTMENT DoD-316 OFFICIAL BUSINESS PENALTY FOR PRIVATE USE, S300 NAVAL EDUCATION AND TRAINING PROGRAM DEVELOPMENT CENTER BUILDING 2435 (Code 314) PENSACOLA, FLORIDA 32509 -5000 108 PRINT OR TYPE AnnRFSS NRCC DATA SYSTEMS TECHNICIAN 3&2 1 .... VOL. 1 NAVEDTRA 10201-B2 Lut Pint bawv/ratp snr spr wv □ USN □ USNR □ ACTIVE 12 3 4 T P l DDDD 2DDDD 3DDDD 4DDDD Mlddl* □ INACTIVE OTHER (Sp 12 3 4 T P 26 DDDD-. 27 DDDD 28 DDDD 29 DDDD.... 30 DDDD-. 31 DDDD 32 DDDD.... 33 DDDD 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39DDDD 40 DDDD 41DDDD 42DDDD "DDDD . 44DDDD 45 DDDD 46DDDD 47DDDD 48DDDD 49DDDD 50 DDDD.. Street/Ship/Unit/Division, etc. City or FPO Sute . DESIGNATOR ASSIGNMENT N ~l«y^ nATP MAM PP Zip » — . SCORE 1234 T P 51 dddd.. 52 DDD D 53 QDDD 54 DDDD J sDDDD 55 DDDD fiDDDD 56 DDDD 11 7 DDDD 1 sDDDD II 9DDDD II io DDDD II ii DDDD 12DDDD | nDDDD 1 uDDDD J isDDDD "DDDD J nDDDD | nDDDD 19DDDO 20DDDD I| 21DDDD 22DDDD 23DDDD 24DDDD 23DDDD 57 DDDD ssDDDD 59DDDD 60DDDD 6iDDDD 62DDDD 63 DDDD 64DDDD 63DDDD 66DDDD 67DDDD 68 DDDD 69 DDDD 70DDDD 71DDDD 72DDDD 73DDDD 74 DDDD 73DDDD 109 PRINT OR TYPE NAMF AnnRFSS NRCC VOL. Street/Ship/Unit/ DATA SYSTEMS TECHNICIAN 3&2 1 NAVEDTRA 10201-B2 Lut Pint Middle □ INACTIVE OTHER (Sp 12 3 4 T F 26 DDDD . Division, etc. PANK/PATF *"W~ SPr Nn City or FPO .DESIGNATOR •city) State ASCir.WMFWTU DATF MAM Pr Zip O 1 1 USN □ USNR □ ACTIVE » SCORE 12 3 4 T F iDDDD 12 3 4 T F si DDDD- 2QDDD 27 DDDD_. 52 DDDD - _- 3DDDD 28 DDDD.. 53 DDDD 4DDDD 29 DDDD . 54 DDDD s DDDD 30 DDDD . 55 DDDD eDDDD 31 DDDD.. 56 DDDD 7DDDD- --- 32 DDDD . 57 DDDD- sDDDD _ _- 33 DDDD-. ss DDDD sDDDD. 34 DDDD-. 59 DDDD 10DDDD 35 DDDD-. 60 DDDD nDDDD 36 DDDD-. 6i DDDD 12DDDD _ . 37 DDDD-. 62DDDD- 13DDDD 38 DDDD_. 63 DDDD 14DDDD.. __ 39 DDDD-. 64 DDDD isDDDD. .. 40 D D D D . 65 D D D D "DDDD 41 DDDD.. 66DDDD - ._ "DDDD 42DDDD . 67 DDDD. isDDDD «DDDD . 68 D D D D - - 19DDDD __ 44DDDD . 69 D D D D - - 20 D D D D 45DDDD-. 70DDDD 2iDDDD _ 46DDDD-. nDDDD 22DDDD _ 47 D D D D . 72DDDD _ _ 23DDDD 48DDDD 73DDDD __ 24DDDD 49 DDDD . 74DDDD _ 25DDDD soDDDD_. 75DDDD 111 PRINT OR TYPE NAME ADDRESS List RANK/RATE. Pint SOC. SEC. NO. Middle NRCC DATA SYSTEMS TECHNICIAN 3&2 VOL. 1 NAVEDTRA 10201-B2 Street/Shsp/Unit/Division, etc. City or FPO State "Ep~ DESIGNATOR ASSIGNMENT NO I I USN □ USNR □ ACTIVE □ INACTIVE OTHER (Specify) DATE MAILED SCORE 12 3 4 T P 1234 26 DDDD 1234 51 DDDD 2DDDD 27 DDDD _ . 52 DDDD 3DDDD 28 DDDD._ _ 53 DDDD 4DDDD 29 DDDD 54 DDDD sDDDD 30 DDDD __ _ 55 DDDD 6DDDD 31 DDDD 56 DDDD 7DDDD 32 DDDD __ . 57 DDDD sDDDD.. __ 33 DDDD ssDDDD *DDDD 34 DDDD- 59DDDD 10DDDD 35 DDDD. _ _ 60 DDDD "DDDD 36DDDD 6iDDDD__ . i2DDDD_ ... 37 DDDD "DDDD 13QDDD 38 DDDD 63DDDD 14DDDD 39DDDD._ _ 64DDDD isDDDD_ ___ 4oDDDD __ 65DDDD 16DDDD _ . 41 DDDD _ _ "DDDD 17 DDDD 42DDDD _ __ 67DDDD "DDDD.- . 43DDDD - mQDDD 19DDDD. __. 44DDDD <»DDDD - - 20DDDD _ _. 45DDDD 70DDDD 2iDDDD 46DDDD. __ 71DDDD- .._ 22DDDD. _ . 47DDDD 72DDDD _ _ "DDDD 48DDDD 73DDDD 24DDDD___ 49 DDDD 74DDDD 25DDDD.. _. 50 DDDD _ __ 75DDDD. 113 PRINT OR TYPE addrfss NRCC DATA SYSTEMS TECHNICIAN 3&2 NAMF VOL. 1 NAVEDTRA 10201-B2 Lut Pint PA wv/RATP snr spr wn □ USN □ USNR □ ACTIVE 12 3 4 T P iDDDD. .__ 2DDDD 3DDDD *DDDD sDDDD 6DDDD 7DDDD sDDDD 9DDDD- __ 10DDDD "DDDD 12DDDD i 13DDDD uDDDD- ___ isDDDD i6DDDD__ - i 17 DDDD _ _. "DDDD 19DDDD Middle □ INACTIVE OTHER (Sp 12 3 4 26 DDDD-. 27 DDDD 28 DDDD 29 DDDD . 30 DDDD 3i DDDD 32 DDDD 33 DDDD... 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40 DDDD 41 DDDD 42DDDD "DDDD 44DDDD 45 DDDD 46DDDD 4? D D D D 48DDDD 49 DDDD 50 DDDD.. Street/Ship/Unit/Division, etc. City or FPO State . DESIGNATOR ASSIGNMENT N ~ify) BATP UAII pi- Zip n » SCORE 1234 T P 51 DDDD-^ 52 DDDD 53 DDDD 54 DDDD 55 DDDD 56DDDD 57 DDDD ssDDDD 59DDDD 60DDDD 6i DDDD 62 DDDD 63DDDD 64DDDD 65DDDD 66DDDD 6?DDDD 68QDDD . 69DDDD 20 D D D D .- _ 70DDDD 2iDDDD 22DDDD 23DDDD . -_ 71DDDD 72DDDD 73DDDD 24DDDD 74DDDD 25DDDD "DDDD 115 PRINT OR TYPE AnnRFSS NRCC DATA SYSTEMS TECHNICIAN 3&2 NAMF VOL. 1 NAVEDTRA 10201-B2 Lut First Middle □ INACTIVE OTHER (Sp 12 3 4 T F 26 ODOO-. 27 aooo 28 DODO 29 DODO 30 DODO 3i 00 32 0000 33 DODO 34 OOOO 35 OOOO 36 o o a o 37 OOOO 38 OOOO 39 OOOO 40OOOD 4iOOOO 420000 430000 440000 45 OOOO 46DOOO 47 O O O O 480000 49 OOOO 50 OOOO.. Street/Ship/Unit/Division, etc. RANK/RATF . SOC, SFC NO, City or FPO State .DESIGNATOR ASSIGNMENTS' •eifyri nATF UAH Pr Zip n 1 1 USN [""I USNR [~~] ACTIVE t _ SCORE 12 3 4 T F iDDDD. ... 12 3 4 T F .-_ 51 DOOO ^ 20000. . _. 52 000 0---- 3DOOO 53 OOOO 4DDOa_- -- . _ 5 4 OOOO sOOOO 55 OOOO 6DOOO 56 OOOO 70000 ._ _ 57 OOOD sOOOO ... . __ 580000.- __ 90000 590000- loOOOO .- _ 600000 nODOO 610000 "DODO. __ 620000- ._ nnaoo . .. 63 OOOO 14OODD . _ 64 OOOO _ __ isOOOO 65 OOOO 160D00... . .- - 660000.. __ i700D0„ _ 670DOO isOOOO... . 68 OOOO 190000 ... ._ _ 690DOD 20 DO _ _ .. _ 700000 2iOOOO_. _. . . 710000 22OOOO 720000 _ _- 23DOOO 730000 240DOD 740000 .. _ 25 00DO.. __ 750000 117 PRINT OR TYPE AnnRFSS NRCC DATA SYSTEMS TECHNICIAN 3&2 MAMP VOL. 1 NAVEDTRA 10201-B2 Lut Pint Middle CZl INACTIVE OTHER (Sp 12 3 4 T F 26 ODOD-. 27 DDDD 28 DDDD 29 ODOD 30 DDDD 31 DDDD 32 DDDD 33 DODD 34 D D O 35 DDDD 36 DODO 37 DDDD 38 DDDD 39DDDO 40 DDDD 41 D D 42DODO «DDDD 44DODO 45 DDDD 46DODD 47 D O D O 48 D O D O 49 DODO 50 DDDD . Street/Ship/Unit/Division, etc. RANK/PATF , ,_,, *->r ™r Mn City or FPO State ■ DESIGNATOR ASSIGNMENT N nity) r>ATP uaii er Zip 1 1 USN □ USNR □ ACTIVE > SCORE 12 3 4 T F iDDDD 1234 T F . _- 51 DDOD-- 20000. 52 ODD D 3D000 53 ODD D 4 0000 54 ODD D sOOOO 55 DODO 60000 se ODD O 70000 57 DODD sOOOO sa DODD 90000 59ODDD loOOOO 60OODD "DDDD 6i DDDD 12DDDD "DDDD 13DODD 63DDDD 14DDDO . __ 64 DODD isDODO 650000 160000 __ _ 660000 _ _ "DDDD __ . _ "DDDD. _ isOOOO . __ .» _ 68 DODO "DDDD 69QDDO 2oOOOO__ __ ._ _ 70OODO 21QODO 71ODDO 22DODO __. . _ 72OODO _ __ 23 DDDD 73OOOD 24ODOD . __ 74OODO 25DDOD "DDDD. - - 119 PRINT OR TYPE AHDRFSS NRCC DATA SYSTEMS TECHNICIAN 3 NAMF VOL. 1 NAVEDTRA 10201-B2 Uut First Middle □ INACTIVE OTHER (Sp 12 3 4 26 DDDD-. 27 DDDD 28 DDDD 29 DDDD 30 DDDD 31 DDDD 32 DDDD 33 DDDD . 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40 DDDD 41 DDDD 42DDDD "DDDD 44DDDD 45 DDDD 46DDDD 47 D D D D 48DDDD 49DDDD 50 DDDD . Street/Ship/Unit/Division, etc. RANK/RATF . , snr SFr no City or FPO State .DESIGNATOR ASSIGNMENT N •cifyl DATF MAN Fr Zip O □ USN □ USNR □ ACTIVE > _ SCORE 12 3 4 T F 1 DDDD 1234 T F 51 DDDD.. 2QDDD . __ 52 DDDD 3DDDD. 53 DDDD- 4DDDD 54 DDDD 5 DDDD. 55 DDDD eDDDD se DDDD 7DDDD 57 DDDD aDDDD. __ ss DDDD 9DDDD. . ._ 59DDDD ioDDDD. ... 60DDDD nDDDD.. __ 61DDDD ._ 12DDDD. ... 62DDDD nDDDD. __ . ._ 63DDDD "DDDD _ _ 64DDDD. wDDDD. 65DDDD 16DDDD.. __ . __ 6&DDDD 17DDDD __ . _ "DDDD. ibDDDD_. 68QDDD 19DDDD ___ ._ _ 69DDDD -- 20DDDD.. _. 70DDDD 21DDDD . _ nDDDD 22DDDD __ 72DDDD 23DDDD. ._ _ 73DDDD 24DDDD 74DDDD 25DDDD 75DDDD. _._ 121 PRINT OR TYPE AnnuFss NRCC DATA SYSTEMS TECHNICIAN 3&2 NAMF VOL. 1 NAVEDTRA 10201-B2 tut Pint Middle □ INACTIVE OTHER (Sp 12 3 4 26 DDDD . 27 DDDD 28 DDDD 29 DDDD-. 30 DDDD 31 DDDD 32 DDDD 33 DDDD . 34 D D D D 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40 DDDD 41 DDDD 42DDDD "DDDD 44DDDD 45 DDDD 46DDDD 47 D D D D 48DDDD 49 DDDD soDDDD.. Street/Ship/Unit/Diviiion, etc. RANK/RATP , ., . snr SFr no City or FPO State -DESIGNATOR ASSIGNMENT N •rity) DATF UAII Pr Zip n □ USN □ USNR □ ACTIVE > SCORE 12 3 4 T P 1234 T P 51 DDDD-- 2 DDDD 52 DDDD 3DDDD 53 DDDD * DDDD 54 DDDD 5 DDDD 55 DDDD 6DDDD 56 DDDD 7DDDD 57 DDDD sDDDD ssDDDD 9DDDD 59DDDD ioDDDD_ -_- 6oDDDD ii DDDD. 6i DDDD 12DDDD 62DDDD 13DDDD 63 DDDD uDDDD 64DDDD is D D D D 65 DDDD "DDDD . _- 66DDDD nDDDD 6?DDDD isDDDD 68QDDD "DDDD 69 DDDD 2oDDDD__ _. ._ _ 70DDDD 21DDDD 71DDDD 22DDDD . _- 72DDDD 23 DDDD 73DDDD 24DDDD 74DDDD 25DDDD 75DDDD 123 PRINT OR TYPE Annupss NRCC DATA SYSTEMS TECHNICIAN 3&2 NA MP VOL. 1 NAVEDTRA 102 01-B2 Last Pint Middle □ INACTIVE OTHER (Sp 12 3 4 26 DDDD- . 27 DDDD 28 DDDD 29 DDDD . 30 DDDD 31 DDDD 32 DDDD 33 DDDD . 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40DDDD 41 DDDD 42DDDD 43DDDD-- 44DDDD 45 DDDD 46DDDD 47 D D D D 48DDDD 49 DDDD 50 DDDD.. Street/Ship/Unit/Division, etc. RANK/RATF *nr rfp vn City or FPO State . DESIGNATOR ASSIGNMENT N •eifyl riATPUAIipr Zip l~~l USN □ USNR □ ACTIVE 1 SCORE 12 3 4 T F iQDDD.. ._ 12 3 4 T F 2 DDDD. 52 DDDD.. . 3DDDD 53 DDDD _. 4DDDD 54 DDDD sDDDD 55 DDDD- 6DDDD se DDDD. 7DDDD__ __ 57 DDDD 8DDDD. ... ssDDDD. 9DDDD. ... 59 DDDD ioDDDD. ... 60DDDD "DDDD 6i DDDD 12DDDD 62DDDD 13DDDD 63DDDD. _ _ "DDDD... _ 64 DDDD isDDDD. . __ 65DDDD i6DDDD___ . 66 DDDD ._ _ nDDDD _ . . 67 DDDD isDDDD. .. 68QnDD ioDDDD. 69 D D D D 20DDDD . __ 70DDDD- 2iDDDD . . nDDDD -_ - 22 DDDD. 72DDDD _ __ 23 DDDD .. _ 73DDDD 24DDDD 74 DDDD. 25DDDD 75DDDD. .-- 125 PRINT OR TYPE AnnRFSs NRCC Di VOL. 1 \TA SYSTEMS TECHNICIAN 3&2 NAMF NAVEDTRA 10201-B2 Lut Pint Middle □ INACTIVE OTHER (Sp 12 3 4 T F 26 DDDD.. Street/Ship/Unit/Division, etc. RANK/PATF ,„ ,_.. *nr *Fr mo City or FPO .DESIGNATOR. •cify) SUte A«ir.WMF\rrv DATF MAII Fr Zip n 1 1 USN □ USNR □ ACTIVE 1 SCORE 12 3 4 T F l DDDD 12 3 4 T F 51 DDDD-^ 2DDDD... 27 DDDD-. 52 DDDD 3DDDD 28 DDDD.. 53 DDDD 4DDDD 29 DDDD.. 54 DDDD- sDDDD 30 DDDD . 55 DDDD 6DDDD 31 DDDD.. 56 DDDD 7DDDD 32 DDDD.. 57 DDDD sDDDD 33 DDDD.. ssDDDD- 9DDDD. ... 34 DDDD. - 59 DDDD 10DDDD 35 DDDD-. 60 DDDD nDDDD 36 DDDD.. 6i DDDD 12DDDD. ... 37 DDDD.. 62DDDD- naDDD 38 DDDD-. 63DDDD "DDDD _ _ 39 DDDD-. 64 DDDD- _- isDDDD 40 D D D D _ . 65 DDDD leDDDD _ _. 41 D D D D - . 66DDDD-- _ nDDDD 42DDDD . 67 DDDD- - - isDDDD 43 D D D D - . 68 DDDD 19DDDD. ... 44DDDD-. 69DDDD _ _ 2oDDDD_. . 45DDDD-. 70DDDD - _ 2iDDDD 46DDDD . 71DDDD- 22DDDD. . 47 D D D D . 72DDDD 23DDDD 48DDDD 73DDDD 24DDDD.... 49 DDDD_. 74DDDD 25DDDD 50 DDDD 75DDDD 127 PRINT OR TYPE ADDRFSS NRCC Di VOL. 1 VTA SYSTEMS TECHNICIAN 3&2 NAMF NAVEDTRA 10201-B2 tut Fktt Middle □ INACTIVE OTHER (Sp 12 3 4 T F 26 DDDD-. Street/Ship/Unit/Division, etc. RANK/RATF , .. *nr ^Fr Nr> "Sty orFPO .DESIGNATOR. •cify) State A«ir.MMPwr m DATE MAIL Fr Zip □ USN □ USNR □ ACTIVE » SCORE 12 3 4 T F iDDDD 12 3 4 T F si DDDD.. 2DDDD 27 DDDD-. 52 DDDD 3DDDD. __, 28 DDDD_. 53 DDDD 4DDDD 29 DDDD-. s* DDDD 5 DDDD 30 DDDD-. 55 DDDD 6DDDD. 31 DDDD-. se DDDD 7DDDD 32 DDDD_. 57 DDDD sDDDD. __ 33 DDDD-. ss DDDD 9DDDD _-_ 34 DDDD-. 59 DDDD 10DDDD 35 DDDD-. 60 DDDD 11 DDDD 36 DDDD-. 6i DDDD 12DDDD 37 DDDD.. 62DDDD 13DDDD 38 DDDD . 63DDDD i4DDDD_ _ _ 39DDDD-. 64DDDD isDDDD. ___ 40 DDDD . 65 DDDD uDDDD 41 DDDD . 66DDDD uDDDD ._ _ 42DDDD.. 67 DDDD is DDDD «DDDD_. 68 DDDD "DDDD. 44DDDD_. 69DDDD 20 DDDD __ 4sDDDD_. 70DDDD 21DDDD. 46DDDD-. 71DDDD 22DDDD 47 D D D D _ . 72DDDD "DDDD.. _ 48DDDD 73DDDD 24DDDD 49 DDDD_. 74DDDD 25DDDD. 50DDDD.. 75DDDD 129 PRINT OR TYPE AnnRFSs NRCC DATA SYSTEMS TECHNICIAN 3&i NAMF VOL. 1 NAVEDTRA 10201-B2 Lut Pint Middle □ INACTIVE OTHER (Sp 12 3 4 26 DDDD-. 27 DDDD 28 DDDD 29 DDDD 30 DDDD 31 DDDD 32 DDDD 33 DDDD 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40 DDDD 41 DDDD 42DDDD 43DDDD 44DDDD 45 DDDD 46 DDDD 47 D D D D 48DDDD 49 DDDD 50 DDDD.. Street/Ship/Untt/Dlviiion, etc. RANK/RATF ... *™^ SIT Nn City or FPO State -DESIGNATOR ASSIGNMENTS' •eifyl DATF MAM Pr Zip n □ USN □ USNR □ ACTIVE » . SCORE i 12 3 4 T P iDDDD 12 3 4 T P 51 DDDD.. 2DDDD 52 DDD D 3DDDD. _. 53 DDDD 4DDDD 54 DDDD sDDDD. 55 DDDD 6DDDD 56DDDD 7DDDD. ... 57 DDDD sDDDD .. ssDDDD 9DDDD._. _ 59DDDD ioDDDD 60DDDD 11 DDDD 61DDDD 12DDDD 62DDDD 13DDDD 63DDDD "DDDD 64DDDD isDDDD. ... 65DDDD "DDDD. 66DDDD 17DDDD.. __ 67DDDD isDDDD «'□□□□ 19DDDD. ... 69 DDDD 20 DDDD 70DDDD 21DDDD . __ 71DDDD 22DDDD. ... 72DDDD 23DDDD 73DDDD 24DDDD 74DDDD 25DDDD 75DDDD 131 PRINT OR TYPE NRCC VOL. AnnRFSS DATA SYSTEMS TECHNICIAN 3&2 NAMF 1, NAVEDTRA 10201 -B2 Utt Pint Middle Strwt/Ship/Unlt/Diviiion, etc. RANK/RAT* - *nr SFr no City or FPO Sta DESIGNATOR 1 1 INAmVF OTHER fSp~i«^ 12 3 4 26DDDD '■ 27DDDD 28DDDD i 29 DDDD '- 30DDDD '• 3iDDDD i 32DDDD-. i 33DDDD J 34DDDD i 35DDDD < 36DDDD < 37DDDD < 38DDDD < 39DDDD < 40 □ D D D < 41DDDD i 42DDDD i 43QDDD < 44DDDD ( 43DDDD 46DDDD 47DDDD 48DDDO ; 49DDDD so DDDD to ASSIGNMENT N DATF UAH Fr Zip □ USN O USNR CZJ ACTIVE t _ SCORE 12 3 4 T P l DDDD 12 3 4 T P 11 DDDD-. 2DDDD. I2DDDD 3DDDD isDDDD 4QDDD * DDDD-- ... sDDDD w DDDD 6DDDD ■• DDDD 7DDDD >7 DDDD, sDDDD fsDDDD jDDDD ■•DDDD 10DDDD »DDDD„„. uDDDD » DDDD 12DDDD "DDDD 13DDDD wDODD 14DDDD *DDDD isDDDD v DDDD "DDDD "DDDD "DDDD "DDDD "DDDD »«DDDD "DDDD i»DDDD 20DDDD 'oDDDD 2iDDDD 'iDDDO 22DDDD_ '2DDDD 23DDDD '3DDDD 24DDDD '4DDDD 23DDDD '3DDDD — „ 133 PRINT OR TYPE NRCC DATA SYSTEMS TECHNICIAN 3&2 VOL. 1, NAVEDTRA 10201 -B2 NAME. ADDRESS RANK/RATE. Pint SOC. SEC. NO. Middle □ USN CD USNR CD ACTIVE □ INACTIVE OTHER (Specify) Stre«t/Shlp/ Unit/Division, etc. City or FPO State EJjT DESIGNATOR ASSIGNMENT NO DATE MAILED 12 3 4 T P iDDDD 26 2DDDD 27 3DDDD 28 *DDDD 29 sDDDD 30 eDDDD 31 7DDDD 32 sDDDD. ___ 33 9DDDD 34 ioDDDD 35 nDDDD 36 12DDDD 37 isDDDD... . 38 "DDDD 39 "DDDD. ___ 40 "DDDD. _. 41 nDDDD _ _. 42 isDDDD.. . 43 19DDDD 44 20 D D □ D _ _ . 45 2iDDDD __. 46 22DDDD. __. 47 23DDDD 48 24DDDD 49 25DDDD 50 1234 T P DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD. DDDD, DDDD. DDDD. DDDD. DDDD, DDDD DDDD, SCORE 12 3 4 T P si DDDD. 52 DDDD. 53 DDDD. s^ DDDD. 55 DDDD. se DDDD. 57 DDDD. ss DDDD. 59 DDDD. 60 DDDD. 6i DDDD. 62DDDD. 63DDDD. 64DDDD. 65 DDDD. 66DDDD. 67 DDDD. 68DDDD. 69DDDD. 70DDDD. 71DDDD. "DDDD. "DDDD. 74DDDD. 75DDDD. 135 PRINT OR TYPE Annupss NRCC DATA SYSTEMS TECHNICIAN 3&2 NAMF VOL. 1, NAVEOTRA 10201 -B2 Lut Pktt Middle □ INACTIVE OTHER (Sf> 12 3 4 26 DDDD-. 27 DDDD 28 DDDD 29 DDDD 30 DDDD 31 DDDD 32 DDDD 33 DDDD 34 DDDD 35 DDDD 36 DDDD 37 DDDD 38 DDDD 39 DDDD 40 DDDD 41 DDDD 42DDDD 43DDDD 44DDDD 45 DDDD 46DDDD 47 D D D D 48DDDD 49 DDDD soDDDD.. Street/Ship/Unit/Diviuon, etc. RANK/PATF . *">r SFr no City or FPO State . DESIGNATOR ASSIGNMENT N mrity\ HATF UAII pf Zip n □ USN □ USNR □ ACTIVE > SCORE 12 3 4 T P l DDDD 12 3 4 T P 51 DDDD.. 2DDDD. 52 DDDD 3DDDD __„_ 53 DDDD 4DDDD 54 DDDD - sDDDD 55 DDDD 6DDDD_ seDDDD 7DDDD 57 DDDD sDDDD. ._. ssDDDD 9DDDD 59DDDD 10DDDD 60DDDD nDDDD 61DDDD 12DDDD 62DDDD 13DDDD 63 DDDD 14DDDD... _ ._ _ 64DDDD isDDDD... _ 65DDDD uDDDD __ _ 66DDDD "DDDD ._ 6?DDDD isDDDD 68DDDD "DDDD 69DDDD 20DDDD 70DDDD 21DDDD . _. 71DDDD 22DDDD 72DDDD.. ._ "DDDD 73DDDD 24DDDD 74DDDD 25DDDD 75DDDD 137 nHf m? OF "-"-'nois-urbanT 3 0112 1051750.^1