LIBRA R.Y OF THE UNIVLR.5 ITY or 1 LLI NOIS 510.84 It6r no. 349-354 cop. 2. Digitized by the Internet Archive in 2013 http://archive.org/details/modeltdemonstrat349marv t ■ 07 REPORT NO. 3^9 COO-lU6y-oiU5 "MODEL T" A DEMONSTRATION OF IMAGE MULTIPLICATION USDJG STOCHASTIC SEQUENCES i A by O. E. MARVEL & \\ August, 1969 REPORT NO. 3^9 "MODEL T" A DEMONSTRATION OF IMAGE MULTIPLICATION USING STOCHASTIC SEQUENCES* by 0. E. MARVEL August, 1969 Department of Computer Science University of Illinois Urbana, Illinois 61801 ^Supported in part by Atomic Energy Commision Contract No, AEC AT(ll-l) 1^69. ii TABLE OF CONTENTS Page 1. INTRODUCTION 1 2. STOCHASTIC SEQUENCE REPRESENTATION 5 3. TIMING 8 k. SYSTEM OPERATION 11 5. CIRCUITS Ik 6. CONCLUSIONS 22 BIBLIOGRAPHY 23 3Sh bit feedback shift register which has a worst case probability error which is very small. After the stochastic sequences have been processed, they are converted into a voltage by an averaging circuit. The accuracy of this conversion process can be obtained from the probability theory of stochastic sequences. If the probability of a pulse occurring in a time slot is p, then the probability of no pulse is 1 - p. The mean or expected value of the stochastic sequence is obtained from: m = E(x) = Z{ (probability of value) (value) } = (P)(D + (1-P)(0) -p and the variance obtained from: a 2 = E[(x-m) 2 ] = E(x 2 ) - [E(x)] 2 = E(x 2 ) - m 2 a 2 = p(l) 2 + (l-p)(0) 2 - p 2 = p - p 2 = p(l-p) Since there are N possible time slots, the mean is Np and the variance Np(l-p). The accuracy to be specified here is a percentage of full scale reading as in a voltmeter. Since each output point is calculated and displayed 30 times per second, while the human eye and oscilloscope phosphor act as averagers, a 95% confidence level per display seems reasonable. Thus the 2a -standard deviation error is given by Error = Y * 100* 200 N [Np(l-p)] 1 200 r /. v-,2 j[p(l-p)] 2 (N) For "Model T" W is 325 giving Error = ll.l[p(l-p)] ERROR t (%) .2r .r* ir 3. TIMING The basic timing is dictated by the following three requirements . (A) The output display frame rate must be the same as the frame rate of a conventional TV receiver^ - 30 frames /second. (B) The fastest economical digital circuits in integrated circuit form are transistor-transistor logic circuits with a maximum practical pulse repetition rate of ten megahertz. (C) The circuits when proven in "Model T" will be used in the TRANSFORMATRIX system which will display a 32 x 32 output picture . Since TRANSFORMATRIX will display 1,02U output points at a rate of 30 frames /second, a new output point will be calculated every 32.552 microseconds or at a rate of 30.72 kilohertz. This gives us a master clock frequency of 9- 9°^ megahertz and 325 time slots per stochastic process. Figure 3 shows the timing and gating pulses which are derived from a 9.98^ megahertz multivibrator -- Master Clock. A counter then produces an output pulse -- Point Clock -- for every 325 Master Clock pulses. 2 In this display there is no interlacing, thus the frame and field rates are equal, Since "Model T" only displays 16 intensities per frame, it processes data for only .52 milliseconds while it rests for 32.81 milli- seconds every frame. A counter selecting 16 of the point clock pulses out of every 102U produces the Input Clock. Monostable multivibrators are used to produce Shift Clock, Reset Clock, and the blanking and rest pulses from Input Clock. 10 <> •x. o 3 o in < 2 o o o Q. 2 U t I •x. 8 (9 z < UJ o o z o in ^ X <»■ PO "1 Figure 3. Timing Chart 11 h. SYSTEM OPERATION The block diagram for "Model T" is shown in Figure h. The basic timing and gating pulses as discussed in the last section are produced in the clock control and gating control units. Because the oscilloscope is displaying the intensity of an output point while the next output points' intensity is being calculated, the k bit X-Y counter must produce the present X-Y position as X and Y analog voltages for the oscilloscope and the next X-Y position as digital commands for multiplexing the CASS signals. A 3^- bit feedback shift register produces two 5 bit digital noise signals which are converted to the Stochastic Analog Staircase - SAS - by digital to analog converters. Since the two digital noise signals are independent, the two SAS signals are independent also. Each SAS goes to a set of sixteen comparitors whose other inputs are the voltages representing the light intensities from the two input pictures. Thus, we are generating sixteen pairs of stochastic sequences, each pair representing one of the input pictures . The input processors shown in Figure h perform two operations on the stochastic sequences. First, the independent stochastic sequences, CASS, representing the same grid location on each picture must be multiplied, Then, because the oscilloscope only displays one product at a time as an output intensity, the 16 CASS products must be multiplexed or funneled one at a time to the integrator. 12 The integrator produces a binary representation of the output intensity by integrating for 32.552 microseconds the CASS. During the next 32.552 microseconds period, the binary number is stored and connected to a voltage which is applied to the z axis of the oscilloscope through the driver switching unit. Two other signals are applied to the driver switching circuit: The first is a blanking pulse which turns off the beam during the time it is moving from point to point. The second is the rest pulse which cuts off the beam during the 32.81 millisecond rest period. The driver switching unit allows either the positive or negative product of the input pictures to be displayed. 13 u a: Z - . w te uj r X \ a < > 5 ■ ( 1 K a 2 a: h v_y y* < ^^ a. o * or ,1 ,1 1 1 o < < mim Q ¥ < o O O t -J Q a 00 o c o 3 ]- ■ 1 1 B _J UJ § IT o ft 6 O ? a: t- K < z O O (J • -t o £ 3 * "8 UJ K to Q O 2 9 C ?' 1 o a: i Is II -J - ( o l> 3 C O < 01 X 1 o §■ 1- 5 o UJ " t- Z E o I 1 J 1 J J i "•> K »n < < «~ < ? * " a D in LUC* Si 11} N 5 e> I" y z u * — o 58* *s* ?S * (E K £ IE a a. a. a. H n 1 J i . ,i i 1 1 i - i i i i ll 1 1 -i ii , I 1 „• ^ « w •< ■ > .' • ■ » ■ » • K a K or K a: K e e o o o o o o o o o o O o o o o £. £ £ £ a. a a. a. £ Q. a. a. * sr °* ~ o X X X X 7 f = X X * ? » 9 * 3- X X > x x i X X l 1 1 X X i gs i » i 1 ■ < o z o 4 * Z z O o t- uj a: H 10 2 . u O < < Z gS£S < Z < a *~ a < Q. S 2 Figure k. Block Diagram of "Model T" 1U 5 . CIRCUITS To keep cost and size down, integrated circuits are used jughout "Model T". All digital circuits are positive logic TTL integrated circuits. Figure 5 shows the syncronous random pulse generator and the two stochastic analog staircase - SAS - generators. The syncronous random pulse generator is a 3^+ hit feedback shift register where the bit to be entered and shifted is given by Q = Q , © Q © Q, © . Thus, the shift register contains a continuously changing - at a 10 MHz rate - binary word in which the probability of any bit being a one is 1/2. Also, at any instant of time, i.e. within a fixed word, the value of any bit is independent of the value of any other bit. The outputs of 5 stages of the shift register go to one high speed D/A converter to produce SAS #1, and the outputs of 5 different stages go to another D/A converter to produce SAS #2. The digital to analog converter consists of a high speed voltage switch with weighted resistor decoder and high speed operational amplifier. Figure 6 shows 16 identical input processor units which perform four functions. First the light intensity to voltage transfer function must be standardized. The transfer function for the photoconductor is given by R - R (D- 8U the resistance in ohms, R is the resistance at one foot candle which may vary 4 33%, and I is the intensity in foot candles. Figure 5. Stochastic Analog Staircase Generator 16 With the photo conductor as the input resistor and a trimpot R^ as the feedback resistor of an operational amplifier, the output voltage of the op amp is INT " R Q U; V S th V a standardized voltage, the variation in R can be cancelled o U by adjusting R^ to make all photo processors have the same transfer functions . The CASS signals are produced by comparing the V s against the SAS signal with a 710 voltage comparitor which produces a logical one whenever V is greater than the SAS signal. Since the comparitors have a maximum differential input voltage of 5 volts and the SAS has 32 levels, to obtain the greatest noise margin the photo processor stage (R„) is adjusted to give V a 5 volt swing as the light varies from .1 to 1.0 foot candles. A four input NAND gate, when enabled by the proper I and J gating signals, produces the logical inverse of the product of two CASS input signals. Figure 7 shows the output intensity processing circuitry which performs 16 identical cycles per displayed frame. After the 16 lines from the input processor have been inverted and OR'ed, the CASS product is AND'ed with a k MHz square wave to produce a pulse when CASS is a logical one, except for three periods when the AND gate is inhibited and no pulses are produced. A ripple counter then counts the number of . "34 Mhz pulses in a 32.552 microsecond period. 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