LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN Digitized by the Internet Archive in 2013 http://archive.org/details/arithmeticunitof290koop •J I J Wj>. 2. Report No. 290 yhcuzz. coo-1018-1156 ARITHMETIC UNIT OF ILLIAC III: SIMULATION AND LOGICAL DESIGN- PART II by Ping L. Koo Daniel E. Atkins October 28, 1968 Int Ukmi GF THt COO-1018-1156 Report No. 290 ARITHMETIC UNIT OF ILLIAC III: SIMULATION AND LOGICAL DESIGN- PART II* by Ping L. Koo Daniel E. Atkins October 28, 1968 Department of Computer Science University of Illinois Urbana, Illinois 6l801 *Supported in part by Contract AT(ll-l)-10l8 with the U.S. Atomic Energy Commission and the Advanced Research Projects Agency. i) OUTLINE* I. Introduction 1.1 General Description 1.2 General Flow II. Pseudo-Simulation of TP and Operand Gating 2 . 1 Name 2.2 Functional Description 2.3 Formal Calling Sequence 2.4 Formal Parameter Description 2.5 Implicit Parameter Description 2.6 Subroutines Used 2.7 Operational Description 2.7.1 English Text 2.7-2 Flowchart 2.8 Error Conditions 2.9 Local Procedures III. Gate Functions and Shifting Logic 3-1 Operand Loading Gate Functions 3.2 M-Register Shifting Gate Functions 3.3 General Gate Functions 3.4 Assimilation Logic S.^.l Name 3.^.2 Functional Description 3.4.3 Formal Calling Sequence 3. 4. 4 Formal Parameter Description 3.4.5 Implicit Parameter Description 3.4.6 Subroutines Used 3.4.7 Operational Description 3.4.7.1 English Text 3.4.7.2 Flowchart *Note: In the body of this report, the leading digits of the section numbers used in this outline may be omitted. The level of the section will be indicated by indentation. 11 3-5 Normalization 3.5-1 Name 3-5.2 Functional Description 3.5-3 Formal Calling Sequence 3.5-U Formal Parameter Description 3.5-5 Implicit Parameter Description 3.5-6 Subroutines Used 3. 5«T Operational Description 3.5.7.1 English Text 3.5.7.2 Flowchart 3.6 Set Bogus Result and Error Indicators 3.7 Timer IV. Signed-Digit Subtractor k . 1 Name 4.2 Functional Description k.3 Formal Calling Sequence k.k Formal Parameter Description U.U.I Input Parameters k.k. 2 Output Parameters k.3 Implicit Parameter Description k.6 Subroutines Used U.7 Operational Description U.7.1 English Text U.7.2 Flowchart k.Q Error Conditions V. Propagation Logic 5-1 Name 5.2 Functional Description 5.3 Formal Calling Sequence iii) 5.1+ Formal Parameter Description 5.5 Implicit Parameter Description 5.6 Subroutines Used 5.7 Operational Description 5.7.1 English Text 5-7-2 Flowchart 5.8 Error Conditions VI. Arithmetic Orders 6.1 Addition, Subtraction, Comparison 6.1.1 Name 6.1.2 Functional Description 6.1.3 Formal Calling Sequence 6.1. U Formal Parameter Description 6.1.5 Implicit Parameter Description 6.1.6 Subroutines Used 6.1.7 Operational Description 6.1.7-1 English Text 6.1.7.2 Flowchart 6.1.8 Error Conditions 6.2 Multiplication 6.2.1 Name 6.2.2 Functional Description 6.2.3 Formal Calling Sequence 6.2.k Formal Parameter Description 6.2.5 Implicit Parameter Description 6.2.6 Subroutines Used 6.2.7 Operational Description 6.2.7.1 English Text 6.2.7-2 Flowcharts 6.2.8 Error Conditions 6.2.9 Internal Procedures Defined in this Routine iv) 6.3 Division 6.3.1 Name 6.3.2 Functional Description 6.3.3 Formal Calling Sequence 6.3.1* Formal Parameter Description 6.3.5 Implicit Parameter Description 6.3.6 Subroutines Used 6. 3. 7 Operational Description 6.3-7.1 English Text 6.3.7.2 Flowchart 6.3.8 Error Condition 6.3.9 Internal Procedures Defined 6.1* Data Conversion 6.U.1 Convert to Long-Fixed Point Number 6.1*. 1.1 Name 6.1*. 1.2 Functional Description 6.1*. 1.3 Formal Calling Sequence 6.1*. 1.1* Formal Parameter Description 6.U.1.5 Implicit Parameter Description 6.1*. 1.6 Subroutines Used 6.1*. 1.7 Operational Description 6. k. 1.7.1 English Text 6.U. 1.7". 2 Flowcharts 6.1*. 1.8 Error Conditions 6.1*. 2 Convert to Floating Point Number 6 . 1+ . 2 . 1 Name 6.1*. 2. 2 Functional Description 6.1*. 2. 3 Formal Calling Sequence 6.1*. 2.1* Informal Parameter Description 6.1*. 2. 5 Implicit Parameter Description 6.1*. 2. 6 Subroutines Used 6.1*. 2. 7 Operational Description 6.1*. 2. 7.1 English Text 6.1*. 2. 7. 2 Flowchart 6.1*. 2. 8 Error Conditions v) 6.4.3 Convert to Decimal 6 . 4 . 3 • 1 Name 6.4.3.2 Functional Description 6.4.3.3 Formal Calling Sequence 6.4.3.4 Formal Parameter Description 6.4.3-5 Implicit Parameter Description 6.4.3.6 Subroutines Used 6.4.3-7 Operational Description 6.4. 3.7-1 English Text 6.U.3.7.2 Flowcharts 6.4.3.8 Error Conditions 6.4.3.9 Local Procedures 6.4.4 Procedure Routines Defined Within 'CONS' 6.U.U.1 DVB 6 . 4 . k . 1 . 1 Name 6.1+.U.1.2 Functional Description 6. 4. 4. 1.3 Formal Calling Sequence 6.4.4.1.4 Formal Parameter Description 6.4.4.1.5 Implicit Parameter Description 6.4.4.1.6 Subroutines Used 6.4.4.1.7 Operational Description 6.4.4.1.7.1 English Text 6.4.4.1.7.2 Flowcharts 6.4.4.1.8 Error Conditions 6.4.4.2 COMPL 6.4.4.2.1 Name 6.4.4.2.2 Functional Description 6.4.4.2.3 Formal Calling Sequence 6.4.4.2.4 Formal Parameter Description 6.4.4.2.5 Implicit Parameter Description 6.4.4.2.6 Subroutines Used 6.4.4.2.7 Operational Description 6.4.4.2.7.1 English Text 6.4.4.2.7.2 Flowchart 6.4.4.2.8 Error Conditions vi) 6 . k . h . 3 FL-NORL-FX 6 . k . k . 3 . 1 Name 6.U.U.3-2 Functional Description 6.U.U.3.3 Formal Calling Sequence 6.4.^.3.^ Formal Parameter Description 6.k.h.3'5 Implicit Parameter Description 6.h.k .3.6 Subroutines Used 6.k .h.3.1 Operational Description 6.U.U. 3.7-1 English Text 6 . k . h . 3 . 7 • 2 Flowchart G.h.h.3.Q Error Conditions VII. How to Use the Simulation 7«1 Execution of the Simulation 7.2 Modification of the Programs 7.3 Set-Up of Program Decks VIII. Listing of Programs I . INTRODUCTION 1.1 General Description The arithmetic unit (AU) is being simulated at the hardware level of detail. The simulation is written in PL/1 for the IBM 360/75 computer. It also serves as a dynamic documentation for the logical design of AU. The AU registers may be simulated either as structure, array or bit string. In the AU, most Boolean operations concerned with any register involves every bit of the register. In this case, bit-string operation is the most suitable operation and less time consuming. Since this simulation program is also to serve as dynamic documentation, it requires a simple, easily understood program which is very close to the actual logical design. The bit-string operation is a very straight forward operation; array or structure operations don't have any particular advantage in this simulation. In case only some bytes or bits of a register are used in the operation, the PL/1 build-in function SUBSTR may be used. All registers and indicators are simulated as bit strings; all counters are simulated as fixed point number; all gating functions are simulated as procedures and grouped into one subprogram. The Sign- Digit Subtractor (SDS) and propagation logic are simulated as two sub- programs. Every arithmetic order is simulated as one subprogram (including functional sub-blocks, such as quotient selector, multiplier recoder, etc.). This simulator, therefore, is composed of one main program and several subprograms . Every routine will be explained in detail in the following sections. A summary of the registers, counters and indicators used is given below: -1- 1 Name Attributes Function or Equivalent Component in AU Hardware M 6k bits M register US 6k bits US register UM 6k bits UM register LS 6k bits LS register LM 6k bits LM register UQ 65 bits UQ register LQ 65 bits UQ register UH 65 bits UH register LH 65 bits LH register v 50 bits INBUS (5 bytes, 10 bits each) IV.IV-S k bits Instruction Variants NT.HT-S 2 bits Number Type FA 8 bits Holds the flags of first operand set to AU FB 8 bits Holds the flags of second operand sent to AU SIGNA 1 bit Holds the sign of first operand sent to AU. SIGNB 1 bit Holds the sign of second operand sent to AU SR 1 bit Holds the sign of result format by the AU EUU 7 bits Holds the exponent of the first operand sent to AU (Floating . pt . number only ) EUM 7 bits Holds the exponent of the second operand sent to AU EUL ' 7 bits Holds the exponent of the results produced by the AU (floating pt . no . only ) -2- Function or Equivalent Name Attributes Component in AU Hardware S 6^+ bits The minuend and difference of the signed -digit subtractor (SDS) is represented in SD format. It holds the sign of the minuend. It is used in all k stages of SDS. X 6k bits Holds the magnitude of minuend. Used in all stages of SDS. Y 6k bits Holds subtrahend in conventional binary form. Used in k stages of SDS. T 6k bits Holds the sign of difference. Used in all k stages of SDS. Z 6k bits Holds the magnitude of difference. Used in all k stages of SDS. NEG 6k bits A control signal, NEG1 negates the output from SDS. Used in all k stages. G 6k bits Interstage connection for SDS. Used in all k stages of SDS. NEG0 6k bit NEGj# = 1; complement S into first stage of SDS. 0V 1 bit Overflow indicator UN 1 bit Underflow indicator LSG 1 bit Lost of significance indicator ID 1 bit Invalid data indicator GT 1 bit 'Greater than' indicator EQ 1 bit 'Equal' indicator LT 1 bit 'Less than' indicator FM 1 bit 'Flag match' indicator, used in comparison B0GUS 1 bit 'Bogus result' indicator P£>LIP 1 bit P0LIP = 1, for continuous Pj6LY operation NCC FIX, BIN Number of division cycles to be performed. -3- 1.2 General Flov As mentioned in the previous section, the simulator is composed of one main program and several subprograms. The main program is named 'AUSIM' , execution starts at AUSIM. A simple pseudo-TP is included to supply operands (or operand), AUSIM calls routines to load these operands to proper registers. After all operands have been loaded upon decoding the Instruction Code, it then calls the routine for that arithmetic order. After completion of that routine, control is switched back to AUSIM for next operation. Following is a listing of all external procedures defined in this simulator and the local procedures defined in each external procedure. Every external procedure will be explained fully in the following sections together with its associated local procedures. -k- SUMMARY OF PROCEDURES External Procedure Entry Name Other Procedures Internal Procedures Defined Name defined Used in this Procedure AUSIM CONV, CPRA CVD, CVF, CUL DIV, MPY POLY X, ADDX VDUH1, VDUH2 VDUH3, UDUQl UDUQ2, UDUQ3 EADEUU, EBDEUM, FAILFA, FA2RFA FB1LFB, FB2RFB SDS PR0P GATE AS SIM INDFA LHDUH LHL^UH lhlSuh LHR^UH LHR8UH IMDM LMDUM IMDUQ LML8UQ LMR8UQ LQDUQ PROP, SDS lqlUuq • -5- SUMMARY OF PROCEDURES (Continued)' External Procedure Entry Name Other Procedures Internal Procedures Defined Name Defined Used in this Procedure ( GATE) LQL3UQ LQRl+UQ LQR8UQ LSDUH LSDUS LSL8US LSR8US MDYl i MDY>+ MLIY^ ML2Y3 ML3Y3 ML4Y2 ML5Y2 ML6Y1 ML7Y1 NORM PDYU SETBOG tUdls TIMER . UHDLH UHDM -6- SUMMARY OF PROCEDURES (Continued) External Procedure Entry Name Other Procedures Internal Procedures Defined Name Defined Used in this Procedure (GATE) UHDUS UHDYl UMDXl UQDLQ UQDUM USDSl VDMl VDM2 VDUHl VDUH2 VDUH3 VDUQl VDUQ£ VDUQ3 Z^DIM ADDX SUB CPRA ASSM LHRBUH, LHRBUH IMDUQ, USDSl lqlAuq, LQL8UQ LQR^lUQ, LQR8UQ MDY1, Mmh, NORM PDYU, PROP SETBOG, INDFA SDS, UHDLH UHDM, UMDXl UQDLQ, UQDUM zkvm • ■7- SUMMARY OF PROCEIURES (Continued). External Procedure Entry Name Other Procedures Internal Procedures Defined Name Defined Used in this Procedure MPY ASSIM, LHR8UH IMDUM, IMDUQ LMRSUM, LQR8UQ LSDUS, LSEBUS MDY1, MDY4 ML1YU, ML2Y3 ML3Y3, MLUY2 ML5Y2, ML6Y1 ML7Y1 NOM SDS- T^+DLS UHDLH, UHDM UMDX1, UQDLQ USDS1, ZkDJM MEXTPRE, RECORDER DIV CVDDIV ASSIM, LMDM ASSIMQD, ASSIMRE, LMDUM, IMDUQ DODMD, DIDMD, D2DMD LMLSUM, LQLi+UQ D3IMD, MODDIV LQL8UQ, LQRi+UQ DIVID, LDQMS12 LQR8UQ, LSDUS LSL8US7 MDY1 LDQKS78, LHL1UH moyU, mliyU LHlMffl, LHL8UH ML2Y3, ML3Y3 ML4Y2, ML5Y2 LHR3UH, LMDUH7 MLoYl, ML7Y1 NORM, SDS LMDUQ3, LMUQ7, LQL1UQ T^DLS LQR1UQ, QBDUQH, SELECT SUMMARY OF PROCEDURES (Continued) External Procedure Entry Name Name Defined Other Procedures Used Internal Procedures Defined in this Procedure (DIV) CONVS CVL CVF CVD uhdlh, uhdm uhdus^ umdx1 uqdlq, uqdum zUdim assim, cvddiv LHlAUH, LHL8UQ LMDM, LMDUM IMDUQ, LQjAUQ LQL8UQ, LQR*+UQ LQRSUQ, LSDUH lsdus, umh MLlYk, ML3Y4 ML*+Y2, SDS Tk~DLS, UHDLH UHDUS, UMDXl UQDLQ, UQDUM USDS1, ZUDLM TENDY^f, TENL1Y4 TENL2Y3, TENL3Y3 TENL4Y2, TENL5Y2 TENL6Y1, TEN17Y1 DVB -9- II. Pseudo-Simulation of TP and Operand Gating 1. Name: AUSIM 2. Functional Description: This is a main program, this program includes two sections: (1) A simple pseudo-simulation of TP, which sends to the AU via the INBUS, a control byte containing the instruction variant (IV), the number type (NT) and the operands. The operand will be sent, one word at a time, in the following order: left word of operand A, left word of operand B, then the right word of operand A, and finally the right word of operand. Each byte of the word consists of 10 bits: 8 data bit, 1 flag bit and 1 parity bit. (2) Upon rapid initial decoding of the instruction variant and number type, AUSIM loads the operands as received, one word at a time, into appropriate registers. After all operands have been loaded the control of execution is switched to an appropriate subprogram according to the instruc- tion variant. After the execution of that subprogram is completed, control is switched back to AUSIM for the next arithmetic order. 3. Formal Calling Sequence: Not applicable to a main program k. Formal Parameter Description: None 5. Implicit Parameter Description: Initially, all registers, counters and indicators will be cleared. Depending upon the instruction variant and number type- part or all of UH, UQ, FA, FB, EUU, and EUM registers will be loaded from INBUS. 6. Subroutines Used: ADDX, SUB, CPRA, MPY , DIV, CVL, CVF, CVD, POLYX, VDUH1, UDUH2 , UDUH3, VDUQ1, UDUQ2, VDUQ3 7. Operational Description: 7-1 English Text : The number contained in small square associated with some blocks in the flowchart will be used in the following paragraphs for easy references (1) One parameter PRINT, is used to control the print out of the inter- mediate result. If PRINT = 1, both inputs and outputs of signed-digit subtractor will be printed out (it is useful for debugging), otherwise printing in SDS will be skipped. Start from block [l]: all registers have been cleared. Since the indicator 'POLIP' is set to 1 after the first operation of POLY, and will be reset to after the last operation of POLY, the indicator 'POLIP' will not be cleared at this point, if the arithmetic order is POLY. (2) In the Illiac III hardware, operands are retrieved from Operand Stack (0S). At present status, the AU has been tested using a pseudo- simulated TP. The operands are taken from external input device. Blocks [2] to [6] are used to read operands (or operand) from an input device (cards) and convert them into internal representation as if they were being retrieved from 0S. (6i+-bit storage area is used. For operand less than 6U bits, it is left adjusted in the area). The number of operands needed is determined from the Instruction Variant (IV). For data conversion type orders (first bit of IV equals 0), only one operand is needed (NOP = l) otherwise two operands are needed (NOP = 2). The only exception is POLY: for the first time, two operands are needed, but for subsequent POLY, only one operand is needed. The order of input data will be: instruction variant, number type, IND, operand A, flag bits of operand A, operand B, flag bits of operand B. Operand may be in either conventional form (IND = 0) or in their internal bit-form (IND = l). (3) The order of operands sent from TP to AU is: left word of operand A left word of operand B, right word of operand A then right word of operand B. Block [6] is used to re-arrange the operands and their associated flag bits in this order and place them in temporary buffer for later usage. (U) Starting at block [T], operands kept in the temporary buffer will be sent to the AU, one word at a time, via the INBUS. The word carried by INBUS has 5 bytes, 10 bits each. In this simulation parity bits are neither set nor checked. -11- INBUS WORD Corresponding Bits of Operand Word Byte No Bit No. 1 k- 7 8-9 IV NT 2 11-18 19 Data bits of 1st byte. Flag bit of 1st byte 3 21-28 29 Data bits of 2nd. byte Flag bit of 2nd byte k 31-38 39 Data bits of 3rd byte Flag bit of 3rd byte 5 1+1-1+8 Data bits of 4th byte ■ h9 Flag bit of 4th byte TABLF 2-1: Format of INBUS Word For floating point numbers and decimal numbers, each operand consists of 1 double (WRD = 2), for fixed point number each operand consists of 1 word (WRD -- 1) ; therefore, the total number of words to be transmitted = WRD x NOP. According to the instruction variant and number type, the word transmitted via INBUS will be loaded into the proper positions of the appropriate registers by the routines defined in external procedure GATE . Every word in the temporary will be sent in a similar manner until all words have been loaded. The following is a table summarizing the contents of registers after the loading of operands is completed. -12- TABLE 2-2: Summary of Loading Operands into Registers Combination of NT and IV Subprogram Used Contents of Registers After Loading FX " POLY FL'POLY-POLIP FL (POLY'POLIP v ADDvSUBvCPRA v MPYvDIv) FX»MPY VDUH2 VDUH1, VDUH2 EBDEUM VDUQ1, VDUQ2 VDUH1. VDUH2, FAILFA, FA2RFA E ADEUU, EBDEUM FB1LFB, FB2EFB FAILFA, FB1FB VDUQ2, VDUH3 (1H (bytes U-7) = New Coeff . Sign B = Sign of new coeff. EUM = Exponent bits of coeff. UH (bytes I-7) = Fraction bit of coeff. SIGNA = Sign of Operand A, SIGNB = Sign of Operand B, FA = Flag bits of Operand A FB - Flag bits of Operand B EUU = Exponent bits of Operand A EUM = Exponent bits of Operand B UQ (bytes 1-7) = Fraction of Op. A UQ, (bytes 1-7) = Fraction of Op. B SIGNA = Sign of multiplicand SIGNB - Sign of multiplier FA 1 = Flag bits of multiplicand FB , = Flag bits of multiplier UQ (Bytes ^-7) - Multiplicand UH (Bytes 0-3) = Multiplier -13- TABLE 2-2: Summary of Loading Operands into Registers (Continued) Combination of NT and IV Subprogram Used Contents of Registers After Loading FX'DIV FX»CVD FX^CVF FL<-(CVDvCVL) DEC'(CVLVCVF) FAILFA, FB1LFB VDUQ3, VDUQ2 VDUH3 VDUQ2 FAILFA VDEQ3 FAILFA VDUQ1, VDUQ2 FAILFA, FA2RFA EBDEUM VDUQ1, VDUQ2 FAILFA, FA2RFA SIGNA = Sign of dividend SIGNB = Sign of divisor FA, . = Flag bits of dividend FB I = Flag bits of divisor UQ(Bytes 0-3) = Dividend UQ (Bytes 4-7) = UH (Bytes 0-3 = Divisor SIGNA - Sign of Operand A FA, _, = Flag bits of Operand A UQ, (Bytes 4-7) = Operand A SIGNA = Sign of Operand A FA, . = Flag bits of Operand A UQ (Bytes 0-3) = Operand A SIGNA = Sign of Operand A FA = Flag of Operand A EUM = Exponent bits of Operand A UQ( Bytes 1-7 ) = Fraction bits of Operand A SIGNA = Sign of Operand A FA = Flag bits of Operand A -Ik- (5) After all operands have been loaded (according to the instruction variant) one of the external procedures of the arithmetic order is chosen, and control of execution is switched to that procedure. 7 .2 Flowchart: Flowchart is attached The symbols used in the flowchart are: POLIP: Indicator, is to be set to 1 for subsequent POLY IV: Instruction variant (h bit) NT: Number Type (2 bit) NOP: Number of operands IND: = if the input operands are in conventional fixed, floating or decimal form. = 1 if the input operand are in internal bit representations. STRING1: Internal representation of Operand A (6k bit) 0PF1: Flag bits of Operand A (8 -bit) STRING2: Internal representation of Operand B (61+-bit) 0PF2: Flag bits of Operand B (8 -bit) TEMP(l): I = 1, 2, 3, k' f Temporary buffer for data bits operands re-arranged in the order for transmission. (32-bit each). FLAG(l): I - 1, 2, 3, k: Temporary buffer for the flag bits associated with data bits in TEMP(l) . (k bits each) V: INBUS word (50 bits) WEDCT: A counter to count number of words being transmitted SIGNA: Sign register for Operand A. SIGNB: Sign register for Operand B FA: Flag register for Operand A FB: Flag register for Operand B. . EUU: Exponent register for Operand A. ELM: Exponent register for Operand B. -15- AUSIM Page: 1 of 9 READ IN PRINT P0LIP = □ CLEAR ALL REGISTERS INDICATORS AND COUNTERS READ IN IV, NT, IND ^S. Y P = 1 y> > N0P = 1 -16- P2 E FIXED POINT NO. READ IN FIXED PT. NO. IN CON- VENTIONAL FORM (N0P TIMES) READ IN FL. PT. NO. IN CONVENTIONAL FORM (N0P TIMES) MUST BE DECIMAL NO. .J CONVERT TO ILLIAC III FORM AUSIM Page: 2 of 9 READ IN FIXED PT. NO. IN BIT FORM (N^P TIMES) READ IN DEC. NO . IN CONVENTIONAL FORM (N0P TIMES) READ IN FL. PT. NO. IN BIT FORM (N©> TIMES) READ IN DEC. NO. IN ILLIAC III BIT FORM (N0P TIMES) i STRING 1 = OPERAND A STRING 2 = OPERAND B 0PF1 = FLAG BITS OF OP. A 0PF2 - FLAG BITS OF OP. B -IT- AUSIM Page: 3 of 9 IE TEMP (1) - STRING1 1.32 TEMP (2) = STRING 2 ^32 TEMP (3) - STRING 1 33-64 TEMP (4) = STRING 2 33^4 FLAG (1) = ^PF1 !_ 4 FLAG (2) = 0PF2 ^4 FLAG (3) = ^PF1 5 _ 8 FLAG (4) = ^PF2 5 . 8 v 1-3 = V 4 . 7 = IV V 8 _ 9 = NT CT = WRDCT = CT - CT + 1 CT = CT + 2 -18- V v 21-28 v 31-38 11-18 = TEMP (CT) lq TEMP (CT) 9 _ 16 TEMP (CT) 17 . 24 V 41-48 TEMP (CT) 25-32 v 19 V 2 9 V 3 9 '49 FLAG (CT) 1 FLAG (CT)2 FLAG (CT)3 FLAG (CT>4 AUSIM: Page: k of 9 WR DCT - s Y INDIVR = IV 7 / NTDNTR = NT N SIGNA = v n VDUH2 SIGNB = Vn EBDEUM VDUH1 © -19- AUSIM Page: 5 of 9 ERR EBDEUM FBILFB VDUH1 -20- SIGNA = V 1 1 SIGNB = V 11 SIGNA =V t1 SIGNB = V 11 AUSIM Page: 6 of 9 FBILFB VDUQ2 VDUH3 -21- AUSIM Page: 7 of SIGNA = V 1 1 FAILFA VDUQ2 SIGNA - V 11 PRINT ERROR MESSAGE WR^NG C^INTR^L C0DE' -22- AUSIM Pa^e: 8 of 9 WRDCT =WRDCT + 1 -23- AUSIM Page: 9 of 9 FAILFA FA2RFA FB1LFB FB2RFB FA, = V 19 FA V; 2 = v 29 FA 3 = v 39 FA 4 = v 49 FA 5 =V 19 FA 6 = V 29 FA 7 = V 39 FA 8 = V 49 FB! =V 19 FB 2 = V 29 FB 3 = V 39 FB A = V 49 FB 5 =V 19 FB 6 = V 29 FB 7 = V 39 FB 8 = V 49 -2k- 8. Error Condition: When invalid instruction variant is used, an error message will be printed out, and execution for that set of input data will be terminated. Control of execution is switched to the beginning of AUSIM for the next set of data. 9- Local Procedures: 9.1 FAILFA: This routine is used to load bit 19, 29, 39, k9 into the left half of flag register FA. 9.2 FA2RFA: This routine is used to load bit 19, 29, 39, U9 into the right half of flag register FA. 9.3 FB1LFB: Same as FAILFA; FB is used instead of FA. 9-h FB2RFB: Same as FA2KFA; FB is used instead of FA. 9.5 EADEUU: To load bit 12 through bit 18 of V into the exponent register EUU. 9.6 EBDEIM: To load bit 12 through bit 18 of V into the exponent register EUM. -25- Ill: Gate Functions and Shifting Logic All gate functions, shifting logics, assimilation of output of signed-digit subtractor and some other miscellaneous functional subblocks are grouped into one procedure 'GATE' with different entry names. Each of them -will be fully described below. One overall flowchart will be provided. 1. Operand Loading Gate Functions: VTM1: Load from INBUS (V) byte 3-5 (bit 1-8) into M register byte 1-3. VTM2: Load from INBUS (v) byte 2-k (bits 1-8 of each byte) into M register byte h-~{ • VDUQ1: Load from INBUS (V) byte 2-k (bits 1-8 of each byte) into UQ register byte 1-3 • VDUH1: Same as VDUQ1, UH register is loaded instead of UQ. VDUQ2: Load from INBUS (v) byte 1-k (bit 1-8 of each byte) into UQ register byte k-^ . VDUH2: Same as VDUQ2, UH register is loaded instead of UQ. VDUQ3: Load from INBUS (V) byte 1-k (bit 1-8 of each byte) into UQ register byte 0-3- VDUH3: Same as VDUQ3, UH register is loaded instead of UQ 2. M-Register Shifting Gate Functions MDY1: Contents of M register is used as Y-input to SDS (Stage 1) . MDY4: Contents of M register is used as Y-input to SDS (Stage k) ML7Y1: Contents of M register is left shifted 7 bits and is used as Y-input to SDS (Stage 1). M66Y1: Contents of M register is left shifted 6 bits and is used as Y-input to SDS (Stage 1). ML5Y2: Contents of M register is left shifted 5 bits and is used as Y-input to SDS (Stage 2) -26- I ML^Y2: Contents of M register is left shifted k bits and is used as Y-input to SDS (Stage 2). ML3Y3: Contents of M register is left shifted 3 bits and is used as Y-input to SDS (Stage 2). ML3Y3: Contents of M register is left shifted 3 bits and is used as Y-input to SDS (Stage 3). ML2Y3: Contents of M register is left shifted 2 bits and is used as Y-input to SDS (Stage 3). ML1YU: Contents of M register is left-shifted 1 bit and is used as Y-input to SDS (Stage k ) . General Gate Functions : UHDY1: Contents of UH register is used as Y-input to SDS (Stage l) PDYU: The borrow/carrier bits generated by the propagation logic is used as Y-input to SDS (Stage h) . LMDM: Contents of LM register is directly transmitted to M register. LML8UM: Contents of LM register left shifted 8 bits and transmitted to UM register. LMR8UM: Contents of LM register is right shifted 8 bits and transmitted to UM register. LMDUM Contents of LM register is transmitted to UM register. LMDUQ Contents of LM register is transmitted to UQ register. LKLAUH: Contents of LH register is left shifted k bits and transmitted to UH register. LHRUUH: Contents of LH register is right shifted k bits and transmitted to UH register. LHL8UH: Contents of LH register is left shifted 8 bits and transmitted to UH register. LHR8UH: Contents of LH register is right shifted 8 bits and transmitted to UH register. LHDUH: Contents of LH register is transmitted to UH register. LQLUUQ: Contents of LQ register is left shifted k bits and transmitted to UQ register. -27- LQRUUQ: Contents of LQ register is right shifted k bits and transmitted to UQ register. LQL8UQ: Contents of LQ register is left shifted 8 bits and trans- mitted to UQ register. LQR8UQ: Contents of UQ register is right shifted 8 bits and transmitted to UQ register. LQDUQ: Contents of LQ register is transmitted to UQ register. LSL8US: Contents of LS register is left shifted 8 bits and transmitted to US register. LSR8US: Contents of LS register is right shifted 8 bits and transmitted to US register. LSDUH: Contents of LS register is transmitted to UH register. LSDUS UHDM: UHDUS UHDLH UMDX1 UQDUM UQDLQ USDS1 Tl+DLS ZUDLM Contents of LS register is transmitted to US register. Contents of UH register is transmitted to M register. Contents of UH register is transmitted to US register. Contents of UH register is transmitted to LH register. Contents of UM register is used as X-input to SDS (Stage l). Contents of UQ register is transmitted to UM register. Contents of UQ register is transmitted to LQ register Contents of US register is used as S-input to SDS (Stage l). The T-output of SDS (Stage h) is transmitted to LS register. The Z-output of SDS (Stage k) is transmitted to LM register. h. Assimilation Logic 1. Name: ASSIM 2. Functional Description: The result of signed-digit subtractor is in the SDS format, this routine is used to convert it into the conventional binary form, and the assimilated result will be Z (at Stage k) . 3. Formal Calling Sequence: CALL ASSIM -28- U. Formal Parameter Description: None 5. Implicit Parameter Description: The proper values for the bit-strings X, Y, S, N of SDS (Stage l) must be set before this routine is called. 6. Subroutines Used: SDS, PR0P 7- Operational Description 7.1 English Text: To convert data in the SDS format into the conventional binary form requires borrow propagation and one additional subtraction. (1) The input X, S, Y to SDS (Stage l) and the negation control signal N is passed to this routine by the calling program. The SDS will perform an addition or subtraction according to N. (2) The borrow/carry bits are generated by the routine 'PR0P 1 . (3) The output T, Z, of SDS (Stage l) will pass through SDS (Stage 2 and 3) by simply setting Y = N = G = and X = Z, S = T. (h) Finally, the borrow/carrier bits is used as the Y-input of SDS (Stage k) . The assimilated result is formed at Z. 7 . 2 Flowchart Flowchart is attached. (5) Normalization 1 . Name : N0RM 2. Functional Description: For floating point ADD, SUB, MPY and DIV, normalization of the final result is usually needed. If overflow or underflow occurs during the normalization process, the bogus result indicator will be setted and FA register -29- will "be set accordingly. In this case FA is used to hold error indicators and return them to TP. 3. Formal Calling Sequence CALL N0RM h. Formal Parameter Description: None 5. Implicit Parameter Description: The UQ register holds the fraction portion of the floating number to he normalized, the exponent portion is held in the temporary storage II (this location is used by all subprograms in this simulator. 6. Subroutines Used: UQDLQ, LQL^UQ, LQRl+UQ, SETB0G, LQL8UQ 7.1 Operational Description: 7.1.1 UQ register holds the fraction portion. If bit 5 through bit 8 all not zeroes, the UQ register must right shift k bits and the exponent will be increased by 1. If the final exponent is greater than 63 (in AU hardware, a 7-bit adder issued, but in the simulation, the best available facility is a half word addition, therefore II greater than 127 is tested) overflow occurs. The B0GUS and 0V indicator will be set and EUL set to all l's. 7.1.2 If bit 9 through bit 12 are all zeroes, the UQ register is left shifted until UQ^ ., ^ are not all zeroes. If UQ. . r are all zeroes, UQ 9-12 9-lb is left shifted 8 bits, and the exponent is reduced by 2. If only UQ are all zeroes, UQ is left shifted h bits and the exponent is decreased by 1. In case of underflow (exponent less than -6k). BOGUS and UN indicators will be set and EUL set to all O's. 7.2 Flowchart Flowchart is attached. -30- (6) Set Bogus result and error indicators SETB0G: If 0V = 1 then EUL (exponent of result) is set to all l's; if UN = 1 then EUL is set to all O's. If any one of the k indicators: 0V, UN, LSG, ID is on then the B0GUS indicator will he set to 1. In case B0GUS = 1 the routine 'INDFA' will be used to set error indicators. INDFA: In case when bogus result is formed or when CPRA is performed, FA register no longer holds the flag bits of Operand A. FA is used to hold error indicators and return to TP. The corresponding bit in FA is set to 1 if the indicator is on. Bit No. of FA Indicator GT (greater than) EQ (equal) LT (less than) 0V (overflow) FM (Flag Match) UN (Underflow) LSG (lost of significance) ID (Invalid Data) (7) TIMER: This routine is used to read out the internal clock of IBM 360/75 during execution. The timing of the simulation of one arithmetic order may then be known. The current time is printed in the following format: HH.MM.SS.TTT's where H stands for hour, M for minute, S for seconds and T for micro-second. (ii) An overall flowchart of 'GATE' is provided Symbols used in the flowchart are: V: INBUS (50 bits) M: M register M : Bit i through j of M UQ: UQ register -31- UH: UH register Y: Y-input of SDS, this symbol is used for any one of the h stages of SDS. P: "borrow/carrier bits (6U-bit string) LM: LM register UM: UM register LS: LS register US: US register X: X-input to SDS, used for all k stages of SDS S: S-input to SDS, " " N: Negation control of SDS " G: Interstage connection of SDS T: T-output of SDS " " Z: Z-output of SDS " " P,B: Borrow/carry bits II: Half-word integer holds EUL FA: Flag register, usually holds the flag bits of operand A, case of bogus result it holds error indicators. GT: 'Greater than' indicator EQ: 'Equal' indicator LT: 'Less than' indicator 0V: 'Overflow' indicator UN: 'Underflow' indicator FM: 'Flag match' indicator LSG: 'Loss of significance indicator ID: 'Invalid data' indicator HH.MM.SS.TTT: Hour .Min. Sec . microsec TIME: IBM 360/75 build-in function to read internal clock In -32- GATE Page: 1 of 9 -33- GATE Page: 2 of 9 UQt-60 = LC >5-64 UC >61-64 = UH = LS GATE Page: 3 of 9 US = LS us 1-56 - LS 9-64 US 57-64 = US 9-64 US 1-8 = LS = 1-56 Y 1-63 " M 2-64 Y 64 = Y 1-62 " M 3-64 Y 63-64- ° -35- Y 1-61 - M 4-64 62-64 = Y 1-60 " M 5-64 61-64 = Y 1-59 " M 6-64 Y 60-64 = Y 1-58 " M 7-64 59-64= -0 Y 1-57 " M 8-64 Y 58-64 = Y = P GATE Page: k of 9 -a PRINT HH.MM.SS.TTT -36- UM = UQt.64 GATE: Page: 5 of 9 -37- GATE Page: 6 of 9 s = US M 9-16 = v 21-28 M 17-23 = v 31-38 M24-32 = V 41 . 48 M 33-39 " v 1 1-18 M 40-48 " v 21-28 M 49-56 " v 31-38 UH 9-16 = v 21-28 UH 17-24 =v 31-38 UH 25-32= v 41-48 UH 33-40 " v 1 1-18 UH 41-48 " v 21-28 UH 49-56 = v 31-38 UH 57-64 " v 41-48 UH 1-8 = v 11-18 UH 9-16 " v 21-28 UH 17-24" v 31-38 UH 25-32- v 41-48 u< 39-16 = v 21-28 U Q 17-24 = v 31-38 UQ 25-32- v 41-48 U( 533-40- v 11-18 u Q41-48" v 21-28 UQ 49-56" v 31-38 UQ 57-64= v 41-48 -38- U< 3l-8 = v 11-18 UQ9.16 = v 21-28 U< 3l7-24= V 31 . 38 UQ 25-32 " V 41-48 GATE Page: T of 9 -39- PS GATE Page: 8 of 9 II = II +1 OV = 1 11 = 11-1 UN = 1 -ko- B0GUS = ^v|un|lsg|id FA 1 - FA 2 = GT EQ * FA 3 = FA 4 = J LT li FA 5 , FA 6 = FM JN ' L FA 7 = FAg = _SG D GATE Page: 9 of 9 EUL = '1111111' EUL = '0000000' INDFA IV. The Signed-Digit Subtracter 1 . Name : SDS 2. Functional Description: The adder used in the Illiac III is actually a signed-digit sub- tractor. It includes the facility for postponing borrow propagation. It will perform both addition and subtraction. The subtrahend is in con- ventional binary form, the minuend is in SDS format: each digit of the minuend is of the form S.-X., where X. is interpreted as a magnitude, 1 or and S. is a sign, = +, 1 =-1. The output of the subtractor is in this same SDS format. The SDS format digits are represented as follows: Digital Value +0 +1 -0 -1 Formal Calling Sequence: CALL SDS (X, S, Y, G, NEG, T, Z) Formal Parameter Description: U.l Input Parameters: S: Sign of minuend digits X: Magnitude of minuend digits Y: Subtrahend in conventional binary form G: Gate on interstage connection (not a prppagation borrow/carry) NEG: Control to complement T NEG = — > T not complemented NEG = 1 —^ T complemented k.2 Output Parameters: T: Sign digits of difference Z: Magnitude digits of difference All input and output parameters are 6k digits. 42- 5. Implicit Parameter Description: 6. Subroutines Used: The external variable PRINT is used to control the printed output of this routine. If PRINT = 0, nothing will be printed from this routine. 7. Operational Description 7.1 English Text: Each stage of the signed-digit subtractor has 3-input and 2-output together with an interstage connection and 'NEC control line. 'i-1 S. X. 1 1 Y. l 1 , f 1 SDS NEG C. St age l l ■* G j, \ T. l Z. l This routine is used to evaluate the following equations: c i ■ (s i + i x i + i v *i + i W • G I - 1, 2...6U (bits) T. = C. + NEG I l Z. = C. + (X. + Y. ) II li In case when S = X = 'l'B then T = T Since all input and output parameters are defined as 6h-\>it string it is a straightforward bit manipulation. Whenever this routine is called, the parameter PRINT will be checked, If PRINT=1, the bit-strings of X, S, Y, G, N, T, Z will be printed out. Otherwise, nothing will be printed. -1+3- 7 . 2 Flowchart Flowchart is attached Symbols used in the flowchart are i-J X Y T Z N G C cc Sign of minuend in SDS format : ith to jth bits of C. Magnitude of minuend in SDS format Subtrahend in conventional format Sign of result in SDS format Magnitude of result in SDS format Negation control Gate on interstage connections Interstage connections Temporary storage All variables are 6U-bit string and used for any one of the k stages of SDS). 8. Error Conditions None -kh- T = C©N Z = C©CC SDS Page: 1 of 1 PARAMETERS: X,S,Y,G,N,T,Z CC = [JS-X) 1 (x.yQ • G 11 C 1-63 - CC 2 -64 c 64 = \ ' CC = X©Y T, = Ti -1*5- V. Propagation Logic 1 . Name : PR0P 2. Functional Description: This routine is used to generate the borrow/carry digits, B, which will be used to assimilate the result of SDS from SD format to conventional format. B bits are defined as: B. _ = B. . Z. V T. . Z. (i = i, m. ,,...-0) l-l 1111 l-l where Z. = ith magnitude bit T. = ith sign bit i = Number of the least significant digit, in this simulation. It is 6k. 3. Formal Calling Sequence: CALL PR0P k. Formal Parameter Description: None 5- Implicit Parameter Description: All B, T, Z are defined as external variables, so they don't have to be passed as parameter, but B is changed after execution of this routine. 6. Subroutines Used: None 7. Operational Description: 7.1 English Text: This routine is used to generate the borrow bits, since B. depends upon B , the equation mentioned above cannot be evaluated by simple bit-string manipulation. The build-in function SUBSTR of PL/1 is used. It will evaluate every bit of B by the equation from the least sig- nificant bit to most significant bit. 7.2 Flowchart Flowchart is attached: Symbols used in the flowchart are: Borrow bits (6U- bit string) Sign bits of result from SDS (6k -bit string) Magnitude bits of result from SDS (6k bit string) BB , TT, ZZ: Temporary storage (l bit) B. : ith bit of B l 8. Error Condition: None -k6- A. - 63 BB = B^ +1 TT ~- T i+ 1 B^= (BB- ZZ) (ZZ-TT) X - X-1 PROP Page: 1 of 1 -1*7- VI. Arithmetic Orders Every arithmetic order is simulated separately. ADD, SUB and CPRA are quite similar and will "be described in one section. There are three types of data conversion: CVL, CVF and CVD which will he explained in one section. MPY, DIV and P0LY will he explained as individual procedures . 6.1 Addition, Subtraction and Comparison 1 . Name : ADDX or SUB or CPRA 2. Functional Description: This routine is used to simulate floating point addition, subtrac- tion or comparison. If the exponent of sum or difference is greater than 63, over- flow occurs. The bogus result will be the maximum floating point number that can be represented, with correct sign. If the exponent of sum or difference is less than -6k, underflow occurs. The bogus result will be the minimum floating point number that can be represented, with correct sign. If the fraction of sum or difference is zero but the exponent is not -6U , then cost of significance occurs. The bogus will be zero. For comparison, the EQ, GT, LT or FM will be set according to the result of comparison. 3. Formal Calling Sequence: CALL ADDX ' or CALL SUB or CALL CPRA h. Formal Parameter Description: None -1+8- 5. Implicit Parameter Description : The augend (minuend) is taken from UQ register, the addend (subtrahend) is taken from UH register. The sum or difference is held in UQ register. For CPRA or bogus results, FA holds the comparison or bogus result indicators, otherwise FA is unchanged. 6. Subroutines used: ASSIM, INDFA, LHRl+UH, LHR8UH, LMDUQ, LQRUUQ, LQR8UQ, MDY1 , MDYk, N0RM, SDS, UHDLH, UHDM, UMDX1 , UQDLQ, UQDUM, USDS1 , ZkVIM. 7- Operational Description: 7.1 English Text: (1) The first operand (augend or minuend) is taken from the UQ register (fraction). Its exponent is in EUU, the sign bit in SIGNA, and the flag bits in FA. For the second operand (addend or subtrahend), the fraction is in the UH register, the exponent in EUM, the sign bit in SIGNA, and the flag bits in FB. (2) The indicator PLUS, MINUS or CPA is set according to whether the instruction is ADD, SUB or CPRA. (3) DEXP is the difference of the two exponents. When DEXP is either greater than or less than 0, the sign of the result is predictable. When DEXP is equal to zero, in some cases, the sign of the result is also predictable. Whenever the sign of result is predictable, the indicator SDB will set to 1. For CPRA, if SDB = 1, GT or LT can be assigned without actually doing the subtraction. The following is a table for the prediction of SR. -h 9 - DEXP SIGNA s SIGN B Arithmetic Order SDB SR > Yes or No Any 1 SIGNA < Yes or No Any 1 SIGNB = Yes ADD 1 SIGNA SUB CPRA No ADD SUB 1 SIGNA CPRA 1 SIGNB (k) After SDB and SR have been set, if DEXP > 13 then the second operand is too small compared to the first operand. The result (sum or difference) will be the first operand. At point (l) for 0 13 Q DEX EXPLT 1 V EUL = EUM SDB = 1 SR = SIGNB© MINUS ADDX Page: 2 of 4 f SETFLAG ~\ 4r Y a / UHDLH \ P> 2 / \ LHR8UH / N \ 1 DEXP - DEXP -2 V 1 L — > DEXP = DEXP + 2 J, (X,Y,S,G,N T,Z) Z4DLM LMDUQ -52- UQDLQ LQR4UQ CAL 2,1 I UHDM UQDUM a TO = SIGNA £ SIGNB Tl = (SIGNB £ SR) ItO TO = SIGNA©SIGNB Tl = (SIGNB©SR)I TO NEG ,.™= o NEG*,. 64 =1 \ Tl = ^> Y ^- N 1-64 = 1 N t _J N 1-64=1 I US = US©NEG-> N 1-64 = 1 N r N 1-64=1 i r < r USDSI ' UMDXI MDYI -53- ADDX Page: k of k FP = FA0FB FM = 1 I GT = SR-EQ LT = SR-EQ INDFA _5U- Since NEG0 and N are defined to be 6U-bit strings , but both SIGNA and SIGNB are 1-bit, temporary storage TO and Tl are introduced to set NEG0 and N. (6) The result US © NEG0 is used as the S-input to SDS. The contents of UQ register is used as X-input (UQDUM, UMDXl) and the contents of UH register is used as Y-input to SDS, Stage 1. N is used to control add or subtract and then the 'ASSIM' routine is used to perform the actual addition or subtraction. (7) In case when SDB = and SR = 1 , that means the N set above is wrong. So reset N just by its complement and repeat step (6). (8) The assimilated result is in the UQ register. If the content of UQ is 0, the EQ indicator is set to 1. In case UQ = but EUL ^ then lost of significance occurs, LSG is set to 1, and the routine 'INDFA' is used to load FA. In other cases, 'N0RM' is used to normalize the result. If over- flow or underflow occurs during normalization, it will be taken care by 'N0RM' . (9) For CPRA, FA and FB is compared to set FM. The comparison is done by exclusive OR (A temporary storage, FP, of 8-bits is needed to hold the result of the exclusive OK due to the restriction of the implementation of bit manipulation in PL/1 ) . GT and LT are set by SR. Routine 'INDFA' is used to load FA. T . 2 Flowchart Flowchart is attached. Symbols used in the flowchart are: PLUS: - 1 for ADD (l bit) MINUS: = 1 for SUB (l bit) CPR: = 1 for CPRA (l bit) DEXP: Difference between EUU and EUM SDB: Sign-Digit-Bypass, = 1 if SR is predictable. II TO Tl Tl EUL extended to 16 bit. Used to set NEG0. (l bit) Used to set N (in stage l) (l bit) Not Tl -55- FP GT LT EQ Temporary storage t o hold FA © FB (8 bit) 'greater than' indicator •Less than' " ■ Equal ■ " LSG: 'lost of significance' indicator. 8. Error Condition: In case of overflow, the "bogus result is the maximum floating number with correct sign. For underflow, the bogus result is the minimum floating number with correct sign. For lost of significance, the bogus result is 0. 6.2 Multiplication: 1 . Name : MPY 2. Functional Description: This routine is used to simulate the fixed point and floating point multiplication. 31 For fixed point multiplication, if the product is greater than 2 -1 31 or less than -2 , an overflow will occur. The result returned to TP will have the most significant bits in UQ , the least significant bit in UQ 33-6V For floating point numbers, if the exponent of the product is greater than 63, an overflow will occur. The bogus result will be the maximum floating point number which can be represented, with the correct sign bit. If the exponent of the product is less than -6h , an underflow will occur, the bogus result will be the minimum number which can be repre- sented, with correct sign bit. 3. Formal Calling Sequence: CALL MPY h. Formal Parameter Description: None 5. Implicit Parameter Description: The multiplier and multiplicand are taken from UQ and UH register (exponent in EUU and EUM), respectively. Signs are taken from SIGNA and SIGNB -56- The exponent of the product is in EUL, the fraction in UQ and sign in SR. 6. Subroutines Used: UKDLH, LHR8 UH, UHDM, UQDLQ, UMDX1 , SDS , USDS1 , MLTYL, ML6Y1 , ML5Y2, MLUY2, ML3Y3 , ML2Y3, ML1YU , MDYU , TUDLS, ZUDLM, LQR8UQ, LSR8US, LMR8UM, MEXTPRE, LSDUS , LMDUM, ASSIM, N0RM, B0GUS , LMDUM. 7. Operational Description: 7.1 English Text (1) Sign of the product will he the exclusive 0R of the sign of the multiplicand and multiplier (SIGNA @ SIGNB). (2) For floating point number, as at point (l) the fraction of the multiplier is in the UQ register, the exponent in EUU. The fraction of multiplicand is taken from UH register with the exponent in EUM register. If either the multiplicand or multiplier is zero, the product will he zero. The exponent of the product is the sum of the exponent of multi- plicand and the multiplier. (II is the sum of exponent extended from 7 -hits to l6-hits. Since the first bit of EUU and EUM are sign bits, 128 must be subtracted): If II> 63 overflow occurs. If IK-6U underflow occurs. The multiplicand is transmitted from to UH register to the M register. The total multiply cycles needed is 7- (3) For fixed point multiplication, the multiplicand is taken from UQ register, bits 33 through 6h ; the multiplier is taken from UH register bits 1 through 32. In order to share the same logic as for floating point multiplication, the UH register is right shifted 8 bits. For negative multiplier, bit 1-8 of UH must be set to 1^ as shown at point (3). The multiplicand is then loaded into M register from UH register. For short fixed point multiplication, the multiply cycle needed is 2; for long fixed point, it is k. -57- (k) From here on, the following steps are common for both floating point number and fixed point numbers . ICC is a counter for the number of multiply cycles which have been completed. NCC is the number of cycles needed. The Multiplier Recode box is simulated as a block, to evaluate MY128X, MY61+X, MY32X, MYl6X, MY 8X, MYUX, MY2X, MY1X and NO, Nl , N2 , N3, NU . The equations for these signals are listed in the flowchart. (5) The UM register holds the intermediate results. The output from the Recorder: MY128X, MY6UX etc., used to determine how many bits the contents of M-register has to be left shifted and used as the Y-input to the SDS (Stage 1 through k). NO is used to set NEG0 control for the negation of US. Nl, N2, N3, NU are used to set negation controls of the SDS (stages 1 through k ) which determine whether the multiple is added or subtracted. This is shown from point (U) to (5). (6) The results from the Uth stage of SDS (T,Z) are right shifted 8 bits and transmitted into US and UM register. The contents of UQ register are also right shifted 8 bits. (7) The multiply cycle is repeated from step (k) , until NCC cycles have been completed. (8) After NCC cycles have been completed, for long fixed point only, no right shifting will be performed. The contents of LS and LM are directly transmitted into US and UM registers respectively as at point (6). (9) For floating point only, the routine MEXTPRE is called to assure the precision of the production. (10) The result in US and UM registers is then assimilated by setting NEG0 and N(Negation control of SDS, Stage l) and Y-input to 0. But in case of floating point operation and UQ.- = 1, one more addition is needed. This may be done by setting N = 1 and using the contents of the M register as Y-input, calling the 'ASSIM' routine . The assimilated result is put into the UQ register as shown for point (7) through (8). -58- (11) For floating point numbers, the routine 'N0RM' is used to normalize the product. (12) In the case of short fixed point numbers, for negative products, the Uth byte of UQ must all be l's. For positive products, the Uth byte of UQ must all be O's, otherwise overflow occurs. (13) In the case of long fixed point numbers, for negative products, byte 0-3 of UQ register must be all l's, and for positive product they must all be O's, otherwise overflow occurs. (Ik) The routine 'SETB0G' is used to set B0GUS indicator and load FA with error indicators in case of overflow or underflow. 7.2 Flowchart: The flowchart is attached. Symbols used in the flowchart are: SR: Sign of product (7 bit) SIGNA: Sign of multiplier SIGNB: Sign of multiplicand NT: Number type EUU: Exponent of multiplier EUM: Exponent of multiplicand EUL: Exponent of product II: Extend EUL from 7 bit to l6 bit halfword. NCC: Number of multiply cycles needed. ICC: A counter for the multiply cycle being completed MY128X, MY61+X, MY32X, MY16X, MY8X MYUX, MY2X, MY1X: Results from Multiplier Recoder to determine the shifting of the M register. NO, Nl, N2, N3, NU: Results from Multiplier Recoder to set the negation control for NEG0 and N's for h stages of SDS. -59- ( MPY j SR = SIGNA © SIGNB NT = NUMBER TYPE NCC - 4 "H^ = 1 NCC = 2 MP? Page: 1 of 5 EUL - SR =0 UQ 1-64 = UHDM NCC = 7 MULT Y 0V - 1 II > 63 y Y UN = 1 IK- 64 y \t \ f -60- L©CP RECODER NEG<£ 1-64 = 1 US = US0NEG0 ± Page : 2 of 5 Y N 1-64 = | N ' Nl-64 = 1 ■< f ! r -61- SDS3 N 1-64 = '1-64= 1 SDS Z,Y,T,G,N, T,Z) Y - MY8X = 1 ML3Y3 ML2Y3 <^ N3 = o y N N 1-64 = o N 1 N 1-64 =1 — f y ' SDS Z,Y,T,G,N, T,Z) MP* Page: 3 of 5 Y N 1-64 = ° 1 N 1 N 1-64 = 1 ' _J ' [1] -62- LQR8UQ LSR8US LMR8UM \-p .» «. TJXJ t« '« |t \v »» »« *« Number of times, UH and UQ registers have been left shifted h bits . Number of times, UH and UQ registers have been left shifted 1 bit. = 1, if quotient has to be subtracted by 1. 8. Error Condition: Floating Point Division: For overflow, bogus result is the maximum which can be represented (with correct sign). For underflow, bogus result is the minimum number which can be represented (with correct sign). Fixed Point Division: For division by 0, the remainder will be 0, 31 and quotient will be 2 -1. 9. Internal Procedures Defined (i) ASSIMQD: This routine is used to assimilate ASSIMER: the quotient (in register UH/UQ) from SD format to conventional binary form. The NEG0, US, N and Y must be set before this routine is called. The flowchart is attached. The assimilated result is in the M register. -71- (V) NT = V 8-9 IV = V 4-7 SR = SIGNA © SIGNB FX DIV ) 4 y NCC = 8 P2 DIV Page: 1 of 13 DIVFND -72- DIVRL1 = DIVRL2 - DIVRL3 = UQDUM UHDM ! L_ UH, -64 - UQ, -65 = DIVRL3 = 1 DIVRL2 = 1 DIVRL1 = 1 ML3Y3 ML2Y3 M1JY4 -73- DIV ;e: 2 of 13 X = S,G,N = X,S,G,N = SDS (X,Y,S,G,N, T,Z) Y = X = Z S = T NEG0 = 1 US = US0NEG0 ASSIMQD TEMP = DIVRL1 | .DIVRL2| DIVRL3 X,S,N,G = DIV Page: 3 of 13 LMDUQ ML3Y3 ML2Y3 N0RM I SETB0G DIVEND 1 X,S,G,N = I COMPARE RESULT WITH IBM 360/75 SDS (X,Y,S,G,N, T,Z) SDS X,Y,S,G,N, T,Z) Y = X = Z S = T Z4DLM -Ik- ( FIXDIV N DIV Page: k of 13 NEG# = #V = 1 UQ1-33 - UQ 34 . 64 = 1 -r+f FIXEND j UQ 1-65 = ° SR = Y NEG0, -32 - 1 = 1 y US, = 1 1 ' NEG3 UHDM US 1-64 = ° UQDUM U «1-65 = DIVID LSDUS LMDUM NE60,. 64 =1 Y = 0, N =1 US = us + neg4> ASSIMRE NEGR = UQ,. 64 = QASS Y = NEGR = 1 DIV Page: 6 of 13 -77- REASS2 Y = 10 RFASS2 NEG0 = 1 N 1-64 =0 QASS B N 1-64 = 1 ASIMRE UHDUS UQDUM M 1-64 = DIV Page: 7 of 13 M 64 = 1 Y 0- NDRL8 CC<1 y - NDDL8 |n W- -78- C RESHIFT \ DIV Page: 8 of 13 -79- P9 ICC = LOOP 13 DIVSCC = NFMB=0 DIV : 9 of 13 <^}SS(1) = 1 ^> Y N = 1 NEG?S = 1 i" 1 NEG^) s N = ' Y = Y TENL5Y2 TENL4Y2 DIV Page: 10 of 13 ML5Y2 ML4Y2 N = 1 N = I S = T©N SDS [Z,Y, S.G.N. T,Z) NFBM = 1 NFBM = -31- S3 10 DIVSCC = 2 DIV Page: 11 of 13 D2DMD M0DDIV <^ qss (5) y x = 1 // Y ^ N - 1 \ N = ^ f 1 ' S = T (J) N 1 r SDS (Z,Y,S,G,N T,Z) -82- NFBM = 1 Y N - 1 NE TW0 \ GET QM^, QSj.2 LDQMS12 LDQMS34 ■M LDQM56 GET QM 3 . 4 QS 3 . 4 GET QM 5 _ 6 QS 5 . 6 GET QM 7 . 8 QS 7 . 8 -85- ASSIMIRE Page: 1 of 1 I USDSI UMDXt ASSIM (ii) LMDUQ3: This routine is used by fixed division UQ l-32 = m i-32 (iii) LMDUH7 : This routine is used by fixed division UH, _^ = LM 1-32 1-32 (iv) LQL1UQ: This routine is used by fixed division Uft l-6U = L «2-6U U «65=0 (v) LQR1UQ: Used by fixed division UQ 1 = UQ 2-6U = LQ 1-6U (vi) LHL1UH: Used by fixed division UH^^ ■ LH 2 _ 61+ UQ 33-6U = ^33-61; (vii) LMUQ7 (viii) Shifting logic used by CVD DIV only TENLTY1: Y , Y^ = 1, other bits of Y = TENL6Y1: Y , Y = 1, TENDY1 : TENL5Y2 TENIA Y2 : TENL3Y3 TENL2Y3 TENL1YU TENDYU : V Y ll = l < V Y 6 = 1 ' Y 5 , I x = 1. V Y 8 = l > Y Y = 1 Y 8' Y 10 = ls Y Y =1 9' 11 ' -87- (ix) DIVID This routine is used to perform NCC division cycles. Each division cycle requires stopping through k stages of SDS. (a) The routines DODMD, D1DMD, D2DMD, D3DMU are used to get the 6-bit s which will be used by the M0DIV for each stage of SDS t (b) Then M0DIV (Model Division) is called. (c) The output for Model Division: QM are used to determine the shifting of M register in Stage 1 of SDS (or TEN shift for CVD) QM , for stage 2 of SDS ^5,6 3 QM^ « for stage k of SDS QS are used to set the negation control of SDS1 , QS " " " SDS2 QS " " " SDS3, QS " " " SDSU. (d) For each step in a cycle (except in the last SDS of the last cycle of fixed division), the overflow due to SDS is detected, and the indicator NFBM is set to 1. Then in the M0DIV, if NFBM = 1 the first bit of PS will be negated to correct the overflow. (3) For the routine 'M0DIV , flowchart is attached. PM, PS: Output from DODMD D1DMD D2DMD D3DMD DIUSCC: No. of stage of SDS (0-3)* NCC: No. of divides cycles needed t LDQMS12 LDQMS3>+ LDQMS56 } to S et ^..8 QS l-8 LDQMST8 -88- 6.k Data Conversion All routines used for data conversions are grouped in one routine, ' C0NVS'. There are three types of data conversion: convert to long fixed point number (CVL), convert to floating point number (CVF), and convert to decimal number (CVD). These are described in the following sections. Also three auxilary subroutines: 'DVB', which is used to convert decimal digits into binary bits; 'C0MPL', which is used to algebraicly complement the contents of the QUQ register; and ' FL-N0RL-FX ' , which is used to align the floating point no. into double word fixed point form will be described. Since some subfunctions are common to CVL, CVF, and CVD, one overall flowchart for data conversion is provided. Reference points used in the following section is marked by N in the flowchart . Page 1-3 of the flowchart are for CVL. Pages k-5 for CVF, pages 6-9 for CVD, pages 10-11 for DVB, page 12 for C0MPL, and page 13 for FL-N0RL-FX. The symbols used in this chart are: V: INBUS (50 bits) NT: Number type (2 bits) DEC: Decimal (for NT = '11') FL: Floating (for NT ='10') I0PI: A storage buffer to store the converted number in conventional binary form. D0PI: A buffer to store the number to be converted in IBM. 360/75 decimal form. F0PI: A buffer to store the number to be converted in floating point form. DVB: A routine to convert decimal digits (in UQ) to binary bits ASSIM: A routine to convert SDS format to conventional binary form. For detail see the write up 'GATE'. II: Extends the exponent of a floating point number from 7 bits to a half word integer. -89- SETB0G: A routine to check 0V, UN, LSG or ID set up B0GUS indicator and FA. For more detail see the write-up for ' GATE ' . ITEMP: Temporary storage ; NDDL8: Temporary storage to store the number of times UQ and UH registers being left-shifted 8 bits. ICC: A temporary count. UH, UQ, UH, LQ, US, LS, UM, LM: Registers {6k bit) FA: Flag register (8 bits) SIGNA, SIGN B, SR: Sign Register (l bit) 0V, UN: Overflow, Underflow indicators. X, Y, S: Inputs to the signed-digit-subtractor (same name used for all k stages of SDS) NEG0: Negation control for S-input to SDS (Stage l). N: Negation control for T-output of SDS. (Same name used for all k stages of SDS). T,Z: Outputs of the SDS (all k stages). VDDIV: A routine to perform the division (by 10). Used by CVD only. For detail see the write-up for 'DIV. LHlAUH, LHL8UH, LMDM, LMDUM, LMDUQ, LQIAEQ, LQL8UQ, LQRUUQ, LQR8UQ, LSDUH, LSDUS, MDYU , MLlYh , ML3Y3, MLUY2 , TUDLS , UHDLH, UHDUS, UMDX1, UQDLQ, UQDUM, USDS1, lUDLM: All are routines defined in 'GATE". NCC: Number of division cycle needed. This will be set by "CVD' and used by 'C VDDIV 1 NEGR: = 1, Quotient should be subtracted by 1. This is set by 'CVDDIV* and will be used by 'CVD 1 . -90- 6.U.1 Convert to Long-fixed point number 1 . Name : CVL 2. Functional description: This routine is used to convert either a floating point number or a decimal number into a long-fixed point number (full-word). If the converted fixed number is greater than 31 31 (2 -l) or less then (-2 ), an overflow will occur, and the result returned to TP will be the low-order 31 bits with correct sign bit. 3. Formal calling sequence CALL CVL h. Formal Parameter Description: None 5. Implicit Parameter Description: Instruction variant (IV), number type (NT) will be used in this routine, the number to be converted is taken from UQ register (exponent in EUM for floating point number). Later on, UQ register will contain the converted number. In case of bogus result, FA contains the error indicator. 6. Subroutines Used: DVB, UQDUM, UMDX1, USDS1, ASSIM, SDS, ZUDLM, LMDUQ, UQDLQ, LQR8UQ, LQL8UQ, LQL^UQ, C0MPL 7. Operational Description: 7.1 English Test: There are two types of CVL: floating point to long- fixed point number and decimal to long-fixed point number. For floating point number NT = '10', for decimal number NT = '11', NT is the 8th and 9th bit of the V(lNBUS). IBM 360/75 data conversion is also performed for the comparison of results, i) Decimal to long- fixed point number 1) The number to be converted is stored in VQ register bit 9 to bit 6k. The sign of that number is in Sign A. 2) First DVB is used to convert the decimal digits into binary bits and right adjusted in UQ. If UQ is not all zeroes, overflow occurs and 0V indicator is set to 1. -91- 3) If the number to be converted is a negative number, it must be complemented (put in sign- magnitude form) before return to the TP by- setting the US register equal to all zeroes and calling the routine 'C0MPL'. k) In case of overflow, the routine ' SETB0G' is used to set the B0GUS indicator, and to load FA with error indicators, (ii) Floating Point to Long-Fixed Point Number l) The number to be converted is stored in UQ register bit 9 to bit 6k. The sign of that number is in SIGNA. 2) First DVB is used to convert the decimal digits into binary bits and right adjusted in UQ. If UQ is not all zeroes, overflow occurs and 0V indicator is set to 1. 3) If the number to be converted is a negative number, it must be complemented (put in sign -magnitude form) before return to the TP by setting the US register equal to all zeros and calling the routine r C0MPL'. k) In case of overflow, the routine 'SETB0G' is used to set the B0GUS indicator, and to load FA with error indicators, (iii) Floating Point to Long-Fixed Point Number l) The number to be converted is stored in UQ register, bits 9 through bit 6k. Exponent bits are in EUM; the sign bit in SIGN A. -92- 2 ) As at point 2 , ' II ' is the exponent in the integer form. (halfword). (Since EUM is 7 bits long and the first bit is the sign bit, when it is converted to a l6-bit integer, 6h must be subtracted. ) 3) For any floating number whose absolute value is 21 less than 1 or greater than l6 (overflow). The converted number will be 0. k) For any floating point number whose absolute value (x) is 16 <|x|< l6 , overflow will occur. The converted number is the low-order 31 bits with correct sign bit. 5 ) The converted fixed point number must be right adjusted in UQ register, if exponent equals Ik , no shifting is required, for exponent less than lU , the contents of UQ register must shift left, otherwise shift right. As at point 3, the routine ' FL-N0RL-FX ' is called. 6) The maximum fixed point number is +(2 -l) or 31 -2 , point k is used to detect the overflow -an case for +2 ). T) For negative number, the result must be the complement, same as in 'convert decimal to fix 1 . 7-2 Flow Chart Pages 1-3 of the flowchart for 'C0NV' is for CVL. The symbols used in the flowchart are listed under Section 6.U. Error Condition : In case of overflow, B0GUS indicator will be set. FA register is used to hold the error indicator. -93- 6.U.2 Convert to Floating Point Number 1 . Name : CVF 2. Functional Description: This routine is used to convert either a fixed point number (both long and short) or a decimal number into a floating point number. 3. Formal Calling Sequence: CALL CVF k. Informal parameter description: None 5. Implicit parameter description: The number to be converted is taken from UQ register, sign from SIGNA. The converted number will be stored at UQ register, exponent part in EUL and sign in SR. FA contains the flag bits of the number to be converted and is unchanged. 6. Subroutines used: DVB, UQDLQ, LQL8UQ, LQLl+UQ, LQR8UQ, USDS1, UQDUM, UMDX1, ZUDLM, LMDUQ, ASSIM, C0MPL 7. Operational Description: 7.1 English Text i) Convert decimal to floating point number 1) The number to be converted is in UQ register bit 9 through 6k , the sign bit is in SIGNA. 2) The routine 'DVB' is used to convert the decimal digits in UQ register into binary bits and right adjusted in UQ. 3) Since the maximum decimal number is ik digits long when converted to a floating point number, the maximum exponent is ik. The fraction part of a floating point number must be normalized (bit 9-12 not all zeros ) . ii) Convert The routine 'N0RM' is then called to normalize the contents of UQ. The sign of the converted number is in SR. iii) Fixed point number to floating point number l) The number to be converted is taken from UQ register bit 1 through bit 32. In order to share the same normalization logic as in (i), the con- tents of UQ register is right shifted 8 bits. -9k- 2) Then, bit 9 of UQ is the sign bit. For negative number, it must be complemented before normaliza- tion. Since bit 9 is the sign bit, bit 9 of US register will be set to 1, and the other bits of US set to 0. The subroutine 'COMPL' is then called. 31 3) The fixed point number is between -2 and 31 +(2 -l), therefore after conversion the maximum possible exponent is 8. So by setting 11=8 and using the routine 'N0RM' , the fraction portion of converted number will be normalized in UQ and the correct exponent formed in EUL. The sign will be in SR. 7.2 Flowchart Page U-5 of the flowchart for 'C0NV' are CVF. 8. Error Condition: None -95- 6.k.3 Convert to Decimal 1 . Name : CVD 2. Functional Description: This routine is used to convert either a fixed point number (both short and long) or a floating point number into a decimal number (Illiac III format). In case of overflow, the bogus result will be the low order lU digits. 3. Formal Calling Sequence: CALL CVD k. Formal parameter description: None 5. Implicit parameter description: The number to be converted is taken from UQ register (exponent in EUM). The converted number is in UQ register bit 9 through 6H , sign bits are in UQ bit 1-8. In case of overflow, FA contains the error indicators, otherwise FA is unchanged. ICC, the no. of division cycles, will be set by this routine and used by 'CVDDIV; NEGR will be set by 'CVDDIV and used by this routine. 6. Subroutines Used: C0MPL, UQDLQ, LQR*+UQ, LQR8UQ, LQL8UQ, SDS, LHL8UH, LHLUUH, CVDDIV, LMRUM, ZUDLM, LMDUQ 7. Operational Description 7.1 English Text In order to convert a fixed point or floating point number to a decimal, first thing is to left adjust the binary bits in UQ register, then divide it by 10. The portion of fix-division in the 'DIV routine can be used for this purpose, the entry name is 'CVDDIV. The only difference is that the M register is not used in CVDDIV and only the remainder will be assimilted, the quotient is in the SDS format. Since in fix-division the sign of remainder is the same as the dividend, but in CVDDIV, the remainder is always positive. In order to eliminate the effect of SIGNA (which contains the sign of dividend), the sign is temporarily kept in SR and SIGNA is set to 0, as shown in point 7' -96- 1) For a fixed point number, the number to be converted is in UQ register bit 33 through 6k , and bit 33 is the sign bit. For negative number, it must be complemented before con- version. By setting bit 33 of US register to be 1, other bits to be 0, NEG0 to 1 and then calling the routine ' C0MPL', the complemented number will be in UQ bit 33-6^. 2) For a floating point number, in order to share the same logic of CVD as for fixed point number, the fraction part of that floating point number will first be right adjusted as fixed point number by using the routine ' FL-N0RL-FX' . Since the decimal number can have only 1*4- digits, if the absolute value of the floating number to be converted is Ik greater than 10 -1 , an overflow will occur and 0V is set to 1. 3) From here on, the following steps are common for both fixed point or floating point conversion. ND is a counter for the number of decimal digits which have been formed. If ND > lk t the conversion process will terminate. h) The contents of UQ register will be used as dividend and divided by 10 using ' CVDDIV. The decimal digits are generated from the least significant to the most significant. 5) The remainder after each division is a decimal digit. The M register is used to store the converted decimal digit. Every time a division is completed, the contents of M register will be right shifted k bits, the new remainder (bit 9-12 of LM register) will be inserted into bit 9-12 of M, as shown at point 8. 6) The quotient formed in UH and UQ register will be used as new dividend. The steps (3) - (6) will be repeated until either ND > ik or the UQ register is zero. 7) The SR, which contains the sign of the number to be converted, is used to set the sign of result. For positive numbers, bit 5-8 of UQ is set to 1010, for negative numbers it is set to 1011. -97- 8) Steps (8) - (10 ) will describe the detail of division. Since for the Model Division used in the Illiac III, the dividend is aligned between 1/2 and 1. In order to use the model division, the contents of UQ, UH register must be left shifted accordingly, as shown at point 9- 9) NCC is number of division cycle needed. This parameter will be used by the routine 'CVDDIV. To save execution time, no parameter will be bended, so NCC must be declared as an external variable in routines 'CVD', 'DIV and 'AUSIM' . 10) After the division is completed, the indicator NEGR is set by 'CVDDIV. If NEGR = 1, the quotient (in UH and UQ) must be subtracted by 1, as shown at point 10, but not assimilated. 7 . 2 Flowchart Pages 6-9 of the flowchart of 'C0NVS' are for CVD. 8. Error Condition: In case of overflow, the bogus result is the low order Ik digits with correct sign bits. The 0V, B0GUS will be set, FA contains the error indicators . 9. Local Procedures: LMRUM: The contents of LM register are right shifted k bits and transmitted into M register. -98- 6.U.U Procedure-Routines Defined within ' C0NVS' i) 1 . Name : DVB 2. Functional Description: This routine is used to convert the decimal digits, stored in bits 9-6U of UQ register, into binary- bits, which are right adjusted in UQ. This routine will be used by CVL or CVF whenever the number type is decimal. 3. Formal Calling Sequence: CALL DVB h. Formal Parameter Description: None 5. Implicit Parameter Description: None 6. Subroutines Used: UQDLQ, LQL8UQ, LQLUUQ, USDS1, UMDX1, SDS, ML3Y3, ML1YU, LMDUQ, LSDUS, ZUDLM, LMDM, ASSIM. 7. Operational Description: 7.1 English Text 1) The decimal digits to be converted are kept in UQ register, bits 9-6h. 2) At point 11, for all zero decimal digits the converted binary bits are also zero. 3) For decimal digits other than zero, the maximum number of digits to be converted is Ik. ICC is a counter. h) At point 12, UQ is left shifted to eliminate leading zeros, ICC is decreased accordingly. 5) Now, the decimal number is in the form: X ,X . ..X starting from bit 5 of UQ; where X stands for one decimal digit, X is most significant to digit, and X is the least significant digit. This routine is to evaluate the following equation: (( ( (X Q ) .lO+X^.lOj+X^. 10+. . . )'.10+X . 6) The most significant digit is taken from bits 5-8 of UQ register. M register is used to store the intermediate result. Initially M register contains X . Bit 9-12 of the UQ register will be transmitted to bits 6l-6h of UM register. Then the intermediate result (M register) is multiplied by 10 and added to the contents of UM register (by left shift M register by 3, then by l). The new intermediate result is -99- kept in M register again, as shown from point 13 to ik. 7) If more decimal digits remain to be processed, the contents of UQ register are then left shifted k bits. Step (6) is repeated until all decimal digits have been processed. 8) The converted binary bits are right adjusted in the UQ register. 7 . 2 Flowchart Pages 10-11 of the flowchart 'C0NVS' are for DVB. 8. Error Condition: None (ii) 1 . Name : C0MPL 2. Functional Description: This routine is used to complement the contents of UQ register. This routine can be called by CVL, CVF and CVD. 3. Formal Calling Sequence: CALL C0MPL h. Formal Parameter Description: None 5. Implicit Parameter Description: US and NGG0 must be set by the calling program before this routine is called. 6. Subroutines used: USDS1, UQDUM, UMDX1, ASSIM, Z^DLM, LMDUQ 7. Operational Description: 7.1 English Text: US and NEG0 are set by the calling program, the exclusive OR of these two is used as the S-input to Signed-digit subtractor (SDS). UQ is used as the X-input to SDS: Y and NEG1 are set to 0, then the assimination routine 'ASSIM' is called. Finally the complimented result is put back into UQ register. 7 . 2 Flowchart Page 12 of the flowchart 'C0NVS' is for C0MPL. 8. Error Condition: None -100- CONVS Page: 1 of 13 BIT PRINT FI OF REGIS PART IS IN A FL FORMAT FORMAT ( FORMAT LEAR ALL ATA (PRI : POLIP : CALL G : PROC V=(50 • • B ; U ,LS,US,L EUU=( FA=(8 WRDCT B='0'B ; XPGT=0; ,LSG, ID, RETUR THIS P THEN (64) XED TER A T OATI (SK B(32 (SK REG NT) ; = •0' CLRR EDUR ) '0' 0, LO M,UM 7) '0 ) '0' = o; */ BIN EXT; DEFINED*/ EST FOR ALL ROUTINES */ NG NO. AT INS . OR INS_S , MOVE TO V_S IP, A, X(4) ,B(64) ) ; ) , X ( 1 ) ) ; . IP, A T X(4) , B(64) ) i ; ISTERS I COUNT */ B; /* POLIP WILL BE CLEARED FOR ALL ORDER*/ EG; /* EXCEPT FOR POLY */ E 5 /* CLEAR ALL REBS */ B; =(65) 'O'B ; , X,Y,S, T,Z,N,G=(64) 'O'B; •B; EUM=EUU; SIGNA='0'B; SIGNB=SIGNA; B; FB=FA; EUL=EUU; CT=l; NOP=0; SR = SDB;~ THEN TPSIM : GET FILE( /* FIRST CAR FORM FOR PUT FILE(SYSPR CALL TIMER; PUT FILE DO I = 1 TO IV( I )= SUB END ; T1,T2=(64) DO 1=1 TO NT( I ) = S END ; IF -.1 VI 1 ) TH EL /* TEST FOR SUBSE IF POLIP THEN /* START IF ^NT(l) TH IF IND=1 THEN IB I T : GET UNSPEC( IOP UNSPEC( IOP PUT FILE ( •0P2= ',1 GO TO CON FX : GET GT,EQ,LT,FM,BOGUS='0'B; N; END CLRREG ; ART IS TO READ IN IV & NT , DETERMINE NOP READ IN OPRANDS PUT IN PROPER BUFFER (FIXED , FLOAT & DECIMAL ) CONVERT TO BIT FORM */ SYSIN) LIST ( IV_S,NT_S»IND) ; D IV(4BIT),NT( 2 BIT), IND=1 FOR READING IN BIT OPRANDS */ INT) EDIT ('START SIMULATION') ( PAGE, X ( 40 ) , A ) ; (SYSPRINT) LIST ('IV «,IV_S,'NT 4 ; STR(IV_S, 1,1) ; ', NT_S) SKIP; PUT •O'B; 2 ; UBSTR (NT_S,I,1); EN N0P=1 ; SE N0P=2 ; OUENT POLY, ONLY ONE OPRAND IS NEEDED */ NOP=l; READING OPRANDS */ EN DO ; DO ; FILE(SYSIN) LIST ( ( C ( I ) ,OPF ( I ) DO 1=1 TO NOP)); (1 ) )=C( 1 ) ; T1=C( 1) ; (2) )=C(2) ; T2 = C(2) ; SYSPRINT) EDIT (»0P1= ' , I OP ( 1 ) , C ( 1 ) , OP(2),C(2)) (SKIP,A,F(16,0),SKIP,X(7),B(64)); V; END; FILE(SYSIN) LIST (( I OP ( I ) , OPF ( I ) DO I = 1 TO NUP ) ) ; FILE(SYSPRINT ) LIST ('FIXED • ,( I OP ( I ) , OPF ( I ) DO 1 = 1 TO NOP ) ) SKIP; -121- GO END IF NT( IF IND=1 FBIT UNSP UNSP PUT FO GO T FL T2 = UNSPEC( IOP(2) ) ; Tl= UNSPEC( IOP(l) ) ; /* FX NO. MUST BE RIGHT TO CONV ; ADJUST IN THE LEFT WORD */ * 1) & -NT(2) THEN DO THEN DO ; : GET FILE(SYSIN) EC( FOP(l))=C(l) ; EC( FOP(2) )=C(2) ; FILE(SYSPRIN' P(2),C(2) ) CONV; end; LIST ( (C( I ),OPF(I ) T1 = C( l){ T2 = C(2) i ; DO 1=1 TO NOP) ); =C(2); T2=C(2); NT) EDIT («OPl= •tfOP(l) 1 CLl),« (SKIP, A, E( 16, 6) ,SKIP,X~<7) f B(64 D; OP2= • » )); PUT FI GET FILE(SYSIN) NO LE (SYSPRINT) LIST ('FLOAT 1 TO NOP )) SKIP; 1 TO NOP T1=UNSPEC (FOP(D) T2=UNSPEC (FOP(2)) GO TO CONV ; (( FOP( I ),OPF( I ) NOP ) ) ; S( FOPVl ),0 DO 1= 1 TO PF( I ) DO I END IF NT DEC ( 1 ) & NT(2 ) GET FILE THEN DO; (SYSIN) LIST ( LIST (( NOP" •DEC •, DOPU ) ,OPF( I )) ; ( DOP(I),OPF PUT FILE(SYSPRINT) NOP)) SKIP; Tl = UNSPEC (DOP( 1) ) ; T2= UNSPEC (DOP(2) ) ; IF SUBSTR(T1, 61,4)=» 1101'B THEN Tl=»00001011 'B f| SUBSTR ( T 1 , 5, 56 ) ; ELSE Tl=»00001010»B II SUBSTR ( Tl , 5, 56 ) IF SUBSTR(T2f 61 , 4 ) = • 1 1 01 • B THEN T2=«00001011'B I I SUBSTR ( T2 , 5, 56 ) ; ELSE T2=«00001010'B I I SUBSTR ( T2 ,5^ 56) ) DO 1= 1 TO ( I ) DO 1= 1 TO /* 13 NEG */ ; /* 13 P SO */ /* 13 NEG */ ; /* 13 PSO */ END /* CONV : PUT F END J=l ILE(S (SKI OF READ IN OPRAND */ TP SET DO TEMP TEMP J = J + END SET YSPRINT) EDIT ( • STR I NT-1 • , Tl , • STR I NT-2 • , T2 ) P,X(5),A(10),B(64)) ; FLAG( 1 )= OPF( 1) ; FLAG(2)=0PF( 2) ; FLAG(3)= SUBSTR FLAG(^-)= SUBSTR 1=1 TO 4 BY 2 ; (I) =SUBSTR (Tl, ( 1+1 )=SUBSTR(T2,J,32) 32 ; (OPF( 1),5,4) (0PF(2) ,5,4) J» 32) ; TEMP TEMP TEMP (+)= LW OFA*/ (2)=LW OF B*/ ( 3)=RW OF A*/ UP V & TRANSMIT TO SUBSTR ( V,4,4) = IV_S NWROD = NOP * 2 ; SUBSTR ( V,8,2) =NT_S AU */ GO TO TP SET START NEXT ' IF N0P=2 THEN CT=CT+1; ELSE CT=CT+2; IF CT <=4 THEN GO TO START ; ELSE GO TO EXEC CONT ; -122- START : DO 1= SUBSTR SUBSTR /* BI END ST PUT FILE(SYSPRINT DO 1= 1 TO 5) ) CALL TIMER; AU SEO IN : IF 1 TO A BY 1 ; (V, 1*10+1,8)= SUBSTR (TEMP(CT) , ( 1-1 )*8+l,8) ; (V, I*lC+9, 1 ) = SUBSTR (FLAG(CT) , I, 1 ) ; T 10 BE ADDED LATER */ ART ; /* END OF DO LOOP */ ) EDIT (»V~ • , ( SUBSTR( V, ( I -1 ) *10+ 1 , 1 ) (SKIP, A, 5 B( 11 ) ) ; WRDCT=0 THEN /* FX-POLY */ IF IV(1) £ THEN V( 1) £ HEN GO V( 1 )£NT /* IF /* FL-PLOY */ IF I Tl IF I IF I IF /* CVD-FX */ IF - /* CVF-FX */ IF - T /* CVD-FL OR CVL F IF ( -I £ I ( -I /* CVF-DEC RO CVL- IF ( -IV( 1 ) I ( -IV{ 1 ) GO TO FLPOLY : IF -iPOLIP THEN /* FOR SUBSEOU IF WRDCT=0 THE SIGNB=SUBST CALL EBDEUM CALL VDUHl; GO TO F; IF WRDCT=1 THE CALL VDUH2; GO TU EXEC_ FL OP 2 : IF WRDC V( 1) THEN G I V ( 1 ) & I V ( 1 ) £ THEN GO I V( 1 ) £ HEN GO L */ V( 1 ) £ -NT(2) V( 1 ) £ £ -NT (2 DEC */ £ -IV( £ -IV( THEN GO ERR ; GO TO ENT POL N DO; R(V,11, END; N DO; CONT; T = IV(2) £ GO TO FX IV(2) £ TO FLPOL (1)£ -NT FL( ADD/ THEN GO IV(2) & TO FX 1 V ( 2 ) £ I V THEN GO -IV m TO FX C - IV(2) TO FX CV DO ; INDIVR= NTDNTR END ; IV(4) £ POLY; IV(4) £N Y; /* (2) THE SUB/MPY/ TO FL_0 -IV(3) £ MPY ; l'3)l -IV TO FXD £ IV(3) VD; £ IV(3) F; -IV(2) £ IV(3) £ ) -IV(2) £ -IV(3) ) ) THEN GO TO FL IV_S ; = NT_S ; -NT( 1 ) T( 1 ) & -NT(2) SUBSEQUENT POLY */ N GO TO FL_0P_2 ; DIV/CPRA/POLY) P_2 (MOVE V TO REG) */ -IV(4) £ -NT( 1 ) /* FIX MPY */ (4)£ -NT(1) IV ; /* FIX DIV */ £ IV(4) £ -NT(1) £ -IV(4) £ -NT( 1) IV(4) £NT(1) £ IV(4) £ NT( 1 ) CVD CVL; 2) £ IV(3) £ -IV(4) £ NT(1) £ NT(2)) 2) £ -IV(3) £ J_y_(_4) £ NTJ_1J.£ NT(2)) TO DEC_CVF_CVL; /* THIS IS FIX__CVD_/CVF_ */ /* WRONG CONTROL CODE */ FL_0P_2; /* FIRST TIME_*/_ Y */ l); ELSE IF END; THEN DO ; SIGNA= SUBSTR (V,ll,l) CALL EADEUU ; CALL FA1LFA ; CALL VDU01 ; GO TO F ; END; WRDCT=1 THEN DO ; SIGNB= SUBSTR( V,ll,l) CALL EBDEUM ; -123- CALL FB1LFB ; CALL V0UM1 ; GO TO F ; END? IF WROCT=2 THEN DO; CALL FA2RFA; CALL VDU02 ; GO TO F ; END; ELSE ELSE IF WRDCT=3 THEN DO; CALL VDUH2__; CALL F"B2RFB; "~ A TO_ EXEC^CONT ; END; ELSE "GO TO" ERR; FXPOLY : IF ->POLIP THEN GO TO FXMPY; /* FIRST TIME »/ /* FOR SUBSEQUENT POLY */ CALL VDUH2; GO TO EXEC_CONT; FXMPY : IF WRDCT=0 THEN DO ; SIGNA=SUBSTR(V,11,1) ; CALL VDUQ2 ; _ CALL FA1LFA; GO TO F; END; ELSE IF WRDCT=1 THEN DO; ' SIGNB = SUBSIRJ_y_,_l_l_, 1 )J __ _ CALL FB1LFB; C A L L V DUH3 ; GO TO EXEC_CONT ; END ; ELSE GO TO ERR ; FXDIV : IF WRDCT=0 THEN DO ; SIGNA=SUBSTR( V,ll,l ) ; CALL FA1LFA; CALL VDU03 ;__ GO TO F"; END ; ELSE IF WRDCT=1 THEN DO ; SIGNB=SUBSTRfv, 11, 1 ) ; CALL FB1LFB; CALL VDU02; CALL VDUH3 ; GO TO EXEC_CONT ; END; ELSE GO TO ERR ; FL_CVD_CVL : IF WRDCT=0 THEN DO; SIGNA= SUBSTR (V, 11, 1) CALL EBDEUM; CALL VDUOl ; CALL FA1LFA; GO TO F ; END ; ELSE IF WRDCT=1 THEN DO; CALL VDU02 ; CALL FA2RFA; GO TO EXEC_CONJ ; END ; ELSE GO TO ERR" ;~ FX_CVF : CALL VDU03; SIGNA=SUBSTR( V,ll,l ) ; CALL FA1LFA; GO TO EXEC_CONT ; FX_CVD : CALL VDUQ2 ; SIGNA=SUBSTR( V,ll,l ) ; " CALL FA1LFA; -12U- GO TO EXEC_CONT; DFC_CVF_CVL: IF WRDCT=0 THEN DO; SIGNA=SUBSTR(V,18 1 ) ; CALL VDUOl: CALL FA1LFA; GO TO F; END; IF WRDCT=1 THEN DO ; _ _ . CALL VDUQ2; CALL FA2RFA; GO TO FXEC_CONT; END; "' F : WRDCT = WRDCT +1 ; GO TO TP_SET_NEXT_V ; ERR : PUT FILE(SYSPRINT) LIST (• WRONG CONTROL CODE OR NOP') PAGE; CALL CLRREG ; GO TO TPSIM ; /* ERROR , DO NEXT OPERATION */ /* THIS IS EXECUTION CONTROL PART, CALL VARIOUS ROUTINE */ EXFC_CONT : BEGIN ; /* BRANCH TO PROPER ROUTINE */ PUT FILE(SYSPRINT) EDIT ( ' S IGNA= • , S I GNA, • S I GNB= • , S I GNB , •EUU=' , EUU, 'EUM=« , EUM, »UH_REG=« , UH , •UQ_REG=« , UQ, • FA= • , FA t •FB=',FB) (SKIP, A( 10), B(65) ); /* CVL */ IF -IV(1)£ -*IV(2) £ -IV( 3) £ IV(4) THEN DO; CALL TIMER; CALL CVL; GO TO CLEAR; END; IF -I V ( 1 ) £ -IV(2) £ IV(3) £ -IV(4) THEN DO; /* CVF */ /* CVU */ /* ADDX */ /* SUB */ /* CPRA */ /* MPY */ /* POLYX */ /* DIV */ /* POLYX */ END FA1LFA CALL TIMER; CALL CVF; GO TO CLEAR; END; IF -I V ( 1 ) £ -ivf2) £ IV(3) £ IV(M THEN DO; CALL TIMER; CALL CVD; GU TU CLEAR; END; IF I V ( 1 ) £ -IV(2)__£ MV(3) £ -.IV(4)__THEN DO; CALL TIMER; CALL ADDX; GO TO CLEAR; END; IF IV(1) £ -IV(2) £ IV(3) £ MV(4) THEN DO; CALL TIMER; CALL SUB; GO TO CLEAR; END; IF IV(1)£ -*IV(2) £ IV(3) £IV(4) THEN DO; CALL TIMER; CALL CPRA; GU TO CLEAR; END; IF IV(1) £ IV(2) &~Vl~V( 3) £ iIV(4) THEN DO; CALL TIMER; CALL MPY;"" GO TO CLEAR; END; IF IV(1) S IV(2) £ -*I V(3) £ IV(4)THEN DO; " CALL TIMER; CALL POLYX; GO TO KLEAR; IF I V< 1 > £ IV(2) £ IV(3) £ - 63 THEN OV=«l'B; /* EUL > (X,Y,S,G,N,T,Z) /*SDS ADDER */ /* PROROGATION LOGIC*/ /* PASSING SDS2 */ /* PASS SDS3 */ /* Z= ASSIMILATEOUT*/ */ 63 */ TO EXPR; SUBSTR(U0,9,4) ^= SUBSTR(UO f 13,4) -.= * 8 LEADING ZEROES ALL UODLO; ALL L0L8U0; 1=1 1-2; TO TEST8; UODLO; L LQL4UQ; II-l; 1 I <-64 THEN UN=« 1 »B; 'OOOO'B •OOOO'B */ THEN GO THEN GO TO TO EXPR; LL4; /* 4 LEADING ZEROES */ /* EUL < -64 */ =SUBSTR( ETBOG;' UNSPEC( I 1+64), 26, 7); NTRY; THEN EUL=(7) • 1 «B; THEN EUL=(7) 'O'B; OV | UN | L SGI ID; US THEN CALL INDFA; ♦ try; •O'B; (FA, 1,1)= GT; (FA, 2, 1 )= EO; -130- LT; ov: FM; UN; LSG ID; SUBSTR(FA,3,1 SUBSTR(FA,4, 1 SUBSTR(FA,b, 1 SUBSTR(FA,6,1 SUBSTR(FA,7,1 SUBSTR{FA,8, 1 RFTURN; TIMFR ; ENTRY; DCL TAME CHARACTERS); TAME=TIME; PUT FILE(SYSPRINT) SUBSTR(TAME,3,2) , SUBSTR(TAME,7,3) ) GATE; FNU // DIT (»TIME= ' ,SUBSTR(TAME,1,2) , • . •, • . SSUBSTRf TAME, 5,2), • ". • , (SKIP, X(4Q) ,A , A(2) , A,A (2) ,A,A(2) ,A , A ( 3) ) EXEC //PL1.SYSIN DD * ARITH : PROCEDURE; MPY : UIV : CVL : PGLYX : ENTRY; RETURN; END ARITH; /* PL1 CVF : CVD : ENTRY; RETURN; -131- Li //PL1.SYSIN SOS EXEC^ _PU_ _ DD * : PROCEDURE ( X, Y, S,G,N,T,Z ) ; DCL (X,Y,S) BIT (6 _ 4)7 ~N (G,T,Z) BIT (64J_;_ DCL (C, CUBIT (64); DCL (C2,C3) BIT(l); ^^ DCL CI BIT(l); " DCL PRINT FIXED BIN EXT; BIT (64) /* s = /* X = /* Y = /* T = /* Z = /* N = /* G = /* C = /* cc= SIGN OF MINUEND IN SDS FORMAT" ~ *>" MAGNI JDE OF M I NUENJD_JN__SDS__ FORMAT */ */ IN SDS FORMAT */ */ */ */ */ */ SDSC SUBTAHEND IN CONUENTIONAL FORMAT SIGN OF RESULT IN SDS FORMAT MAGNITUDE OF RESULT NEGATION CONTRUL GATE ON INTERSTAGE CONNECTS INTERSTAGE CONNECTS TEMPORARY STORAGE IF PRINT=0 THEN GO TO SDSC; PUT FILE(SYSPRINT) LIST ( • rNPUT~TO"S~DT» ) SKIP(2); PUT FILE(SYSPRINT) EDIT ( ' S • , S , • X • , X , • Y • , Y, • N • , N, • G • . G ) (SKIP,A(b) f X(4),B(64) ) ; CC=S L X; C2=SUBSTR(CC,l f 1); CC= (CC|( -X I Y)) & 67 C=(64)'0'B ; =SUBSTR( CC,2,63) ~~ ; + X.I Y.I ) G.I, C.I= = (-X 1~yT ; 7* CC I (-.C £ CC ) ; /* z = (^C £~N" )' ';' /* = SUBSTR (C,l,63) /* CC. 1-1 = X*I S.I CC (X & ->Y ) I (C & -.CO (C £ -,N) | 7 = T = IF C2 THEN DO; C1 = SUBSTR(T, 1,1 ) PUT FILE(SYSPRINT) DATA (C1,C2); IF PRINT=0 THEN GO TO OUTX; PUT FILE(SYSPRINT) LIST ('OUTPUT OF SDS') CC.I+1 */ = X'.XOR.Y */ CC.XOR.C Y */ C .XOR. N */ SUBSTR(T,1,1)=-,C1; END; /* PUT FILE(SYSPRINT) EDIT OUTX : RETURN ; END SDS ( 'T' t T,'Z',Z) SKIP; (SKIP,A(5) ,X(4) t B(64) ) -132- // EXEC PL1 //PL1.SYSPUNCH DD UN I T= PUNCH, JSNAME=£PUNCH //PL1.SYSIN DD * ■ PROP : PROCEDURE ; "7* PARAMETERS DCL (B,T t Z)'BIT(64) PACKED EXT; DCL (BC,BB,TT, ID BIT(l) /* B= PROPAGATION jHT */ /* T= SIGN */ /* Z= MAGNITUDE */ /* BB= TEMPORARY STORAGE" */ ARE B,T,Z */ SUBSTR (B,64 t l) = 'O'B DO BC BB TT ZZ 1= 63 SUBSTR SUBSTR SUBSTR SUBSTR TO 1 BY (B, 1,1) ( B , I + 1 , 1 ) (T V I+1 V 1) (Z, 1 + 1,1) SUBSTR (B,I,1) = BB & -1 /* BIT 64 OP B=0 */ -ZZ I TT PUT END FILE prop; /* B.I = B. 1 + 1 £ -Z. 1 + 1 END (SYSPRINT) DATA ( T,Z,B) SKIP(2) £ ZZ T.I+1 & Z.I+1 */ /* -133- // // //PL1.SYSPUNCH //PL1.SYSIN 11 42, DCS, 08. 00, 150,9 00) , RMLANSFORD, MSGLEVEL= 1 EXEC PL1 DD UNIT=PUNCH,DSNAME = &PUNC_H ■ DO * PACKED EXT, ADDX : PROCEDURE; DCL ( M,UH,LH,US,LS,UM,LM,X,Y,S,T,Z,N,G) BIT (64) (LO t UO) BIT(65) PACKED EXT, II E XT, ( P,B) BIT(64) PACKED EXT, (OV,UN,LSG, ID, GT,EQ,LT,FM, BOGUS) BIT(l) EXT, (EUU,EUM) BIT(7) EXTERNAL, EUL BI T( 7 T'EXf ERNAL,~ (FA,FB) BIT(8) EXTERNAL, (SIGNA,SIGNB) BIT( 1) EXTERNAL, POL IP B IT ( 1 1 ("""EXTERNAL . f V BIT(50) EXTERNAL, (SDB,SR) BIT(l) EXTERNAL, AEXPGT FIXED BIN EXTERNAL; DCL IOP(2) FIXED BIN(31) EXTERNAL," FOP(2) FLOAT BIN(53) EXTERNAL, DOP(2) DECIMAL FIXED (15) EXTERNAL; DCL DEXP FIXED BIN, CI FIXED BIN; DCL MEGO BIT(64) , (TP,TO,Tl) BIT(l); DCL (CPR, MINUS, PLUS) BIT(l); DCL FP BIT(8) ; DCL (DIFF,TEMP) B I T ( 64 ) ; ON OVERFLOW OV= • 1 • B ; ON UNDERFLOW UN='1'B; FOP( 1 )=FOP( 1 )+FOP(2) ; plus='1'b; cpr,minus='0'B; go to first; SUB ; ENTRY; ON OVERFLOW OV=«l'B; ON UNDERFLOI MINUS=»1'B; CPR,PLUS='0'B; /* FOP( 1 )=FOP( 1 )-FOP(2) ; GO TO FIRST; CPRA : ENTRY; CPR=»1'B; MINUS, PLUS='0'B; FIRST ; TEMP=UNSPEC(FOP( 1 ) ) ; PUT FILE(SYSPRINT) EDIT ( • RESULT= ' , FOP'( 1 ) , TEMP ) (SKIP,A(7),E(14,6),X(2),B(64)) ; DEXP=EUU-EUM ; PUT F I LE ( SYSPR INT f DATA '(DEXP) IF DEXP > THEN GO TO EXPGTO ; IF DEXP = THEN GO TO EXPEOO ; ELSE GO TO EXPLTO ; UN=«1«B; SUB INDICATOR */ SR=SIGNA; GO TO SETFLAG; GO TO EXPGT13 FXPGTO ; AEXPGT = 1 SDB='1'B; IF CPR THEN EUL = EUU ; IF DEXP > 13 THEN ELSE GO TO RSUH ; EXPGT13 : GO TO ADDEND; RSUH : IF DEXP >= 2 THEN DO ; CALL UHDLH ; CALL LHR8UH GO TO RSUH ; END; ELSE IF DEXP=0 THEN GO TO ELSE CALL UHDLH ; CALL GO TO CAL ; FXPEOO ; EUL=EUU ; AEXPGT=1; /* CPRA WITH SAME EXP -BUT DIFFERENT /* OP. A + GT; OP. A - LT /* EXP >0 */ DEXP=DEXP-2 CAL ; LHR4UH SIGN */ -13U- EXPLTO IF SUBSTR( V,4 t 4J=^1000'B_ THEN SDB= S I GNA = S I GNB ; ELSE SDB=( SIGNA £ -SJGNBJM -SIGNAG SIGNB); IF SDB THEN DO; SR=SIGNA; IF CPR THEN GO TO SETFLAG; END; GO TO CAL; EUL=EUM; SDB='1'B; SR=(SIGNB £ -MINUS) I < -SIGNB £ MINUS); /* SR =SIGNB .XOR. SUB IF CPR THEN GO TO SETFLAG; IF fJEXP < (-13) THEN DO CALL UHDM ; X=(64) «0«B ; S=X; " G=X CALL MDY4 ; CALL SDS (X, Y,S,G,"N f T t Z) CALL Z4DLM ; CALL LMDUO GO TO ADDEND; END;" */ N=X; ELSE RSUO IF DO ; LOR8UO CAL DEXP <= (-2) THEN CALL UODLO; CALL DEXP =DEXP+2 ;" GO TO RSUO ; END ; ELSE IF DEXP =0 THEN GO TO CAL; ELSE CALL UQDLQ ; CALL LQR4UQ; GO TO CAL ; PUT FILE(SYSPRINT) EDIT ('AFTER SHI FT • , • UQ-REG • ,U0 , •UH_REQ',UH) 7SKIP,A(12), SKIP,A(12), B(64) T SKIP,A( 12) ,B(64) ) ; CALL UHDM; CALL UODUM ; /* GET SDB AND NEG1 (N=NEG1) */ IF SUBSTR ( V,4 t 4)='1000'B THEN DO ; /* NEGO= SIGNA=SIGNB /* NEG1=(SIGNA=SIGNB) I (SIGNB=SR) TO = SIGNA = SIGNB ; T1=SIGNB=SR; END; ELSE DO ; /* NEGO= SIGNA .XOR. SIGNB /* NEG1=(SIGNA . XOR. SIGNB) I ( SIGNB .XOR. SR ) /* FOR ADD */ */ /* FOR SUB £ CPRA */ */ */ TO=(SIGNA £ -SIGNB) I ( -SIGNA £ SIGNB) ; Tl=( SIGNB £ -SR)|( -SIGNB £ SR ) ; END; IF TO='0'B THEN NEGO = (64)~ , 0~'B ; ELSE NEGO= ( 64 ) • 1 • B ; T1 = T1 | TO; IF Tl THEN N=(64)'1»B; FL SE N= ( 64 ) • • B ; " US= (US 6 -NEGO) | ( - US £ NEGO) ; /* US. XOR. NEGO */ CALL UMDX1 ; CALL USDS1; CALL MDY1 ; PUT FILE(SYSPRINT) DATA (SDB); PUT FILE(SYSPRINT) LIST («ASSIM BEGIN') SKIP(2); 01 : CALL ASSIM; IF SDB='1'B THEN DO ; CALL Z4DLM; GO TO TERM; END; ELSE SR=SU8STR(Z,7,1) ; IF SR=«0'B THEN DO ; CALL Z4DLM ; GO TO TERM ; END; ELSE DO ; Tl= -Tl ; SDB=' 1«B; IF T1=»0'B THEN N=(64)'0»B; ELSE N=(64) , 1«B; -135- CALL UMDX1; CALL USDS1 ; CALL MDYl; GO TO 01 ; END; TERM : CALL LMDUO ; IF U0=(64)»0«B THEN E0='1«B; IF SUBSTR ( V,4,4)=« 1011'B T_HEN_ GO TO SETFLAG; /_*__FOR CPRA */ II = EUL-64; /* 11= EUL ExTeNOFdtB 16 BITS™ ""•" IF -,E0 THEN GO TO NORMAL; IF EUL -i=(7)'0'B THEN DO; /* UQ=0,EUL - = -64 */ LSG='1'B; CALL INDFA; GO _T0_ ADDEND; END; NORMAL : CALL NORM; GO TO ADDEND; SETFLAG : FP=( FA & -FB ) l( -FA & FBTj IF FP -.= (8)'0»B THEN FM='J.«Jj GT= -SR & -.EO; LT= SR & -EO; CALL INDFA; ADDEND ; PUT FILE (SYSPRINT) DATA ( SR , EUL , UO , FA , OV, UN ) SKIP(2); TEMP = UNSPEC(FOP( 1 ) ) : SUBSTR ( TEMP , [", 8 ) = ( 8 ) • ()"• B ; DIFF=(UO & -TEMP) | ( -UO £ TEMP); __ PUT FILE(SYSPRINT) EDIT ( • DI FF= • , DI FF ) ( SK I P , A , B ( 64 ) ) ; FND ADDX ; /* -136- // 1235, DCS, 03.00, 10 0, 900), 'P. E. ATK I NS ' , MSGLEVEL= 1 // EXEC PL1 //PL1.SYSPUNCH DD UN 1 T= PUNCH f USNAME = &PU_NCH //PL1.SYSIN DD * MPY : PROCEDURE; /* . */ /* . THIS ROUTINE INCLUDS FXMPY AND FLMPY */ /* . NCC= NO. OF MPY CYCLE */ /* . 2 FOR SH FX _ _ __ *JL /* . 4 FOR LG FX " */ /* . 7 FOR FL */ /* . AT END OF MPY CYCLES, EACH NUMBER TYPF "*> /* . LOAD DIFFERENTLY INTO REGJSTE_R */ /* . THEN ASSIMILATION */ /* . ONLY FL MPY NEEDS NORMALIZATION __ _ * / /» . */ DCL MEPB BIT(4) PACKED EXT; DCL M BIT(64) EXT, (LQ,UQ) B I T ( 65 T" PACKED EX ft"" II EXT, (UH,LH,US,LS,UM,LM,X,Y, S,T,Z,N,G ) BIT(64) P_ACJ 63 THEN 0V=' l'B; I I <-64 THEN UN=« l'B; L UHDM; 7; ING NO. ONLY */ 65) 'O'B THEN DO; UQ*(65)'0'B; go TO MPYEND; SUM OF _ EXPONENT, */ /* " E~UL~>~ 63 "*/"* /* EUL < -64 */ END; THIS PART IS COMMON TO BOTH FX AND FL */ */ */ ICC = IF IC R : B SUBSTR SUBSTR SUBSTR SUBSTR SUBSTR 8X = X = X = X = C > = EGIN (UO, (UO, (UO, (UO, (UO, 057 058 059 060 061 062 063 064 NCC THEN GO TO MULTEND; 57,1 59,1 61,1 63,1 65,1 & 058 059) 060 061 ) 062 063) 064 065) 05 06 06 06 059 ( 061 ( 063 ( 06 5 ( 8=SUBSTR(U0,58,1 ) ; 0=SUBSTR(UQ,60,1) ; 2 = SUBSTRTU£f,62,l ) ; 4=SUBS TR(UQ,64, 1 ) ; ) I ( 057 £ -058 & -059); 058& -059V"; ) I ( 059 & -060 & -061); 060 & -061 rr ) I ( 061 6-062 & -063); IF SHl: SDS2: IF IF SH2: SDS3 : II IF -057 ( 057 ( 059 ( 061 -06 3; RECORD FILE( FILE< ,MY1X, L UODL 64) • 1 • CALL 0=«0'B = (US L USDS 64) 'O' MY128X CALL MY64X IF Nl CALL S Y= (64 MY32X MY16X IF N2 = CALL S Y=(64) MY8X MY4X T £ -059) £ -061) 6 -063) 062 & -063) ; ) I ( 063 I -064 & -065); 064& -065); ( -057 & 059) ; ( -059 6 061) ; ( -061 £ 063) ; ER ; SYSP SYSP N0,N 0; B; UMDX THE & -N l; b; th ml 7 THEN = •0' DS(X ) '0' THEN THE •O'B DS ( •O'B THEN HEN RINT) LIST RINT) DATA 1,N2,N3,N4) l; N NEG()=(64 EGO) | ( -US EN DO; Yl; GO TO DO; CALL B THEN N=( ,Y,S,G,N,T, B; DO; CALL N DO; CALL THEN N=( Z,Y,T,G,N,T DO; CALL DO; CALL M (•CYCLE COUNT=», ICC, • U0= • , UO ) SKIP(2); ( MY 1 2 8X , MY64X , MY 32 X , MY 1 6X , MY8X , MY4X , MY2X )»0«B ; ELSE NEGU =(64)'1«B; 8NEG0); SHl; END; ML6Y1; END; 64) 'O'B; ELSE N=(64) • 1 «B; Z) ; ML5Y2; GO TO SH2; END; ML4Y2; END; 64) 'O'B; ELSE N=(64) • 1 «B; tZ); ML3Y3; GO TO SH3; END; L2Y3; END; -138- SH3 SDS4 : IF IF SH4: CAL CAL ICC /* /* /* /* IF CAL CAL CAL IF GO MULTEN /* /*. /*. /*. /*. /*. /*. IF TUQ65 N,N CA ASS : CA CA PUT CA CA CA IF IF IF N3='0'B THEN N=(64)' 0'B; ELS E N=(64)' CALL SDS(Z,Y,T,G,N,T Z) ; Y= (64) 'O'B; MY2X THEN DO; CALL ML1Y4; GO TO SH4; END; MY1X THEN DO; CALL MDY4j . JEND; l'B; IF N4='0'B THEN N=(64)'0'B CALL SDS(Z,Y,T,G,N,T ,Z) ; L T4DLS; L Z4DLM; =ICC+l; AT END OF LAST CYCLE FOR FX NO. LOAD REGISTERS BEFORE ASSIMILATION ELSE N=(64) • l'B /*L */ */ */ FX */ (ICC=NCC) & NT='01'B THEN GO TO MULTFND; L LOR8UO; L LSR8US; L LMR8UM; ICC=7 THEN CALL MEXTPRE; TO LOOP; D : IF NT='01'B THEN DO; /* FOR LFX ONLY CALL LSDUS; CALL LMDUM; END; SET X,Y,S,G,N TO SDS1 FOR ASSIM */ BEFORE ASSIM, TEST UO BIT 65, IF EQUALS1, DO ONE MORE CYCLE, FOR FL USE MDY1, LFX USE UHDY1, SFX USE MDY1 t */ ELS Y,NEG NT -.= • ; IF S EG0=(6 LL MDY US= ( LL USD LL UMU FILE( LL ASS LL Z4D LL LMD NT= • 10 NT='00 CALL CALL SHALF IF ( GO TO END; E do; LHALF IF ( 0» 10 UB 4) i; us SI XI SY IM LM UO •B •B U L N= (64) 'O'B; 'B THEN GO TO ASS; /* _N=NEG1 /* ONLY FL TEST STR(U0,65, 1 )='0'B THEN GO TO ASS; •l'B; /* FOR U065=l & FL */ U065 /*UQ65 */ */ */ */ */ */ */ = */ & -NEGO) | ( -*US & NEGO) SPRINT) LIST ('ASSIM BEGIN') SKIP(2) TH THEN GO TO FLEND; THEN DO; ODLO; 0R8U0; SUBSTR(UQ,33,16) ; SR & SHALF -=( 16) 'O'B) I ( SR & SHALF EN 0V=' l'B; _ FXEND ; -*=( 16) ' l'B) = SUBSTR(U(0, 1,32) ; -SR & LHALF -y=( 32) 'O'B) I ( SR & LHALF THEN 0V=« l'B; -.= ( 32) • 1»B) FXEND END; IOP( 1 )=I0P(1 ) *I0P(2) ; -139- TEMP=(64) "O'B; TEMP=UNSPEC( IOP(l ) ) ; PUT FILE(SYSPRINT) EDIT ( • PRODUCT= • ,_I_OP ( 1 ), • BIT _FORM= •, TEMP, •SIGN=' t SR, 'UO= • , UO^W^TovT'f SK I P, A, F ( 18,0), 4(SKIP,A(10),B(65) ) ); PUT FILE(SYSPRINT) EDIT(«END FO FX MPY~» ) ( SK I P , X ( 40 ) , A ) ; CALL TIMER; RETURN; /* END OF FXMPY */ FLEND : CALL NORM ; SUBSTR(U0,61,4)=MEPB; MPYEND : FOP( 1 )=FOP( 1)*F0P( 2) ; ON OVERFLOW GO TO NEXT.I NEXT: TEMP=UNSPEC( FOP(l)); PUT FILE(SYSPRINT) EDI T ( ' PRODUC T* ' ,F0P(1), 'BIT FORM= », TEMP) (SKIP,A,E(16,6),SKIP,A,B(64)); PUT FILE(SYSPRINT) EDIT (»SIGN= »_fSR t , _EXP= • , EUL , ' UQ= • t UQ ) (SKIP,A,B(1 ),SKIP,A,B(7),SKIP,A,BV64) ) ; PUT FILE(SYSPRINT) DATA ( OV , UN, BOGUS, FA ) ; SUBSTR(TEMP,1,8)=(8) 'O'B; UIFF=(TEMP fc -.U0)|( -TEMP & UO ) ; PUT FILE(SYSPRINT) EDIT («DIFF= «,DIFF) ( SK I P, A , B ( 64 ) ) ; PUT FILE(SYSPRINT) EDIT ('END OF FL MPYM ( SK I P, X ( 40 ) , A ) ; CALL TIMER; MEXTPRE : PROCEDURE; /* KEEP THE PRECISION OF MPY UP TO^ 2**-64 */ DCL PP(8) BIT(l), (T1,T2,T3) BIT(_U PACKED; PP(8)=(8) »0»B; DO 1=7 TO 1 BY -1; Tl=SUBSTR(LS,I+57, 1 ) ; T2=SUBSTR(LM, 1+57,1 ) ; T3= -.T2; PP( I ) = (PP(I + 1) & T3) I < T 1 & T2) ; END ; PUT FILE(SYSPRINT) EDIT ('LS= • , SUBSTR ( LS , 58 , 7 ) , »LM=>« ,SUBSTR(LM,58,7) , • PP= •, (PP(I) DO 1=1 TO 8)) (SKIP,A,B(8) ,SKIP,A,B(8) , SKIP, A, 8 BJJD) ; DO 1=1 TO 4 ; Tl =SUBSTR(LM, 1+56,1) ; /* T1_=„LM (57 TO 60 FOR EACH I)*/ T2=( PP(I) & -Tl)|( --PP(I) & Tl) ; /* PP(I) .XOR. LM */ SUBSTR(MEPB,I ,1 ) = T2 : END ; PUT FILE (SYSPRINT) EDIT ('MEPB= \ , MEPB ) ( SK I P , A , B ( 4 ) ) ; RETURN; END; END MPY; -140. II II //PL 1 .SYS //PL1.SYS DIV : /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* DCL ( 1266,DCS, 10.00, 100,9 00) f RTBUROVEC EXEC PL1 PUNCH DD UNIT = PUNCH t DSNAME = &PUNC_H j_ IN DD * PROCEDURE; THIS ROUTINE INC 1. THIS PART CO NT, THIS PAR GET SR, FOR FL DIVIDEND DIVISOR NCC= NO. LUDES MMON TO TEST ZER FLDIV L FX DIV BOTH DIVISOR, DIVIDENT A) 3) C) D) 3. FOR SHF RET CAL TO CAL TO SHI BEI FX DIVIDEN DIVISOR A) B) C) D) E) F) G) TEST COMPL SHIFT BIT1- GET CALL AT T REMA ASS I ASS I SHIF DIVI IN ASSI IN IN OF IT M WEEN L D PERF L A ASS FT NG S IN IN NFGA , TH DI A OF NCC DIV HIS INDE MILA MILA T RE SOR UOO- MILA CYCLE =8 SO DIVISOR IS U00-7 UHO-7 DIVISION (DIVISOR) 1 £ 1/2 IV ID ORM MODEL DIVISION NCC TIM SSIMOD IMILATE QUOTIENT HIFT LEFT QUOTIENT RIGHT AS DIVISOR UOO-3 UQA-7 TIVE DIV EN SHIFT VISOR & UH BYTE ISOR OR DIVIDEND DIVISOR IN UHO-3 DIVIDEND SO THAT 1 -.= ID POINT_ R IN LM/ TE REMAI TE QUOTI MAINDER R HAS BEEN 3 ____ TED QUOTIENT IN " "UQ4-7 */ */. */ *J */ */ *7 */ */ */ "*7 ~*7 */ */ *i *i */ *'/ *J */ */ */ */ */ LS, QUOTIENT IN UH/UQ NDER enT ight as many times as SH f FT ~ L EF T , PUT "1 T " . DCL DC DCL M BIT(64) PACKED EXT, (LQ,UQ) BIT(65) PACKED EXT, (UH,LH,US,LS,UM,LM,X,Y,S,TtZ,N,G) BIT(64) PACKED E P,B) BIT(64) PACKED EXT, (OV,UN,LSG,ID,GT,EQ,LT,FM,BOGUS) BIT(l) EXT^ (EUU,EUM,EUL ) BIT(7) EXT, (FA,FB) BIT(ft) EXT, (SIGNA,SIGNB,POLIP,SDB,SR) BIT(l) EXT, V BIT(50) EXT , AEXPGT FIXED BIN ; IOP(2) FIXED BIN(31 ) EXT, FOP(2) FLOAT BIN(31) EXT, DOP(2) DECIMAL FIXED(15) EXT; L NEGR EXT, NCC EXT; (M9,M10,M11,M12) BIT(l), (D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11) BIT( 1) , (DIVRL3,DIVRL2,DIVRL1 ) BIT(l), DIVSCC FIXED BIN, NEGO BIT(64), (PM,PS) BIT(6), AI BIT(7), BI BIT(7), OMM(8) BIT(l) PACKED, ♦y */ */ *y */ * 7 _*/ */ _*/ II EXT, XT, -lUl- 0SS(8) BIT(l) PACKED, ICC FIXED BIN ; DCL (ZEROP,TWOP,ZERON,TWON t ZERO,QNE,TWOLBIT(l.), (A0,Al,A2,A3,A4,A5 t A6) BIT(i); DCL MARK CHARACTER(80) IN I TI AL_JJ_80.)_ , *_ , _Lj DCL TEMP BIT(64), BUFF BIT(6~) I NI f I AL ( • lOOOOO • B ) ; DCL (TEMP1,NFBM) BIT<1), TEMP2 BIT(2), TEMP4 BIT(4), TEMP6 BITI6), TEMP8 BIT(8); DCL NT BIT (2), IV BIT (4); /* NFBM= NEGATE THE FIRST BIT* TO MODEL DIVISION */ PUT FILE(SYSPRINT) EDIT ( • START DI VI S JON • ) < SK L I P , X ( 40 )_ f _A ) CALL TIMER; OM OVERFLOW 0V='1'B; ON UND ERFLOW U N='1' B; ON ZERODIVIDE B0GUS='1«B"; NT=SUBSTR( V,8,2 ) ; IV=SUBSTR( V,4,4) ; SR= ( SIGNA & iSIGNB)|( -SIGNA £ SIGNB); IF NT='10'B THEN GO TO FLDIV; " ELSE GO TO FXDIV ; FLDIV : NCC = 8 ; DZERO : IF UQ=(65)»0 , B THEN DO ; EUL=(7)«0'B; SR='0'B; GO TO DIVEND; END; IF UH=(64)«0»B THEN DO; 0V='1'B; SR=SIGNA; UQ=(65)«1'B; EUL=(7J«1'B; GO TO DIVbND; END; /* . THIS PART IS FOR FL */ /* . SHIFT DIVISOR */ II = EUU-EUM ; /* II = DIFF OF EXPONENTS^*/ DIVRL1,DIVRL2,DIVRL3='0'B; IF II> 63 THEN 0V='1'B; /* EUL>63 */ __ IF IK-64 THEN UN='1'B; /* EUL<-64~"*/ CALL UHDM; CALL UODUM; U0= ( 65) « 0' B; UH=(64) »0'B; IF SUBSTR(M,9,3)='000'B THEN GO TO S HIFT3; /* M(9-ll)=0 */ IF SUBSTR(M,9,2 )='00'B THEN GO TO SHIFT2; /* M(9-10)=0 */ IF SUBSTR(M t 9,l )='0'B THEN GO TO SHIFT1; /*'M(9)=0 . */ GO TO NOSHIFT; SHIFT3 : DIVRL3='1'B; PUT F ILE ( SYSPR INT ) L I ST ( • DI VRL3 • ) SKIP; CALL ML3Y3; NORDIR : X=(64)'0'B; S,G,N=X; __ CALL SDS(X,Y,S»G,N f T,Z) ; Y=(64)'0'B; X=Z; S=T; GO TO STA; SHIFT2 : DIVRL2=«1'B; PUT F I LE ( SYSPR INT ) LIST ('DIVRL2M SKIP; CALL ML2Y3; GO TO NORDIR; SHIFT1 : DIVRL1 = '1 , B; PUT F I LE < SYSPR I NT ) LIST ('DIVRLIM SKIP; CALL ML1Y4; X=( 64) «0«B; S,G,n=x; STA : CALL SDS ( X , Y , S , G, N, T, Z ) ; CALL Z4DLM; CALL LMDM; NOSHIFT : PUT F I LE ( SYSPR I NT ) EDIT ( • M= »,M) ( SK I P , A f B ( 56 ) ) ; CALL DIVID ; N=(64)«1'B; Y=(64)'0'B ; CALL UHDUS; -lU2- CALL UQDUM; NEG0=(64) ' 1 »B: us=( us e -.negohi -us snego);_ CALL ASSIMOD; /* SINCE DIVISOR IS SCALED TO HAVE _VALUE_ BETWEEN 1 AND l/2__ THIS PART IS TO RESCALED IT """*/" PUT FILE(SYSPRINT) EDIT ( 'PI VRL 123 ' , P I VRL 1 , PI VRL 2 , PI VRL 3 , •LM BEFORE RECSCALE «,LM) (SKIP, A, 3 ~B ( 1 ) , SK I P, A, B ( 64 ) ) ; IF DIVRL1 IDIVRL2 IDIVRL3 THEN GO TO RESCALE; ELSE GO TO NOSCALE; RFSCALE : CALL LMOM; IF DIVRL3 THEN CALL ML3Y3; ELSE IF DIVRL2 THEN CALL ML2Y3; ELSE DO ; CALL ML1Y4; X,S,N,G=(64) 'O'B; GO TO SXl; END; X,S,N,G=(64) »0»B: CALL SDS(X,Y,S,G,N,T,Z) ; /* SDS3 ' */ Y=(64)'0«; X=Z; S=T; SXl: CALL SDS(X,Y,S,G,N,T,Z) ; /* SDS4 */ CALL Z4DLM; NOSCALE : PUT F I LE ( SYSPR INT ) "1ED7T" I !• UT AFTER RE~SCAlE= SLM) (SKIP,A,B(64> ) ; CALL LMDUO; NOR : CALL NORM ; D I VEND : BEGIN ; " CALL SETBOG: FOP( 1 )=FOP( 1 )/FOP(2 ) : TFMP=UNSPEC(FOP( 1 ) ) ; PUT FILE(SYSPRINT) EDIT ( • OUOT I ENT= """•"; F(jp ( 1 ) ,'i b I f ~ >ORM= _ •, TEMP ) (SKIP, A, E( 16,6) , SKIP,A ,B( 65) ) ; SUBSTR (TEMP, 1,8)=(8) 'O'B ; TEMP=( TEMP £ -»UQ)I( -TEMP £ UO ) ; _ PUT FILE(SYSPRINT) EDIT («DIFF= '/TEMPT ( SK I P, A, B ( 64 ) ) ; PUT FILE(SYSPRINT) EDIT («SIGN= « r SR,«EXP= • , EUL , ' UO_ = ' t UO, •FA= «, FA) (SKIP,A,B(64) ) ; CALL TIMER; RETURN; END DIVEND; /*•••• • • • • * / /* . THIS PART IS FOR FX #/ /* . TEST NEGATIVE DIVISOR OR "~6TVI DEND, COMPL I MENT " */ FXDIV : NEG0=(64) «0»B; IF UH=(64) 'O'B THEN DO; 0V='1VB; UO=(33)'0'B II (31)'1'B; GO TO FXDIVEND; END; DIVID BY ZERO, RE=0, =(32) »1»B; =(32) »1»B; VE */ US= ( US £ CALL UODUM; -1U3- UK : /* SFTP8 NSFTR SFTL8 U0L8 UHL4 UHL1 / / / / / / CVODI DIVBF US SFTUM CALL UMDX1; CALL USDSl; CALL ASSIM; CALL Z4DLM; CALL LMDU03; CALL LMDUH7; SUBSTR (UQ,33,33)=(33) '0«B; /* DIVIDEND IN UOO-3^ */_ /* DIVISOR IN UHO-3 */ PUT FILE(SYSPRINT) EDIT ( • UH= •,UH,«UQ= • , UO ) ( SKIP, A, B ( 65 ) ) CALL TIMER; . SHIFT DIVISOR AND DIVIDEND */ NDRR8=0; IF SUBSTR (UO, 1,8) -»= (8)«0'B THEN GO_TO SFTR8; IF SUBSTR (UH, 1,8) =(8)'0«B THEN GO TO NSFTR8; : CALL UHDLH; CALL UODLO; CALL LHR8UH; CALL L0R8U0; NDRR8=1 ; 8 : NDRL8=0 ; NDDL8=0; NDRL4,NDRL1=0; : IF SUBSTR (UH,9,8)=(8) »0«B THEN DO; CALL UHDLH; CALL LHL8UH; _ NDRL8=NDRL8+1 ; GO TU SFTL8 ; END; : IF SUBSTR(UQ,9,8)=(8) «0'B THEN DO;' CALL UODLO; CALL LQL8UO; NDDL8=NDDL8+1 ; GO TO U0L8; END; : IF SUBSTR(UH,9,4)=(A) «0'B THEN DO; CALL UODLO; CALL UHDLH; CALL LQLMJO; CALL LHL4UH; NDRL4 =1 ; END; : IF SUBSTR(UH,9, 1 )=«0'B THEN DO ; CALL UHDLH; CALL UODLO; " CALL LHL1UH; CALL LOL1UO; NDRL1=NDRL1+1 ; GO TO UHLl; END; NCC = NDRL8 - NDDL8 + 1; PUT FILE(SYSPRINT) EDIT ( • AFTER S_HI FJ_« , »UO= ' t.UO, ..„. •UH= «,UH) (SKIP, A, 2(SKIP,A,B(65) ) ) ; PUT FILE(SYSPRINT) DATA ( NDRL8 , NDDL8, NDRL4, NDRL 1 , NCC ) SKIP; PUT FILE(SYSPRINT) DATA (NDRR8) SKIP; GO TO DIVBEG; * */ * THIS ENTRY IS FOR THE PART OF FX DIV WHICH IS _ _*/ * SHARED WITH CVD, FORM HERE TO THE END OF */ * OF ASSIMILATE REMA I NDER, BEFORE ASSIMILATE */ * OF QUOTIENT */ * fJ .^ */ V : ENTRY; IV=SUBSTR( V,4,4) ; CALL UHDUS; GO TO SETUM; /* IF CVD THEN UHDUS , IF FXDIV THEN UHDM */ G ; CALL UHDM; =( 64) 'O'BJ : CALL UODUM; UO=(65) 'O'B; -Ikk- ZFROO US = /* / / / / / / UH = /* /* /* IF CAL . A CAL CAL : NE (US Y=(6 CALL TES (64) 'O'B; TEST FOR DIV THEN SKIP BUT MUST NCC<=0 THEN L DIVID : L HERE, RF OU SSIMRATE L LSDUS; L LMDUM; G0=(64) 'l'B; L -NEGO) I ( A) 'O'B; ASSIMRE: T NEGATIVE IDEND < DIVISOR, DIVIDE PARTj 0*0_,R_E = DI BE RE-ASSIMILAT~E A~ND RE GO TO ZERO_Oj MAINDER IN LS /LM; OTIENT IN UH/UQ; REMAINDER FIRST; VIDEND -shift" */ */ */ */ INTO LM */ */ -US L NEGO) ; N=(64) 'l'B; ALSO FOR REMAINDER, ADD M TO A US & X UNCH TEST SIGN OF D I V I DEND, S IGN OF R DIVIDEND + , OK DIVIDEND - RE= -R DIVIDEND ♦ RE _=__R DIVIDEND "~, ' ' R§"= - REASS2 / OASS: / : /* /* /* ASSO: RE RE RE RE NEGR=0; IF SUBSTR(LM,1, /* NEG RE DUE NEGR=1 : IF IV='0011 ELSE CALL M /* FOR CVD GO TO REASS POSITIVE RE CHANGE RE T IF -SIGNA Y=(64) 'O'B; : NEG0=(64) ' 1 'B; N=(64) • 1 »B; IF SIGNA THEN CALL ASS FOR CVD, RET IF IV='1110'B RETURN ; /* EN THEN ASSIM QUO MOVE ASSIMLAT FOR NEGATIVE R BEFORE ASSIMIL CALL UHDUS: CALL UODUM; CALL LMDUO; NEG0=(64) 'O'B; US=( US & -.NEGO M=(64) 'O'B; IF NEGR=1 THE CALL MDY1; IF SR =1 SS. REMAINDER */ ANGED __ */ E = SIGNA" */ */ E */ E+ DIVISOR __ */ IRE + DIVIDOR) " ~*7 1 ) = • l'B THEN DO ; TO DIVID ALGORITHM 'B THEN Y='000000001010'B | DY1 ; DI 2; DUE f) BE THE VISOR=10 BUT M IS UESED END; TO DIVID ALGORITHM THE SAME SIGN AS DIVID :N GO TO OASS ; END N=(64) 'O'B; /* NEG1 = IMRE; URN TO CALLING PROGRAM THEN GO TO ASSO; D OF DIV FOR CVD TIENT; ED REMAINDER TO UO EMAINDER , SUB 1 TO QUOTIENT ATE -SIGNA */ AT HERE THE ELS CALL ASSIMOD; ) I ( -US & NEGO) ; N SUBSTR(M, 64,1)=' l'B; N N=(64) • l'B; E N=(64)'0'B; */ I 1^2) 'O'B; FOR REMAINDER */ */ */ */ */ */ */ */ /* */ -JA5- /* . REMAINDER HAS TO BE SHIfT JUGHT */ /* . AS MANY TIMES AS DIVISOR HAS BEEN */ /* . SHIFT LEFT */ IF NCC<1 THEN NDRL8=NDDL8; RFR8 : IF NDRL8 -. = THEN DO; IF NDRR8=1 THEN DO ; MDRR8=0; GO TO SKIPT; END; CALL UODLO; CALL L0R8U0 ; IF SIGNA THEN SUBSTR ( UO, 1 , 8 ) = ( 8 ) • 1 • B ; SKIPT : NDRL8 =NDRL8 -1; GO TO RER8; END; IF NDRR8=1 THEN DO; CALL UODLO; CALL L0L8U0; END; RER4: IF NDRL4 >0 THEN DO; CALL UODLO; CALL LQR4U0; IF SIGNA THEN UQ=(4)'1'B I I SUBSTR ( UO , 5, 61 ) ; /* UO (BIT 1 - 4) = 1 */ END; RERl: IF NDRL1 >0 THEN DO; CALL UODLO; CALL LQR1U0; IF SIGNA THEN U0= 'l'B || SUBSTR ( UO , 2 , 64 ) ; /* SET UO (BIT 1 ) = 1 */ NDRL1=NDRL1-1 ; GO TO RERl; END; CALL LMU07; FXDIVEND : IUP ( 1 ) = IOP ( 1 ) / I OP ( 2 ) ; CALL SETBOG: TEMP=(64) 'O'B; TEMP= UNSPEC ( IOP( 1 ) ) ; PUT FILE(SYSPRINT) EDIT (»SIGN= ',SR, • U0= • , UO , 'BIT FORM= », TEMP, «FA= •, FA) (SKIP,A( 14) , B(64) ) ; PUT FILE(SYSPRINT) LIST ('FIX QUUTIENT= », IOP(D) SKIP; CALL TIMER; RETURN; _ DIVID: PROCEDURE; /* PERFORM NCC TIMES DIVID CYCLE */ ICC=0 ; /* ICC= SYSLE COUNT */ BACK : PUT FILE(SYSPRINT) LIST (MARK) SKIP; CALL TIMER; IF ICC =NCC THEN GO TO DIVIDEND; Sl:DIVSCC=0; CALL DODMD; NFBM='0'B; CALL MODDIV; Y=(64) »0'B; IF IV='1110'B THEN GO TO DIV1; CVD1 : IF OMM(l) THEN CALL TENL7Y1; IF 0MM(2) THEN CALL TENL6Y1; GO TO TSS1; DIV1 : IF OMM(l) THEN CALL ML7Y1; IF 0MM(2) THEN CALL ML6Y1; TSS1 : IF OSS(l) THEN NEGO= ( 64 ) • 1 ' B ; ELSE NEG0=(64) 'O'B; /* NEGO= 0S1 */ US =( US & -iNEGO)l( -»US & NEGO); -146- CALL UMDX1 N=NEGO; CALL SDS(X TEMP2= SUB IF TEMP2 ^ PUT FILE(S S2:DIVSCC=1 ; CALL D1DMD CALL MODDI Y=(64) «0«B IF IV = CVD2 : IF OMM IF OMM GU TO IF OMM ; CALL USDSl; G=( 64)'1'B; /* N=NEG1= OS1 */ »Y f S,G»N f T,Z); STR(Z,1,2) ; = »00'B THEN NFBM=»1«B; ELSE NFBM= • 0_'_B ; YSPRINT) EDIT («TEMP2= »,TEMP2) (A,B(2M DIV2 IF TSS2 OMM(M = IF OSS S= ( T £ - CALL SDS(Z TEMPA= SUB IF TEMP4 -. PUT FILE(S S3:DIVSCC=2; CALL D2UMU CALL MODDI Y=(64) •O'B IF IV = V; •1110 (3) (41 TSS2; (3) ' 1 «B (3) E N) | ( ,Y,S, STR(Z = (4) • YSPRI •B THEN GO TO DIV2; THEN CALL TENL5Y2; THEN CALL TENL4Y2; */ THEN CALL ML5Y2; THEN CALL ML4Y2; THEN N*(64P1*B; LSE N=(64)»0'B;~ /*" N=NEG2= QS3 -.T £ N); /* S= T .XQR .NEG2 */ G,N,T,Z) ; ,l f 4) ; O'B THEN NFBM='i»~B;~ ELSE NTbM= t 6 r B"f NT) EDIT («TEMP4= «,TEMP4) (A,B(4)); CVD3 DIV3 IF TSS3 IF IF GO IF OMM OMM TO OMM 0MM(6) IF OSS S= ( T £ -. CALL SDS( TEMP6=SUBS IF TEMP6 -. PUT FILE(S S^:DIVSCC=3; CALL D3DMD CALL MODDI Y=(64) 'O'B IF IV = CVDA : IF OMM IF OMM GO TO IF OMM V; •111 (5) (6) TSS3 (5) THE (5) N) | Z,Y, TR(Z = (6) YSPR V; O'B THEN GO TO DIV3; THEN CALL TENL3Y3; THEN CALL TENL2Y3; THEN CALL ML3Y3; N CALL ML2Y3; THEN N=(64) 'l'B; ELSE N=(64) ( -T £ N) ; S , G , N , T f Z ) ; ,1,6); •O'B THEN NFBM=«1«B; ELSE INT) EDIT ('TEMP6= %TEMP6) •O'B; /* S = /* N=NEG3= 0S5 T.X0R.NEG3 */ */ NFBM=«0'B; (A,B(6) ); DIVA IF TSSA OMM(fi) IF OSS S= ( T £ ^ CALL SDS(Z /* FOR /* IF ICC • 1110'B THEN GO TO DIV4; (7) THEN CALL TENL1Y4; (8) THEN CALL TENDY4; TSSA; (7) THEN CALL ML1YA; THEN CALL MDY4; (7) THEN N=(64) • l'B; ELSE N=(64) 'O'B; N) | ( -,T £ N) ; /* S = ,Y,S,G,N,T,Z) ; DIV, LAST CYCLE AND LAST SDS,SKIP THIS NEGATE PART DUE TO OV IN THE (NCC-1) THEN GO TO NEGA; FX /* N=NEG4= 0S7 */ T.X0R.NEG4- */ SDS */ */ -lU7- NEGA : IF TEM T = PUT /* FEE NONEG CAL CAL CAL CAL CAL PUT /* THE ICC GO DIVIDEN /* /* ASSIMO PUT ASSIMR ASS : MODDI V DCL IF PS PUT SUB DO TB T SU END PMT AI = PUT IF NT -n TEMP8=S TEMP8 - = P='00000 ( T £ -T PUT FIL (A, B( FILE(SY •NEGATE END; BACK L CALL T Z4DLM; LSL8US UHDLH; LHL8UH OBDUOH FILE(SY N REPEAT =ICC+1 ; TO BACK; U : RETU END; ASSIM PU D : PROC FILE(SY GO TO A E : ENTR PUT FIL CALL US CALL CALL CALL END : PROCE ( TB,TPM NFBM TH TEMP1=S = ( PS & PUT FIL (A,B( 1 ) , FILE(SY •NEGATE END; STR(BI ,7 1=6 TO 1 =SUBSTR( PM=SUBST BSTR(BI, U AS Z4 AS = »10'B THEN GO TO NONEG; UBSTR(Z,1,8) ; (8) 'O'B THEN DO; OOOl 'B || (55) 'O'B; EMP) | ( -iT & TEMP); /* NEGATE 9TH BIT OF T */ E (SYSPRINT) EDIT (• TEMPS* ', TEMPS) 8), X(5),A,B( 1 ) ) ; SPRINT) EDIT ('T AFTER NEGATE= «,T, SIGNAL= STEMP) ( SK I P , X ( 5 ) , A, B ( 64 ) ) ; OWER REG. TO UPPER REG.*/ 4DLS; ; CALL LML8UM; CALL UODLO; ; CALL L0L8U0; SPRINT) EDIT ('UH = ',UH,'UO= ' t UO ) ( SK I P , A , B ( 65 ) ) ; FOR NEXT CYCLE */ RN; RATE REMAINDER OR QUOTIENT, */ T ASSIMILATED RESULT IN LM */ EDURE; SPRINT) LIST( 'ASSIMILATE QUOTIENT') SKIP(2); SS; Y; E(SYSPRINT) LIST ('ASSIMILATE REMAINDER') SKIP(2); DS1 ; MDX1 ; SIM ; DLM ; SIMOD; DURE ; ,TPS) R IT ( 1 ) , PMT BIT(7) ; EN DO; UBSTR(PS,1, 1 ) ; -BUFF) | ( -PS & BUFF); /* NEGATE 1ST BIT FO PS */ E(SYSPRINT) EDIT («NFBM= «,NFBM) X(5) , A, B( 1 ) ) ; SPRINT) EDIT ('PS AFTER NEGATE= ' t PSf SIGNAL= 'fBUFF) ( SK I P , X ( 5 ) v A , B ( 6 ) ) ; , 1 )='0'B; BY -1; BI , 1 + 1,1) ; R(PM,I fl); TPS=SUBSTR(PS, I ,1); 1,1 ) = ( TPM & TPS) I ( -.TPM & TB) ; -lU8- SELECT : BEGIN; IE IV='0011» D3,D7,D11= M9=SUBSTR M10=SUBST M11=SUBST M12=SUBST Dl= -MIO D2= -MIO D3= -MIO 04-= -MIO D5= MIO D6= MIO D7= Dl |D2 D8= D4|05 D9= 04ID5 D10=D5|D6 Dll = D7ID4; SLEND : END SELE PUT EILE(SYSP D9, DIO, Dll ) END; /* DO /* THIS PART QUOTIENT QUOTIENT ; BEGIN AO=SUBSTR A1=SUBSTR A2=SUBSTR(AI, A3=SUBSTR A4=SUBSTR A5=SUBSTR A6=SUBSTR /* B THEN DO; •l'B; GO TO S^END; (M,9,l) ; R ( M , 1 , 1 ) ; R(M,11, 1 ) ; R(M, 12,1 ) ; S-Mll L -M12; & -Mil & M12; Mil & -M12; Mil & M12 -Mil ; Mil ; SELECT DIVISOR INTERVAL */ /* EOR END; CVD */ /* 1/2 */ /* 9/16 */ /* 5/8""'*/ /* 11/16 */ 7* "3/4 OR 13/16 /* 7/8 OR 15/16 */ */ D3 D6 CT; RINT) EDIT («D1 TO Dl 1 • , Dl , D2 , D3, DA, D5, D6 f ~D7,'D8 , (SKIP, A, X( 5) , 11(B( 1) ,X( 1) ) ); LOOP */ IS USED TO SELECT */ ZERCJP= ( ( TWOP = ZERON= TWON = -AO -AO -AO -AO -AO -AO -AO -AO -AO -AO -AO AO & AO & AO AO AO AO AO AO £ AO AO AO & (AI,1, (AI ,2, 3,1 ) ; (AI,A, (AI,5, (AI,6, (AI,7, 6 -Al £ -Al & -Al 1 ) 1 ) 1 ) 1 ) 1) 1 ) L -A & -A & -A & A2 & A3 & A2 & A2 & A2 I ( A2 & & Al ) Al 6 Al & ZERO=ZERON| ZE TWO= TWONITWO ONE = -ZERO £ & & -A2 £ 6 & -Al ) ROP; P; -TWO; A2 & L & & -A2 -A2 Dll -A2 -A2 2 I 2 6 2 & & A £ 6 D8 6 - & - & - -AO A3 A3 -A3 -A3 -A3 C A3 & A3 ) I A3 & -A -A3 6 -A4) -A3 6 A4 £ -A5 & -Dl ) -A3 & DIO) ; A3 £ A4 I -A5 & A6 & DT) 3 & A4 & A5 &D1) A3 & A4 & A5 & A6 & ) A3 A3 A3 £ 6 A4 £ 09) £ -A4 & Ab 6 D4) 8 A4 & A5 £ A6& A2 & D7); & A4) & -A4 & A5 & DIO) ; £ -A4 & Dl) & -A4 £ -A5 & D2) £ -A4 & -A5 & -A6 & A4 £ -A5 C -A6 & -A4- £ -A5 & D6) D2) D6) D3) D5) & -A4 3 ) & D5) -1U9- END A0 = IF IF IF CAL OUT: P RET END DODMD: PM = PS = RFT D1DMD: PM = PS = RET D2DMD PM = PS = RET D30MD PM = PS RET LOOMS 1 OMM OMM PUT RET LOOMS3 OMM OMM PUT RET LDOMS5 OMM OMM PUT RET LOOMS7 OMM OMM PUT RET OBDUOH DO SUB SUB END RET LMDU03 ALWAYS TO SUBTRACT FROM PARTIAL REMAINDER*/ TO OUT; TO OUT; GO TO OUT END; END; END; DATA ( Z EROP, Z ERUN,T WOP, T WON, TWO, ZERO, ONE) ; QUOTIENT ; AO L -^ZERO; /* DIVSCC=0 THEN DO CALL LDOMS12;GO DIVSCC=1 THEN DO CALL LD0MS34;G0 DIVSCC=2 THEN DO; CALL LDOMS56; L LD0MS78; UT FILE(SYSPRINT) URN; MODDIV; PROCEDURE; SUBSTRUM, 1, 6) ; SUBSTRfUS, 1,6) : URN; END; PROCEDURE; SUBSTR(Z,3,6) ; SUBSTR( T,3,6) ; URN; END; : PROCEDURE : SUBSTR(Z,5,6) ; SUBSTR(T,5,6) ; URN; END; : PROCEDURE; SUBSTR (Z,7,6); =SUBSTR (T,7,6); URN; END; 2 : PROCEDURE ; (l)=TWO; OSS(l)=AO; (2)=ONE; OSS(2)=AO; FILE(SYSPRINT) DATA ( OMM ( 1 ) , OMM ( 2 ) ,QSS ( 1 ) , OSS ( 2 ) ) ; URN; END; 4: PROCEDURE; (3)=TWO; OSS(3)=AO: (4)=0NE; 0SS(4)=A0; FILE(SYSPRINT) DATA ( OMM ( 3 ) , OMM ( 4 ) , OSS ( 3 ) , OSS ( 4 ) ) ; URN; END; 6 : PROCEDURE; (5)=TW0; OSS(5)=AO; (6)=0NE; 0SS(6)=A0; FILE(SYSPRINT) DATA ( OMM ( 5 ) , OMM ( 6 ) t OSS ( 5 ) t OSS ( 6 ) ) ; URN; END: B: PRUCEDURE ; (7)=TWO; 0SS(7)=A0; (8)=ONE; 0SS(8)=A0; FILE(SYSPRINT) DATA ( OMM ( 7 ) , OMM ( 8 ) ,OSS ( 7 ) t OSS ( 8 ) ) ; URN; END; : PRUCEDURE: 1=1 TO 8; STR(UO, 1+56, 1 )=OMM{ I ) ; STRUJH, 1 + 56,1 )=OSS( I ) ; URN; END: : PROCEDURE: SUB S TR I UQ, 1,32)= SUB STRUM, 1,32) ; END; -150- LMDUH7 : PROCEDURE; SUBSTR(UH,1,32 )=SUBSTR(LM,33,32); END; LOL1UO : PROCEDURE: UO=(65)«0 , B; SUBSTR(UQ,1,64)=SUBSTR(L0,2,64) ; END ; LQR1UO : PROCEDURE; UQ=(65) , 0'B ; SUBSTR(U0,2,64)=SUBSTR(LQ,1,64) ; END ; LHL1UH : PROCEDURE ; UH=(64) 'O'B: SUBSTR(UH,l,63)=SUBSTR(LH t 2,63) ; END : LMUQ7 : PROCEDURE ; SUBSTR(UQ,33,32)=SUBSTR(LM f 33,32) ; END; TENL7Y1 : PROCEDURE; /* Yl(2£4)=l Y='0101 ' B II (60) 'O'B: END: TENL6Y1 : PROCEDURE: /* Y1(3&5)=1 Y='00101 'B II (59) 'O'B; END; TENDY1 : PROCEDURE; /* YK9 & 1 1 ) = 1 Y='00000000101 'B || (53)'0'B; END; TENL5Y2 : PROCEDURE ; /* Y2( 4 L 6) = 1 Y='00010100'B II (56) 'O'B; END; TENL4Y2 : PROCEDURE; /* Y2( 5 & 7)=1 Y='00001010'B || (56) 'O'B; END; TENL3Y3 : PRUCEDURE: /* Y3(6 8 8)=1 Y='00000101 'B I I (56) 'O'B; END; TENL2Y3 : PROCEDURE ; /* Y3(7 & 9)=1 Y='000000101 «B ||(55)'0'B; END; TENL1Y4 : PROCEDURE: /* Y4(8 10) =1 Y='0000000101 'B || (54)'0'B; END; TENDY4 : PROCEDURE; /* Y4(9 &11)=1 Y='00000000101 'B I I < 53 ) • • B ; END; END DIV ; */ */ */ */ */ */ */ */ */ /* -151- // EXEC LKGGPLl // 1235, DCS, 03. 00, 100,900) ,'D. E. ATK I NS • , MSGLEVEL= 1 // EXEC PL1 //PL1.SYSPUNCH DO UNIT=PUNCH,DSNAME=GPUNCH //PL1.SYSIN DO * CONVS : PROCEDURE; / * _ __ _ */ . /* THIS PROCEDURE INCLUDES ALL CONVERTING TYPE INSTRUCTION */ /* IT INCLUDES : DVB (DEC TO BIN) */ /* FXTO FL : BIN TO FL */ /* FXCVPL FX(BYTE 1 TO 4 OF UO ) TO FL */ /* */ IJCL (M,UH,LH,US,LS,UM,LM,X,Y,S,T,Z,N,G) BIT(64) PACKED EXT, (LO,UO) BIT(65) PACKED EXT, II EXT, (P,B) BIT(64) PACKED EXT, (OV,UN,LSG, ID, GT,EO,LT,FM, BOGUS) BIT(l) EXT, (EUU,EUM,EUL ) BIT(7) EXT, (FA,FB) BIT(8) EXT, ( S I GNA , S I GNB , PUL I P ) BIT(l) EXT, V BIT(50) EXT,(SDB,SR) BITIDEXT, AEXPGT FIXED BIN EXTJ DCL I0P(2) FIXED BIN(31) EXT, F0P(2) FLOAT BIN(53) EXT, DUP(2) DECIMAL FIXED (15) EXT, 0PF(2) BIT(8), FLAG(4) BIT(4); DCL NEGR EXT, NCC EXT: DCL TEMP BIT(64), MARK CHAR(80) INITIAL ((80)'*'); DCL NT BIT (2) ; DCL NEGO BIT(64) ; /* */ /* . THIS ROUTINE IS USFD TO CONVERT EITHER DEC TI FX */ /* . OR FL TO FX */ / * _*_ / /* */ CVL : ENTRY ; UN OVERFLOW BOGUS* ■ 1 'B: NT=SUBSTR(V,8,2) : IF NT='11'B THEN GO TO OECCVFX; /* DEC TO FX */ IF NT='10'B THEN GO TU FLCVFX; /* FL TU FX */ ELSE GO TO OUT: DFCCVFX: PUT F I LE ( S YSPR I NT ) EDIT ('START DEC TO FX • ) ( SK I P, X ( 40 ) , A ) : CALL TIMER: CALL DVB; /* DEC TO FX */ /* FOR CVL (DEC TO FX), BIN DIG. IS RIGHT ADJUST IN UO */ /* */ DFCTOFX : I OP ( 1 ) =DOP ( 1 ) : /* 360 DEC TO FX */ PUT FILE(SYSPRINT) LIST ('DECIMAL TO FIXED') SKIP(2); IF SUBSTR(U0,1 ,32 ) -*=(32)'0'B THEN 0V='1'B; TFSTNEGMF SIGNA= 'O'B THEN GO TO FXEND; PUT FILF(SYSPRINT) LIST ('COMPLIMENT NEGATIVE NO.') SKIP(2); US=(64)'0'B: NEGO (64) 'O'B; CALL COMPL; FXEND : TEMP=UNSPEC( IOP( 1 ) ) ; IF OV THEN CALL SETBOG: SR=SIGNA; /* SIGN OF RESULT */ PUT FILE(SYSPRINT) EDIT («SIGN= ',SR,'UO= ', UO, • ANS=' ,TFMP, »FA=',FA) (SKIP,A,B(64)); PUT FILE(SYSPRINT) EDIT ('END OF CVL •) ( SK I P , X ( 40 ) , A ) ; -152- CALL TIMER; _ _ RETURN; /* . /* THIS PART CONVERT FL TO EX */ /* FL IN UO 1-7 , EXPONENT IN EUM */ /* . */ FLCVFX : PUT F I L E ( S YS PR I NT ) EDIT ('ST ART FL TO FX' ) (SKIP, X ( 40 ) ,A) ; CALL TIMER; IOP( 1 )=FOP( 1 ) ; I I = EUM - 64 ; IF II >0 THEN GO TO NFRACT; ZOUT: U0=(65) •O'B; GO TO FXEND; _ _____ NFRACT : IF II > 21 THEN DO; 0V=« 1 »B; GO TO ZUUT; END; IF II >8 THEN 0V= , 1 , B ; ■ IEUL= 14-H ; IEUU= IEUL ; __ IF IEUU <0 THEN GO TO SFTL8; ELSE GO TO SFTR8 ; SFTR8 : IF IEUU > = 2 THEN DO ; CALL UODLO ; CALL L0R8U0; IEUU* IEUU- 2; GO TO SFTR8 ; END; IF IEUU=1 THEN DO ; CALL UODLO; CALL L0R4U0; END ; GO TO GETFX; SFTL8 :IF IEUU <= -2 THEN DO ; CALL UODLO; CALL L0L8U0; IEUU=IEUU+2 ; GO TO SFTL8; END|~ IF IEUU = -1 THEN DO; CALL UODLO; CALL L0L4U0; END; GFTFX: IF SUBSTR ( UO , 33, 1 ) = ' 1 • B THEN DO; 0V=»1'B ; END ; GO TU TESTNEG; OUT : CALL TIMER; RETURN; /* */ / * * / CVF : ENTRY; /* */ /* */ /* . THIS RUUTTNF IS USED TO CONVERT */ /* . 1. DEC TU FL BY CALLING DVB, BINARY DIGITS ARE */ /* . RIGHT ADJUST IN UO, THEN SET EUL=14, */ /* . USING FX TO FL */ /* . 2. FX TO FL SET EUL=8 */ /* .- */ /* */ -153- DEC / DEC /* /* FX T CVF NT = IF NT ELS CVFL : PU (SK CALL CALL * FDR CVF TOFL : FO FX Tf) FL FX IS RI I 1 = 14; I IF L : CAL SR=S IGNA; PUT F END : U UT TBMP=UNSP PUT FILE( • B I T = CALL RETURN; SUBST = • 1 1 • E GO T FIL IP,X( TIMER nvB; (DEC P( 1 ) = (AFT GHT L NOR ILE(S FILE DATA EC(FG SYSPR •»TE TIMER R(Vt8,2); B THEN GO TO DECCVFL; TO FXCVFL; E(SYSPRINT) EDIT ('START DEC TO FL •) 40) ,A) ; TO FL DOP( 1 ER DV ADJUS /* M; /* SI YSPRI (SYSP (SR, P(l ) ) INT) MP) ( ) , AFTER DVB(DEC TO BIN) THEN TO FL */ ); /* CONVERT DEC. TO FL BY 360 */ T IN UO */ EUL=14 MAX EXP, THEN'NO^MOL IZ AT I ON */' GN OF RESULT */ NT) LIST ( 'CVF OUTPUT" ) ; RINT) EUL,UQ,FA) SKIP(2) ; EDIT ('360 OUTPUT 1 , • FL =',F0P(1), SKIP,A f SKIP f A t EU6 f 6),SKIP,A,B(64) ) ; /* */ /* */ /* THES PARI IS USED TO */ /* 2. CONVERT FX TO FL RY FXTOFL */ / * * / /* FTX NO. TO BE CONVERT IS IN BYTE 0-3 IN UO */ /* FIRST SHIFT TI TO BYTE 1-4 IN UQ, THEN TEST FOR NEGATIVE */ /* " */ / * FXCVFL CAL CAL SR = IF COMPLE : 11=8; /* FUL=B MAX FXP */ L UODL(-); L L0R8U0; SIGNA; Ff)P( 1 ) = IOP( 1 ) ; SUBSTR(UO,y, 1 )='0'B THEN GO TO FXTOFLj_ /* POSITIVE */ ; SIGNA='1'B; NEGO= (64) ' 1 «R; US= '000000001 'B || (55)'0'B; /* 9TH BIT IS SIGN */ CALL COMPL; GO TO FXTOFL; */ /* /* ovb /* /* /* /* /* PROCEDURE; */ */ */ THIS ROUTINE IS USED TO CONVERT MAY BE CALL BY CVL OR CVF TFST ZERO */ DEC TO BIN RESULT IN UO, */ / * * / / * * / PUT FILE(SYSPRINT) LIST ('START DEC TO BINARY CONVERSION') SKIP; IF U0=(65)'0'B THEN GO TO DVBEND; IF SUBSTR(U0,9,52)=(60> 'O'B THEN GO TO DVBEND; */ -154- ICC LSHIFT = 14: : IF /* M( 6 SUB PUT UBSTR CALL CALL ICC=I GO TO ELSE IF S CALL CALL ICC=I UO( 5- 61, 4) SYSPR 1-64)= STR(M, FILE! LM PA NE /* /* /* /* t* /* /♦ NXTOIG /* TOTAL 14 DEC DIGIT */ (UQ,5,8) = (8) '~0'B THEN DO; UODLO; LOL8UQ: CC-2; LSHIF UBSTR(U UODLO: LQL4UQ: cc-i: 8) */ =SUBSTR INT) ED */ T; END; Q,5,4 ) = '0000*B THE N DOj. END; (U0,5,4) ; IT (»UO = «,UQ,'M= •,M) (SKIP,A,B(64) ) ; = 10*M RTIAL XT DIG + UM RESUL IT GE UM( 61-64)=U0(9 PUT SDSl: SDS2: SDS3: SDS4: CAL CAL CAL CAL ASS PUT CAL CAL CAL ICC END TES IF /* /* MORDIG : UM = SUBS FILE( (SKIP N, Y,S G=(64 CALL CALL CALL N= (64 CALL N=(64 CALL CALL N=(64 CALL CALL L T4DL L Z4DL L LMDU L LSDU 1M */ FILE( L UMDX L ASSI L Z4DL =ICC-1 OF ON T FOR ICC = CALL GO TO END ; :CALL CALL CALL PUT FI (64) ' TR(UM SYSPR ,X(70 , G= ( 6 ) • 1 'B USDS1 UMDX1 SDS(X ) • 1 «B SDS(Z ) 'O'B ML3Y3 SDS(Z ) • 1 »B ML1Y4 SDS(Z S; m; M; S; T IN LM T FROM */ -12) */ */ O'B: ,61,4)= INT) ED ) ,A,F(2 4) 'O'B; *_/ THEN TO M V/ UO TO UM */ US=UM; SUBSTR(UQ,9,4~) ; IT («DIGIT= •,ICC,'UM= «,UM) ,0) ,SKIP,A,B(64) )~; , Y , S , G , ; /* N ,Y,T,G, ; /* ,Y,T,G, ; / N,T,Z) ; 2= 1 */ N,T,Z); N3= */ N,T,Z) ; * N4= 1 */ ,Y,T,G,N,T,Z); SYSPRINT) LI l; CALL USDS M; M? /* LM= ASSIMILATED OUTPUT */ ST ('BEGIN ASSIM') SKIP(2)_; l; Y=(64)'0'B ; N=Y; E DEGIT */ ANY MORE DIG THEN DO ; LMDUO; DVBEND; UODLO; L0L4U0: LMDM; LE(SYSPRINT) IT */ /* FINAL BINARY IN UO */ LIST(MARK) SKIP; -155- DVREN BI cvo /# /* /* /* /* /* /* /* /* PUT GO D: P NARY CAL RET NO DV FNTR . T 1 FLCVU ZDEC NERAC SHIR8 SHTL8 EILE TO NX UT EI OEGIT L TIM URN: b; Y; HIS R . EUR (SYSPRINT) EDIT('UO= ',UQ,'M= « f M) ( SK I P , A t B ( 64 ) ) ; TDIG; LE(SYSPRINT) LIST ('END OF CONVERT DECIMAL TO BINARY, S ARE REGHT ADJUST IN UO ■ ) SKIP(2); ER; OU E EUR EL NT = SR SIG UN IE I 1 = CAL PUT OOP IE UO = I 1 = IE ELS IF IF GO IE FXCVD IF GO :CAL . 1HE NEW IE SUB ST = SIGN NA = '0 OVERF NT -. EUM L TIM FILE ( SKI ( 1 )=F I I > (6b) • IE II UV= • 1 GO TO 14-11 I I <0 E GO II > CALL CALL II = GO T I 1 = 1 CALL CALL TO I I CAL CAL I 1 = GO I 1 = CAL CAL TO G L TIM N D E E R( A; •B LO = i ER (S Pt OP 0' > •B z • i T TO = 2 II GE < = L L I I TO -1 L L ET ER TINE I X OP IF OP IF IF IF EL USt EI IV ID EN UU=14 UU>14 V,8,2) / : / W RUG 10'B T 64; S USED RAND NECES RAND IEUU = IEUU 28'0'B; /_* US(33)=1 */ NEGO=(32) 'O'B II (32) V 1 V B;~ CALL COMPL; GETDEC : PUT F I LE ( SYSPR I NT ) EDIT ( • UO TO BE CONVERT= «,UO) (SKIP, A, A (64) ) ; SUBSTR(UQ,65,1 )='0'B; ND = 0; NXTDIV : PUT F I LE ( SYSPR I NT ) LIST(MARK) SKIPT PUT FILE (SYSPR I NT) EDIT ( ' PI V I DEND= ( UQ ) = ' , UO , ' UH = ' , UH ) (SKIP,A( 18) ,B(65) ) ; IF UO=(65)'0'R THEN GO TO GETDIG; ND=ND+1 ; PUT FILE(SYSPRINT) DATA(ND) SKIP; IF ND=15 THEN DO; OV='l'B; GO TO SETSIGN; END ; CALL MDY4; X,S,G=(64) 'O'B; N=(64)'1'B; CALL SDS(X,Y,S,G,N,T,Z) ; /* SDS2 */ CALL Z4DLM; CALL LMR4M; NDDL8=0; TUOl : IF SUBSTR(U0,9,8)=(8) 'O'B JHENDO; CALL UODLO; CALL UHDLH; CALL LOL8UO; CALL LHL8UH; NDDL8 = NDDL8 +1; GO TO TUOl; END; LSHF4: CALL UODLO; CALL LOLAUO; _ ^__ CALL UHDLH; CALL LHL4UH; MCC= 7-NDDL8; PUT FILE(SYSPRINT) EDIT ('BEFORE DIVISION', ' ND= ', ND, •UH= «,UH,'UO= ',UO,'NO. OF DI V I D CYCLE=" • ,NCQ ) ( SK I P , A , SK I P , A , F ( 2 , ) , 2 ( SK I P , A , B ( 65 )J_, SJKJ_P , A , FJ 2 , ) ) ; /* PERFORM NCC CYCLE OF MODIFIED FIXED DIVISION */ /* ASSIMILATE REMA I NDER , CORRECT ASNEEDED */ /* AFTER ASS. REMAINDER SHOULD BE IM LM (BIT 9-12)~ */ CALL CVDDIV; SUBSTR(M,9,4)=SUBSTR(LM,9,4) ; /* M( 9-12 ) =LM( 9-12 ) */ PUT FILE(SYSPRINT) DATA (M) SKIP; ._ /* TEST THE ASSIMILATION OF REMAINDER, IF NEGATIVE */ /* REMAINDER(ADD DIVISOR), SUBTRACT 1 FROM QUOTIENT, */ /* BUT DO NO ASS. QUOTIENT AT THIS POINT '"*/ /* .*/ IF NEGR=0 THEN GO TO NOSUB; QSUB1 :CALL UHDUS ; _ CALL UODUM; G=(64) • 1 'B; NEG0,N=(64) 'O'B; Y=(63) 'O'B II 'l'B; CALL USDS1; CALL UMDXl; PUT FILE(SYSPRINT) LiST ('SUBTRACT QUOTIENT BY 1 •) SKIP; CALL SDS(X,Y,S,G,N,T,Z) ; /* SDS1 */ -157- NO SUB GETDIG /* RADJ Y=(64) «0'B; CALL SDS(Z,Y,T,G,N,T,Z) ; CALL SDS(Z,Y,T,G,N,T,Z) ; CALL SDS(Z,Y,T,G,N,T,Z) ; CALL Z4DLM; CALL T4DLS; CALL LSDUH; CALL LMDUO; CALL UHDUS; CALL UODUM; GO TO NXTDIV; : CALL MDY4; X,S,G,N=(64) «0'B; PUT FILE(SYSPRINT) LIST ( CALL SDS(X,Y,S,G,N,T,Z) CALL Z4DLM ; UO=(65) 'O'B; CALL LMDUO; GHT ADJUST M REGISTER ND<=12 THEN DO; /* SDS2 */ /* SDS3 */ /* SDS4 */ 'MOVE M_REG TO UO_REG') SKIP; ; /* SDS4 */ RI IF */ IF SETSIGN CALL UODLO; ND=ND+2; GO NO=13 THEN CALL UODLO; IF SR THEN LMR4M CUMPL END IF PU PU PU CA RE P M = RE P N US = CA CA CA CA CA CA RE CUNVS ( 'CONVERTED ( • UO= • ,UO, «OV = • ,OV, ' FA= (•END OF CVDM ( SK I P , X ( 40 ) , A ) CALL L0R8U0; TU RADJ; END; DO; CALL L0R4U0; END; SUBSTR(UO, 1,8)= '0000 1011 »B; ELSE SUBSTR(UQ,1,8)='00001010'B; OV THEN CALL SFTBOG; T FILE(SYSPRINT ) LIST T FILE(SYSPRINT) EDIT (SKIP,A,B(64) ) ; T FILE(SYSPRINT) EDIT LL TIMER; TURN; ROCEDURfc; 'OOOO'B || SUBSTR(LM, 1,60) ; TURN; END; ROCEDURE; ,Y=(64) 'O'B: G=(64) i 1»B? ( US S iNEG(J) I ( -US G NEGO) LL USDSl; UODUM ; UMDX1 ; ASSIM; Z4DLM; LMDUO; /* /* NEG POS */ */ SKIP; ,FA) LL LL LL LL LL TURN; END COMPL /* -158-