mm ■ uki mm m mmmm i }H||fji]}jj ♦WiJliiJl B^HRlHalfinfHiiWi!] LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.84 I£6r no. 782-787 cop. 2 The person charging this material is re- sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAIGN 9HEC1I L161 — O-1096 Digitized by the Internet Archive in 2013 http://archive.org/details/designofirredund784yama Report No. UIUCDCS-R-76-784 //Litti UW DESIGN OF IRREDUNDANT MOS NETWORKS A PROGRAM MANUAL FOR THE DESIGN ALGORITHM DIMN by February 1976 Kazuhiko Yamamoto DEPARTMENT OF COMPUTER SCIENCE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS Report No. UIUCDCS-R-76-784 DESIGN OF IRREDUNDANT MOS NETWORKS: A PROGRAM MANUAL FOR THE DESIGN ALGORITHM DIMN by Kazuhiko Yamamoto February 1976 Department of Computer Science University of Illinois at Urbana-Champaign Urbana, Illinois 61801 This work was supported in part by the National Science Foundation under Grant No. GJ-40221 and was submitted in partial fulfillment of the requirements for the degree of Master of Science in Computer Science, 1976. iii ACKNOWLEDGEMENT The author is greatly appreciative of Professor S. Muroga for his discussions and guidance relating to the preparation of this paper, and also, for his careful reading and variable suggestions for the improve- ment of the original manuscript. The author is also obliged to J. N. Culliney and K. C. Hu for their indispensable guidance and stimu- lating discussions. This work was supported in part by the Department of Computer Science, University of Illinois and also the National Science Foundation under Grant No. GJ-40221. iv TABLE OF CONTENTS CHAPTER Page 1. INTRODUCTION 1 2 . THEORETICAL BACKGROUND 3 3 . PROCEDURE DIMN 14 3.1 Internal Data Representation 15 3.2 General Organization of Program DIMN 22 3.3 Description About Subroutines 26 4 . INPUT DATA SETUP 70 4 . 1 Input Data Card Format 70 4.2 Restriction on Problem Size 73 4.3 Example of Input Data Setup 75 5 . OUTPUT OF PROCEDURE DIMN 78 5 . 1 Output Format 78 5 . 2 Networks Obtained by Program DIMN 81 6. CONCLUSION 85 REFERENCES 86 APPENDICES A - Networks Obtained by Program DIMN 87 B - Program Listing 103 1. INTRODUCTION With recent progress in integrated circuit technology, MOS logic circuit has become one of the most important logic families for digital computers. MOS logic circuit has a lot of advantages over bipolar devices such as high packing density, lower power consumption and simple production process. Since at least theoretically a MOS cell can realize an arbitrary negative function, several algorithms for designing logic circuit based on MOS cell's capability of expressing any negative gate have been developed. An algorithm which derives a two level network of a minimum number of negative gates was first developed by Ibaraki and Muroga [1] [2] . Then efficient algorithms which can also realize multilevel network with minimum number of negative gates were developed by Liu [3] and Kasami et al [4] . Although the algorithms mentioned above guarantee the minimality of the number of MOS cells, the network synthesized by these algorithms may still have redundant connections and MOS FETs. Recently, H. C. Lai [5] has modified those algorithms and introduced a new algorithm called DIMN (Design of Irredundant MOS Network) which finds irredundant MOS networks with a minimum number of MOS cells for a given set of functions. In this paper, a FORTRAN program package DIMN which designs MOS logic networks based on Lai's algorithm is described. This program DIMN f In the case of MOS network, we usually use the term "cell" in- stead of "gates." is applicable to networks with multiple incompletely specified output functions. Consequently, it covers almost all the algorithms introduced in Lai's paper. In other words, this program has the capability to realize networks with a completely specified single output function, networks with completely specified multiple output functions and networks with an incompletely specified single output function. The only exception is the network with all the output functions in the output level. As the algorithm for realizing this network requires a slightly different procedure from the procedures for realizing the networks mentioned above, it is not implemented in the program DIMN . Another fact that has to be mentioned here is that the current program DIMN obtains only one irredundant MOS network for any given function. It is hoped that this program will be eventually modified to exhaust all the irredundant MOS networks. The next chapter, Chapter 2, is allocated for the review of Algorithm DIMN. In Chapter 3, the program DIMN is discussed in greater detail. Chapter 4 outlines the preparation of the input for this program. Chapter 5 describes the output of program DIMN and also compares the net- works obtained by applying Algorithm DIMN with the networks obtained by Liu's algorithm. Finally the networks obtained by program DIMN for several three and four variable functions and a complete listing of FORTRAN program DIMN are given in Appendices A and B, respectively. 2. THEORETICAL BACKGROUND This section reviews Lai's Algorithm (Algorithm DIMN) . Like those previously developed algorithms, Algorithm DIMN repeats two phases, that is, phase 1, the derivation of a function for each negative gate (MOS cell) and phase 2, the design of an irredundant MOS cell configura- tion for the function obtained in phase 1. The repetition of these two phases leads to the design of an entire network. The difference between Algorithm DIMN and the previously developed algorithms can be seen in how these two steps are implemented. In the previously developed algorithms, the implementation is accomplished with a single pass appli- cation of phase 1 followed by phase 2. On the contrary, in Algorithm DIMN, these two phases are applied interactively to guarantee the irre- dundancy of the network. The simplest case of Algorithm DIMN i.e., the one for obtaining a network with a completely specified single output function is shown in the following. This simplest version of Algorithm DIMN can be easily extended to the cases for a network with an imcompletely specified single output function, for a network with completely specified multiple output functions and for a network with incompletely specified multiple output functions. In order to facilitate our discussion, some notations and terminologies are explained (see Lai's thesis for detail) . Our design objective is to obtain a loopless network which consists of negative gates only for a given function f. The negative gate is a gate which realizes a switching function which can be expressed in the form of the complement of a disjunctive form with non-complemented literals only. A generalized form of a loopless network with R-; negative gates is shown in Fig. 2.1, where x.. , . . . ,x denote N external variables and u. , . . . ,u_ denote the functions realized by the negative gates 1 R f g-,...,g_ in the network. NFS (R f ,f) = (u 1 ,...,u R _ v f): In this generalized form of a loopless network, the sequence of functions u , . . . ,u R is called a negative function sequence of length R^ for a function f and is denoted by NFS (R.-,f) = (u, , . . . ,u D - , f ) . r r ± f~ 1 NFS 1 (R f ,f) = (u r . . . ,u ± , u i+1 *,...,u R _ x *, f): This represents a partially specified negative function sequence of length R, and degree i for a function f. Unlike the previously mentioned NFS (R f ,f), the functions in this NFS (R f ,f) are not com- pletely specified. (In NFS (R-,f), first i functions with no * are completely specified, but the remaining R- - i - 1 functions with * are unspecified.) A completion of NFS (R, ,f) is a function sequence obtained by completely specifying the unspecified functions in NFS 1 (R f ,f). N-cube : This is a lattice which represents switching functions with N external variables. In the N-cube, each vertex corresponds to an input vector to the functions and the vertices of the same weight D — Fig. 2.1 Generalized form of a loopless network consisting of R f negative gates. (number of ones in an input vector assigned to the vertex) are in the same level, placing vertices with more weight in a higher level. Every pair of vertices which corresponds to input vectors differing in only one bit position is connected by an edge. An example is shown in Fig. 2.2 for N-3 and two functions (f. X.. v Xq j o X-XaXq / • Fig. 2.2 3-cube for 2 functions; f. = x-Vx-, t ry — X - X^ V X-XnAn • Algorithm CMNL : Algorithm CMNL (Conditional Minimum Labeling) obtains NFS (R t ,f) = (u n , . . . ,u . ,, u Jt ... ,u„ , f) which is the completion of NFS (R, ,f) such that the label assigned to each vertex in the N-cube takes the minimum possible value of all feasible comple- tions of NFS (R f ,f). The feasible completion is a completion such that the resulting N-cube has no inverse edge. Algorithm CMXL : Algorithm CMXL (Conditional Maximum Labeling) obtains NFS (R f ,f) = (u, , . . . ,u , , u . , . . . ,u R _ , f) which is the completion of NFS (R f ,f) such that the label assigned to each vertex in the N-cube takes the maximum possible value of all feasible comple- tions of NFS 1_1 (R f ,f). u . : This is the maximum permissible function which is obtained in the process which will be described in Step 4 of Algorithm DIMN. Algorithm DIMN : Design of irredundant MOS networks with a minimum number of MOS cells for a given function f. R f represents the minimum number of MOS cells. Step 1 Let NFS°(R f ,f) = (u* . . . ,u R *, f) and set i=l Step 2 Use algorithm CMNL to obtain NFS " (R f ,f) = (u , ..., u . ,, ±L"'"\-V f) Step 3 Use algorithm CMXL to obtain NFS " (R f ,f) = (u.,, . . . »u. ,, fi i Y 1 ' f) Step 4 Obtain function u. by setting u^A) - 0, if u ± (A) = u i (A) = u ± (A) - 1, if ^(A) = Ui (A) = 1 u (A) = *, if u^CA) = and u ± (A) = 1 Step 5 Obtain an irredundant MOS cell configuration for u. with re- spect to x. x , u. , . . . ,u . ,. Let u. denote the function r 1' n' 1' ' i-1 i realized by this MOS cell (u. is now a completion of u .) . Step 6 If i = R f -1, design an irredundant MOS cell configuration for f with respect to x.. , . . . ,x , u.. , . . . ,u„ _- and terminate this algorithm. Otherwise set i = i+1 and go to Step 2. It should be noted that in the above Algorithm DIMN, Steps 2, 3 and 4 are deterministic, in other words, given a NFS (R f ,f), subsequent NFS 1 " 1 (R f ,f), NFS 1_1 (R f ,f) and N^S i_:L (R f ,f ) are uniquely determined. On the other hand, Step 5 in general is non-deterministic, because more than one irredundant MOS cell configuration may exist for a given V Another fact which should be noted is that although Algorithm DIMN requires at most R f -1 iterations of the loop which consists of Step 2,..., Step 6 for i = l,...,R f -l, if NFS (R f ,f) becomes a com- pletely specified function with respect to x 1 ,x„,...,x for some i < R f -1, the algorithm actually requires only i iterations. Although, even in this case, Step 5 of the algorithm still has to be executed R f -i-l additional times in order to obtain irredundant MOS cell config- uration for u ,. , . . . ,u D , this fact will help reducing the computation 1+1 ■p - -'- time when the algorithm is implemented in computer program. In Fig. 2.3, a simple example is shown for better understanding of Algorithm DIMN. In this example, the 3-cube with respect to a function f to be realized is shown in Fig. 2.3(a). Step 2 and Step 3 of Algorithm DIMN obtains NFS°(3,f) and NFS°(3,f) as shown in (b) and (c) , respectively. Then Step A compares u. and u and obtains u and NFS°(3,f) as shown in (d) . The NFS 1 (3,f) 1 ■ (x , u *, f) in (e) is obtained by Step 5. Step 5 also obtains other two irredundant MOS cell configurations for u- which are shown in (j) and (o) . After Step 6, the algorithm returns to Step 2 and obtains NFS 1 (3,f) 1 , NFS 1 (3,f) 1 , N^S 1 (3,f) 1 and NFS 2 (3,f) 1 as shown in (f ) , 2 (g), (h) and (i) , respectively. Since R = 3, NFS (3,f). is a com- pletely specified negative function sequence with respect to x. , x„ and x~. To finish the design, Step 6 of the algorithm obtains an irredundant MOS cell configuration for f . As previously mentioned, three irredundant MOS cell configurations NFS (3,f) , NFS (3,f) 2 and NFS (3,f)» are obtained in (e) , (j) and (o) , respectively for given a. u. in (d) . For two other irredundant MOS cell configurations, NFS (3,f) 2 , NFS (3,f) 3 , we can continue applying Algorithm DIMN in the same way starting from (j) and (o) , respectively. The resulting irre- dundant MOS networks are shown in Fig. 2.4 and Fig. 2.5. 10 110 100 (a) C 3 (f) for f = x 1 x 2 vx-x 110 100 110 100 (b) NFS°(3,f) = (u r u 2 , f) 110 100 (c) NFS u (3,f) = (u 1 , u 2 , f) (d) NFS°(3,f) = (& , u 2 *, f) 110 100 110 100 (e) First NFS 1 (3,f) ] = (x^ u 2 *, f) (f) NFS 1 (3,f> 1 - (x^ u 2 , f) Fig. 2.3 Example for Algorithm DIMN. 11 110 100 (g) NFS X (3,f) 1 = (x x , a 2 , f) 110 100 000(110 (h) N^S 1 (3,f) 1 = (5 , u 2 , f) 110 100 (« **s*o.t h - m(3.f) 1 -(v 2>f) 0> -^-™^'Sj " hJ /"-\ § r^ Nw^ /•™\ J r~- § s_^ s /— \ ■ /■n s ^ in •— \ ^D iH *^s O .H 1 55 H 2 U •— \ r*1 -d" ^ \^ nJ 3 | •— \ 3 -3- ,-v o s—-' m Q -J w ^N •H « 001 010 100 (2) (3) (5) 3-d: sfMTF (2) START . 3.1.6 000 ENDF(2) (1) Fig Lmension al ENDF(l) Large-cube. FUNC LINK (1) (2) (3) (4) (5) (6) (7) (8) STARTF (1) 1 (2) 2 (3) 4 (4) 8 Fig- 3.1.7 Int« ENDF Fig. 3.1.7 Internal representation of 3 -dimensional Large-cube in Fig. 3.1.6. 22 3.2 General Organization of Program DIMN This section shows the general organization of program DIMN and outlines each subprogram. The function of each subprogram is discussed in detail in the following section. The general organization of program DIMN is shown in Fig. 3.2.1. As can be seen in this diagram, this program consists of subroutine MAIN and the following subroutines: INPUT, NCUBE, CMNL, CMXL, MPF, IMC, ASFUN1, ASFUN2, INCMNT, DSCAN, ASIGN1, DCRMNT, CMPR and PRINT. In Fig. 3.2.1, an arrow from block i to block j represents the fact that the subroutine represented by block i calls the subroutine represented by block j . Subroutine INPUT : This subroutine reads into an N-cube input data, that are problem parameters and given output functions. Input data setup is described in detail in Chapter A. Subroutine NCUBE : This subroutine constructs an N-cube according to the number of external variables. This means if the number of N external variables is N, this N-cube will contain 2 vertices. Subroutine NCUBE will examine the input vector in binary form which is assigned to each vertex in the N-cube one by one and link the vertices with the same weight together. Subroutine CMNL : This subroutine implements Conditional Minimum Labeling in Algorithm DIMN based on the output function values read into the N-cube. As shown in Fig. 3.2.1, this subroutine calls sub- routines INCMNT and DSCAN. RF, the minimum number of MOS cells which 23 CM tn CO <: 55 i E CO <3 H PC! Ph P4 " Pn 2 g U 53 O M i-H S3 H O -.. g M CO Input vector X and the function value assigned to the vertex Y is "1." Step 3 : This step obtains the set of minimum vectors. Step 4 : This step obtains a subset of the set of minimum vectors which covers all the vertices which originally have the value "0." 25 Step 5 : This step obtains an irredundant subset from the subset obtained in Step 4. The irredundant subset obtained in this step will be used for the realization of an irredundant MOS cell con- figuration. Since the finding of all irredundant covers (subsets) is essentially the covering problem, it will be very time-consuming as the problem size becomes larger. So in this subroutine, only one irredundant subset is obtained. Step 6 : This step stores values of the function realized by the MOS cell obtained in Step 5 in the LABEL field in the N-cube. We have to be careful that the function value realized at each vertex with don't care by the irredundant MOS cell may be different from the function value assigned to the corresponding vertex in the Large-cube in Step 2. This step also contains an error checking routine. If the function values realized by the irredundant MOS cell obtained in Step 5 are different from those already stored in the LABEL field of the N-cube, an error message and contents of the array LABEL is printed. Subroutine ASFUN1 : Whenever certain conditions which will be dis- cussed in detail in Section 3.3, are met, Algorithm DIMN does not need to obtain the maximum permissible function. This means that the program loop which consists of CMNL, CMXL and MPF need not be implemented and by detecting such conditions, we can save computation time. This sub- routine is called under such circumstances. Then the function values stored in the LABEL field in the N-cube are directly stored by this subroutine in the FUNC field in the Large-cube. 26 Subroutine ASFUN2 : This subroutine is called under a similar con- dition to that subroutine ASFUN1 is called. The values in the MNL field in the N-cube are stored by this subroutine in FUNC field in the Large-cube. Subroutine MAIN : This subroutine calls the subroutines described above, whenever necessary, and implements Algorithm DIMN. 3.3 Description About Subroutines (1) Subroutine MAIN (Fig. 3.3.1) In block 1 , parameters N and M are read in and if these parameters do not satisfy the restriction on problem size (see Section A. 2 for detailed discussion) , an error message is printed out and the program execution is terminated. This block also tests EOF (end of file) con- dition and if all data have been exhausted, the program execution is terminated . In block 2 , the LABEL and DCARE fields in the N-cube are initial- ized to zero. In block 3 , the subroutine INPUT is called and values on output function cards are read into the LABEL field in the N-cube. In block 4 , the N-cube is constructed based on the parameter value N. In block 5 , II , the pointer which indicates the number of iterations of the program loop is initialized to 1. One MOS cell configuration is determined every time the loop is executed. 27 >rl wad pmuKFirn INITIALIZE LAIIL.DCAU tor F.unn CZJ i'»I n STATISTICS II - II + 1 23 CALL ASFIN1 » , 1 CALL IMC « , ' II - II ♦ 1 '< RF - II + 1 1 M J]^»^ f CALI ASFUN1 Ji 1 CAl.I MPF 11 II CALL IMC Fig. 3.3.1 Flowchart of subroutine MAIN. 28 Block 6 implements conditional minimum labeling (CMNL) and at the first execution of this block the value of RF (the minimum number of MOS cells) is determined. In block 7 , the obtained RF value is examined and if it is 1, the maximum permissible function (MPF) need not be obtained; the MOS cell configuration can be obtained immediately by calling ASFUN1 and IMC. If R ^ 1, then subroutine CMXL is called to find the conditional maximum labeling. In block 9 , after executing subroutine CMXL, the labels assigned to the N-cube by CMNL and CMXL are compared and if the labels assigned by the two different ways take the same value at every vertex in N- cube, there exists unique minimum negative gate network and block 9 is immediately followed by the loop for obtaining an irredundant MOS cell configuration. Under this circumstance, the sequence for obtain- ing maximum permissible function, that is, the sequence of subroutines CMNL, CMXL and MPF is skipped. In block 9 , if the labels assigned to the N-cube take different values at some vertices, this block is followed by block 10 (subroutine MPF) and block 11 (subroutine IMC) . After the implementation of block 11 , the configuration of MOS cell indicated by pointer LI is deter- mined (the II-th MOS cell is obtained) . In block 12 , pointer LI is increased by one and in block 14 , if II is not equal to RF, in other words, if we are not going to deter- mine the last MOS cell configuration, the program control is returned to block 6 . On the contrary, if II is equal to RF, that is, if the 29 last MOS cell configuration is going to be determined, the procedure for determining MOS cell configuration is immediately followed (the procedure for obtaining MPF is skipped) . After the implementation of block 16 , an irredundant MOS network which realizes the given output functions is obtained. In block 17 , the statistics about the obtained network are printed out and the program control is transferred to block 1 . The contents of the statistics are described in detail in Chapter 5. In block 1 , if problem cards are not exhausted, a new problem is read in and the entire process is repeated. If problem cards have already been exhausted, the program is terminated. In block 13 , the logical variable CS is examined (this variable is set in subroutine INPUT if all the output functions are completely specified) and if CS is true, this block is followed by block 22 . In the case of multiple output functions, the maximum permissible function need not be obtained for the output function which is completely specified. Therefore, if one of the MOS cells which realize the com- pletely specified given output function is being determined, block 22 is immediately followed by the loop for determining MOS cell configura- tion and the process for obtaining the maximum permissible function is skipped. (2) Subroutine INPUT At the beginning of this section, the way how the output functions are stored in arrays LABEL and DCARE will be discussed and then flow- chart will be explained. 30 As described in Section 3.1, a partially specified negative func- tion sequence is stored in the LABEL and DCARE fields of the N-cube. The internal representation of the LABEL and DCARE fields in the N-cube which has N external variables and M output functions is shown in Fig. 3.3.2. As shown in this figure, the labels assigned to vertices LABEL U l ••' U RF-M f l ••' f M (1) (2) (3) (A) • (2 N ) > — DCARE U l ' * ' U RF-M f 1 ' * * f M u. - represents the function realized at the output of the i-th MOS cell. f - represents output function f . Fig. 3.3.2 The internal representation of the LABEL and DCARE fields in the N-cube. in the N-cube are stored in bit pattern. The column labeled with u. stores the function realized at the output of the i-th MOS cell and 31 the column labeled with f . stores the given output function f . . As will be discussed in Chapter 4, since the output functions are supplied in truth table form, output function 1 is stored in column f , output function 2 is stored in column f ? and so forth. In general, output function i is stored in column f . . The function value of the i-th function is stored in the LABEL and DCARE fields of vertex (j-1) in the following way. (As described in Section 3.1, the LABEL and DCARE fields of vertex (j-1) are stored in LABEL (j) and DCARE (j), respectively.) If a function value is zero, zero is stored by assigning zero to column f of both LABEL (j) and DCARE (j). (Since arrays LABEL and DCARE have already been initialized to zero in block 2 of subroutine MAIN, no action need be taken.) If a function value is one, one is stored by assigning one to column f.. of LABEL (j) and zero to column f. of DCARE (j). This is implemented by adding 2 M_i to LABEL (j). Finally, if a function value to be stored is don't care, this is done by assigning zero to column f.. of LABEL (j) and one to column f. of DCARE (j). This is implemented by adding 2 M_i to DCARE (j). The example in Fig. 3.3.3 shows how the output functions in the right hand side are stored in arrays LABEL and DCARE for N=3 and M=2. In the truth table of this figure, * represents don't care condition. The following is the definition of each variable which appears in subroutine INPUT. NCARD : This stores the number of input data cards required to describe one output function. 32 LABEL DCARE (1) (2) (3) (4) (5) (6) (7) (8) £ 1 f 2 1 1 1 1 1 1 £ 1 f 2 1 1 1 1 1 1 x l x 2 x 3 £ 1 f 2 1 * 1 * 1 1 1 1 1 * 1 * 1 1 * * 1 1 1 1 1 1 1 1 Fig. 3.3.3 Example: how output functions are stored in arrays LABEL and DCARE. I_: This is an indicator of output function number. If problem requires M output functions, I changes from one to M. J^: This is an indicator of card number within one output function, J changes from one to NCARD. K: This is a column indicator in one card. Therefore, K changes from one to 80. VTEX: This is a pointer to a vertex in the N-cube in which an output function value is to be stored. When VTEX = i, this points to vertex (i-1) . CHAR (80) : This array is a character buffer for input data. This implies that one output function card is read in at a time. CS : This is a logical variable which is set when every output function is completely specified. 33 Fig. 3.3.4 shows the flowchart of subroutine INPUT. In block 1 , CS is set. If don't care is found in output functions, it will be reset in block 9 . This means that after executing subroutine INPUT, CS is set if and only if every output function is completely specified. N In block 2 , NCARD is obtained in the following way. If 2 is devisable by 80, then NCARD = 2 N /80, otherwise NCARD = 2 N /80+l, where / represents integer division and the result of 2 /80 is equal to L-80 -I * In block 7 , a function value which is stored in CHAR(K) is examined and the function value is stored in the N-cube in the way described in the beginning of this section. In the input format, a blank means the termination of the description of one output function. Therefore, if a character in CHAR(K) is a blank, this is interpreted as the termination of the description of one output function and, in block 15 , an error is checked. In a normal termination of the description of one output function, at the instant when a blank character has been received, J and VTEX have to take the following value; J = NCARD, VTEX = 2 N + 1 If an error occurs, an error message is printed and the control returns to block 1 in subroutine MAIN. This means that this problem has been skipped. In block 7 , receiving characters other than zero, one, * and blank is also interpreted as an error. 34 3.3.4 Flowchart of subroutine INPUT. 35 (3) Subroutine NCUBE Flowchart is shown in Fig. 3.3.5. The following is the definitions of variables which appear in this subroutine. I_: This stores an input vector in binary form. X: This is a variable in which each input vector is examined bit by bit and the weight of the input vector is determined. W: This is a variable in which the weight of the input vector is stored. STARTL, ENDL and other arrays are described in Section 3.1. N When the number of external variables is N, there exists 2 input N vectors (ranging from to 2 -1 in binary form). Therefore, the pro- cedure which determines the weight of an input vector and links the N input vectors with the same weight is repeated for 1=0 to 2 -1. In the loop which consists of blocks 4, 5, 6 and 7 , each input vector is examined bit by bit and in blocks 8, 9 and 10 , the input vectors with the same weight are linked together. For this chain constructing pur- pose, STARTL has to be initialized to zero in block 1 . An example of the N-cube constructed in this procedure is shown in Fig. 3.1.5 for N=3. (4) Subroutine CMNL Flowchart is shown in Fig. 3.3.6. The following is the definition of variables which appear in this subroutine. USPFY : As previously mentioned, array LABEL stores a partially specified negative function sequence. USPFY stores the number of un- specified bits in array LABEL. The relation between USPFY, RF, II and M is shown in Fig. 3.3.7. 36 i *- INITIALIZE START1. I • X - I W • X • X/2 YES STARTL(W+1) ♦ I + 1 ENDL(W ♦ 1) • I + 1 u Jit r - i + l is. CHAIN (ENDL(W+1)> *■ I + 1 END(W + 1) • 1+1 Fig- 3.3.5 Flowchart of subroutine NCUBE. 1 11 MNUSTARTUN » 1)) • LABFL (STAJtTUN +1)) USPFTf • IF - II 4 I 37 I PTRP • STAKTL(V) I.BX • LABEL(PTRBi l.BV • nCARF.(PTRR) ISC • 0, SHIFT • 1 CALL USCAN PTRBX • (PTRB-1) /SHIFT 9 1 t PI RA • PTKB 4- SHIFT 10 \ 1 LAX • MNL(PTPA) I.BX ■ LABEL(PTRB) n i PTRB • CHAIN(PTRB) SHIFT - : • SHIFT I - I + 1 _/"V *| RFTllRN MNl(PTRB) • LBX Fig. 3.3.6 Flowchart of subroutine CMNL. II \ r M V USPFY = RF - II RF 38 "\ * 1 * + 1^^ Fig. 3.3.7 An element of array LABEL, W: This stores an actual weight plus one. PTRB: This is a pointer to vertex B to which the minimum possible value is to be assigned. PTRA : This is a pointer to vertex A which is connected to vertex B by the edge from vertex A to vertex B. The vertex A has a greater weight than vertex B by one. LBX : This is a variable in which LABEL pointed by pointer B is increased. LAX : This is a variable which stores the minimum label which has already been assigned to vertex A. LBY : This is a variable in which DCARE pointed by pointer B is examined in subroutine DSCAN. The number of don't care bits and . the weight assigned to each don't bit are determined. NDCARE : This is a variable which stores the number of don't care bits. BWEIT: This is an array which stores the weight assigned to each don't care bit. PTRBX : This is a variable in which the input vector in binary form assigned to vertex B is examined bit by bit. This variable, together with variable SHTFT, determine PTRA by calculation. 39 INC : This is a counter for the increment of LBX. This is described in detail in subroutine INCMNT. In block 1 (Fig. 3.3.6), the minimum possible label is assigned to a vertex with weight N. Since LABEL is initialized to zero in block 2 in subroutine MAIN (Fig. 3.3.1), the unspecified bits in LABEL (STARTL (N+l)) have already been assigned zero, the minimum possible value. As shown in Fig. 3.3.7, the number of unspecified bits is obtained by calculating RF - II + 1. As RF is obtained after the first implementa- tion of subroutine CMNL, the value of RF has to be specified in subroutine MAIN before CMNL is called for the first time. After assigning a label to the vertex with weight N, a minimum possible label is assigned to every other vertex in the following way. In blocks 4, 5, . . . , 16 , each vertex pointed by PTRB (vertex B) is assigned a minimum possible label. In general, as shown in Fig. 3.3.8, VERTEX (PTRA-1) ( 1 ( J [ I PTRA ( J PTRB VERTEX (PTRB-1) Fig. 3.3.8 Relation between vertices A and B in CMNL. there exist several vertices which are directly connected to vertex B by the edges from these vertices to vertex B. Minimum labels which have already been assigned to these vertices are compared with LBX 40 one by one ( block 11 , LABEL (PTRB) is assigned to LBX in block A ) and LBX is increased by one ( block 13) until the condition that no one of the labels assigned to these vertices is larger than the label assigned to vertex B is satisfied. In block 9 , PTRA is calculated by PTRA = PTRB + SHIFT. As vertices with the same weight, say (w-1) , are linked by CHAIN field, starting from the vertex pointed by STARTL(W), all the vertices within the linked list can be exhausted by utilizing this scheme ( blocks 3, 17 and 18 ) . Starting from the vertices with weight (N-l) , the above procedure is applied to every group of vertices with the same weight until a label is assigned to the vertex with weight zero ( blocks 2, 19, 20 ) . At the first implementation of this subroutine, RF value is obtained ( blocks 21, 22 ). (5) Subroutine DSCAN Flowchart is shown in Fig. 3.3.9. This subroutine has four parameters; two of them are input parameters (LBY, USPFY) and the others are output parameters (NDCARE, BWEIT) . It is called by CMNL and CMXL. It determines the number of don't care bits in the function part of the label assigned to vertex B and the weight assigned to these don't care bits. This is accomplished by examining LBY (don't care field of vertex B) bit by bit. If "1" is encountered, NDCARE is in- creased by one and the corresponding bit weight is stored in BWEIT (NDCARE). This bit weight is represented in variable SHIFT (this stores the value 2 ) . The above procedure Is continued until all the unspecified bits are examined. c START 41 KDCARI • SHIFT «■ 1 I - 1 NDCARE - NDCARE + 1 BWEIT(!TOCARE) -SHIFT I - I + 1 SHIFT - 2 * SHIFT YES LBY * LBY/ 2 YES END Fig. 3.3.9 Flowchart of subroutine DSCAN, 42 An example is shown in Fig. 3.3.10 for a label assigned to vertex B. The label in this example contains 2 don't care bits and the weight 2 of these bits are 2 and 2 . (6) Subroutine INCMNT This subroutine has five parameters; three of them (NDCARE, BWEIT, M) are input parameters and the others (INC, LBX) are input-output parameters. The flowchart is shown in Fig. 3.3.11. Although INC is a counter for incrementing LBX (the label field of vertex B) , each bit in counter INC has a different weight from an ordinary binary counter. Bit weights of the least significant half which correspond to the bit weights of don't care bits in LBX can be obtained in array BWEIT by subroutine DSCAN (the number of these bits is stored in NDCARE) . Weights of other unspecified bits can be obtained by the following formula; the bit weight of the J-th least significant bit is 2 M + J - NDCARE - 1 where J is the index which indicates the number of program loop itera- tions in Fig. 3.3.11. An example of the bit weight assignment to counter INC is shown in Fig. 3.3.10 for a label of vertex B. In block 1 (Fig. 3.3.11), counter INC which has already been initialized to zero in block 4 in Fig. 3.3.6 (CMNL) is increased by one. In block 3 , variable SHIFT and index J are initialized so that SHIFT stores the bit weight of the J-th least significant bit. In the loop which consists of blocks 4, . . . ,10 , the contents of counter 43 Label (Vertex B) "M ^ v The weight assigned to each bit NDCARE BWEIT(l) BWEIT(2) BWEIT(3) BWEIT(4) INC J \ J- -NDCARE These 2 bits corre spond to the don't care bits in label . (vertex B) 1 / ,M+2 2 M+1 2 M 2 2 2 The weights assigned to bits Fig. 3.3.10 Example: how don't care bits in the LABEL field is treated. START AA i V INC - INC + 1 2 V INCX * INC 3 V SHIFT + 2 M-NDCARE J '- 1 •fc - INCX LBX «. LBX + BWEIT(J) RETURN LBX «■ LBX + SHIFT J «- J + 1 SHIFT *■ 2 * SHIFT 10 INCX «- INCX/2 Fig. 3.3.11 Flowchart of subroutine INCMNT. 45 INC are examined bit by bit and if "1" is encountered, the weight assigned to this bit of 1 is added to LBX. In block 6 , the value of index J is examined and if J is not greater than NDCARE, the contents of BWEIT(J) is added to LBX, and otherwise the contents of the variable SHIFT is added. After executing this subroutine, LBX is increased to the next possible state and then compared with LAX in block 11 of subroutine CMNL (Fig. 3.3.6). It is to be noted that LBX is not always increased by one because it may contain already specified bits. As shown in block 12 (Fig. 3.3.6), prior to calling this subroutine, LBX has to be initialized to the value stored in LABEL (PTRB) . (7) Subroutine CMXL This subroutine is executed in almost the same way as the sub- routine CMNL is. The only difference is that after l's are assigned to the unspecified bits of label field of vertex B by calling sub- routine ASIGN1, the label is decreased instead of being increased in subroutine CMNL. The flowchart is shown in Fig. 3.3.12 and the following is the definitions of variables used in this subroutine. Variables with the same definition as those in subroutine CMNL are omitted. PTRB : This is a pointer to vertex B to which the maximum possible value is to be assigned. PTRA : This is a pointer to vertex A which is connected to vertex B by the edge from vertex B to vertex A. The vertex A has a smaller weight than vertex B by one. The relation between vertex A and vertex B is shown in Fig. 3.3.13. LBX - LABEL(STARTLU)) LBY » DCARE(STARTLd)) U3PFY - RP - II + 1 CALL ASIGN1 HXL(STARTLU)) * LBX PTRB * STARTL(W) LBY * DCARE(PTRB) LUX * LABEL(PTRB) LBY . DCARE(PTRB) CALL ASIGN1 t~ LBXX - LBX INC - i * l, shift • i PTRB - CHAIN(PTRB) ^ rrux • (PTU-i) / SHirr PTRA * PTRB - SHIFT LAX - MXL (PTRA) 1 5^-^''^~"~~-».^ LBXX < LAX 16 y LBB - LBX 17 \ ' -LS_ 1*1 + 1 SHIFT • 2 • SHIFT MXL(PTRB) - LBXX 46 Fig. 3.3.12 Flowchart of subroutine CMXL. 47 VERTEX (PTRB-1) PTRB PTRA VERTEX (PTRA-1) Fig. 3.3.13 Relation between vertices A and B in CMXL, LBX : This is a variable where LABEL (PTRB) is stored after l's are assigned to the unspecified bits in LABEL (PTRB) . LBXX : This is a variable in which contents of LBX is determined. LAX : This is a variable which stores the maximum label which has already been assigned to vertex A. INC : This is a counter for decreasing LBXX. The contents of INC is subtracted from LBXX in subroutine DCRMNT. In blocks 1, 2 and 3 (Fig. 3.3.12), the maximum possible label is assigned to the vertex with weight zero. Starting from the vertices with weight one ( block 2 ) , a maximum possible label is assigned to every vertex in the N-cube in a similar manner as in subroutine CMNL. In block 13 , PTRA is obtained by subtracting SHIFT from PTRB. (8) Subroutine ASIGN1 This subroutine has four parameters; three of them (USPFY, M and LBY) are input parameters and the remaining one (LBX) is an input- output parameter. One is assigned to every unspecified bit of LBX 48 including unspecified don't care bits in the values of output functions assigned to vertex B. This is accomplished by examining input parameter LBY. In Fig. 3.3.14, I is a variable which points to a bit in the label field of vertex B. Starting from the least significant bit of the label (1=1) , one is assigned to all the unspecified bits by increasing the index I. SHIFT is a variable which represents the weight assigned to each unspecified bit indicated by index I. In block 2 , the value of USPFY is examined and if it is larger than M (the number of output functions) , then in the loop which consists of blocks 3, 4, 5, 6 and 7 , the values of output functions assigned to vertex B (M bits) is examined. In this loop, each time when a don't care bit is encountered, one is assigned to the don't care bit by adding SHIFT to LBX. Then, in the loop which consists of blocks 8, 9 and 10 , one is assigned to every remaining unspecified bit. If the value of USPFY does not exceed M, then the unspecified bits in the label field of vertex B, the number of which is specified in input parameter USPFY, are examined and one is assigned to every unspecified don't care bit. (9) Subroutine DCRMNT This subroutine has five parameters; three of them (NDCARE, BWEIT and M) are input parameters and the others (INC, LBXX) are input-output parameters. In this subroutine, parameter LBXX is decreased to the next possible state. As shown in block 16 in Fig. 3.3.12 (CMXL) , prior to calling this subroutine, LBXX has to be initialized to the value stored in LBX. 49 LBY - LBY/2 LBY/2 * 4 i 2 - LBY NO ~~ YES LBX «• LBX + SHIFT 5 \ ' I » I + 1 SHIFT • 2 * SHIFT LBX ♦ LBX + SHIFT I * I + 1 SHIFT «- 2 * SHIFT LBX » LBX + SHIFT 1*1 + 1 SHIFT ♦ 2 » SHIFT LBY ♦ LBY/2 Fig. 3.3.14 Flowchart of subroutine ASIGN1. 50 As can be seen in the flowchart (Fig. 3.3.15), this subroutine is executed in the same way as subroutine INCMNT. The only exception is blocks 7 and 8 . In these blocks, BWEIT(J) and SHIFT are subtracted from LBXX instead of being added. (10) Subroutine MPF Flowchart is shown in Fig. 3.3.16 and the following is the defini- tion of variables used in this subroutine. MXVTXL: This is a variable which stores the maximum value, N (2 -1) , of vertex number in the N-cube. NVTEXF : This is a variable which stores the number of vertices, (2 ) , in the Large-cube. RF— TT RSHIFT : This is a variable which stores value 2 LSHIFT : This is a variable which stores value 2 . I_: This is an index of the program loop in Fig. 3.3.16 and at the same time I represents a vertex number in the N-cube. .J: This is a variable which stores the vertex number of a vertex in the Large-cube to which the maximum permissible function value is to be assigned. As can be seen in Fig. 3.3.16, when vertex I in the N- cube is concerned, the corresponding II-th MPF value will be assigned to vertex J in the Large-cube, where J is calculated by the following formula (see Fig. 3.3.17); J = I * 2 II_1 + LABEL (1+1) / 2 RF ~ II+1 RF— T T = I * LSHIFT + MNL (1+1) / 2 * 2 - I * LSHIFT + MNLX / 2 ( START 51 IHC * INC ♦ I LNOC * INC SHIFI - 2 J ♦ 1 M-NDCARE LBXX * LBXX - BVEIT(J) RETURN LBXX •■ LBXX - SHIFT I J * J + 1 SHIFT » 2 * SHIFT 10 INCX • INCX/2 Fig. 3.3.15 Flowchart of subroutine DCRMNT. ST/UCT 52 INITIALIZE FUNC (NVTEXF) 1*0 MNLX * MNL(I+1)/RSHIFT MXLX * MXL(I+1)/RSHIFT J * I * LSHIFT + KKLX/2 YES FUNC(J+1) «- 1("0") ^> J - 1 62 Fig. 3.3.22 Flowchart of subroutine IMC. (Step 5) 63 remove MINV(l) from the semi-irredundant subset, the resulting subset does not cover all the vertices with "0*" any longer.) » MINV(l) cannot be removed from the semi-irredundant subset. The LINK fields which has been decreased in the loop which consists of blocks 3, ... ,9 have to be restored in the loop which consists of blocks 11, ... ,16 by in- creasing them by one. After the restoring operation, the next minimum vector is picked up in block 17 . After exhausting all the vertices in the Large-cube comparing with MINV(l), if all the vertices with "0*" are still covered with the semi-irredundant subset (There exist no vertices with "0*" whose LINK fields take the value zero.), MINV(l) can be removed from the semi- irredundant subset by assigning negative value to MINV(l) ( block 10) . The next minimum vector is picked up in block 17 and the program con- trol returns to block 2 . The above process is repeated until all the input vectors except the last one in the semi-irredundant subset are exhausted. The result- ing subset is called the irredundant subset which realizes an irredundant MOS cell configuration. Finally, in block 19 , the irredundant MOS cell configuration is printed (The output format is described in detail in Section 5.1.) . The number of input vectors in the irredundant subset is obtained in a variable NIRR . Step 6 ; This step stores the function value realized by the MOS cell obtained in step 5 to the II-th most significant bit of the LABEL field in the N-cube. Two flowcharts are shown in Figs. 3.3.23 and 3.3.24. J i J * I * LSHIFT LABEL(I+1)/(2*RSHIFT) JX «- J MINX «- MINV(K) ERROR CHECK IF ERROR, SET ERROR FLAG DCARE • DCARE(I+1)/RSHIFT LABEL(Ul) - LABELO+1) + RSHTFT ERROR CHECK IF ERROR, SET ERROR FLAG 64 Fig. 3.3.23 Flowchart of subroutine IMC. (Step 6A) J * I • LSHIFT LABEKI+D/C * RSHIFT) ERROR CHECK IF ERROR, SET ERROR FLAG 10 DCARX ♦ DCARE(I+1)/ RSHIFT ERROR CHECK IF ERROR, SET ERROR FLAG \ YES ERROR MESSAGE ** \ 1 J *\ RETURN TO START IN MAIN 65 LABELCI+l) ♦ LABEL(I+1)+RSHIFT Fig. 3.3.24 Flowchart of subroutine IMC. (Step 6B) 66 In these flowcharts, I_ is the index of the program loop and at the same time I_ represents the vertex number in the N-cube. J[ is the variable which stores the vertex number of the vertex in the Large-cube to which the maximum permissible function (which is completely specified) is assigned. In block 1 (Fig. 3.3.23), the dimension of the irredundant subset is compared with the dimension of the set of minimum vectors and if they coincide, the function realized by the irredundant MOS cell takes the same values as those assigned to the Large-cube in step 2. There- fore, in this case, the function value which has been obtained at vertex J in the Large-cube is just copied into the II-th most signifi- cant bit of the LABEL field of vertex I in the N-cube. As described in subroutine MPF, there exists the following relation between I and J; J = I x LSHIFT + LABEL (1+1) / (2 * RSHIFT) The above procedure is described in flowchart in Fig. 3.3.24. On the other hand, in block 1 (Fig. 3.3.23), if they take dif- ferent values (this occurs in most cases), values of the function realized by the irredundant MOS cell are different from those assigned to the Large-cube in Step 2. Flowchart for this case is shown in Fig. 3.3.23. In this flowchart, after determining the function value realized at vertex J in the Large-cube by the MOS cell obtained in step 5 (this is accomplished by the loop which consists of blocks 5,6 , . . . ,9 ) , it is stored in the II-th most significant bit of the LABEL field of vertex I in the N-cube ( block 13 ) . If the function value is zero no action is taken because zero has already been stored. 67 When the above function value is stored in a bit of the LABEL field in which the output function value has already been stored, the two function values are compared. If they do not coincide, an error flag is set ( blocks 14,15) . After storing all the function values in the II-th most significant bit of LABEL field, the status of an error flag is examined in block 12 (Fig. 3.3.24) and if an error flag is on, an error message and the con- tents of array LABEL are printed. After the contents of array LABEL is printed by calling subroutine PRINT, the program control returns to the START of subroutine MAIN and the next problem is read in. If there is no error, the control returns to subroutine MAIN. (12) Other Subroutines (a) Subroutine COMPR - In this subroutine, two input vectors JX and MINX are compared bit by bit and if every bit in JX is larger than or equal to the corresponding bit in MINX, the program control takes the normal return. Otherwise the control is transferred to the state- ment number shown in the parameter list. (b) Subroutines ASFUN1 and ASFUN2 - These subroutines are explained in Section 3.2. Flowcharts are shown in Fig. 3.3.25 and Fig. 3.3.26. STAKT 68 INITIALIZE rUNC(NVTDCT) I - 3 IABELX * UBEL(I+1)/RSMFT DCARX ♦ DCAJLEU+D/RSHIFT J «- I * LSHIFT + LABELX/2 YES PUNC(J+1) - 1 ("0") **- I - I + 1 FUNC(J+1) *■ 2 ("1") RETURN Fig. 3.3.25 Flowchart of subroutine ASFUN1 START 69 YES INITIALIZE KUNC(NVTEXF) 1 • MNLX • MNI.(I+1)/RSHIFT J ■ 1 * 1.SHIFT + MMLX/2 YES FUNC(J+1) •> 1 ("0") I - I + 1 NO FUNC(.J+1) - 2 ("1") RETURN Fig. 3.3.26 Flowchart of subroutine ASFUN2, 70 4. INPUT DATA SETUP 4.1 Input Data Card Format For each separate problem, a set of input data cards must be sub- mitted which consist of the following. (i) < parameter card > (ii) < output function card > s (i) will always consist of only a single card, but (ii) may consist of more than one card. The format of each data card is explained in the following. (i) < parameter card > This card specifies the number of external variables, N, and the number of output functions, M, for a given problem. The parameter N and M are specified in the following two fields. Cols. 1-2 : This field specifies an integer, N, which is right justified Cols. 3-5 : This field specifies an integer, M, which is right justified, (ii) < output function card > s Although output functions are submitted to this program in the truth table form, the input vector for each output function value is implicitly specified by the order in which the function values are specified in each output function card(s). Depending on the function value (one, zero or don't care), a different character ("1," "0" or "*") is punched on the corresponding column. The truth table with N external variables and M output functions is shown in Fig. 4.1. This truth table is submitted to the program DIMN in the fo] lowing way. 71 x l x 2 • • • x n L M . . . . . . 1 1 1 1 1 .2 N -2 .2 N -1 ;2 N_2 2 .2N-1 "M M : 2 N -2 "M : 2N-1 'M Fig. 4.1 Truth table with N external variables and M output functions. Each output function is specified on one or several output function cards depending upon the number of external variables, N. Since each function value is specified in one column in the output function card(s), if the number of external variables, N, is larger than or equal to 7, N the number of input vectors, 2 , will exceed the number of columns in one card and consequently two or more output function cards are required in order to specify one output function. In fact, the number of cards f~ 2 N "I needed to specify one output function is equal to — . (That is, oU ^ 9 if N=9, then 2 = 512. This means that we need 7 cards to specify one output function.) 72 In Fig. 4.1, f, , the first function value of function f is speci- fied in the first column of the output function card(s) which specify function f . f . , the second function value of function f. is specified in the second column and so forth. After specifying all the function values of function f 1 , function f ^ is specified on separate output function card(s). The above process is repeated until M output func- tions are specified on M separate sets of output function card(s). Since blank column terminates one output function specification, (the program DIMN interprets the blank character as the termination sign of one output function specification) the blank character should not be inserted among function specification except at the end of each func- tion specification. In Fig. 4.2, input data cards for one problem is shown and in S input data cards c output function cards c 7 c < 7 parameter card > output function specification for f. output function specification for f~ output function specification for f M Fig. A. 2 The input data cards for one problem. 73 Fig. 4.3, an input card sequence for the execution of a typical DIMN problem is shown. We can put as many problems as we want in the fields of these input data cards. If there exists a format error in input data, the following error message is printed out and the program execu- tion halts. "INPUT ERROR IN DATA CARD I = *** J = *** K - ***" This message means that an error occurred at the K-th column of the J-th output function card which specifies the I-th output function. 4.2 Restriction on Problem Size In order to pack problems into a finite amount of space, some re- strictions on the size of an acceptable problem are required. In any case, the sum of the number of external variables, N and the number of output functions, M must not exceed 11 and the value of M must not exceed 4. The relation between the maximum number of external vari- ables and the maximum number of output functions which the program DIMN can handle is shown below. Max. no. of external variables Max. no. of outputs 10 1 9 2 8 3 7 4 If the above restriction is violated, the following error message is printed and the program execution halts. "INPUT ERROR IN PARAMETER CARD N = *** M = ***" 74 /* ID < ID card information > /* ID REGION = 200K, TIME = (00.30), LINE = 03000 // EXEC FORTLDGO, REGION. GO - 200K FORTRAN source program /* // GO. SYSIN DD * input data cards < C L f c L < parameter card > < output-function-card > s parameter card < parameter card > the first problem the second problem the last problem /* Fig, k . 3 Input card sequence for the execution of a typical DIMN problem. 75 In this error message, N is the number of external variables and M is the number of output functions on a parameter card. These limitations are essentially imposed by the array sizes in the programs presently written. To loosen the restrictions is mainly a task of increasing array dimensions appropriately. 4.3 Example of Input Data Setup The following examples show how the input data is set up for the typical DIMN problems. Example 1 : The input data setup for the network with three external variables (N=3) and one completely specified output function (M=l) is shown in Fig. 4.5. The truth table for the function is shown in Fig. 4.4. Example 2 : The input data setup for the network with three external variables (N=3) and two incompletely specified output functions (M=2) is shown in Fig. 4.7. The truth table for the functions is shown in Fig. 4.6. 76 X 1 X 2 X 3 f l 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Fig. 4.4 Truth table for Example 1. column no. 000000000111 123456789012 output function card (f ) parameter card Fig. 4.5 Possible setup of data cards to specify the problem given in Example 1. 77 x_ x_ x« £ 1 f 2 1 * * 1 1 * * * * 1 1 1 Fig. 4.6 Truth table for Example 2. column no. 000000000111 123456789012 output function card for f„ output function card for f. parameter card Fig. 4.7 Possible setup of data cards to specify the problem in Example 2 . 78 5. OUTPUT OF PROCEDURE DIMN This chapter describes the output of program DIMN . In Section 5.1, the output format is shown for a typical DIMN problem and in Section 5.2, MOS networks obtained by program DIMN are compared with the correspond- ing MOS networks obtained by previously developed algorithm for several 4 variable functions. 5.1 Output Format Fig. 5.1 shows the printout obtained by program DIMN for a typical example. In this printout, the subscripted variables XI, X2 - - - - represent the external input variables connected to driver MOS FETs and the subscripted variables Ul, U2, - - - - represent the outputs of MOS cells connected to the inputs of other driver MOS FETs. This printout shows the number of external variables and the number of output functions; two and three, respectively. Then the two output functions are printed in the truth table form where input vectors are implicitly specified by the order in which the function values appear. In the printout of MOS cell configurations, only driver MOS cells are printed. Fig. 5.2 shows the network obtained from the MOS cell configuration printed in Fig. 5.1. In this network, factoring of literals in switching expressions is done by hand. Following the above MOS cell configurations, some statistics which are derived from the obtained network are printed. In this example, 79 ***************************************** * * * DESIGN OF IRREDUNDANT MOS NETWORK * * * ***************************************** X a EXTERNAL VARIABLE U = OUTPUT OF MOS CELL ***************************************** NUMBER OF EXTERNAL VARIABLES = NUMBER OF OUTPUT FUNCTIONS FUNCTION 1 10010101 FUNCTION 2 00100111 NETWORK CONFIGURATION MOS CELL I X2 — X3 MOS CELL 2 I — X2 — LI— — ! — I — XI — X3 — MOS CELL 3 — — MOS CELL 4 U2 NUM8ER OF MOS CELLS = 4 NUMBER OF MOS FETS = 14 ( WITHOUT FACTORING ) ELAPSEO TIME = 0.12 SEC Fig. 5.1 Printout obtained by program DIMN . 80 14-1 1 ry-^ o CO o a 4J m • o 00 x) C 5« (0 o O M u o 4-> M 00 _ -rl ^ 103 APPENDIX B Program Listing 10/ C THIS PROGRAM IS THE INPLEMENTATION OF ALGORITHM DIMN < DESIGN OF f IRREDUNDANT MOS NETWORK ). C THIS PROGRAM IS APPLICABLE TO THE NETWORKS WITH MULTIPLE C ' INCOMPLETELY SPECIFIED OUTPUTS. C THE RFLATICN BETWEEN THE MAXIMUM NUMBER OF EXTERNAL VARIABLES AND f. THE MAXIMUM NUMBER OF OUTPUTS WHICH THIS PROGRAM CAN HANDLE IS C SHOWEN BELOW. C C MAX. EXTERNAL VARIABLES MAX. OUTPUTS C C 10 1 r -9 ,2 C 8 3 C 7 4 C C THIS PROGRAM IS CONSTRUCTED WITH THE FOLLOWING MAIN PUBROUTINES AND C THE OTHER SMALL SUBROUTINES. C C SUBROUTINE NAME OPERATION C C NCUBE CONSTRUCT N-CUBE ACORDING TO THE NUMBER OF C EXTERNAL VARIABLES. C INPUT READ DATA INTO N-CUBE ( LABELt DCARE ). C CMNL IMPLEMENT CONDITIONAL MINIMUM LABELING. C CMXL ' IMPLEMENT CONDITIONAL MAXIMUM LABELING. C MPF ORTAIN MAXIMUM PERMISSIBLE FUNCTION FROM C MINIMUM LABEL AND MAXIMUM LABEL. C IMC OBTAIN IRREDUNDANT MOS CELL CONFIGURATION C FROM MAXIMUM PERMISSIBLE FUNCTION. IMPLICIT INTEGER! A-Z ) INTEGER+2 LABEL tDCARE ,MNL ,MXL , CHAIN ,FUNC ,LINK 1 ,MINV COMMON II ,N ,M ,RF 1 ,!ABEL(1024) ,DCARE(1024) ,MNL(1024) ,MXL(1024I 2 ,CHAIN(1024) tSTARTLfll) ,ENDL(11) ,FUNC(16384) 3 ,LINK( 16384) ,MINV( 16384) ,STARTF(15) ,ENDF<15) LOGICAL CS REAL UTIME C II POINTER WHICH INDICATES THE CURRENT STEP. C N NUMBER OF EXTERNAL VARIABLES. C M NUMBER OF OUTPUT FUNCTIONS. C PF MINIMUM NUMBER OF MOS CELLS C CS IS SET IN SUBROUTINE-INPUT IF THE GIVEN OUTPUT C FUNCTIONS ARE COMPLETELY SPECIFIED. C UTI"E STORES THE TIME ELAPSED FOR CONSTRUCTING NETWORK. C TFFT STORES TOTAL NUMBER OF DRIVER MOS FETS IN NETWORK. C LABEL(1024) STORES LABEL AND FUNCTION VALUE WHICH IS ASSIGNED r . TO EACH VERTFX IN N-CUBE. C OCARE(1024) STORES THE DONTCARE BIT OF OUTPUT FUNCTIONS. C MNL (1024) STORES THE LABEL ASSIGNED TO EACH VERTEX BY C CONDITIONAL MINIMUM LABELING. MXL (1024) STORES THE LABEL ASSIGNED TO EACH VERTEX BY C CONDITIONAL MAXIMUM LABELING. C CHAINU024) STOKES THE LINK TO THE NEXT VERTEX WITH THE SAME C WEIGHT IN N-CUBE. STARTL(ll) POINTER TO THE FIRST VERTEX WITH THE SAME WEIGHT C IN N-CUBE. C ENDL (11) POINTFR TO THE LAST VERTEX WITH THE SAME WEIGHT IN C N-CURE. FUNCl 163841 STURES MAXIMUM PERMISSIBLE FUNCTION ASSIGNED TO EACH C VERTEX IN LAPGE CUBE FOR OBTAINING IRREDUNDANT 105 LINK( 16384) M I NV! 163 841 CONTINUE STARTFU5) ENDF (15) r * C MAIN PROCEDURE * C * c C READ PARAMETER N, M MOS CELL CONFIGURATION. STORES THE LINK TO THE NEXT VERTEX WITH THE SAME WEIRHT IN LARGE CUBE. STORES THE MINIMUM VECTOR OBTAINED IN THE PROCESS OF IMC. POINTER TO THE FIRST VERTEX WITH THE SAME WEIGHT IN LARGE CUBE. POINTER TO THE LAST VERTEX WITH THE SAME WEIGHT IN LARGE CUBE. 10 READ( 5,lltEND = 130 ) N,M U FORMAT! I2«2XtIl > HEADING l»t PRINT 12 12 FORMAT! PRINT 13 13 FORMAT! PRINT 14 14 FORMAT! PRINT 15 15 FORMAT! PRINT 16 16 FORMAT! PRINT 17 17 FORMAT! PRINT 18 18 FORMAT! PRINT 19 19 FORMAT! a* t ****************************** ********* ' t '* ** %•* DESIGN OF IPREDUNDANT MOS NETWORK *• i i f i a**************************************** OS' X = EXTERNAL VARIABLE' ) • f « U = OUTPUT OF MOS CELL' I Ql f * ****************************************** ) CHECK PARAMETER VALUE IF! M .FQ. I ) GO TO 21 IF! M .EO. 2 ) GO TO 22 IF! M .EQ. 3 ) GO TO 23 IF! M .EO. 4 ) GO TO 24 GO TO 2 5 21 IF( N.GE.l .AND. N.LE.10 ) GO TQ 30 GO TO 25 22 IF! N.GE.l .AND. N.LE.9 ) GO TO 30 GO TO 25 23 IF! N.GE.l .ANO. N.LE.8 ) GO TO 30 GO TO 2 5 24 IF! N.GE.l .AND. N.LE.7 ) GO TO 30 ERROR IN PARAMETER VALUE i 25 PRINT 26 t N.M 26 FORMAT! 'QS'INPUT ERROR IN PARAMETER CARD'tSX.'N ** t I3t'M GO TO 130 13 ) 106 C PRINT PARAMETER VALUE C 30 PRINT 31, N . 31 FORMAT! •-•t'NUMBER OF EXTERNAL VARIABLES -',13 ) PRINT 32, M 32 FORMAT( • •♦•NUMBER OF OUTPUT FUNCTIONS -»|I3 ) C C INITIALIZE LABEL! 2**N ) AND DCARE! 2**N I C NVTEXL ■ 2**N DO 50 I - 1, NVTEXL LABEL! I ) » «.• DCARE! I ) = ■ 50 CONTINUE CALL INPUT! CS.C130 ) C C SET TIMFR C CALL STEPZ! TIME ) CALL NCUBE 11 = 1 RF = 16 TFET =0 PRINT 51 51 FORMAT ( •-•♦•NETWORK CONFIGURATION') 60 CALL CMNL IF( RF .EQ. I ) GO TO 90 CALL CMXL C C IF MMI ( I ) = MXL( I I FOR EVERY I IN N-CUBE, CMNLt CMXL,MPF C CAN BE SKIPPED. C DO 70 I = l v NVTEXL IF( MNL( I ) .NE. MXL( I I I GO TO 80 70 CONTINUE GO TO 120 80 CALL MPF CALL IMC( TFET, CIO I 11=11+1 IF( CS ) GO TO 100 IF( II .NE. RF ) GO TO 60 90 CALL ASFUN1 CALL IMC( TFET, £10 ) GO TO 125 100 IF< RF - II ♦ 1 .GT. M ) GO TO 60 C DECIDE THE MOS CELL CONFIGURATIONS IN COMPLETELY SPECIFIED C FUNCTION PART C 110 CALL ASFUN1 CALL IMC( TFET, CIO ) II = II ♦ I IF( II .LE. RF ) GO TO 110 GO TO 125 C C MNL( I ) = MXL( I ) OCCURED FOR EVERY I IN N-CUBE C 120 CALL ASFUN2 CALL IMC( TFET, CIO ) II = I I ♦ 1 I F I II .LE. RF J GO TO 120 107 MOS CELLS ■ • »I3 ) MQS FETS a* »I3 ) FACTORING )' ) ! / 100. ME »• ,F7.5 It' SEC • c C PRINT STATISTICS C •125 PRINT 126, RF 126 FORMAT! •-', 'NUMBER OF PRINT 127,TFET 127 FORMAT! • ', 'NUMBER OF PRINT 129 129 FORMAT! • ', • I WITHOUT CALL STEPZ( ITIME ) UTIME = ( TIME - ITIME PRINT 128, UTIME 128 FORMAT! '6', 'ELAPSED TIME *',F7.2,' SEC I GO TO 10 130 STOP END £**«******************** C * C SUBROUTINE NCUBE * C * Q *********** ************ SUBROUTINE NCUBE C THIS SUBROUTINE CONSTRUCTS NCUBE ACCOROING TO THE NUMBER OF EXTERNA! C VARIABLES. CHECK THE INPUT VECTOR IN BINARY FORM ASSIGNED TO EACH C VERTEX ONE 3Y ONE AND LINKS THE VERTICES WITH THE SAME WEIGHT. IMPLICIT INTEGER! A-Z ) INTEGFR*2 LABEL ,DCARE ,MNL f MXL t CHAIN ,FUNC tLINK 1 ,MINV COMMON II ,N ,M ,R.F 1 ,LA3EL<1024) ,DCARE!1024) ,MNL!1024> ,MXL<1024) 2 tCHAIN(l024) ,STARTL!U) tENDLlll) tFUNC!16384) 3 ,LINK(16384) ,MINVU6384) ,STARTF!151 ,ENDF!15) MXVTXL = 2**N - 1 L = N ♦ I DO 10 I = 1,L 10 STARTL! I ) = I = 20 X = I W = 30 IF! X.EO.O I GO TO 50 IF! X/2*2.EQ.X ) GO TO 40 W = W ♦ 1 40 X - X/2 GO TO 30 50 IF! STARTL! W ♦ I ).EQ.0 I GO TO 60 CHAIN! ENDL! W ♦ I ) 1=1+1 ENDL! W + 1 ) = I ♦ 1 GO TO 70 60 STARTL! W ♦ 1 1 = I ♦ 1 ENDL! W ♦ 1 ) > I ♦ 1 70 I = I ♦ 1 IF! I. LE. MXVTXL ) GO TO 20 RETURN END C************* ********** C * - / C SUBROUTINE INPUT * C * c***************** ****** SUBROUTINE INPUT! CSt* ) C THIS SUBROUTINE REAOS DATA INTO LABELt 2**N ) AND DCARE! 2**N ) 108 C ON INPUT ERROR, THE FOLLOWING MESSAGE IS PRINTEO OUT AND EXECUTION C IS TERMINATFO. C I = FUNCTION NO. J « CARD NO. K ■ COLUMN NO. IMPLICIT INTEGER( A-Z ) INTEGER*2 LABEL ,DCARE ,MNL" »MXL , CHAIN ,FUNC ,LINK 1 ,MINV COMMON II ,N ,M ,RF 1 ,LABEL!1024) ,CCARE!1024) ,MNL!1024) ,MXL<1024) 2 ,CHAINU024> ,STARTL!ll) ♦ENDL(ll) ,FUNC!16384) 3 ,LINK!16384) .MINVI 163841 ,STARTF(15) ,ENDF(15) LOGICAL CS INTFGER*2 CHAR(80) - INTFGER*2 BLANK/' • / ,ZERO/ ' ' / , ONE/ • 1 ' /,0CR/ •* • / C CHARI 80 ) CHARACTER BUFFER FOR ONE CARD. C CS IS SET IF THE GIVEN FUNCTIONS ARE COMPLETELY C SPECIFIED. CS = .TRUE. IF( 2**N/80*80 .EQ. 2**N ) GO TO 10 NCAPD = 2**N/80 ♦ I GO TO 20 10 NCAPD = 2**N/80 20 00 140 I = 1,M PPINT 30, I 30 FORMAT! • « , • FUNCT ION' , I 3 1 VTEX = i DO 100 J = 1,NCARD READ 40,CHAR 40 FORMAT! 80A1 ) DC flO K = 1 80 IF( CHAR! K I .EQ. BLANK ) GO TO 110 IF( CHAR( K ) .EQ. ZERO I GO TO 70 IF( CHARI K J .EQ. ONE ) GO TO 50 IF{ CHAR! K I .EQ. DCR ) GO TO 60 GO TO 150 50 LABEL( VTEX ) ■ LABEL! VTEX ) ♦ 2**( M - I I GO TO 70 60 OCAREC VTEX ) = DCARE1 VTEX I + 2**( M - I ) CS = .FALSE. 70 VTEX = VTEX ♦ I 80 CONTINUE PRINT 90, CHAR 90 FORMAT! » , ,3X,80A1 I 100 CONTINUE GO TO 120 110 IF! J .NE. NCARD ) GO TO 150 IFI VTEX .NE. 2**N ♦ 1 ) 60 TO 150 120 PRINT 130, CHAR 130 FORMAT! ' ',80Al ) 1^»0 CONTINUE GO TO 170 150 PRINT 160. I , J.K 160 FORMAT! •0 , tMNPUT ERROR IN DATA CARD',3X,M I 'K =»,I3 ) PFTURN1 170 OFTURN FND r *********** *********** c * C SUBROUTINE CMNL * C * q ********************** 109 SUBROUTINE CMNL C THIS SUBROUTINE IMPLEMENTS CONDITIONAL MINIMUM LABELING, C THIS SUBROUTINE CALLS SUBROUTINE-DSCAN AND SUBROUT INE-INCMNT. IMPLICIT INTEGER! A-Z I INTEGER*2 LABEL tDCARE » MNL ,MXL tCHAIN ,FUNC ,LINK 1 ,MINV COMMON II ,N ,M ,RF 1 ,LAB?L!1024) ,0CAREI1024) .MNLI1024) .MXLU024) 2 .CHAIN11024) ,STARTLlll) tENDL(il) tFUNC< 16384) 3 ,LINK(16384) ,MINV!16384) ,STARTFC15J ♦ ENDFUS) INTEGER BWEITJ4) C PTR8 POINTS TO THE VERTEX-B FOR WHICH WE ARE SEEKING FOR THE C MINIMUM POSSIBLE LABEL. C PTRA POINTS TO THE VERTEX-A WHICH HAS BIGGER WEIGHT BY ONE THAN C VERTEX-B AND CONNECTEO TO VERTEX-B BY THE EDGE IN N-CUBE. FF! MINIMUM NUMBER OF MOS CELLS ) IS OBTAINED IN THE FIRST EXECUTION C OF THIS SUBROUTINE. F - M MNL ( STARTL( N ♦ 1 ) ) = LABEL! STARTLt N ♦ 1 ) ) USFFY = RF - I! ♦ I W = N 10 PTPB = STARTL( W ) 20 LBX = LABEL! PTRB ) LBY = DCAREl PTRB ) INC « SHIFT = 1 CALL DSCAN{ LBY,USPFY,NDCAREtBWEIT ) DO 50 I = l.N PTDBX = ( PTRB - I ) / SHIFT IF( PTRBX/2*2 .NE. PTRBX ) GO TO 40 PTRA ■ PTRB ♦ SHIFT LAX = MNL! PTRA ) 3 IF( LBX ,GE. LAX ) GO TO 40 LBX = LABEL! PTRB ) CALL INCMNT! I NC» NDCARF , L BX , F»BWE IT » GO TO 30 40 SHIFT = 2 * SHIFT 50 CONTINUE MNL! PT"B ) = LBX TF( PTRB ,E0. ENDL! W ) ) GO TO 60 PTRB = CHAIN! PTRB I GO TO 20 60 W = W - 1 IF! W .GE. I ) GO TO 10 IF( I I .NE. 1 ) GO TO 100 RF = MNLX = MNL! 1 ) 70 IF! MNLX .EO. I GO TO 100 MNLX = MNLX / 2 RF = RF ♦ 1 GO TO 70 100 RETURN END Q *********** *********** C * C SUBROUTINE CMXL * " ' C * £********************** SUBROUTINE CMXL C THIS SUBROUTINE IMPLEMENTS CONDITIONAL MAXIMUM LABELING. C THIS SUBROUTINE CALLS SUBROUTINE-DSCAN, SUBROUT I NE-AS IGNL AND 110 C SUBROUTINE-DCRMNT. IMPLICIT INTEGER! A-Z ) INTEGER*2 LABEL ,DCARE ,MNL t MXL , CHAIN ,FUNC ,LINK 1 ,MINV COMMON II ,N ,M ,RF 1 ,LABEI<1024) ,DCARE(1024) ,MNL(1024) ,MXL(1024) 2 ,CHAIN(1024> tSTARTLflll ,ENDL<11) ,FUNC(16384) 3 ,LINK<16384) ,MINV<163841 ,STARTF(15) ,ENDF(15) INTEGER BWEIT14) C PTRB POINTS TO THE VERTEX-B FOR WHICH WE ARE SEEKING FOR THE C MAXIMUM POSSIBLE LABFL. C PTRA POINTS TO THE VFRTEX-A WHICH HAS SMALLER WEIGHT BY ONE THAN C VERTEX-B AND CONNECTEDTO VERTEX-B BY THE EDGE IN N-CU8E. F = M LBX = LABEL! STARTLl I ) ) LBY = DCAPEl STARTLl 1)1 USPFY = RF - II +1 CALL ASIGNIC U SPFY, F ,LRX,LBY I MXLC STARTLt I ) ) = LBX L = N ♦ 1 DO 60 W = 2,L PTRR = STARTLl W ) 20 LbY = DCAREI PTRB ) CALL DSCAN( LB Y, USPFY ,NDC ARE ,BWE I T ) LBX = LABEL( PTRB ) LBY = DCAREI PTRB ) CALL ASIGNK USPFY, F , LB X, LBY ) LBXX = LBX INC = SHIFT = 1 DO 50 I = 1,N PTRBX = ( PTRB -11/ SHIFT IF( PTPBX/2*2 .EQ. PTRBX ) GO TO 40 PTRA = PTRB - SHIFT LAX = MXL( PTRA ) 30 IFI LBXX .LE. LAX ) GO TO 40 LRXX = LBX CALL DCRMNT< I NC, NDC ARE, L BXX, F,BWE IT ) GO TO 30 40 SHIFT = 2 * SHIFT 50 CONTINUE MXL( PTRB ) = LRXX IF< PTRB .FQ. ENDL( W ) ) GO TO 60 PTRP = CHAIN( PTRB ) r.n TO 20 60 CONTINUE RF TURN END £*********** ************ C * C SUBROUTINE DSCAN * c * c*********** ************ SURPOUTINF DSCAN( LBY.USPF Y, NDC ARE , BWE I T ) C THIS SUBROUTINE SCAN THE OCARE WHICH IS ASSIGNED TO EACH VERTEX AND OBTATN THE NUMBER OF DONTCARE BITS AND THE WEIGHT ASSIGNED C TO rACH DONTCARE BIT. MPl IC IT INTEGER! A-Z ) riTtf.FR BwEITC. ) C pw c IT( 4 ) STHRES THE WEIGHT ASSIGNED TO EACH DONTCARE BIT. Nf'CARF STORFS THE NUMBER OF DONTCARE BITS IN ONE VERTEX. Ill NDCARE - 1 = 1 SHIFT ~ 1 DO 20 I * 1»USPFY IF( LBY „EQ. ) GO TO 30 IF( L8Y/2*2 .EQ. LBY > GO TO 10 NDCARE = NDCARE ♦ I BWEIT( NDCARE ) * SHIFT 10 SHIFT = 2 * SHIFT LRY = LBY / 2 20 CONTINUE 30 RETURN END £******?**«************** C * C SUBROUTINE INCMNT * C * £*****#****************** SUBROUTINE INCMNTI I NC .NDCARE, LBXtMt BWEIT I C THIS SUBROUTINE INCREMENTS THE LABEL ASSIGNED TO THE VERTEX POINTED C BY POINTER-PTRB. IMPLICIT INTEGER! A-Z I INTEGER BWEITl 4 \ C INC IS THE COUNTER WHICH HAS SPECIFIED WEIGHT FOR EACH BIT. INC = INC M INCX = INC J = 1 SHIFT = 2 ** ( M - NDCARE ) 10 IF ( INCX .EQ. ) GO TO 40 IFl INCX/2*2 .EQ. INCX ) GO TO 30 IF( J .IE. NDCARE ) GO TO 20 LBX = LBX ♦ SHIFT GO TO 30 20 LBX = LBX ♦• BWEIT( J I 30 J = J ♦ 1 SHIFT = 2 * SHIFT INCX = INCX / 2 GO TO 10 40 RETURN END C ************* *********** C * C SUBROUTINE ASIGN1 * C * C************* *********** SUBROUTINE ASIGNK USPFY.M.LBX, LBY ) C THIS SUBROUTINE ASSIGNS ONE TO THE EVERY UNSPECIFIED BIT OF LABELS C IN N-CUBE. IMPLICIT INTEGER! A-Z ) SHIFT = I IF( USPFY.GT.M ) GO TO 30 DO 20 I = l.USPFY IF( LBY/2*2 .EQ. LBY ) GO TO 10 LBX = LBX ♦ SHIFT 10 SHIFT = 2 * SHIFT LBY = LBY / 2 - ' 20 CONTINUE GO TO 70 30 00 50 I = 1,M IFl LBY/2*2 .EQ. LBY I GO TO 40 LBX = LBX ♦ SHIFT 112 40 SHIFT » 2 * SHIFT LBY = LBY /2 50 CONTINUE I = M + I DO 60 I - UUSPFY LBX = L8X ♦ SHIFT SHIFT = 2 * SHIFT 60 CONTINUE 70 RETURN END £************************ c * " , C SUBROUTINE DCRMNT * C * f-*****:******************* SUBROUTINE DCRMNT { I NC t NOCARE, LBXX ,M, BWE IT ) C THIS SUBROUTINE DECREMENT THE LABEL ASSIGNED TO THE VERTEX POINTED C BY POINTER-PTRB IMPLICIT INTEGER( A-Z ) INTEGER BWEITI 4 I INC = INC ♦• 1 INCX = INC J = 1 SHIFT = 2 ** ( M - NDCARE ) 10 IF f INCX.EO.O ) GO TO 40 I*< INCX/2*2 .EO. INCX ) GO TO 30 IF( J. LE. NDCARE ) GO TO 20 L^XX = LBXX - SHIFT GO TO 30 20 LBXX = LBXX - BWEITI J ) 30 J = J ♦ I SHIFT = 2 * SHIFT INCX = INCX / 2 GO TO 10 40 PFTURN END C ******* ************** C * C SUBROUTINE MPF * C * Q ************* ******** SUPPOUTINE MPF C THIS SUBROUYINE OBTAINS MAXIMUM PERMISSIBLE FUNCTION FROM MINIMUM C LABEL AND MAXIMUM LABEL ANO STORES THE RESULT TO FUNCI NVTEXF ). IMPL If. IT INTEGER! A-Z ) INTEGER*2 LABEL ,DCARE ,MNL f MXL »CHAIN ,FUNC ,LINK 1 ,MINV COMMON II ( N f M ,RF 1 ,LABEL(1024) ,DCARE(10241 .MNH1024) ,MXLI1024) 2 ,CHA[N<1024) .STAPTL(ll) tENDL(ll) ,FUNC(16384) 3 t LINK(l6384) »MINV(16334) ,STARTF(15) ,ENDF(15) M XVTXL = 2**N - I NVTEXF = 2**1 N ♦ II - 1 ) PSHIFT = 2**( RF - II J LSHJFT = 2**( II - 1 ) DO 10 I = 1, NVTEXF " / 10 FUNCt I ) = I = 20 mm x ■ MNLl I ♦ I » / RSHIFT MXLX = MXL( 1*1)/ RSHIFT J = I*LSHIFT ♦ MNLX/2 113 .EQ.MNLX I GO TO 30 .EO. MXLX ) GO TO 40 » 2 •NE. MXLX ) GO TO 40 * 1 C* c c c c* c c c c c c r c c c c c c r c c c c IF( MNLX/2*2 IF< MXLX/2*2 FUNC( J ♦ 1 ) GO TO 40 30 IF( MXLX/2*2 FUNC( J ♦ i ) 40 I ■ I ♦ 1 IF| I.LE.MXVTXL ) GO TO 20 R C TURN END ***************** SUBRPUTINE IMC ***************** SUBROUTINE IM THIS SUBROUTINE THE MAXIMUM PER THIS SUBROUTINE STEP-I STEP-2 STFP-3 STEP-4 STEP-5 STEP-6 CONS ASSI THAT F< Y 08TA OBTA COVE OBTA IN S STOR THIS IF F IN P AIRE THE IMPLICIT INTE INTEGER*2 LA 1 ,MI COMMON II 1 ,LAPEL(1024 2 ,CHAIN(1024 3 .LINKI16384 INTEGER X( 10 I 2 3 INTEGER 1 2 3 INTEGER LOGICAL LOGICAL PRTAPY( 20 *** * * * *** C( TFET.* ) OBTAINS IRRE MISSIBLE FUNC IS MADE OF T TRUCTS LARGC- GNS "0" OR "1 THERE EXISTS ) = "1". INS THE SFT INS THE SUBSE RS EVERY VERT INS AN IRREOU TEP-4. ES THE RESULT STEP CONTAIN UNCTION VALUE REVICUS STEPS ADY STORED IN CONTENTS OF A GER( A-Z J DUNOANT MOS CELL CONFIGURATION FROM TION. HE FOLLOWING SIX STEPS. CUBE FUNC( 2**(N ♦ II - 1) ). " TO THE VERTEX-X WITH OONTCARE SUCH NO VERTEX-Y SATISFYING Y > X AND F MINIMUM VECTORS. T OF THE SET OF MINIMUM VECTORS WHICH EX WITH ORIGINAL "0". NDANT SUBSET FROM THE SUBSET OBTAINED TO THE VERTEX IN N-CUBE ( LABEL ). S ERROR CHECKING ROUTINE. S FRCM MOS CELL CONFIGURATION OBTAINED ARE DIFFERENT FROM THE FUNCTION VALUES ARRAY-LABEL. ERROR MESSAGE AND RRAY-LABEL IS PRINTED. BEL NV DCARF rMNL MXL ♦CHAIN ,FUNC LINK ) / U< 10 ) / iN T DCA ,PXL(1024) 2 .CHAINU024) ♦STARTL(ll) ,ENDL<11) r FUNC<16384) 3 .LINKU6384) ,MINV(16384) »STARTF(15) t ENDF<15) MXVTXL = 2**N - I NVTEXF = 2**1 N ♦ I I — 1 I RSHIFT = 2**< RF - II ) LSHIFT = 2**( II - 1 ) DO 10 I = 1, NVTEXF 10 FUNC( I ) = I = 20 MNLX = MNL( I ♦ I ) / RSHIFT J = I*LSHIFT ♦ MNLX/2 IF( MNLX/2*2 .EQ. MNLX ) GO TO 30 FUNCl J ♦ 1 I = 2 GO TO 40 30 FUNCl J ♦ 1 ) = 1 40 I = I ♦ i IF( I. LE. MXVTXL ) GO TO 20 PETURN END £***** ****** ************ c * - / C SUBROUTINE PRINT * C * q***** ****** ************ C THIS SUBROUTINE PRINTS THE CONTENTS OF AN ARRAY! LABELt DCARE , ETC. I. C ARAY IS THE ARRAY TO BE PRINTED. 12C THE NUMBER OF THE ELEMENTS IN THE ARRAY TO BE C SIZE INDICATES C PRINTFO. SUBROUTINE PRINT! ARAY.SIZE ) ■ IMPLICIT INTEGER* A-Z 1 INTEGER*2 ARAY( 1 0241 t PBUFC 16 ) PRINT 10 FORMAT! «0« , »*****DUMP*****» 00 60 I = I, SIZE ARAYX = ARAY( I I J = 16 IF( AKAYX/2*2 .EQ. PBUF( J ) = 1 40 J ) = = ASAYX / 2 - I GE.l ) GO TO 20 50,( PBUF( JJ J,JJ * 1,16 ) 10 20 30 40 ARAYX ) GO TO 30 50 60 GO TO PRUF ( ARAYX J = J IF( J, PRINT format! CONTINUE RETURN END 1611 ) iocraphic data :t 1. Report No. UIUCDCS-R-76-784 and Subt itle iESIGN OF IRREDUNDANT MOS NETWORKS OR THE DESIGN ALGORITHM DIMN 3. Recipient's Accession No. A PROGRAM MANUAL 5. Report Date February 1976 6. thor(s) Lazuhiko Yamamoto 8. Performing Organization Rept. '°- UIUCDCS-R-76-784 rlorming Organization Name and Address 'Diversity of Illinois at Urbana-Champaign epartment of Computer Science rbana, Illinois 61801 10. Project/Task/Work Unit No. 11. Contract/Grant No. NSF Grant No. GJ-40221 ponsoring Organization Name and Address ational Science Foundation 'ashington, D.C. 13. Type of Report & Period Covered Technical 14. upplcmentary Notes bstracts This paper describes a program package for the design of irredundant single- nd multiple-output MOS networks. The program is an implementation of algorithms eveloped by H.C. Lai for the synthesis of irredundant MOS networks with a minimum umber of MOS cells for a given set of completely or incompletely specified functions synthesized networks having multiple outputs are guaranteed to have a minimum umber of MOS cells only under certain assumptions). The output of the program is graphic representation of the interconnections among FET's for each MOS cell in he synthesized irredundant network. A listing of the FORTRAN program is included n the paper. ey Words and Document Analysis. 17a. Descriptors Logic design, logic circuits, logical elements, programs (computers). >Idcntifiers/Open-Ended Terms omputer-aided-design, irredundant networks, MOS networks, optimal networks, 3S cells, MOS, FET. COSATI Field/Group taxability Statement RELEASE UNLIMITED 19. Security Class (This Report) UNCLASSIFIED 20. Security Class (This Page UNCLASSIFIED 21- No. of Pages 125 22. Price F NTIS-SS (10-70) USCOMM-DC 40329-P7 1 b ;-■•• , B* M