IHHBRffiHIiisiIl 
 
 HflHS 
 
 EflnlHlMiiKIImJ 
 
 JfifisBL 
 
 HHM 
 
 Ss 
 
 tamStSSBiAv AVr l 
 
 WmM 
 
 UUU33 
 
 Utf 
 
 Wtttitisffl 
 
 ig|||lH| 
 
 MB 
 
 ■BHHORnmltll^miral 
 
 HHHRQ 
 
LIBRARY OF THE 
 
 UNIVERSITY OF ILLINOIS 
 
 AT URBANA-CHAMPAIGN 
 
 510.84 
 X-Gfer 
 
 -no- 629 -5 34 
 co/o. 2. 
 
CENTRAL CIRCULATION AND BOOKSTACKS 
 
 The person borrowing this material is re- 
 sponsible for its renewal or return before 
 the Latest Date stamped below. You may 
 be charged a minimum fee of $75.00 for 
 each non-returned or lost item. 
 
 Theft, mutilation, or defacement of library material! can be 
 cause! for student disciplinary action. All materials owned by 
 the University of Illinois Library are the property of the State 
 of Illinois and are protected by Article 16B of lllinoit Criminal 
 Law and Procedure. 
 
 TO RENEW, CALL (217) 333-8400. 
 University of Illinois Library at Urbana-Champaign 
 
 2001 
 5 2001 
 
 MAY 2 6 2002 
 
 When renewing by phone, write new due date 
 below previous due date. L162 
 

 77}* 
 
 ZL 
 
 -r 
 
 .£ 
 
 mucDcs-R-72-532 
 
 COO 1^69-0210 
 
 PERSPECTIVE TRANSFORMER FOR THE 
 STEREOMATRIX 3-D DISPLAY SYSTEM 
 
 by 
 
 SHIV PRAKASH VERMA 
 
 October, 1972 
 
UIUCDCS-R-72-532 
 
 PERSPECTIVE TRANSFORMER FOR THE 
 STEREOMATRIX 3-D DISPLAY SYSTEM 
 
 by 
 
 SHIV PRAKASH VERMA 
 
 October, 1972 
 
 Department of Computer Science 
 University of Illinois 
 Urbana, Illinois 61801 
 
 This work was supported in part by Contract No. AEC AT (11- 1)1^69 and. 
 was submitted in partial fulfillment of the requirements for the degree 
 of Doctor of Philosophy in Electrical Engineering, October, 1972. 
 
Digitized by the Internet Archive 
 in 2013 
 
 http://archive.org/details/perspectivetrans532verm 
 
Ill 
 ACKNOWLEDGEMENT 
 
 The author wishes to express his sincerest gratitude to Professor 
 W. J. Poppelbaum for suggesting this thesis topic and for his continued guidance, 
 friendship and support. He is also very grateful to Professor W. J. Kubitz 
 for his invaluable aid, timely suggestions, friendship and patience. 
 
 The author wishes to thank the other senior staff members of the 
 Hardware Research Group and his fellow students in the group for their 
 friendship. 
 
 Thanks are also due to Barbara Bunting for typing the thesis, to the 
 drafting department, to the technical staff for circuit fabrication and to the 
 offset department of the Department of Computer Science. 
 
IV 
 
 TABLE OF CONTENTS 
 
 Page 
 
 1. INTRODUCTION 1 
 
 2. THE STEREOMATRIX SYSTEM 3 
 
 2.1 The Perspective Transformer 5 
 
 2.2 The Rotation and Translation Coefficient Generator ... 5 
 
 2.3 Cursor and Inverse Transformer 8 
 
 2.4 Programmed Storage 9 
 
 2.5 Observer Position Detector 9 
 
 2.6 The Laser Display 11 
 
 2.7 Physical Layout of the System 11 
 
 3. PERSPECTIVE TRANSFORMATION l4 
 
 4. SPECIFICATIONS AND BLOCK DIAGRAM OF PERSPECTIVE TRANSFORMER . 19 
 
 4.1 Specifications 19 
 
 4.2 The Overall System Description 20 
 
 5. SYSTEM DESIGN OF PERSPECTIVE TRANSFORMER 22 
 
 5.1 Digital to Analog Converters 22 
 
 5.2 Coordinate Transformer Unit 25 
 
 5.3 Scaling Unit 25 
 
 5.4 Windowing Unit 29 
 
 5.5 Perspective Generator Unit 32 
 
 5.6 System Control 35 
 
 6. ANALYSIS AND DESIGN OF HIGH SPEED ANALOG MULTIPLIER AND DIVIDER 
 FOR THE PERSPECTIVE TRANSFORMER 38 
 
 6.1 Analysis of the Multiplier Circuit 38 
 
 6.2 Circuit Description 45 
 
 6.3 Multiplier Scale Factor 47 
 
 6.4 Test Results 48 
 
 6.5 Analog Divider 48 
 
 7. DESIGN OF THE FAST ANALOG SWITCH 51 
 
 8. RESULTS AND CONCLUSION 57 
 
 8.1 Results 57 
 
 8.2 Conclusion . . 57 
 
 LIST OF REFERENCES 60 
 
 APPENDIX . . . 62 
 
 VITA 71 
 
V 
 
 LIST OF FIGURES 
 
 Figure Page 
 
 1. Block Diagram of STEREOMATRIX System k 
 
 2. Block Diagram of Rotation and Translation Generator . . 7 
 
 3. Block Diagrm of the Observer Position Detector .... 10 
 h. Layout of the Optics for Laser Display System 12 
 
 5. Physical Layout of the STEREOMATRIX 13 
 
 6. Formation of Stereoscopic Pair 15 
 
 7. Overall Block Diagram of Perspective Transformer ... 21 
 
 8. Fast D-A Converter 2h 
 
 9. Block Diagram of Coordinate Transformer Unit 26 
 
 10. Actual Diagram for One Coordinate Transformation ... 27 
 
 11. Resistance Characteristics of Vactec's Vactrol 
 
 Type VTL2C3 30 
 
 12. Schematic Diagram of Scaling Unit 31 
 
 13. Block Diagram of the Windowing Unit 33 
 
 Ik. Schematic Diagram of Windowing Unit 3^+ 
 
 15. Block Diagram of the Perspective Generator 36 
 
 16. Logic Diagram of System Control 37 
 
 17. Multiplier Circuit Model Diagram Uo 
 
 18. DC-20 MHz Four-Quadrant Multiplier k6 
 
 19. Output of Multiplier and Level Shifter U9 
 
 20. Analog Divider 50 
 
 21. Circuit Diagram of Fast Analog Switch for D-A Converter 52 
 
 22. Circuit Diagram of Analog Switch for Multiplexor ... 55 
 
 23. Analog Gate Switching Characteristics % 
 
 2k. Schematic of Perspective Transformer System 58 
 
1. INTRODUCTION ■ 
 
 In the last decade two-dimensional displays (CRT terminals) have been 
 accepted as an effective tool for better man-machine interaction^ . In these 
 systems the graphical information is input via a light pen or a tablet and 
 commands are invoked by either pointing at a light target displayed on the 
 screen or making an entry on a keyboard or a pushbutton device. 
 
 Many of the potential applications of these interactive displays may 
 be classified under the general heading of computer aided design or design 
 automation. Since the human observer is used to interacting with three- 
 dimensional surroundings and much of the data involved in these interactions 
 (sketches, drawings, diagrams, curves, etc.) are three-dimensional in nature, 
 scientists have continually stressed the need for a good three-dimensional 
 man-machine interface. The lack of such a device has forced users into an 
 unnatural compromise in data processing. For example, the three-dimensional 
 view of a building or a bridge is presented on a two-dimensional interface - 
 a cathode ray tube (CRT). A fighter pilot in training who operates in a three- 
 dimensional environment, would probably be happier if he could replace his 
 two-dimensional CRT display displaying combat maneuvers with an equivalent 
 three-dimensional man-machine interface. Furthermore, the displays on which 
 many kinds of information are currently being displayed are also limited 
 as to size and thus the number of observers who can efficiently use the dis- 
 play is also limited. Therefore, one may conclude that in order to provide 
 an efficient interaction between man and machine, it is highly desirable to 
 have an on-line, large screen, three-dimensional interactive display system. 
 The system at hand is an effort in this direction. 
 
There are many possible methods available for implementing three- 
 dimensional displays x ' ' ' '. However, under the real time and interactive 
 requirement of a 3-D man-machine system, our choice is limited to a stereo- 
 pair type of 3-D display. 
 
 In STEREOMATRIX the stereo-pair method of 3-D display has been 
 used in designing the first large screen on-line three-dimensional man-machine 
 interactive system for displaying computer generated transparent "wire-frame" 
 line drawings . 
 
2. THE STEREOMATRIX SYSTEM 
 
 The STEREOMATRIX system, proposed by Dr. W. J. Poppelbaum, is the 
 world's first large screen, real time, three-dimensional, interactive display 
 system which presents computer generated three-dimensional line figures. This 
 system has the capability of providing rotation, translation and scaling of 
 the displayed figure in virtual 3-D space. The perspective of the figure 
 changes as the observer moves about. The observer can interact with the 
 computer by identifying a point in the display volume or create his own draw- 
 ing with the help of a 3-D cursor and a joystick. The display volume is a 
 cube with 500 elements on a side. This system has the capability for displaying, 
 in 3-D, x, y, z analog signals obtained from the outside world or those from 
 a 3-D analog pattern generator. 
 
 The principle used for creating the 3-D illusion is that of the 
 stereoscopic pair. High speed hardware in the system generates the point seen 
 by the left eye and the right eye for each incoming triplet (x, y, z) obtained 
 from the computer. These two points are projected onto a rear-projection 
 screen by two laser beams which are orthogonally polarized. The observer's 
 left eye is constrained to see the left point, and his right eye is constrained 
 to see the right point by means of a pair of polarization analyzing glasses. 
 Thus, the observer perceives a single point formed at the intersections of the 
 extended lines where the image of a point seen by the right eye coincides with 
 the image of the same point seen by the left eye. 
 
 A block diagram of the STEREOMATRIX system is shown in Figure 1. The 
 basic components of this system are the perspective transformer, the rotation and 
 translation coefficient generator, the cursor and inverse transformer, the pro- 
 grammed storage, the observer position detector and the laser display. 
 
§e 
 
 UJ 
 
 o 
 
 X 
 
 UJ 
 
 
 h- 
 
 CO 
 
 lll 
 
 tr 
 
 n 
 
 UJ 
 
 
 > 
 
 z 
 
 cr 
 
 o 
 
 UJ 
 CO 
 
 h- 
 
 GO 
 
 co 
 
 O 
 
 o 
 
 
 Q- 
 
 I 
 
2.1 The Perspective Transformer 
 
 As the name implies, the transformer accepts at its input a graphic 
 element (x, y, z) and transforms the element into a stereoscopic pair, (X T , Y) and 
 (X_, Y). Due to the number of points required in the display and real time nature 
 of the system, the speed of transformation is very high. During rotation, trans- 
 lation and scaling, the perspective transformer operates on the input x, y, z 
 coordinates using the twelve linear transformation coefficients from the coef- 
 ficient generator, scales them and generates the stereoscopic pairs. It also 
 uses the observers X and Z position from the screen in changing the perspective. 
 During the input mode it multiplexes -in the cursor position and displays its 
 position in the 3-D space. In the interactive mode the perspective transformer 
 provides a transformed X, Y, Z signal in order to obtain a coincidence with the 
 cursor position so that the observer can store this point in the computer and 
 
 may attach some importance to this point for his design manipulations. 
 
 The perspective transformer also communicates with the computer. 
 It accepts the X, Y, Z triplets and signals back to the computer for a new 
 point after displaying the previous one. If the point exceeds the window 
 size, it does not send the intensity signal to the display but instead immedi- 
 ately signals the computer for a new point. 
 
 A detailed description of this unit will be given later. 
 
 2.2 The Rotation and Translation Coefficient Generator 
 
 The coefficient generator supplies the twelve elements of the rota- 
 tion and translation coefficient matrix to the perspective transformer. The 
 coefficient matrix can be represented as 
 
 t ll t 12 t l3 t lk 
 
 T = 
 
 t 21 t 22 t 23 t 2k 
 
 t 31 S2 t 33 Sh 
 
 j 
 
 (1.1) 
 
This matrix is not orthogonal due to terms t,, , t , and t , . Therefore, it 
 does not commute. This makes it necessary to store the previous matrix in order 
 to obtain the new one. Initially, all the diagonal elements (t,,, t . t ) 
 are one and the rest of the elements are zero. When the observer chooses 
 to rotate the figure in viewing space, this unity matrix is multiplied by the 
 appropriate operator matrix and the new matrix is stored back. That is, for 
 a X rotation of 9 degrees, this unit generates Zt ij from previous Ztij as: 
 
 t 11 t 12 t 13 t Ik 
 
 t 21 t 22 t 23 t 2k 
 
 t 31 t 32 t 33 t 3^ 
 
 10 
 Cose Sine 
 -Sine Cose 
 
 *u '12 \ 3 hh 
 
 t 21 t 22 t 23 t 2i+ 
 Si t 32 *33 V 
 
 . . . (1.2) 
 This unit rotates and translates the figure incrementally in order to achieve 
 a smooth rotation and translation. It is intended to rotate the figure by 
 0.2 degree per frame of the 3-D input picture. 
 
 A block diagram of this unit is given in Figure 2. The coefficients 
 are stored in twelve ten-bit registers, and the outputs of these registers 
 are connected to ten-bit D-A converters. The D-A converter outputs are sup- 
 plied to the perspective transformer. 
 
 The observer selects any desired operation by pressing a button on 
 the control box. For example, he may want to rotate the figure about the X axis 
 of the viewing space by a certain angle. For this case the coefficients 
 which correspond to X rotation (t , 1; , t , t^, t^, t , t and t ^) are 
 operated on by the multiplier and adder unit, and the new values corresponding to 
 the desired X rotation are written back into the storage registers. This process 
 
 
Ill 
 
 o 
 
 z 
 
 < 
 o 
 
 3 
 
 | 
 
 ITT 
 
 2 S S 
 
 LLL 
 
 -e- P 
 
 3 
 
 nr 
 
 m 
 
 nr 
 
 m 
 
 88 
 
 - s 
 
 gvi 
 
 i s 
 
 °2S- 
 
 
 ■9- -£■£-«• . 
 
 tttt T tt! ft! 
 
 O ly 
 K O K o 
 
 o 
 
 -p 
 
 CO 
 U 
 
 CD 
 
 sd 
 cu 
 
 G 
 
 O 
 •H 
 -P 
 
 cO 
 H 
 
 w 
 
 EH 
 
 d 
 
 CO 
 
 o 
 
 ■H 
 
 -P 
 CO 
 
 -P 
 O 
 
 « 
 
 O 
 
 I 
 
 bO 
 cO 
 ■H 
 
 Q 
 
 o 
 
 o 
 
 H 
 
 pq 
 
 OJ 
 
 CD 
 
 •H 
 
 *i 
 
 HI 
 
8 
 
 is performed incrementally. That is, an X rotation of 12 would be performed in 
 sixty frame periods, since during each frame the figure rotates by 0.2°. Pro- 
 vision is made for the observer to operate this unit in two modes, fast and 
 
 slow. 
 
 2.3 Cursor and Inverse Transformer 
 
 The cursor is a 3-D cross positioned in the display volume by means 
 of a joystick which generates a static voltage corresponding to its X, Y, Z 
 position in the viewing space. Thus, the cursor is an input medium for this 
 3-D man-machine interface similar to the light-pen in a 2-D system. 
 
 Since the cursor is generated in the viewing space coordinate system, 
 the X, Y, Z analog signals corresponding to the cursor's position must undergo 
 an inverse transformation in order to obtain the cursor position in computer j 
 space. The analog X<J , y Q , z q signal output of inverse transformer corresponds to 
 a point in the computer space for a corresponding X, Y, Z position of the 
 cursor in the viewing space. Therefore, in the input mode, the X, Y, Z signal 
 corresponding to the cursor position is fed into the inverse transformer. 
 The analog output of the inverse transformer is converted to a digital signal 
 and may be stored by the computer as input points . 
 
 In the command mode when the observer wants to identify a point in 
 the computer space for graphical manipulation, the inverse transformed cursor 
 position signal is compared with the input x, y, z from computer space. The j 
 coincidence of these two signals is identified as the required point. The 
 inverse transformer in implemented with inexpensive and slow analog devices. 
 However, this unit provides the facility of mapping precisely a point in vic- 
 ing space into computer space by using inexpensive and slow hardware in con- 
 junction with the precision of the forward transformer. 
 
9 
 
 2.k Programmed Storage 
 
 A PDPoVe computer is used to store the figure. An assembly language 
 software package is used to provide communication between the perspective 
 transformer and the computer. The computer processes the 3-D graphic program 
 and supplies each triplet (x, y, z) in the display volume to the perspective 
 transformer upon request. 
 
 The graphic information uses 10 bits for each coordinate along with 
 a ready signal. It also provides a frame pulse at the end of each frame 
 (i.e. complete generation) of the 3-D figure. The cursor sends inverse trans- 
 formed signals to the computer which are A/D-converted before processing. 
 2.5 Observer Position Detector 
 
 When a stationary object is viewed, the portion seen is directly 
 related to the observer's position with respect to it. As an example, a box 
 on the table when viewed from the front and slightly above it has its front 
 face and a portion of its top showing. If the observer moved to his left, 
 the perspective of the box would change with a portion of the left side coming 
 into his view. Observer movement to his right would allow him to see part 
 of the right side of the box. Thus, in order to provide a realistic 3-D 
 display to the observer in STEKEOMATRIX, the observer's position is continu- 
 ously monitored. The X and Z position of the observer are used by the per- 
 spective transformer to provide a realistic 3-D display. 
 
 A block diagram of this unit is given in Figure 3- It is basically 
 an infrared optical scanning system with shaft encoders which yield digital 
 sine and cosine values of shaft angle. This digital information is held in 
 registers and converted to analog form for computation of the observer's 
 coordinate for each display frame. 
 
JL 
 
 10 
 
 X 
 
 c ,9J 
 
 2 a 
 
 c — 
 
 o => 
 
 O 5 
 
 NJ 
 
 X 
 
 t 
 
 
 c * 
 
 o — 
 
 «- o. 
 
 ui - 
 
 c — 
 
 O 3 
 
 <~> 5 
 
 T 
 
 X 
 
 1 
 
 a> 
 
 < t 
 o <u 
 
 a I 
 
 a> 
 
 < r 
 o % 
 
 a § 
 o 
 
 
 
 
 CD 
 
 j: 
 
 5 
 ■n 
 
 
 o 
 
 o 
 
 
 SL 
 
 o 
 
 CO 
 
 CO 
 
 c 
 UJ 
 
 I 
 
 I 
 
 J 
 
 < t 
 o to 
 
 u 
 
 T 
 
 (!) 
 
 < t 
 
 °3 
 
 CO 
 
 X 
 
 
 
 
 (Li 
 
 2; 
 
 ■o 
 
 O 
 
 O 
 
 C" 
 
 (_> 
 
 (0 
 
 c 
 
 
 LU 
 
 
 
 w 
 
 CD 
 
 CD 
 
 
 to 
 
 r 
 
 o o 
 
 u 
 
 
 .c <-> 
 
 CJ 
 
 C) 
 
 <"£ 
 
 J 
 
 
 k. 
 
 ^_ 
 
 <L> 
 
 ^~ 
 
 T3 
 
 o 
 
 O 
 
 .c 
 
 O 
 
 (0 
 
 C 
 
 
 UJ 
 
 8 
 
 -p 
 o 
 
 CD 
 -P 
 
 <u 
 Q 
 
 c 
 o 
 
 •H 
 -P 
 ■H 
 CO 
 
 0) 
 
 > 
 
 cu 
 w 
 -Q 
 O 
 
 CO 
 O 
 
 faO 
 CO 
 •H 
 Q 
 
 o 
 o 
 
 CD 
 
 I 
 
 •H 
 
 
 a> 
 
 .c 
 
 CJ 
 
 o» 
 
 3 
 
 _J 
 
 o 
 
 CO 
 
11 
 
 2.6 The Laser Display 
 
 This unit projects stereoscopic pairs generated by the perspective 
 transformer on a 3 x h rear project screen. A one-watt argon laser at 
 51U5A is used as the light source. The laser beam is first intensity modulated 
 by an electro-optic modulator with the intensity signal of the input picture 
 and then it is vertically deflected by the Y signal of the sterescopic-pair . 
 
 Next, the beam is split into two beams. These two beams are polarized per- 
 pendicularly to each other and serve as the right eye and left eye image light 
 source. [The observer wears a pair of polarizing glasses in order to separate 
 the two images.] These two beams are horizontally deflected by the appropiate 
 X-signal. 
 
 The scanning is random and thus requires high speed deflectors with a 
 resolution of 500 points. State-of-the art ultrasonic deflectors have been 
 developed for this purpose. The analog deflection signal is used to frequency 
 modulate an ultrasound signal in a lead molybdate crystal which has been placed 
 in the path of the laser beam. The light is directed onto the crystal at 
 the Bragg angle. The ultrasonic signal has a central frequency of 120 MHz with 
 an 80 MHz bandwidth, figure h illustrates the layout of the optics for the 
 laser display system. 
 
 2.7 Physical Layout of the System 
 
 Figure 5 illustrates the physical layout of the STEREOMATRIX system. 
 All the electronic hardware for the perspective transformer and the coefficient 
 generator and cursor is housed in two cabinets. The observer position detector 
 hardware is mounted under the Display Screen desk. The two shaft encoders are 
 mounted on the either side of the top of the screen. The laser and its pro- 
 jection optics are behind the screen. The observer is allowed to move upto 
 10 feet away from the screen and 5 feet on either side of the center of the 
 screen. The screen lies on the coordinate axis of the display volume. 
 
-p 
 w 
 
 H 
 ft 
 W 
 
 •rH 
 
 o 
 
 h 
 <u 
 w 
 cd 
 
 1-3 
 
 U 
 
 a 
 
 w 
 o 
 
 •H 
 -P 
 
 43 
 
 -P 
 
 o 
 
 CO 
 h3 
 
 CO 
 
 •H 
 
13 
 
 Eh 
 
 W 
 EH 
 CO 
 
 (L) 
 
 -p 
 
 U 
 O 
 <H 
 
 -P 
 
 O 
 
 >> 
 
 o 
 •H 
 
 w 
 
 >s 
 
 CD 
 
 tiO 
 
11+ 
 
 3. PERSPECTIVE TRANSFORMATION 
 
 Generating a perspective image of three-dimensional information is 
 relatively easy. The formation of the stereoscopic pair is shown in Figure 6. 
 The image plane is Z - 0. The observer is at a distance (X , Y , Z ) from 
 the image plane: PL and PR constitute the stereoscopic pair formed for the 
 point P(x, y, z) in the display space. These points are the intersections 
 of the lines joining PL and PR to P with the image plane. The geometry is 
 elementry and one can write down the relation between the coordinates of the 
 stereoscopic pair and the point P(x, y, z) as: 
 
 X L = (X Q - a/2) ♦ _2-j (x - X ♦ a/2) . . . (3.1) 
 
 X 
 
 R 
 
 (x o + a / 2) + z~T7 (x " x o - a / 2) • ' • (3>2) 
 
 Y - Y o + z^Tl <* " V ^ 
 
 The above equations describe the relationship between a triplet 
 (x, y, z) and its stereoscopic pair. However, STEREOMATRIX has a built-in 
 facility for rotation, translation and scaling of the figure in the virtual 
 3-D space. Therefore, every point obtained from the computer undergoes the 
 following transformations before it is displayed as a stereoscopic pair: 
 
 Stereoscopic 
 Pair 
 
 = [Windowing] [Z Division] [Perspective] [Scaling] 
 
 or 
 
 X -WDPSTX. 
 out m 
 
 Rotation 
 and 
 Scaling 
 
 [x. 
 
 in" 
 
15 
 
 P(x,y,z ) 
 
 L(X ,%rZ ) 
 P L (X L ,Y,0) 
 
 R (Xqi ^2 »"Zo' 
 Pr(X r ,Y,0) 
 
 LEFT EYE RIGHT EYE 
 
 Figure 6. Formation of Stereoscopic Pair 
 
16 
 
 If we denote the elements of the rotation and translation matrix T as 
 
 '11 L 12 l 13 Ik 
 
 t. 
 
 T = 
 
 '21 22 23 24 
 
 t 
 
 31 
 
 
 *38 * 
 
 
 
 33 
 
 
 '3^ 
 
 1 
 
 and scaling matrix S as 
 
 s x 
 
 
 
 
 
 
 
 
 
 S Y 
 
 
 
 
 
 
 
 
 
 S 3 
 
 
 
 
 
 
 
 
 
 1 
 
 and writing the perspective matrix P, as 
 
 P = 
 
 z o 
 
 
 
 ^0 
 
 - 
 
 a/2) 
 
 
 
 z o 
 
 
 
 <*0 
 
 + 
 
 a/2) 
 
 
 
 
 
 z o 
 
 
 Y c 
 
 
 
 
 
 
 
 
 
 1 
 
 
 z 
 
 
 
 (3.5) 
 
 (3.6) 
 
 (3-7) 
 
 Then, by applying the rotation and translation operation to a point (x, y, z) 
 obtained from the computer we have : 
 
 r ' 
 
 X = '■ T 
 
 out 
 
 j 
 
 r i 
 x i 
 
 y 
 
 z 
 
 1 
 
 t i: x + t 12 y + t 13 z + t lk 
 
 t 21 X + t 22 y + t^z + t^ 
 
 t 31 X + t^y + t 33Z + t^ 
 1 
 
17 
 
 Then applying scaling, we have 
 
 X 
 
 out 
 
 s 
 
 X 
 
 
 
 
 
 
 
 
 
 s 
 y 
 
 
 
 
 
 
 
 
 
 s 
 
 z 
 
 
 
 
 
 
 
 
 
 1 
 
 hi x + \ 2 y + t 22 z + hk 
 
 *21* + *&? + t 22 Z + t 24 
 
 t 31 x + t^y + t 33 z + t^ 
 
 S x (t ll X + \& + \3 Z + V 
 S y (t 2L x + t^y + t^z + t^) 
 
 S z ( V X+ V + Ss 24 " V 
 
 applying P we have 
 
 out 
 
 
 
 Z, 
 
 (x Q - a/2; 
 
 (*n + a/2) 
 
 s y (t 21 x + t 22 y + t 23 z + t £4) 
 s z <V + V + *33 z + V 
 
 Z S x (t ll x+ \2 y+ h3 Z+ \0 + (X - a / 2) t S z (*3L X+ W * 
 z n s „ (t,.x+ t. y+t„z+ ■ t.,,) + (x n + a/2)[S„ (t„ x + t, y + 
 
 '0 x 11 12 13 l 1 * 
 
 z v 31 32' 
 
 t 33 z + t 3k n 
 
 Z S y (*a.* + V + *23 Z + W + Y S z (t 3 l X + V + V + 
 
 so 
 
 S z (t 31 X + V + V + V + Z < 
 
18 
 
 and dividing by z = S (t x + t ^y + t 2 + t , ) + Z and rearranging we obtain 
 the equation for the stereoscopic pair corresponding to the point (x, y, z) 
 including the rotation, the translation and the scaling operation as: 
 
 Z 
 X. = (X - a/2) + [S (t x + t v + 
 
 t Z + S z ( V + V + V + V ] 
 
 t 13 z + t^) " x + a/2] (3 * 8) 
 
 *H ' (X + a/2) + [Z Q + S 2 (t 3f+ V + t 33 z + t 34 ) ] ^ S x <*H* + *12T + 
 
 t 13 z + t li+ ) - X Q - a/2] (3.9) 
 
 7 
 
 Y ■ Y o + [z o , s z ( V A 3g y + t 33 z + v )] t s y <*a* + W + V + 
 
 tgu - Y ] (3 ' 10) I 
 
 Thus, in order to provide a stereoscopic on-line 3-D display, we need 
 electronics to implement the above equations 3-8, 3«9 an ^ 3«10. The perspective 
 transformer of STEREOMATRIX system implements the above equations to provide a 
 rrealistic 3-D display to the observer. 
 
19 
 
 k. SPECIFICATIONS AND BLOCK DIAGRAM OF PERSPECTIVE TRANSFORMER 
 
 k.l Specifications 
 
 Perspective transformer implements equations 3-9? 3-10 and 3»H of the 
 preceding chapter to provide a realistic 3-D display of computer generated trans- 
 parent wire drawings, as well as to provide other facilities for interaction 
 with the computer. These equations involve multiplication and division opera- 
 tions. However, the on-line feature of the system and the high resolution of dis- 
 play requires a high speed perspective transformation which is impossible to 
 achieve with a digital system. Hence, it was decided to build a high speed 
 analog system to implement the perspective transformation. 
 
 The PDP8/e software which provides the input to the system has the 
 capability of supplying x, y, z triplets at 2 usee intervals in the incremental 
 mode. The perspective transformer is faster since it has the capability of 
 processing a point every 1 usee. It was decided that the precision of the system 
 would be 10 bits digital and 20 volts analog. The digital input to the system 
 is in the sign and magnitude form. The X-Y axis of the display volume coin- 
 cides with the X-Y axis of the projection screen. The origin is shifted behind 
 the screen along the Z axis of the screen so as to allow the figure to have 
 both positive and negative Z values. This choice facilitates in the writing 
 of the software for the input picture. The coefficient generator has both 
 positive and negative coefficients, and thus provides all coefficients in the 
 range of -10V to +10V through its D-A converter. The observer position signals 
 corresponds to one volt per foot and therefore the X signal of observer's 
 position is in the range of -5V to +5V whereas the Z position signal is in the 
 range -10V to 0V. The cursor inputs to the system are in the range of -10V to 
 +10V. 
 
20 
 
 U.2 The Overall System Description 
 
 An overall block diagram of the perspective transformer is given in 
 
 Figure 7. The triplet (x, y, z) and the intensity signal (w) are received from 
 
 the PDP8/e computer located in another room via line drivers and converted into 
 
 a binary level by the line receivers at the input of the perspective transformer. 
 
 These are then converted into an analog level by the fast D-A converters of 
 
 the perspective transformer. 
 
 These analog signals are operated on with the twelve rotation and 
 
 translation coefficients by the coordinate transformer. This unit produces the 
 
 transformed triplets (x^ ^ ij. The analog converted triplets (x, y, z) are 
 
 also multiplexed with the (inverse transformed) cursor signal before it is fed 
 
 into the coordinate transformer. Therefore, the cursor signal also undergoes 
 
 the same amount of rotation as the incoming triplets the result of which is 
 
 to leave it properly located in viewing space. The transformed triplets 
 
 f x v z ) are scaled if the observer wishes to scale the figure and they 
 
 ^ t' ^t' V 
 
 are then sent to the windowing unit. 
 
 The windowing unit compares each incoming triplet (x fl , y fl , z fl ) with 
 the size of the window. The triplets which are within the window space are sent 
 to the perspective generator, and those outside are rejected. When a point 
 outside the window is received, this unit does not gate the intensity signal to 
 the laser and instead signals the computer for a new point. 
 
 Thus, the points which are in the window space are sent to the per- 
 
 1 ! ' 
 
 spective generator. This unit operates on the incoming triplets (x, y, z ) 
 
 from the windowing unit and uses the observer's position signal (x Q , y Q , z Q , 
 
 to produce a stereoscopic pair (3^, X^ Y). These stereoscopic rair signals 
 are fed to the deflectors of laser display system. 
 
21 
 
 
 
 
 
 ill 
 
 
 
 
 
 8ft 
 
 
 
 
 r.o s , 
 
 -3 O V) 
 
 
 
 
 *T*T>" 
 
 
 ftt 
 
 
 
 !1 
 
 Is 
 
 
 
 *5, 
 5 ci 
 
 -o V— ft 
 
 
 
 *5 
 
 
 _ o 
 
 
 w • 
 
 
 g; 
 
 
 II 
 
 -O \ k 
 
 MI ' 
 
 £<* 
 
 
 M 
 
 
 &£ 
 
 
 
 
 
 
 . '1 ♦. * 
 
 
 
 
 
 X 
 
 >» 
 
 M 
 
 
 
 
 
 
 
 
 
 
 
 >. 
 
 
 
 
 9 
 C 
 
 
 . 
 
 R 2 
 
 
 
 
 
 
 
 
 i *. 
 
 
 
 c — 
 
 
 
 
 
 
 t> c 
 
 
 
 
 o •= 
 
 
 
 •s o 
 
 
 
 
 I 5 
 
 
 
 M 
 
 
 
 
 ■si 
 
 
 " 1 
 
 ; 
 
 
 
 
 
 
 «•< 
 
 t »' 
 
 i «' 
 
 1 
 
 
 
 
 X 
 
 >> 
 
 N 
 
 
 k. 
 
 o 
 
 
 
 
 
 
 
 
 
 
 
 
 o 
 
 ^. 
 
 
 
 o> 
 
 
 a> 
 
 01 
 
 
 
 c „_ 
 
 
 c 
 
 a 
 
 
 
 1 ^ 
 
 o 3 
 
 
 a> 
 O 
 
 k» 
 1- 
 
 
 
 C/) 
 
 L„.. 
 
 
 icient 
 isity 
 
 s 
 
 a> 
 
 z 
 
 
 
 i ^j 
 
 i jn 
 
 
 
 
 X 
 
 >Z 
 
 N 
 
 
 
 7i Coeff 
 Intei 
 
 o 
 
 O 
 
 a> 
 
 
 r 
 
 
 
 
 oc ._ 
 
 
 O 3 
 
 
 c o 
 
 
 . o 
 
 » 
 
 V) a. ( 
 
 
 f "5 
 
 
 
 a> 
 o 
 
 3 H 
 
 X / 
 
 
 Coo 
 Tran 
 
 
 - 
 
 o 
 
 CL 
 
 o 
 
 
 
 
 
 
 
 * 
 o 
 
 
 — . 
 
 k J 
 
 L J 
 
 I 
 
 
 
 
 
 
 
 
 
 ■D 
 
 
 
 
 
 
 
 
 C 
 
 
 
 X 
 
 >» 
 
 N 
 
 * 
 
 
 5? 
 
 
 
 k. 
 
 
 o 
 
 
 
 4> 
 
 
 "5 
 
 
 
 < r 
 
 
 o 
 
 
 
 i a> 
 
 
 ^_ 
 
 
 
 Q c 
 
 
 J*) 
 
 
 
 o 
 
 
 Q. 
 
 
 
 O 
 
 
 
 
 / 
 
 / 
 
 
 ■, / 
 
 V 
 
 
 
 a> 
 
 
 
 
 <_ o 
 
 
 
 
 
 3 o 
 
 
 
 
 
 a. t 
 
 
 
 
 
 w 
 
 c a> 
 
 
 
 
 
 
 
 M 
 
 
 
 
 " 
 
 .. / 
 
 v / 
 
 ... t 
 
 s 
 
 
 
 
 
 1 
 
 t 
 
 
 
 
 
 
 
 
 A 
 
 X >n N > 
 
 
 
 0) 
 
 E.r 
 
 V^, 
 
 
 hi 
 
 a> 
 
 
 / 
 
 
 
 
 
 
 
 S E 
 
 a. 
 
 
 
 U- **> 
 
 E 
 
 
 
 *^ o 
 
 o 
 
 
 
 °.° 
 
 (_> 
 
 
 
 c 
 
 E 
 
 
 
 L 
 
 J 
 
 
 
 
 o 
 
 
 
 
 
 
 
 
 0. 
 Q 
 
 3 
 O 
 X 
 
 CD 
 
 o 
 
 ra 
 
 CO 
 
 EH 
 
 CD 
 > 
 •H 
 -P 
 
 O 
 (L) 
 ft 
 M 
 
 a, 
 o 
 
 CO 
 
 •H 
 
 Q 
 
 o 
 o 
 
 H 
 
 rH 
 H 
 
 CO 
 Ih 
 
 0) 
 
 > 
 o 
 
 0) 
 
 bO 
 
 •H 
 p4 
 
22 
 5. SYSTEM DESIGN OF PERSPECTIVE TRANSFORMER 
 
 From the overall block diagram of the system (Figure 7), we can list 
 the various subunits of the perspective transformer as; 
 
 1. D-A Converters 
 
 2. Coordinate transformer unit 
 
 3. Scaling unit 
 h. Windowing unit 
 
 5. Perspective generator unit 
 
 6. System control 
 
 We will consider the detail design considerations for each unit and their 
 
 actual implementation. 
 
 5. 1 Digital to Analog Converters 
 
 The inputs to the D-A converters are straight binary with the most 
 significant bit being the sign bit. The main criteria in designing the D-A 
 converter is the accuracy and conversion speed. Accuracy of +1/2 LSB and 
 settling time of less than a micro-second was the main consideration in choos- 
 ing the organization for D-A converters. 
 
 ( f\ i \ 
 Different method of D-A conversion were studied . Digital-to 
 
 analog converters consist essentially of two parts: the actual decoding unit 
 
 which is usually a high-output- impedance low current device and a high gain 
 
 summing amplifier with low output impedance. 
 
 There are two types of decoding networks commonly found in fast 
 
 D-A converters: the weighted resistor network and the ladder network. However, 
 
 from the accuracy point of view ladder network is superior for the following 
 
 reasons: The ladder network has a more uniform current distribution and all 
 
23 
 
 switches can be designed for approximately the same current: For example, 
 
 9 
 in a 10-bit weighted resistor network the bit currents vary as 2 :1 or 512:1, 
 
 while in a ladder network the bit current vary by less than 14:1. The ladder 
 
 networks smaller variation in current eases the switch design and can improve 
 
 switching accuracy. Finally, an n-bit ladder network uses only two values 
 
 of precision resistors; an n-bit weighted resistor network, n different values, 
 
 The second important criterion of the D-A converter is the decoding 
 speed. If the logic waveforms controlling the decoder are assumed perfect 
 with no delay between switching edges, the the ladder network introduces some 
 delay due to wiring capacitance between each resistor junction point. This 
 is overcome by using a thin-film monolithic ladder network and designing a 
 very fast analog switch. 
 
 For the above reasons a ladder-type R-2R network decoder is chosen 
 over the weighted resistor type. A fast single pole double throw switch which 
 can switch a +10V reference signal is used for switching. 
 
 Figure 8 shows the actual arrangement for the D-A converter. Double 
 rank registers are used to store the digital information in order to avoid 
 any transition noise going to the analog switches. Edge triggered flip-flops 
 (type SN7^107) are used for reliability. The outputs of the line receivers 
 are loaded first into the lower rank of the register and then its contents 
 are transferred into the upper rank. The sign bit flip-flop is used to switch 
 the proper polarity of the reference signal. That is, if the sign bit is one, 
 then the -10V reference is switched, otherwise the +10V is switched. A high 
 speed single-pole double-throw type of analog switch is used to switch the 
 appropriate bits of the R-2R ladder. 
 
2k 
 
 Figure 8. Fast D-A Converter 
 
25 
 
 From the accuracy and speed point of view the R-2R ladder of R = 10K 
 is used. Allen-Bradley thin-film R-2R ladder networks are used. These ladders 
 are noninductive (risetime less than 100 nsecs), possess small size and have 
 excellent temperature coefficient tracking. 
 
 In order to maintain the accuracy of 0.1 percent and the settling 
 time of 250 nsecs, data device corporation high performance fast settling 
 inverting amplifiers (type FS-23) are used. These amplifiers settled to 0.2% 
 in 100 nsecs and have a slew rate of 1000V/usec . The D-A converter is con- 
 structed on three standard size cards. 
 
 5. 2 Coordinate Transformer Unit 
 
 The transformed triplets (x , y , z ) are formed from the analog 
 signal of the triplets (x, y, z) and the twelve rotation and translation 
 coefficients. Thus, this part of the system implements following equations: 
 
 x t = \l x + \& + V + hk 
 
 y t = t 2L x + t 22 y + t 23 z + t 2h 
 
 z t = Si x + ^2 y + S2 Z + V 
 
 A block diagram of this unit is given in Figure 9* High speed analog multi- 
 pliers and high speed inverting operational amplifiers are used to obtain the 
 coordinate transformation. Figure 10 shows the multipler and operational 
 amplifier connections for one of the coordinates. All three analog multipliers 
 and operational amplifiers are laid down on one standard size card. Thus, 
 this unit has three such cards. 
 
 5.3 Scaling Unit 
 
 This provides the observer with a control over the size of the figure 
 in the display. Since this is a facility provided to the observer, the hardware 
 
26 
 
 n 
 
 -P 
 
 •H 
 
 a 
 
 s 
 o 
 
 <H 
 
 w 
 
 G 
 ctf 
 
 Jh 
 
 a; 
 
 -P 
 
 G 
 •H 
 
 O 
 o 
 o 
 
 o 
 
 vS 
 
 ■H 
 
 Q 
 CJ 
 
 o 
 
 H 
 
 pq 
 
 
 ■H 
 in 
 
 LU 
 
 
 u 
 
 
 < 
 
 
 
 
 (E 
 
 Z 
 
 Ui 
 
 o 
 
 
 K 
 
 
27 
 
 Q 
 
 UJ 
 
 _J 
 < 
 
 o 
 
 Q 
 LU 
 
 QC 
 O 
 U. 
 CO 
 
 z 
 < 
 
 g 
 o 
 
 •H 
 •P 
 
 O 
 
 Ch 
 w 
 G 
 3 
 
 0) 
 
 ■P 
 
 a 
 a 
 
 •H 
 
 o 
 o 
 o 
 
 
 G 
 
 o 
 
 u 
 
 o 
 
 •H 
 
 Q 
 
 H 
 
 -P 
 o 
 
 O 
 H 
 
 •H 
 
28 
 
 which performs this operation must be capable of operating from the observer's 
 control box. It was decided that the figure can easily be magnified or demagni- 
 fied by controlling the gain of the summer operational amplifier of the 
 coordinate transformer unit. 
 
 Conventional methods of controlling the gain of an operational 
 amplifier cannot be used because the operation is to be performed from a 
 remote distance. Digital control of gain of the operational amplifier cannot 
 be used because this method requires a dual input operationa amplifier ' 
 whereas high speed and fast settling operational amplifier are available only 
 in the inverting mode. A FET transistor to control the operational amplifier 
 gain cannot be used because of the capacitance associated with the FET tran- 
 sistor effects the frequency response of the operational amplifier 
 In addition, they also produce an offset voltage at the output of operational 
 amplifier . 
 
 The use of a solid-state electro-optic device for gain control over- 
 comes all of the above difficulties. The simple circuit discussed here 
 remotely controls the gain of the operational amplifier without limiting the 
 frequency response or the input signal amplitude. The device (called a 
 'Raysistor') is a four terminal solid-state device which combines a reliable 
 miniature incandescent light source and a cadmium sulfide photocell assembled 
 within a hermetically sealed transistor case. The resistance of the raysistor 
 varies nonlinearly with the control voltage and thus a linearizing circuit 
 is needed. Moreover, the control resistance changes with the vibration. The 
 Raytheon CK1116 was used for this circuit. All the disadvantages of Raysistor 
 were overcome by using another solid-state electro-optical device sold by 
 the name of 'Vactrols ' . This device has a solid state light source instead of 
 
29 
 
 the incandescent lamp in the Raysistor. The resistance of Vactrols varies 
 almost linearly with the control voltage. The typical resistance character- 
 istics of Vactec's Vactrol type VTL2C3 is shown in Figure 11. 
 
 Figure 12 shows the scheme for scaling using the Vactrol. A nine 
 bit up/down counter's output is converted to an analog voltage. This voltage 
 is used to control current in the light-emitting diode of the Vactrols. 
 Photo-cells in these vactrols are connected across the feedback resistor of 
 the operational amplifiers. 
 
 When the D-A converter voltage is zero, there is no current in the 
 LED, and the resistance of Vactrol is very high. When the observer wants to 
 scale down the space, he selects the scaling mode and pushes the negative switch 
 on this control box. This causes the counter to go up by one count for each 
 frame of input figure. Thus, the output of D-A converter goes positive and 
 current in the LED increases which causes its resistance to decrease which in 
 turn reduces the value of feedback resistor in the operational amplifier thus 
 reducing its gain. Logic is provided in the circuit to stop the counter when 
 it reaches its maximum value for negative scaling and at its minimum value for 
 positive scaling. 
 
 The Vactrols are mounted on the coefficient transformer board, and 
 the remaining logic is wired on three standard size cards. The change in 
 figure size is very smooth. 
 5.h Windowing Unit 
 
 The windowing unit in the system serves two purposes. First, it 
 prevents the analog circuits of the system from saturating, and second it pro- 
 hibits the perspective generator from operating on a point which is outside 
 the window space. 
 
30 
 
 IU 
 
 
 «V- 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 8 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 4 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 2 
 
 |io 5 
 
 1 8 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 A%1 
 
 
 
 
 
 
 
 
 
 
 
 W 6 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 KkV 
 
 
 
 
 
 
 
 
 
 
 < 4 
 
 
 
 
 
 
 K\ 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 TO 
 
 
 
 
 
 
 
 
 
 
 UJ 
 
 tt: 2 
 
 3 
 
 £10 4 
 
 O 8 
 
 
 
 
 
 
 \ 
 
 ^v 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 \ 
 
 <8 
 
 fc 
 
 ^ 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 i%rk'll 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 6 
 
 
 
 
 
 
 
 
 
 VM1 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 A 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 2 
 
 in 3 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 \ 
 
 
 
 
 
 
 
 
 
 
 
 I 
 
 I> 
 
 
 'I 
 
 1 
 
 
 
 > 
 
 4 
 
 
 6 1 
 
 s ; 
 
 > 
 
 4 
 
 
 6 1 
 
 r : 
 
 ► 
 
 4 
 
 
 6 8 
 
 1.0 
 
 10.0 
 
 100 
 
 INPUT CURRENT - MILLIAMPERES 
 
31 
 
 DC 
 O 
 
 K 
 
 o 
 
 f- 
 
 p . 
 
 !2 <l 
 V) s 
 u < 
 K 
 
 iP 1 
 
 a. 
 
 x o 
 
 R ft 
 
 u 
 
 O -. 
 
 s* 
 
 2n 
 
 A A AAA A 
 
 2 
 
 o 
 
 to 
 
 o 
 
 •H 
 
 Q 
 
 a 
 
 a 
 
 CO 
 
 CvJ 
 H 
 
 bO 
 •H 
 
32 
 
 The window space corresponds to +10 volts in all three coordinate 
 axis. Therefore, this unit tests the incoming transformed and scaled triplet 
 with +10V and if the triplet signal exceeds the window limit in any axis, 
 it requests from the computer a new point. Moreover, it also disables the 
 windowing analog gate thus disconnecting the input to the perspective gener- 
 ator unit. Figure 13 gives the block diagram of the windowing unit. 
 
 It is clear from the block diagram of this unit that we need a 
 fast bipolar analog comparator which gives a signal when the input exceeds 
 the positive or negative reference value. An integrated analog comparator 
 (type 1*710) has been modified to serve this purpose. One of the limitations 
 of fi.710 is that the differential input should not exceed 5 volts. This has 
 been circumvented in the circuit designed for the bipolar comparator for this 
 unit. Figure Ik gives the complete diagram of the windowing unit. This cir- 
 cuit has three bipolar analog comparator, one each for x, y, z signal. When- 
 ever any of the signals exceeds the window limitation, we get a signal which is 
 used to disable the analog gate between the scaling unit and the perspective 
 generator. This signal is also used in the system control to generate a 
 request for a new point. The entire windowing scheme is laid out on one stan- 
 dard size card. 
 5. 5 Perspective Generator Unit 
 
 This unit generates the sterescopic pair using the transformed and 
 
 windowed triplets (x , y , z ) and the observer's position (X^, Y . zJ) . 
 
 v s s s s 
 
 Therefore, this unit implements the following equation using high speed analog 
 computing circuits : 
 
33 
 
 I DOM 
 SCAl INC. UNIT 
 
 ; — 
 
 TO INPUT INTERFACE 
 POINT IS OUT OP 
 WINDOW SPACE, COPY* 
 NEW COORDINATE 
 
 , GREATER THAN 
 
 ANALOG 
 COMPARATOR 
 
 LESS THAN 
 
 GREATER THAN 
 
 ANALOG 
 COMPARATOR 
 
 LESS THAN 
 
 'ANALOG^ 
 GATE 
 
 GREATER THAN 
 
 ANALOG 
 
 COMPARATOR 
 
 LESS THAN 
 
 ^ANALOG 
 GATE 
 
 "°*TI 
 
 -° yi«« 
 
 ^Z T1 
 
 ♦ ft 
 
 -»1 
 
 ^ J 
 
 TO PERSPECTIVE 
 GENERATOR 
 
 INTENSITY TO LASER 
 DISPLAY SYSTEM 
 
 Figure 13. Block Diagram of the Windowing Unit 
 
3h 
 
 
 8 
 
 a 
 
 •H 
 S 
 
 •H 
 
 3 
 
 k 
 
 M 
 
 rt 
 
 o 
 
 •H 
 
 o 
 
 02 
 
 H 
 03 
 
 g 
 
 M 
 
 P>4 
 
 se 
 
35 
 
 z o 
 
 x l ■ (x o - a / 2) + rfr K - x o + a / 2) 
 
 s 
 
 2 
 
 x r " (x o + a / 2) + 27TT" < x s " x o - a / 2 > 
 
 s 
 
 Z 
 
 Y = Y + (v - Y ) 
 
 Z. + z u s V 
 s 
 
 A block diagram of the implementation of these equations is given in Figure 15. 
 
 This unit uses three fast analog multipliers and one divider and several 
 
 summers to generate the sterescopic pairs. 
 
 5.6 System Control 
 
 This unit provides the handshaking signal between the PDP8 e and 
 STEREOMATRIX as well as the signal needed for transferring information into 
 the D/A converters and generating the intensity control signal. 
 
 Figure 16 shows the logic diagram of this unit. After receiving 
 the PDPSe ready signal from the computer, this control transfers the first 
 triplet (x, y, z) into the lower rank of the D/A storage registers and then 
 into the upper rank. Then, the control waits for 7 u-secs before it turns on 
 the intensity gate because of aperture time of ultra-sonic deflectors. After 
 that it signals the computer for a new point. It also provides the multi- 
 plexing signal for the cursor multiplexor and the frame pulse to the other 
 units of STEREOMATRIX. 
 
36 
 
 2 
 uj £ 
 
 2£ 
 
 cr 
 
 if) o 
 
 a p 
 
 uj 
 
 > UJ 
 
 cr h- 
 
 UJ uj 
 
 o z 
 o t 
 
 ce 1/5 
 
 ^ o 
 
 a 
 
 U 
 
 o 
 -p 
 
 > 
 
 •H 
 -P 
 O 
 
 <D 
 
 P< 
 w 
 
 fH 
 
 0) 
 PM 
 
 (U 
 X! 
 
 -P 
 
 en 
 O 
 
 5h 
 bO 
 cC 
 ■H 
 
 Q 
 
 J*! 
 
 o 
 o 
 
 iH 
 oq 
 
 •H 
 
 Z 
 
 si 
 
 O ± 
 
 F * 
 u. o 
 
 a 
 
37 
 
 o 
 
 -P 
 O 
 
 o 
 
 -p 
 w 
 
 >> 
 
 GO 
 
 o 
 
 in 
 M 
 cti 
 
 •H 
 
 Q 
 
 O 
 •H 
 
 O 
 
 VO 
 
 01 
 
 u 
 
 •H 
 
 (O oj 
 
 O V) V) 
 
38 
 
 6. ANALYSIS AND DESIGN OF THE HIGH SPEED ANALOG MULTIPLIER AMD 
 DIVIDER FOR THE PERSPECTIVE TRANSFORMER 
 
 It is obvious from the diagrams of the preceding chapter that we 
 need a high speed analog multiplier for the coefficient transformation and 
 perspective generation. Multipliers with a full output frequency response 
 of 10MHz are required for the system. The cost of commercially available 
 10MHz multipliers is very high. Therefore, it was decided to design a high 
 speed multiplier for this system. 
 
 During this process various methods of analog multiplication were 
 studied ' , The speed requirement can only be met by the trans- 
 
 conductance type of multiplier. However, the available circuits for linear 
 transconductance multipliers could only be used in integrated 
 version i . Therefore, a new linear transconductance multi- 
 
 plier circuit was developed. This chapter deals with the analysis and design 
 of this circuit. 
 6.1 Analysis of the Multiplier Circuit 
 
 The following is an approximate analysis of a new circuit for an 
 analog multiplier which can linearly multiply two voltages to produce a pro- 
 duct with linearity approaching 0.1$. The operation of the circuit is 
 unusual in the sense that it responds linearly to either of two inputs x or y, 
 yet it provides a product, xy, as a result of nonlinear processing of both 
 x and y. In the analysis which follows, we will derive equations which show 
 that the signal distortion and error arise primarily from the effects of 
 voltage offset between the various devices used in the multiplier. 
 
39 
 
 The circuit model configuration for the multiplier is shown in 
 Figure 17 where it has been assumed that all the transistors are identical 
 and have small voltage offset generators in series with each of their 
 emitters. Other than these voltage offset generators the devices are assumed 
 to be perfectly matched and behave according to the ideal Ebers-Moll model. 
 We assume that the lower differential amplifiers have been sufficiently 
 linearized by the emitter resistors, R^. Thus, we can write 
 
 V - (I + x)R + (I - x)R^ + V =0 
 X v ' E ' E x 
 
 V X 
 X = RE (1) 
 
 Therefore, we see that the currents I + x and I - x are linearly dependent 
 
 on the input voltage V . 
 
 x 
 
 We will consider, therefore, only the current transfer from the 
 
 collectors of the multiplier outputs. That is, we want to calculate the 
 
 (17) 
 ratio I /xy. We begin by writing the Ebers-Moll expressions v ,; relating 
 out' 
 
 the collector currents and the base emitter potentials as shown below. (lb 
 is assumed that leakage currents can be ignored and a's are absorbed into 
 constant a^. In the analysis e ^ corresponds to exp (^).) 
 
 h = a n e k¥ 
 
 I - a e SL23 
 3 11 k.T 
 
 h - hi ^ C6.D 
 
Uo 
 
 u 
 
 bD 
 c6 
 
 0) 
 O 
 
 -P 
 •H 
 
 O 
 
 Jh 
 •H 
 O 
 
 V 
 
 •rH 
 
 H 
 ft 
 •H 
 ■P 
 
 rH 
 
 s 
 
 & 
 
 hJD 
 •H 
 
kl 
 
 These expressions can be simplified by dividing some currents by others as 
 follows : 
 
 I 
 
 x l(cp x - cp 2 ) 
 - = e r-= 
 
 We also note that 
 
 I 2 
 
 1 3 q ^3 " V 
 
 r k = e *t 
 
 h + X 2 - z o + x 
 
 y • *! - V + ^02 + ^2 = ° 
 
 y - \ - %k + % 3 + ^3 = ° 
 
 Simplifying Equation (6.3) we get: 
 
 
 1 + V 1 ! 
 
 2-r+i^ 
 
 i Io " x 
 
 3 "" 1 + I,,/I 
 
 V"3 
 
 x o - x 
 
 >* " i + ijAi, 
 
 From Equation (6.^+) we get 
 
 cp x - cp 2 = y - cp Q1 + cp Q2 
 
 (6. 2 ; 
 
 (6.3) 
 
 (6.V 
 
 (6.5 
 
h2 
 
 q qy -q \ 
 
 e ^ (cp x - cp 2 ) = e - e - (cp Q1 - cp Q2) = - 
 
 q -qy q i 2 
 
 and e - (cp 2 - cp^ = e — e - (cp Q1 - cp Q2 ) = - 
 
 Similarly: (cp^ - cp ) _■ (y - cp Qi+ + cp ) 
 
 q qy -q \ 
 
 e - (r Pi+ - q) 3 ) = e - e - (cp^ - cp^) = - 
 
 -q -qy q i. 
 
 e S (cp 4 " cp 3 ) = e — e - (cp Ql+ - cp^) = ^ . . . (6.6) 
 Substituting the above values into Equation (6.5) we get 
 
 l -, -qy q / \ 
 
 1 + e KT 8 i^T (c P l - V 
 
 I.. 
 
 1 + e i e § Cq> 01 " cp Q2 ) 
 
 I - x 
 
 I. = • • • (6.7) 
 
 1 + e s e a <<& - V 
 
 4 " . -qy q / 
 
 1 + e Tt e M ( 'V " ^03' 
 
 The multiplier output currents can now be obtained by noting: 
 
 H =I 1 + I 3 (6 . 8) 
 
 which produces 
 
^3 
 
 J o + x . z o ~ x 
 
 °^ = 1 + -=g e |- (cp Q1 - cp 2 ) 1 + egeg(cp ,-cp 03 ) »'» 
 
 i out = x o + x T o " x (6.10) 
 
 OU 2 1 + e i e S (( P 1 - V X + e ll e kT Kk ~ %1 ] 
 Now assuming the offsets are small compared with KT/q, we can simplify the 
 offset terms as follows : 
 
 S fe (C P 1 - CP 2 ) = X + fe ( V " V + •'• = (1 + £ 1 } 
 
 e 
 
 q 
 
 (<Pnk - ^q) = 1 + h (^n), - <PnJ + ..-=(!+€, 
 
 H ( V ■ CP 2 ) = X " fe (CP 01 " CP 2 ) + •'• = (1 " £ 1 } 
 
 kT ^Ok ^03 y " kT ^Ok ^ •*' " ' "2' 
 
 a (cp oi ■ cp 2 ) = x " fe 
 
 6 M { %h ~ %3 ] = X " kT (C P 4 " %3 ] + '" = (1 ' G 2 } 
 Then we have Equations (6.9) and (6. 10) as: 
 
 (6.11) 
 
 ■»*x i + .=gd + 6l ) i + .ga- £a : 
 
 I + x I - x 
 
 x 0_ . j. _ 
 
 (6.12) 
 
 ™2 l + e±g(l-T ei ) l + eg(l + e 2 ) 
 
 kT 
 Now preconditioning one of the input_ such that y < — , then we can expand 
 
 e — ^~; k (l + -^-) which gives output currents as: 
 
 z ^0 + x) z o - x 
 
 outl l + (l-g)(l + €1 ) 'l + (l + g)(l- € ) 
 
 x x o + x . x o - x 
 
 (6.13) 
 
 "° Ut 2 l+(l + g)(l- 6 ) l+(l-g)(l + e2 ) 
 
1+1* 
 
 Now combining the output current terms to produce differential output current 
 
 AI =1.-1. 
 
 out out out 
 
 AI 
 
 z o + x 
 
 < J o - x) 
 
 ll+ U + g)(l " £ 
 
 l + d-g)(l + € s 
 
 
 
 (I - x) 
 
 1 + (1 
 
 qy 
 
 *)d + ei ) i + d*g)(i-« 2 : 
 
 AI 
 
 out 2 
 
 I o + x 
 
 qy 
 
 l + 
 
 i - X 
 o 
 
 ay 
 
 Jqy 
 
 i( 1 + __)f i _^_ - -^ (i _ ^ 
 
 kT 2 v kT ; J l2kT 2 V kT ; J 
 
 / 
 
 I o + 
 
 to £, qy 1 j 
 
 ISS - T (1 " a } J x + l 
 
 (I - «) 
 
 qy 
 
 >kT 
 
 e qy 
 
 ~ (1 + —) 
 
 2 v kT 
 
 assuming e , e very much smaller than one and y^ is also smaller than one, 
 1 2 Kl 
 
 then above expression can be simplified to the form 
 
 AI 
 
 q (e l - € 2 } ( £ l + e 2 } 
 
 out „ - - xy + - i o + x 
 
 (6.14) 
 
 
This is the general expression for the differential output current including the 
 error terms which arise from the presence of voltage offsets. Hence, we see that 
 the differential output current is a sum of a product term, a constant offset 
 and a linear error in terms of x. As an example of the effects of these error 
 terms, consider first the case when x is a constant, C . Then the output 
 contains only terms in y or constants as below: 
 
 <lC (e., - ej e, + e 
 
 Thus, we generally expect to see a first harmonic error term in x when y is 
 held constant. We do not expect to see any harmonics in the case where y is 
 constant and x is applied alone. 
 
 However, in the ideal situation, when the voltage offsets are all 
 zero (cp = cp = cp = cp Q K ~ 0), then e = € = and Equation (6.1 i +) reduces 
 to 
 
 AI out , = ^xy (6.16) 
 
 Therefore, if the offsets are ignored and if transistors are designed to 
 follow the ideal Ebers-Moll expression; we can expect nearly ideal multiplica- 
 tion to result. 
 6.2 Circuit Description 
 
 Figure 18 is the complete circuit of the multiplier with the level 
 shifting output stage. An RCA transistor array tupe CA305^ is used to imple- 
 ment the multiplier circuit. These arrays consist of two independent differ- 
 ential amplifiers with an associated constant current transistor on a common 
 
U6 
 
 
 ft 
 
 I 
 
 •P 
 
 a 
 
 crt 
 
 4 
 
 o 
 
 En 
 
 O 
 
 I 
 o 
 
 X) 
 H 
 
 •H 
 En 
 
 s/ 
 
 
 
4 7 
 
 monolithic substrate package. Therefore, they exhibit very good temperature 
 tracking and matching. All the transistors are matched, have low l/f noise 
 and a value of f. in excess of 300 MHz. The constant current transistors of 
 these differential amplifiers are used as the linear differential amplifier 
 in the multiplier mode. 
 
 Another linear transistor array (type CA3046) is also used in the 
 circuit. Parameters of the transistors in this array are similar to those 
 of the CA3054. Two of the transistors in this array are used as constant 
 current sources for the multiplier. It is necessary to d. c. bias the lower 
 differential pair to prevent it from saturating for positive inputs because 
 the emitter junctions of the upper differential amplifiers are at nearly 
 ground potential. 
 
 The output level-shifting scheme uses the remaining transistors 
 of the CA3046 array. In this circuit the upper transistors are connected in 
 a Darlington connection so as to offer a high input impedance and a low 
 output impedance. This also provides a unit voltage transfer ratio between 
 its base and emitter. The lower transistor is operated as a constant cur- 
 rent sources. In the quiscent state of the circuit, we can adjust the cur- 
 rent source output so that the output of level shifter is zero. Since the 
 current source has a very high output impedance, most of the voltage at the 
 emitter of emitter follower appears at the output of level-shifter. 
 6.3 Multiplier Scale Factor 
 
 From Equation (6.16) we can write the output voltage at one end of 
 the differential amplifier as : 
 
hQ 
 
 AV ° Ut l = " 2kT Xy R L (6 * 17) 
 
 1 v x 
 
 We also have in the circuit x «s -r =- (for V = +10V). 
 
 3 R £ X - 
 
 AV q V y 
 
 out l = - 2M 3R^ * \ ( 6 - l8 > 
 
 kT 
 Now in order to satisfy the requirement that y < — , we adjust the trimpot such 
 
 that y = —jj Vy (for V = + 10V) (6.19) 
 
 o T 
 putting this value in Equation (6.18); (at 25 C — = 26 mv) 
 
 AV 12 R L 
 
 out = -x r W i 
 
 2 x 26 x 10 ° x 10 x 3 X y R^ 
 
 In the actual circuit R s= Ik, R = 1.5k and 
 
 L E 
 
 12 V V 
 23k V x V y ~ 200 
 
 G.k Test Results 
 
 AV out vy ^JL (6 . 20 ; 
 
 The photographs of Figure 19 show the output of the multiplier and 
 level shifter. The x and y inputs to the multiplier were +10V pulses at 
 1 MHz rate. The temperature stability of the circuit is satisfactory. 
 6.5 Analog Divider 
 
 Perspective generator requires a divider for the Z division. Figure 
 20 shows the circuit of the divider using the above multiplier. In this cir- 
 cuit the multiplier is used in the feedback loop of a fast inverting operational 
 amplifier. The only limitation in this method is that the denominator has 
 to be negative and greater than one to prevent saturation of the operational 
 amplifier. This limitation does not put a limit on the perspective generator 
 because the observer's position is always on the negative Z axis. 
 
h 9 
 
 Output of the Multiplier with X and Y Input of +10V Pulses, 
 
 and Horizontal 20 nsec/cm 
 
 Vertical 0.2V/cm 
 
 Output of the Multiplier at the Level Shifter. Vertical 0.2V/cm and 
 
 Horizontal 20 nsec/cm 
 
 Figure 19 
 Output of Multiplier and Level Shifter 
 
50 
 
 \£ 
 
 
 
 ■H 
 > 
 •H 
 
 Q 
 
 M 
 O 
 
 O 
 CM 
 
 •H 
 
 (in 
 
 ^ 
 
51 
 
 7- DESIGN OF THE FAST ANALOG SWITCH 
 
 The perspective transformer requires several fast analog switches 
 for the D-A converters, the multiplexing of the cursor and the windowing. 
 
 We decided to design an analog switch, which works upto 5 MHz and can switch 
 
 (19) 
 a +10V signal. Various methods of switching analog signals were studied 
 
 Use of bipolar transistors as switches was given up due to the complexity 
 
 of the circuits, the larger offsets, and the necessity of matched transistors. 
 
 The field effect transistor analog switch is considered best due to 
 
 its lower ON resistance, essentially zero offset, high speed and simple cir- 
 
 (20. 21) 
 cuit configuration ^ { The n-channel junction FET is preferred to the 
 
 MOS FET for analog switching because of its low ON resistance, and freedom 
 from r Dg modulation by the analog voltage. A driver circuit is necessary 
 to provide level shifting and FET gate isolation for the ON and OFF conditions. 
 The driver output must isolate the FET gate during the ON condition for a 
 range of analog voltages as great as +10V while at the same time, to allow the 
 OFF condition, it must hold the gate more negative than the peak negative analog 
 signal plus the magnitude of FET pinch-off voltages. Also, the driver input 
 should be compatible with TTL logic output levels. 
 
 The circuit of Figure 21 fulfills all the requirements of the driver 
 and switch functions. The standard diode drive technique is used to turn the 
 switch ON and OFF. A Siliconis JFET (type 2Nk)93) is used. This has a pinch- 
 off voltage of -2 volts. Anti saturating circuits are used to prevent the 
 2N3905 and 2N390^ from saturating. When the analog gate control input is low, 
 the 2N3905 is off, and its collector voltage is -15V. At this time the isolation 
 
52 
 
 i! 
 
 s 
 
 m 
 
 
 OH 
 
 
 
 
 
 > 
 
 6 
 
 ?3 
 
 ow 
 
 6 
 
 > 
 
 > 
 
 u. 
 
 a. 
 
 8 
 
 -vw- 
 
 i(r-\* 
 
 u. 
 o.. 
 
 f 
 
 8^ J5 
 
 «4 
 
 4— VW- 
 GS 
 
 8 
 
 N 
 
 iH" 
 
 d 
 
 o 
 m 
 
 N 
 
 t 
 
 0) 
 
 -p 
 h 
 
 > 
 
 c 
 o 
 
 < 
 
 I 
 
 o 
 
 o 
 
 -p 
 
 •H 
 ? 
 
 co 
 
 bO 
 O 
 H 
 
 a 
 
 -p 
 
 w 
 
 h 
 
 O 
 
 •H 
 
 o 
 
 o 
 
 •H 
 O 
 
 H 
 OJ 
 
 bO 
 En 
 
 Q. 
 
 ui 3 
 
 o b£«- 
 
 g°9: 
 
53 
 
 diode D is forward biased, and the FET gate diode is reverse biased. The 
 
 FET leakage current I (OFF) maintains a slight forward current in D and 
 
 the gate is clamped near -15V. Thus, the pinch-off voltage is exceeded for 
 
 any source voltage more positive than -10V (maximum negative voltage to be 
 
 switched) and the switch is OFF. The gate to source capacitance is thus 
 
 charged to +15V + V . 
 
 s 
 
 The positive transient at the collector of the 2N3905 (i.e. when it 
 starts turning ON) reverse biases the diode D , and the transient then appears 
 
 c i 
 
 at the gate reduced by the capacitive division factor - — -— ; — . Therefore, 
 
 1 gs 
 it is necessary that the voltage change at gate fully discharge C or the 
 
 gate will not turn ON. Consequently, C must be large with respect to C 
 
 1 gs 
 
 to permit a change equal to (15V + V ) <; 25V. Alternately, D must have 
 
 leakage current capable of charging C within a very short time after the 
 
 transient. 
 
 At the time when the 2N3905 has fully turned ON and its collector is 
 
 at +15V, D, is reverse biased and the gate-to-channel junction is forward 
 
 biased by the D leakage current. Then the gate is decoupled, V = or 
 1 Gs 
 
 slightly positive, and the switch is ON for d-c voltages of +10V. 
 
 When the 2N3905 drive transistor tries to turn off (i.e. at the 
 negative transient) D again becomes forward biased. This decouples the trans- 
 ients to the gate of the JFET, and the switch is turned OFF when the gate 
 becomes more negative than the source by the value of pinch-off voltage of 
 JFET. 
 
 Another switch across the output of JFET performs the complemented 
 function to the series JFET. Therefore, it insures that the output of gate 
 is grounded when the switch is OFF. 
 
Th 
 
 54 
 
 e value of C. in the circuit is determined for the 2N4093 JFET. 
 
 It has C =10 pf. Therefore, in order to switch +10V with +15 volts drive, 
 gs 
 
 C must charge to 25 volts so that V__ = for an input of +10V. Since the 
 gs ub 
 
 input drive swing is 30V, C is allowed to charge to 5V. To solve for C we 
 
 have : 
 
 AVC, = AVC 
 1 gs 
 
 5 x C - 25 C 
 
 1 gs 
 
 C. = 5 C 
 1 gs 
 
 Since C =10 pf, C, > 50 pf. Since the diode has some capacitance, the 
 gs 1 
 
 available value of ^3 pf was chosen for use in the circuit. 
 
 One of the advantages of using a capacitive or diode drive is that 
 
 for any source voltage, it maintains the gate to source voltage equal to zero 
 
 (i.e. V =0). If we look at the ON resistance versus gate to source voltage 
 ^ gs 
 
 characteristics of the JFET, we will notice that the ON resistance is mini- 
 mum for zero gate to source voltage. Therefore, we always get a constant and 
 minimum ON resistance for the switch even for different input voltages. This 
 also produces the same switching times for different input levels. 
 
 In the analog multiplexor the shunt switch is not used and the capaci- 
 tive drive had to be changed so as to avoid clipping of the a-c signal. 
 Figure 22 shows the complete switch for the analog-multiplexor. 
 
 These switches were tested upto 6.6 MHz for satisfactory operation. 
 The photographs of Figure 23 show the switching times of the gate. 
 
55 
 
 3 
 O 
 
 o 
 
 3 
 
 < 
 Z 
 
 < 
 
 o. 
 m 
 
 ro 
 
 o> 
 
 Z 
 
 1-AA/V— I 
 
 > 
 
 = *2 
 +i 
 
 o 
 o 
 
 _l 
 < 
 
 z 
 < 
 
 B 
 
 0) 
 
 H 
 
 ft 
 
 •H 
 
 s 
 
 o 
 
 -p 
 
 o 
 
 o 
 
 U 
 
 •H 
 
 ■H 
 O 
 
 (M 
 CV| 
 
 bO 
 •H 
 
56 
 
 Input and Output of Analog SWITCH HORIZONTAL 20 nsec/div and Vertical 2 V/div 
 
 Input and Output of Analog Switch for Control Signal Rate of 6.6 MHz (Horizontal 
 
 50 nsec/div, Vertical 5V/div) 
 
 Figure 23 
 Analog Gate Switching Characteristics 
 
57 
 8. RESULTS AND CONCLUSION 
 
 1,1 Results 
 
 Figure 2^4- gives the complete schematic of the perspective transformer. 
 The x, y, z analog inputs were obtained with the three-dimensional analog 
 pattern generator (PAGAN) used as the input to the system. The stereoscopic 
 pairs generated by the system are displayed on two CRTs. We could see perspec- 
 tive of the patterns changing with the observer's movement. We also see rota- 
 tion and translation of the figure as commanded by the observer from his 
 control box. We have been able to align the optics of the laser display to 
 project one of the pairs on the screen. Therefore, all the goals outlined 
 for perspective transformer have been met. 
 8. 2 Conclusion 
 
 Analog circuitry has been commonly used in display applications, 
 where speed is not a major factor. Building a high speed analog perspective 
 transformer has illustrated the feasiblity of using high speed analog cir- 
 cuitry in a display application where speed is more important than accuracy. 
 In fact great accuracy could not be appreciated by the observer. 
 
 The system is passively interactive in that the observer's position 
 is monitored, and the perspective of the view is corrected for his particular 
 viewing location. Thus the perspective transformer provides not just a static 
 stereo but a dynamically corrected stereo view. 
 
 Since the observer is to be allowed to move about over any reasonable 
 area (10 ft. x 10 ft.), this made it necessary to construct the system with a 
 large screen. This necessitates, of course, a laser light source and a 
 sophisticated deflection system. All of the components of the laser display 
 
58 
 
 3 8 
 
 3 5 
 
 s 
 
 0) 
 -P 
 
 w 
 
 >> 
 
 CO 
 
 a; 
 
 a 
 c 
 
 o 
 w 
 
 in 
 
 En 
 
 0) 
 
 > 
 
 •H 
 
 ■p 
 
 V 
 
 ft 
 
 w 
 
 (U 
 Pn 
 
 o 
 o 
 
 •H 
 
 -p 
 
 s 
 
 0) 
 
 o 
 
 CO 
 
 C\J 
 0) 
 
 3 
 
 •H 
 
 in«N03 >■ «0a 
 
59 
 
 have been procured, and soon it will be possible to see a 3-D display. The 
 perspective transformer has been tested to work at the input rate of 5 MHz 
 with input supplied by a pulse generator. It can display all the pattern 
 generated by PAGAN which are generated at 1 MHz rate. There has been no 
 noticeable distortion of PAGAN'S patterns after being transformed by the per- 
 spective transformer at this input rate. This insures that the system main- 
 tains the required accuracy for a good display. Thus, all of the goals outlined 
 at the beginning of this thesis have been met. There are two additions which 
 would enhance the purpose of STEREOMATRIX which can be added as another phase 
 of the research project: 
 
 a) The window size in the system is fixed. However, it would be nice 
 
 to have the window size change with the observer's position. The implementation 
 of this is somewhat complicated and is thus left as a future addition. 
 
 b) During scaling the picture is simply magnified or demagnified and thus 
 the number of points in the display remains the same. Therefore, after magnifi- 
 cation the points in the picture will be sparsely located and some degradation 
 of the resolution of the picture may be noticed. It would be also helpful to 
 have a line generator in order to fill up the space between two points during 
 magnification. 
 
 To summarize, this effort in building the interactive large screen 
 3-D display for computer generated transparent "wire" drawings will be defi- 
 nitely a milestone in providing a better man-machine interface. It is not too 
 difficult to imagine that in the not-too-distant future an architect will be 
 able to put his own imagination into a reality, a mathematician may see solutions 
 to three-dimensional partial differential equations, and an air traffic controller 
 may see the three-dimensional position of an aircraft in the vicinity of an air- 
 port. 
 
60 
 
 LIST OF REFERENCES 
 
 (1) Lewin, Morton H, "An Introduction to Computer Graphic Terminals", 
 
 Proceedings of the IEEE . Vol. 55, No. 9, pp. 154I+-52, 
 September 1967- 
 
 (2) Tilton, H. B., "Stereoscopic CRT Displays", Design News , Vol. 20, 
 
 No. 26, December 22, 1965, pp. 88-96. 
 
 (3) Wolvin, John, "Analyph Stereoscopic CRT Display System", National 
 
 Symbosium on Information Display Technical Proceedings, I967. 
 
 (k) Rawson, E. G. , "Vibrating Varifocal Mirrors for 3-D Imaging", IEEE 
 Spectrum , September 1969? PP- 37-^3 • 
 
 (5) Sutherland, Ivan E., "A Head Mounted Three-Dimensional Display", 
 
 Proceedings of the Fall Joint Computer Conference, 1968. 
 
 (6) Schmid, Hermann, "An Electronic Design Practical Guide to D-A Conversion", 
 
 Electronic Design , October 2k, 1968, pp. ^9-88. 
 
 (7) Pearman, C. R. and Popodi, A. E., "How to Design High Speed D-A Con- 
 
 Converters", Electronics , February 21, 1964, pp. 28-32. 
 
 (8) Sedra, A., and Smith, K. C, "Simple Digital Controlled Variable Gain 
 
 Linear d-C-Amplifier", Electronic Engineering , March 1969' 
 
 (9) New, F. D., "Voltage Controls Solid-State Non-linear Resistance", 
 
 Electronics , February h, I96U. 
 
 (10) Bilotti, A., "Operation of MOS Transistor as a Variable Resistor", 
 
 Proceedings of IEEE, August 1966, pp. 1093-109^. 
 
 (11) Newinixe, L. J., "FET Ride Operational Amplifier Gain, Minimizes Offsets 
 
 Voltages", Electro-Technology , March 197 0, P- 31- 
 
 (12) Bilotti, A. and Pepper, R. S., "A Monolithic Limiter and Balanced Dis- 
 
 criminator for FM and TV Receivers", IEEE Transactions on 
 Broadcast and Television Receivers , Vol. 3TR-13, pp. 5^-65 , 
 November 1967. 
 
 (13) Bilotti, A., "FM Detection Using Product Detector", Proceedings of the 
 
 IEEE , Vol. 56, pp. 755-757, April I968. 
 
 (lit) EEE Special Survey, "Packaged Analog Multipliers", EEE, November 1968. 
 
 (15) Gilbert, B., "A New Wide-Band Amplifier Technique", IEEE Journal of 
 Solid State Circuits, Vol. SC-3, December 1968, pp. 353-365. 
 
61 
 
 (16) Gilbert, B., "A Precise Four -Quadrant Multiplier with Subnanosecond 
 
 Response", IEEE Journal of Solid State Circuits, Vol. SC-3, 
 December 1968, pp. 365-373- 
 
 (17) Renschler, E. L. , "Theory and Application of a Linear Four -Quadrant 
 
 Multiplier", EEE, May I969, pp. 6O-67. 
 
 (18) Thornton, R. D. and others, "Multistage Transistor Circuits", Semiconductor 
 
 Electronic Education Committee, Vol. 5, John Wiley and Sons, 
 New York, I965. 
 
 (19) Hoeschle, David F., "Analog-to-Digital, Digital-to-Analog Conversion 
 
 Techniques", Wiley, New York, 1968. 
 
 (20) Wolleson, Donald L. , "Analog Switching - High Speed with JFET's", 
 
 EDN, January 15, 1970, pp. 38- kO. 
 
 (21) Kvamme, E. F. "Analog Switching - High Complexity with MOS", EDN 
 
 January 15, 1970, pp. 33-37- 
 
62 
 
 APPENDIX 
 
 PICTURES OF 
 PERSPECTIVE TRANSFORMER CARDS 
 
63 
 
 D-A Register Card 
 
6k 
 
 Six Fast D-A Switch Card 
 
65 
 
 D-A Five Fast Switches, Ladder and Operational Amplifier Card 
 
66 
 
 Analog Multiplexor Card 
 

 67 
 
 
 Coordinate Transformer Card 
 
68 
 
 Z Division Card 
 
69 
 
 Stereo Generator Card 
 
70 
 
 Summer Card 
 
71 
 
 VITA 
 
 Shiv Prakash Verma was born in Tikamgarh, India on May 22, 19^2. 
 He graduated from Government Intermediate College, Panna, India in 1958. 
 In 196^, he received his B. E. (Hons ) in Tele -Communication Engineering from 
 the University of Jabalpur, India. He completed M. Tech in Electrical 
 Engineering from the Indian Institute of Technology, Bombay, India in 1966. 
 He joined the Hardware Research Group of the computer section at Tata Institute 
 of Fundamental Research in November 1965. In September 1966, he joined 
 the Electrical Engineering faculty of H. B. Technical Institute, Kampur, 
 India. In June 1968, he joined the Circuit and Hardware Systems Research 
 Group of the Department of Computer Science, University of Illinois under 
 Professor W. J. Poppelbaum to work toward a Ph.D. degree. He has held a 
 joint appointment with the Department of Computer Science and Department of 
 Psychology since January 1971- 
 
Form AEC-427 
 
 (6/68) 
 
 AECM 3201 
 
 U.S. ATOMIC ENERGY COMMISSION 
 
 UNIVERSITY-TYPE CONTRACTOR'S RECOMMENDATION FOR 
 
 DISPOSITION OF SCIENTIFIC AND TECHNICAL DOCUMENT 
 
 ( See Instructions on FCvtrte Side ) 
 
 1. AEC REPORT NO. 
 
 coo 1I469-0210 
 
 2. TITLE 
 
 PERSPECTIVE TRANSFORMER FOR THE STEREOMATRIX 3-D 
 DISPLAY SYSTEM 
 
 3. TYPE OF DOCUMENT (Check one): 
 
 E a. Scientific and technical report 
 
 I I b. Conference paper not to be published in a journal: 
 
 Title of conference 
 
 Date of conference 
 
 Exact location of conference. 
 
 Sponsoring organization 
 
 □ c. Other (Specify) 
 
 4. RECOMMENDED ANNOUNCEMENT AND DISTRIBUTION (Check one): 
 
 5c1 a. AEC's normal announcement and distribution procedures may be followed. 
 ~\ b. Make available only within AEC and to AEC contractors and other U.S. Government agencies and their contractors. 
 3) c. Make no announcement or distribution. 
 
 5. REASON FOR RECOMMENDED RESTRICTIONS: 
 
 6. SUBMITTED BY: NAME AND POSITION (Please print or type) 
 
 Shiv Prakash Verma 
 Research Assistant 
 
 Organization 
 
 Department of Computer Science 
 University of Illinois 
 Urbana, Illinois 61801 
 
 Signature 
 
 **/, c/j r^y/tUs^c:*,-, 
 
 Date 
 
 October, 1972 
 
 FOR AEC USE ONLY 
 
 7. AEC CONTRACT ADMINISTRATOR'S COMMENTS. IF ANY. ON ABOVE ANNOUNCEMENT AND DISTRIBUTION 
 RECOMMENDATION: 
 
 PATENT CLEARANCE: 
 
 I I a. AEC patent clearance has been granted by responsible AEC patent group. 
 I 1 b. Report has been sent to responsible AEC patent group for clearance. 
 I 1 c. Patent clearance not required. 
 

 BIBLIOGRAPHIC DATA 
 SHEET 
 
 1. Report No. 
 
 UIUCDCS-R-72-532 
 
 3. Recipient's Accession No. 
 
 5. Report Date 
 
 October, 1972 
 
 PERSPECTIVE TRANSFORMER FOR THE STEREOMATRIX 3-D 
 DISPLAY SYSTEM 
 
 7. Author(s) 
 
 Shiv Prakash Verma 
 
 8- Performing Organization Rept. 
 No. 
 
 9. Performing Organization Name and Address 
 
 Department of Electrical Engineering 
 University of Illinois 
 Urbana, Illinois 61801 
 
 10. Project/Task/Work Unit No. 
 
 11. Contract /Grant No. 
 
 46-26-15-301 
 
 12. Sponsoring Organization Name and Address 
 
 US AEC Chicago Operations Office 
 98OO South Cass Avenue 
 Argonne, Illinois 60^39 
 
 13. Type of Report & Period 
 Covered 
 
 Thesis research 
 
 14. 
 
 15. Supplementary Notes 
 
 16. Abstracts 
 
 STEREOMATRIX is a large screen interactive 3-D display system which presents 
 computer-generated transparent "wire-frame" drawings stereoscopically. A 
 3-D cross called the cursor can be moved around in the viewing space by the 
 observer by means of a joystick. This feature allows the observer to select 
 a point in the viewing space for graphic manipulation and relay it to the 
 computer space. He can also use the joystick to draw pictures in the 3-D 
 viewing space The perspective of the figure changes with observer movement 
 in such a way that the figure appears to be stationary in space. 
 
 17. Key Words and Document Analysis. 17a. Descriptors 
 
 Stereomatrix 
 
 7b. Identifiers/Open-Ended Terms 
 
 7c. COSATI Field/Group 
 
 8. Availability Statement 
 
 19.. Security Class (This 
 Report) 
 
 UNCLASSIFIED 
 
 20. Security Class (This 
 
 Page 
 UNCLASSIFIED 
 
 21. No. of Pages 
 
 77 
 
 22. Price 
 
 ORM NTIS-35 ( 10-70) 
 
 USCOMM-DC 40329-P7 1 
 
s ep 
 
 '% 
 

 > 
 

 UNIVeMITYOf 
 
 ILUNOirUK"***! 
 
 ■■■■ 
 
 ■ 
 
 ■ ■ 
 
 
 m 
 
 Ha 
 
 
 si 
 
 ■ 
 
 Ural 
 
 ■ 
 
 HH 
 
 
 mm m 
 
 SHU fflB bH 
 
 91 Ml 
 
 ■I 
 
 ■MEMO KM 
 
 nm 
 
 ■■1 Sl*Jij 
 
 ■^^ 
 
 
 
 
 Ban wMm