UNIVERSITY OF 
 
 ILLINOIS LIBRARY 
 
 AT URBMA-CHAMPu^. 
 
r 
 
 <— > / 
 
 r JX*r 
 
 /now 
 
 UIUCDCS-R-79-976 
 
 UILU-ENG 79 1723 
 
 A STUDY OF DATA MANIPULATION ALGORITHMS IN 
 MAGNETIC BUBBLE MEMORIES 
 
 by 
 
 KIN-MAN CHUNG 
 
 June 1979 
 
A STUDY OF DATA MANIPULATION ALGORITHMS IN 
 MAGNETIC BUBBLE MEMORIES 
 
 BY 
 
 KIN-MAN CHUNG 
 
 A.B. University of California, 1971 
 M.A. State University of New York, 1973 
 
 THESIS 
 
 Submitted in partial fulfillment of the requirements 
 
 for the degree of Doctor of Philosophy in Computer Science 
 
 in the Graduate College of the 
 
 University of Illinois at Urbana-Champaign, 1979 
 
 Urbana, Illinois 
 
Digitized by the Internet Archive 
 in 2013 
 
 http://archive.org/details/studyofdatamanip976chun 
 
Ill 
 
 ACKNOWLEDGMENT 
 
 I wish to express my sincere thanks to my advisor 
 Professor C. L. Liu for his guidance and encouragement during 
 the course of study at the university. I wish to thank Dr. 
 C. K. Wong of IBM Coporation, whose interest and enthusiasm in 
 this subject has greatly shaped the development of this 
 thesis. Thanks also to Dr. F. Luccio of University of Pisa 
 for several stimulating conversation. 
 
 I also wish to thank IBM Watson Research Center for 
 the finacial support during my stay at Yorktown Heights in 
 Summer 1978, where part of the thesis was initiated. 
 
 Lastly, I wish to thank my wife Mei for her 
 unfailing understanding and support, in ways more than one. 
 
IV 
 
 TABLE OF CONTENTS 
 
 Page 
 
 1. INTRODUCTION 1 
 
 2. BACKGROUND 5 
 
 3. PERMUTATION 22 
 
 3.1 Basic Model 24 
 
 3.2 Model 3.1 26 
 
 3.3 Separation Algorithm 33 
 
 3.4 Model 3.2 37 
 
 3.5 Model 3.3 44 
 
 3.6 Model 3.4 49 
 
 3.7 Summary and Conclusion 55 
 
 4. SORTING 5 8 
 
 4.1 Basic Model 59 
 
 4.2 Model 4.1 62 
 
 4.3 Model 4.2 66 
 
 4.4 Bitonic Sorting 68 
 
 4.5 Model 4.3 71 
 
 4.6 Model 4.4 84 
 
 4.7 Summary and Conclusion 92 
 
 5. TREE STORAGE SCHEME 95 
 
 5.1 Physical Model 97 
 
 5.2 The Switch 97 
 
 5.3 Storage of Data 99 
 
 5.4 First Ordering Scheme of Loops 104 
 
 5.5 Movement of Records in the Memory Structure . . 106 
 
 5.6 Searching 116 
 
 5.7 Insertion of Records 120 
 
 5.8 Deletion of Records 123 
 
 5.9 Tree Structured Memories with Simpler Control . 124 
 
 5.10 Tree Searching 133 
 
 5.11 Unloading, Loading, Insertion and Deletion 
 
 of Records 136 
 
 5.12 Conclusion 139 
 
 REFERENCES 141 
 
 VITA 143 
 
CHAPTER 
 
 INTRODUCTION 
 
 The last few years have seen great advances in 
 magnetic bubble technologies [1,2], Due to its high 
 density, low cost and high reliability, magnetic bubble 
 memories are expected to replace conventional mass storage 
 devices (such as disks and tapes) used in a majority of 
 applications. It is of course possible that they be used 
 to simulate magnetic disks, so that the change to the 
 existing software as well as hardware would be minimal. 
 Early design indeed reflected such use [2] . But to do so 
 would not fully utilize the powers of the bubble memories. 
 Ey arranging the bubbles into loops, and by using special 
 switches that permit control of the passage of the 
 bubbles, the bubble memories can have a lot more 
 intelligence than the conventional magnetic devices. It 
 is now possible to perform operations that are 
 conventionally done by the CPU in the bubble memories. 
 
Operations, such as data rearrangement, data sorting etc. 
 can now be done in the bubble memories, thus relieving the 
 CPU for other more useful processing. 
 
 The main purpose of this thesis is to study data 
 manipulation operations in bubble memories within the 
 domain of algorithms. New bubble memory structures are 
 explored and the corresponding algorithms designed and 
 analysed. Three aspects in the management of data are 
 studied in details: data rearrangement, sorting, and 
 information retrieval and update. Algorithms connected 
 with these operations have of course been studied 
 extensively in the existing literature. But since the 
 data access and routing mechanisms in the bubble memories 
 differ from the way data are fetched and stored in random 
 access memories, conventional algorithms cannot be applied 
 directly to the bubble memories. Moreover, conventional 
 algorithms usually use the number of comparisons as the 
 unit of measure for their complexity, whereas in bubble 
 memories, a more appropiate unit of measure would be the 
 time it takes to move the records around. Therefore there 
 is a need for studying new algorithms. 
 
 Of course, in designing bubble memory structures 
 and their corresponding data manipulation algorithms, the 
 time complexity is hardly the only important factor. 
 There are physical constraints that must also be 
 
considered. We distinguish three important parameters 
 that should be taken into consideration: 
 
 (1) Number of switches in bubble memories. 
 
 (2) Number of control states needed to carry out the 
 operations. 
 
 (3) The time the operations take. 
 
 It is desirable to limit the number of switches 
 in bubble memories, since they take up space, and too many 
 of them would decrease the amount of usable space for 
 storing information. It is also desirable to limit the 
 number of control lines (and hence number of control 
 states) required, since physically there is a limit to the 
 number of pins one can have on a chip. The time it takes 
 to perform the operations is of course affected by the 
 choice of these two numbers, i.e. there is a trade-off 
 among these three parameters. 
 
 All the results presented in this thesis are of 
 course equally applicable to other shift register 
 memories. The physical constraints imposed on bubble 
 memories are usually more stringent than any other shift 
 register memories. For instance, bubble memories usually 
 require that all bubbles be circulating at the same speed 
 and that loops must be physical realizable in a 
 two-dimensional plane. Such physical constraints make the 
 design of efficient algorithms more difficult. 
 
In Chapter 2 basic models for magnetic bubble 
 memories are described and some of the previous work in 
 this area briefly surveyed. Chapter 3 studies the problem 
 of rearranging records within the bubble memories. An 
 algorithm for permuting data in a memory using only one 
 switch is described and analysed in details. Some other 
 memory structures are also presented, demonstrating the 
 trade-offs among the three parameters. In Chapter 4, 
 sorting in the bubble memories is studied. To enable real 
 sorting be done within the memories, a new kind of switch 
 is introduced. Such switches not only can route bubble 
 streams, but can also do so according to their contents, 
 i.e. they can also do comparisons. The problem of 
 trade-offs among the three parameters are again studied. 
 In Chapter 5 , we turn to another important aspect in data 
 management: that of storing , retrieving and updating 
 records in a tree storage scheme. Vie propose two memory 
 structures for storing records in the form of binary 
 trees, and show how the records can be retrieved and 
 updated efficiently. 
 
CHAPTER 2 
 
 BACKGROUND 
 
 We present now a basic model for magnetic bubble 
 memories. We shall not describe the hardware of the 
 magnetic bubble devices in details. We shall only give a 
 conceptual model of bubble memories that we shall use for 
 the rest of the thesis. We shall also discuss briefly 
 some previous work that is related to our interests. 
 
 The most primitive bubble memory can be 
 visualized as bubbles circulating around a loop (Figure 
 2.1a). Each bubble is used to represent a bit of 
 information. Depending upon the Permalloy patterns that 
 are used to guide the bubbles, bubbles can be made to 
 circulate in a clockwise or counter-clockwise direction by 
 the application of an external rotating field (in addition 
 to the constant biased field which keeps the bubble 
 stable) . In some bubble memories, the bubbles can also be 
 
detector 
 
 generator J replicator/annihilator 
 
 (a) 
 
 access port 
 
 -4 •-•- 
 
 (b) 
 
 Figure 2.1. Simplified Views of Bubble Memories 
 
circulated in the other direction by reversing the 
 direction of the rotating field. 
 
 Bubbles can be created, annihilated, and deleted 
 by the use of special gates. Bubbles can be introduced 
 into the loop by the use of a generator; they can be 
 destroyed or duplicated by the use of a replicator/ 
 annihilator, and can be detected by a detector. In 
 general the input operation involves the use of the 
 generator while the non-destructive read operations 
 involves the replicator/annihilator and the detector. 
 Since these gates are usually physical close to one 
 another, we would group them together into what we would 
 conceptually call "access ports" or "read/write ports" 
 (Figure 2.1b). It is through these ports that data can be 
 read from or written into the bubble memories. 
 
 A buble memory with a single loop is essentially 
 a simple shift register memory. The average time to 
 access a bit in a memory of n bits is n/2 propagate steps 
 (the time to move a bubble from one place to the next) . 
 It can be reduced to n/4 if bidirectional circulation of 
 the bubbles in the loop is allowed. 
 
 To reduce the access time, a major/minor loop 
 organization of the bubble memory was introduced [3,4]. 
 In this scheme (Figure 2.2), a set of minor loops of equal 
 
size are connected to a major loop that is used for 
 communication. Through the action of tranfer gates, bits 
 of information, one from each minor loops, can be 
 transferred from the minor loops to the major loop in 
 parallel and then be shifted serially to the access port. 
 The average bit access time for an n bit memory is then 
 improved to /n. 
 
 Beausoleil, Brown and Phelps [5], and Bonyhard 
 and Nelson [6] independently proposed a new bubble 
 structure that allows two modes of operation, as shown in 
 Figure 2.3. This memory shall be referred to as Model 
 2.1. Here a node in the graph denotes a record. 
 Operation (a) is the usual bubble propagation operation 
 that cyclically moves the bubbles forwards. In operation 
 (b) , the direction of propagation is reversed, and the 
 bubble at the access port is also bypassed. 
 
 With the added second mode of operation, the 
 average access time can be improved by implementing 
 dynamic ordering in the bubble memory. The dynamic 
 ordering of a file of items is the reordering of the items 
 in the file such that the more recently referenced items 
 are placed closer to the access port. Figure 2.4 shows 
 such an ordering for 9 items before and after item 3 is 
 accessed. Such an ordering can be achieved by the 
 following algorithm: 
 
access port 
 *-'-•--• 
 
 major loop 
 
 ^N^N 
 
 " a 
 
 ^■s 
 
 • • • 
 
 minor loops 
 
 Figure 2.2. Bubble Memory with Major/Minor Loops. 
 
10 
 
 /\ 
 
 -M 
 
 operation (a) operation (b) 
 
 Figure 2.3. Two Operations in Model 2.1 
 
 7 o 
 
 6 - 
 
 1 
 2 
 
 "3 
 
 < 4 
 
 initial 
 
 8 
 74 
 
 
 
 1 
 
 6<' o 2 
 
 i 4 
 
 final 
 
 Figure 2.4. Example of Dynamic Odering, 
 
11 
 
 ALGORITHM 2 . 1 To access an item at a distance k from the 
 access port, maintaing the dynamic ordering, for Model 
 2.1 
 
 1. Apply operation (a) k times. 
 
 2. Apply operation (b) k times. 
 
 Notice these 2 modes of operation of the bubble 
 memory can be thought to be caused by the action of a 
 two-input two-output switch, placed between 2 loops of 
 sizes 1 and (n-1) respectively. Such a switch has 2 modes 
 of operation, as described schematically in Figure 2.5. 
 Figure 2.6 shows a memory of 9 records for Model 2.1, nov; 
 using the switch. Operation (a) is achieved by setting 
 the switch to mode (a) ; operation (b) is achieved by 
 setting the switch to mode (b) while reversing the 
 direction of propagation. 
 
 Such a switch was proposed by Tung, Chen and 
 Chang [7] . (Actually their switch has two slightly 
 different modes of operation: a cross over mode and a 
 bypass mode; but it is functionally equivalent to the one 
 we has just described.) Based on these switches, they 
 proposed a memory structure which is essentially a linear 
 array of shift-register loops with two adjecent loops 
 linked by a switch. The loops are of equal size except 
 the one at the access port, which is half the size of the 
 other loops. If we take a loop to contain 2 records, then 
 a memory of 9 records can be schematically described by 
 
12 
 
 \=/ 
 
 Mode (a) "through" Mode (b) "closed" 
 
 Schematically represented as £<J 
 Figure 2.5. 2-Input 2-0utput Switch, 
 
 Figure 2.6. Alternate View of Model 2.1 
 
13 
 
 Figure 2.7. 
 
 Theoretically, a memory with k switches can have 
 2 modes of operation, assuming the switches can be 
 controlled independently. But the large number of control 
 states also require large number of contol lines (and 
 hence the number of pins on a chip) . Tung, Chen, and 
 Chang propose four basic operations for their memory 
 (referred to as Model 2.2): 
 
 (a) Global shift: set all switches to (a) , 
 
 (b) Detached shift: set switch 1 to (b) , others to (a), 
 
 (c) Exchange: set all switch to (b) , 
 
 (d) Delta exchange: set switch 1 to (a), others to (b) . 
 
 These operations for a memory of 9 items are 
 described schematically in Figure 2.8. It is easy to see 
 that such a bubble memory can be configured to be used as 
 FIFO or LIFO stacks. The dynamic ordering can also be 
 achieved by the following algorithm: (Note: (a) means 
 (a) is to be applied k times.) 
 
 ALGORITHM 2.2. To access item k and maintain dynamic 
 ordering for a memory of n items in Model 2.2. The 
 ordering of the items is shown in Figure 2 . 8 
 
 1. For l<k<(n-l)/2 apply (a) 1 *" 1 (d) (b)*" 1 (c) 
 
 2. For (n+l)/2< k < n-2 apply (c) (a) 11- *" 1 (d) (b) n ~ k ~ 2 
 
14 
 
 13 
 
 Figure 2.7. Model 2.2 
 
 (a) 
 
 M ►• 
 
 #4 M 
 
 •« M 
 
 •4 ►* 
 
 H M 
 
 M ►• 
 
 (c) 
 
 H M 
 
 (d) 
 
 Figure 2.8. Four Operaions in Model 2.2 
 
15 
 3. For k=n-l apply (c) (a) (c) . 
 
 As far as the number of operation is concerned, 
 algorithm 2.2 was shown to be optimal [8], By applying 
 this algorithm successively, arbitary permutations can be 
 generated. The number of steps needed to perform a 
 permutation was shown to be < (3/4)n in the worst case 
 and 0.4 n^ on the average. 
 
 In the same paper, Wong and Coppersmith also 
 give an optimal algorithm for accessing an item and 
 maintaining the dynamic ordering for Model 2.1: 
 
 ALGORITHM 2.3 To access itme k and maintain dynamic 
 ordering for Model 2.1 
 
 1. For l£k< L(6n-7)/8] apply (a) k (b) k . 
 
 2. For l_(6n-7)/8j£k£n-2 apply (bab) n " k " 1 (b) (a) (aba) n " k " 2 , 
 
 3. For k=n-l apply (b) (a) (b) . 
 
 Again by successively applying this algorithm, 
 arbitrary permutation can be generated. The numbner of 
 steps needed to perform a permutation was shown to be 
 
 2 2 
 
 <; (15/16) n in the worst case and 0.49 n on the average. 
 
 For both models of bubble memory, the lower 
 
16 
 
 bound on the number of steps to generate an arbitrary 
 permutation is shown to be (l/8)n^+0(n) in the worst case 
 and (l/16)n2+0(n) on the average. Thus there seems to be 
 a small gap between these lower bounds and the achieved 
 upper bounds. 
 
 There is another way of looking at the liner 
 array of shift-register loops connected by switches. We 
 can now let all loops be of equal sizes and let each loop 
 contain a data item (record) . Such bubble structure 
 (referred to as Model 2.3), decribed schematically in 
 Figure 2.9 is called a uniform bubble ladder [9,10], 
 
 By setting the switch between two adjecent loops 
 to state (b) , two records can be interchanged. It is easy 
 to see that such a memory structure is well-suited for the 
 implementation of even-odd transposition sort, ([10], 
 p. 241) which can be schematically described by Figure 
 2.10, using Knuth's graphic representation. Notice that 
 there are two alternating phases: the even sorting phase, 
 where records at even switches are compared and exchanged 
 (if necessary); and the odd sorting phase, where records 
 at odd switches are compared. It is known that it takes 
 at most n such phases to sort n item in order. 
 
 Adapting such a scheme to the uniform ladder, it 
 is clear that records can be put in the desired order in n 
 
17 
 
 • E3 • Kl • IS • Kl • Kl • 
 
 Figure 2.9. Model 2.3. Uniform Bubble Ladder. 
 
 ZX 
 
 *? 
 
 r^=r 
 
 m 
 
 Figure 2.10. Even-Odd Transposition Sort, 
 
18 
 
 steps, where a step is the time to completely interchange 
 two records. However, in the uniform ladder, the two 
 phases of operation can be overlapped (i.e. a new phase 
 can be initiated when the previous one is only halfway 
 through), therefore (n+l)/2 steps are sufficient to sort n 
 records in order. 
 
 It must be pointed out that although the sorting 
 algorithm can be implemented in Model 2.3, comparisons are 
 not actually done inside the memory. Keys of the records 
 can be duplicated in CPU and the even-odd transportation 
 sort simulated there. Comparisons are done in CPU and the 
 modes of switches are set based on the results of the 
 comparisons. Thus it is more appropiate to view the 
 adaptation of the even-odd transposition sort as a 
 permutation algorithm rather than a sorting algorithm. In 
 Chapter 4, we shall introduce a new kind of switch that 
 can do comparison inside the bubble memory, enabling 
 records to be sorted internally. 
 
 It was later discovered that uniform ladders 
 have the nice property of completely overlapping 
 input/output operations with sorting operations [12,13], 
 Sorting can start as soon as two records are in the 
 ladder; and by the time the last record is input into to 
 the ladder, the smallest record is already at the access 
 port, ready for output. Thus such a sorting operation can 
 
19 
 
 be called zero-time sorting, since the sorting time is 
 completely hidden in the input /output operations. 
 
 The uniform bubble ladder has a main drawback of 
 requiring the switches be independently settable. Kluge 
 [14] proposes a simplified control scheme for the uniform 
 ladder that cannot generate arbitary permutations, but can 
 nevertheless carry out some important functions in data 
 manipulation: movement of records forward or backward, 
 load and unload opeation in FIFO LIFO stacks. To 
 enchance access time, the uniform ladder is also 
 generalized into a two dimensional configuration. It is 
 doubtful, however, that this scheme is physically 
 realizable in bubble memories, since the loops cannot be 
 laid out in a two dimensional plane without crossing. 
 
 Another bubble memory model, based on the 
 major/minor loop scheme, was recently proposed which can 
 also perform an arbitary permutation in linear time [15] . 
 In Model 2.4, minor loops are connected to the major loop 
 by independently controlled switches (Figure 2.11). 
 Taking a minor loop as a record, and neglecting the 
 difference in time it takes for record to move from one 
 minor loop to the other, an n-record memory can be 
 schematically represented by a directed circuit of length 
 n (Figure 2.12a). An allowable operation is the rotation 
 in the counter-clockwise direction of a circuit consists 
 
20 
 
 Figure 2.11. Model 2.4 
 
 (a) 
 
 (b) 
 
 Figure 2.12. Operations in Model 2.4. 
 
21 
 
 of a subset of the n nodes. Figure 2.12b is an example of 
 an allowable operation for 5 nodes. 
 
 If we define the distance of an item as the 
 length of the path between its current position to its 
 final destination on the directed circuit, and an useful 
 operation as an allowable operation that does not increase 
 the distance of any item but decreases the distance of at 
 least an item, then we have: 
 
 THEOREM 2.1 Any algorithm that uses only useful operations 
 is optimal. 
 
 This theorem gives us a simple optimal 
 permutation algorithm: 
 
 ALGORITHM 2.4 Optimal permutation algorithm for Model 2.4 
 
 1. Form a loop that includes all nodes with nonzero 
 distances, and apply the rotation once. 
 
 2. Repeat step 1 until the distances of all nodes are 
 zero. 
 
 It is easy to see that in the worst case (n-1) 
 steps are necessary. 
 
22 
 
 CHAPTER 3 
 
 PERMUTATION 
 
 The most basic data manipulation operation in 
 magnetic bubble memories is no doubt the permutation of 
 data. In fact, the ability to rearrange data inside the 
 bubble memories gives them extra intelligence not 
 available in the conventional mass storage devices. As we 
 have seen in Chapter 2, some work has already been done in 
 this area. In this chapter, we shall further study the 
 problem in some detail. 
 
 We shall be looking for bubble memory structures 
 with corresponding algorithms that would enable us to 
 perform arbitrary permutations of the records inside the 
 memories. Records are of course restricted to move along 
 certain physically pre-defined paths (i.e. loops) . 
 However, we do have the freedom to choose the number of 
 loops and their physical arrangements, the number of 
 
23 
 
 switches and their locations, and the ordering of the 
 records inside the loops. 
 
 As we have mentioned in Chapter 1, three 
 important parameters should be taken into consideration in 
 designing the memory structures and their corresponding 
 permutation algorithms. They are: (1) the number of 
 steps (to be defined) it takes to perform an arbitary 
 permutation of the records, (2) the number of switches 
 used, and (3) the number of control states for the loops 
 and switches needed to carry out the permutation 
 algorithm. It is of course, desirable to minimize all the 
 three parameters. But this is, in general, not possible, 
 and trade-offs among these three parameters are generally 
 involved. 
 
 In this chapter, we shall present several 
 different bubble memory structures (called models) with 
 different number of loops and switches. In each model, an 
 algorithm for permuting records is given and analysed. In 
 particular, Model 3.1, which has only one switch, is 
 studied in details. As we have seen in Chapter 2, most of 
 
 the previous work in this area involve models with 0(1) 
 
 2 
 
 number of switches or control states and (n ) permutation 
 
 time on the one hand, and models with 0(n) number of 
 switches and (n) permutation time on the other. In this 
 chapter, several models that represent some sort of 
 
24 
 
 compromise between these two extremes are given. Thus the 
 trade-offs among these three parameters are better 
 understood. 
 
 3.1. Basic Model 
 
 We assume that a magnetic bubble memory consists of a 
 certain number of loops. A loop of size m is capable of 
 holding m records. The records in a loop can either 
 circulate in a counterclockwise direction or can be held 
 in position (with respect to the other loops) . The time 
 it takes to move one record from one position to an 
 adjacent position (in a counterclockwise direction) is 
 called a step, and would be used as the basic unit of 
 time. 
 
 The records in two adjacent loops can be 
 exchanged by means of a switch placed between them. This 
 switch is the 2-input 2-output switch described in Chapter 
 2 (Figure 2.5). V7hen the switch between two loops is set 
 to mode b ("closed"), the loops remain separated. But 
 when it is set to mode a ("through"), they form a single 
 loop. (See Figure 2.1.) 
 
25 
 
 (a) Switch set to mode b ("closed") 
 
 (b) Switch set to mode a ("through") 
 
 Figure 3.1. Two Operations of a Switch. 
 
26 
 
 3.2. Model 3.1 
 
 The memory consists of two loops and a switch placed 
 between them. The loops are of sizes 1 and n-1 
 respectively, where n is the number of records that can be 
 stored in this memory. The positions of the records are 
 labelled 1, 2, . .., n, with the loop of size 1 occpuying 
 position 1. (See Figure 3.2a for a memory of 9 records.) 
 There are two modes of operation for the movement of the 
 records. If the switch is set to mode a ("through") , then 
 we have the usual circular shift of the records along the 
 combined loop. If the switch is set to mode b ("closed"), 
 then the record at position 1 is held fixed, while the 
 other records circulate along the loop of size n-1. We 
 would called the first operation as operation a, and the 
 second as operation b. Figure 3.2 describes these two 
 operations for n=9. 
 
 Assume initially that records 1, 2, ..., n are 
 
 at positions 1, 2, ..., n respectively. A permutation 
 
 2 . . .n \ 
 1 ?2 •••Pn/ 
 is therefore to be realized by taking record i to position 
 
 P-, for all i. It is known that a permutation P can also 
 
 be decomposed into cycles 
 
 p = c 1 c 2 . . .c k 
 
 where C. can be written as 
 
27 
 
 1 
 
 9#* #2 
 
 B t t 3 
 
 7# ±4 
 
 -*#5 
 
 (a) 
 
 (b) 
 
 Figure 3.2. Two Operations in Model 3.1. 
 
28 
 
 C = (fj fi ... f^) 
 
 denoting a cycle of length h., and is equivalent to the 
 
 permutation 
 
 /f 1 f 1 f 1 f\ 
 / r l r 2 ••* r h-l r h\ 
 
 Vf 1 f 1 f 1 f 1 / 
 \r 2 r 3 ... r h r^ 
 
 For example, the permutation 
 
 G 7 1 5 2 6 D " (1 3)(2 7 4 5)(6) ' 
 Without lost in generality we assume that f. is the 
 smallest item in the cycle C. and that 
 
 f l <f l < '•' < f l' 
 i.e. cycles are arranged according to their smallest 
 
 items. 
 
 The algorithm to generate the permutation P = 
 C.CL...C, is given in Algorithm 3.1, (in which f[i,j] is 
 used to denote f^", the items in the cycle C.). The 
 permutation P is realized by realizing the cycles C., one 
 after the other, using the procedure "cycle". To realize 
 the cycle C. , f^" is first brought to position 1 (by 
 sucessive application of operation a) . By applying 
 operation b (f^ - f^" -1) times, f. is held at position 1 
 while record f^ is brought to position 2. Operation a is 
 then applied once, so that f, takes up the position (i.e. 
 relative position) of f^ and f_ is now at position 1. The 
 process is repeated for all items of the cycle until the 
 realization of the cyclic permutation is completed. 
 
29 
 
 ALGORITHM 3.1. To generate an arbitrary permutation of records 
 in Model 3.1. 
 
 procedure permutel; 
 
 (* the permutation to be performed can be decomposed into k 
 cycles, where the ith cycle= (f [i, 1] , . . , f [i,h [i] ] ) *) 
 
 procedure cycled); 
 
 (* realize the ith cycle of the permutation *) 
 (* f [i,l] is assumed to be at position 1 initially *) 
 begin if h[i]>l then (* skip cycles of length 1 *) 
 begin for j:=l to h[i]-l do 
 begin if f [i, j+l]>f [i, j] 
 
 then r:=f [i, j+l]-f [i, j]-l 
 
 else r:=n+f [i, j+l]-f [i, j]-2; 
 b(r); (* apply operation b r times *) 
 a(l) (* apply operation a once *) 
 end; 
 
 b(n+f [i,l]-f [i f h[i]]-l) 
 end (*if*) 
 end (*cycle*) ; 
 
 begin (*permutel*) 
 for i:=l to k do 
 begin 
 
 if i=l then a(f[l,l]-l) 
 
 else a(f [i,l]-f [i-1,1] ) ; 
 (* f [i,l] is now at position 1 *) 
 cycle (i) 
 end; 
 if f[k,ll>l then a (n+l-f [k, 1] ) 
 end (*permutel*) ; 
 
30 
 
 To count the number of steps taken by Algorithm 
 3.1, we need to determine the number of excedence (or 
 excedence for short) in a permutation. The excedence e(C) 
 of a cycle C is defined as the number of runs in C (i.e. 
 the number of increasing sequence in C) , if the cycle 
 length of C is greater than one, and is defined to be 
 otherwise. (Remember that the first item in C is the 
 smallest.) The excedence of a permutation is the sum of 
 the excedence of its cycles. 
 
 For example, e((13)(2 7 4 5) (6)) = e((l 3)) + 
 e((2 7 4 5))+ e((6)) =1+2+0=3. 
 
 In the procedure "cycle", if the length of the 
 cycle is one, then the procedure is skipped. Otherwise, 
 to realize a cycle whose excedence is one, one complete 
 pass through all the records is both sufficient and 
 necessary. In general, a cycle C of excedence e(C) would 
 require a total of e(C)(n-l) operations. 
 
 The procedure "permutel" calls the procedure 
 "cycle" k times. (Remember k is the number of cycles in 
 the permutation.) In addition, a total of n operations 
 are needed to bring the beginnings of the cycles to 
 position 1. Let Pl(n) denote the maximum number of steps 
 necessary to generate an arbitrary permutation for n 
 records, then 
 
31 
 
 Pl(n) < max {n + (n-l)e(P)} 
 P 
 
 In the worst case, e(P) can be (n-1), thus 
 giving us an n 2 +0(n) algorithm. The following argument 
 
 shows that by minor modification of Algorithm 3.1, Pl(n) 
 
 2 
 can be reduced to (l/2)n +o(n). Let P be the permutation 
 
 desired, and let P. a be the permutation obtained from P 
 
 by r successive execution of operation a. Algorithm 3.1 
 
 is used to generate P.a r instead of P. P can then be 
 
 obtained by (n-r) mod n additional execution of operation 
 
 a. Therefore 
 
 Pl(n) < min max {n + (n-l)e(P.a ) + (n-r)mod n}. 
 r P 
 We now show that 
 
 THEOREM 3.1. For any given permutation P, there exist an 
 
 r such that 
 
 e(P.a r ) < [(n-l)/2j . 
 PROOF. We first note that an excedence occurs in a 
 
 permutation 
 
 a 2 ... n\ 
 
 lp l P 2 ••• P 'n 
 
 for any i such that i>p. . Now consider all the 
 
 i 
 
 permutations P.a r , r=0, 1, ..., n-1. Record i, 
 originally at position i, would be permuted to 
 position (p.-r-l)mod n+1 in P.a r . An excedence occurs 
 
 in all permutations such that i>(p -r-l)mod n+1, that 
 
 i 
 
 is, in (i-1) cases. Hence, we have 
 
32 
 
 n-1 n 
 
 I e(P.a r ) = £(i-l)= n(n-l)/2. 
 
 r=0 i-1 
 
 Since there are n permutations P. a , we conclude that 
 
 there exist an r such that 
 
 e(P.a r ) = [(n-D/2j. 
 
 Therefore, we have 
 
 Pl(n) < n + (n-1) .L(n-l)/2j+ n-1 
 < n 2 /2 + n - 1/2. 
 
 An asymptotic analysis of the average behavior 
 of our permutation algorithm is given in [18] , where it is 
 shown that the average running time is n /2, as n gets 
 large, and remains unchanged even if Algorithm 3.1 is used 
 instead of the modified version. 
 
 Mote that Model 3.1 uses only two of the four 
 operations in Model 2.2. Actually, there is only 1 switch 
 in Model 3.1 as oppose to n-1 switches in Model 2.2. Our 
 permutation algorithm can also be considered as an 
 
 improvement over the one in [8], whose worst case 
 
 2 
 permutation time is shown to be ( 15/16 )n . 
 
 Algorithm 3.1 and its modified version can also 
 be applied to Model 2.1 with minor modification. It is 
 shown in [18] that such a permutation algorithm would have 
 identical worst case running time and identical asymptotic 
 average running time. 
 
33 
 
 3.3. Separation Algorithm 
 
 In the models and algorithms to follow, one basic 
 algorithn will always be used, which separates the data in 
 two adjacent loops connected by a switch. More 
 specifically, given two loops of records with the 
 destination loop of each record known, Algorithm 3.2 
 describes a sequence of switch controls which moves the 
 recoreds to their destination loops. In Algorithm 3.2 and 
 throughout this chapter, we shall use the notation 
 "move (1, 2. . . ,m;x) " to mean "simultaneously shift loops 1, 
 2, . . . , m by x steps". If x=l, we shall simply write 
 "move (1,2, . . . ,ni) ". 
 
 An example for the separation of records in two 
 loops is given in Figure 3.3, where the two loops are 
 designated 1 and 2. The size of loop 1 is 4 and that of 
 loop 2 is 6. The records are numbered 1 through 10. All 
 records numbered less than or equal to 4 have loop 1 as 
 their destinations; while the others have loop 2 as their 
 destinations. At the beginning, records 7 and 2 are at 
 the switch. The sequence of switch controls for the 
 separation of records is "through", "closed", "closed", 
 
34 
 
 ALGORITHM 3.2. Perform a separation of reocrds in adjacent 
 loops i and j. Size[i] denotes the size of loop i and 
 destination [i,k] denotes the destination loop the record at 
 position k of loop i is to be moved to. Switch [i,j] 
 denotes the switch between i and j . Assume position 1 for 
 both loops are at the input to switch[i,j], 
 
 procedure separate (i, j ) ; 
 begin cl:=l; c2:=l; 
 repeat 
 
 if destination [i, l]=i and destination [j , l]=i then 
 begin switch [i, j ] :="closed" ; 
 
 moved); cl:=cl+l 
 end 
 else if destination [i, l]=i and destination [j , l]=j then 
 begin switch [i, j ] :="closed" ; 
 
 move(i,j); cl:=cl+l; c2:=c2+l 
 end 
 else if destination [i,l]=j and destination [j ,l]=i then 
 begin switch [i, j ]:=" through" ; 
 
 moved, j); cl:=cl+l; c2:=c2+l 
 end 
 else if destination [i, l]=j and destination [j ,l]=j then 
 begin switch [i r j ] :="closed" ; 
 
 move(j); c2:=c2+l 
 end 
 until cl>size[i] and c2>size[j] 
 end; 
 
35 
 
 -G 
 
 r- <r> 
 
 9 9 
 
 to 
 
 ro 
 
 -G 
 
 m oo 
 
 2 n 
 
 ft 
 
 CVJ 
 
 00 tx) 
 
 en 
 
 *2 
 
 •GE3 
 
 ft 
 
 CM 
 
 ro 
 
 (M 
 
 G 
 
 m 
 
 CVJ 
 
 •G 
 
 in 
 
 G 
 
 ro 
 
 Q_ 
 O 
 O 
 
 iO <T> 
 
 00 t" 
 
 a 
 
 cr> n- 
 
 UD CO 
 
 a 
 
 EG 
 
 o *• 
 
 ft 
 
 3 
 
 
 13 
 CD 
 (A 
 
 iH 
 U 
 
 CD 
 W 
 O 
 ■H 
 O 
 
 ft ° 
 
 11 o 
 
 ft 
 
 CD 
 
 CO 
 
 a. 
 o 
 
 o 
 
 _i 
 
 x: 
 
 3 
 o 
 
 u 
 
 Xi 
 
 c 
 o 
 en 
 
 4J 
 
 
 £ 
 
 U 
 •P 
 
 •H 
 
 CM 
 
 <D 
 
 > 
 
 
 6 
 
 CM 
 
 CD 
 > 
 O 
 
 e 
 
 CM 
 
 CD 
 > 
 
 O 
 
 E 
 
 CM 
 
 > 
 
 
 
 e 
 
 CM 
 
 CD 
 > 
 
 CD 
 U 
 3 
 •O 
 
 a) 
 o 
 
 o 
 
 u 
 
 c 
 
 O 
 •H 
 4J 
 10 
 H 
 CCj 
 
 a 
 
 a) 
 w 
 
 c 
 
 •H 
 
 OJ 
 rH 
 
 (0 
 X 
 
 w 
 
 en 
 
 * 
 
 a) 
 u 
 
 3 
 tn 
 •H 
 
36 
 "closed", and "through". 
 
 Note that in general, the number of steps 
 required by the separation algorithm is less than or equal 
 to the sum of the sizes of the two loops. 
 
 The separation algorithm (Algorithm 3.2) can be 
 used to perform a permutation as described informally in 
 Algorithm 3.3. 
 
 ALGORITHM 3.3. Permute n records using the separation 
 algorithm. Records numbered 1, 2, ..., n are initially 
 distributed over locations 1, 2, ..., n. The desired 
 finally permutation is to put record i to location i, 
 for all i. 
 
 1. Break the records into two parts, and set 
 switches such that each part forms a loop. 
 
 2. Using Algorithm 3.2, separate the records such 
 that records with smaller addresses go to the first 
 part, those with larger addresses go the the second. 
 
 3. Recursively perform the desired permutation on 
 the records in the first part. 
 
 4. Recursively perform the desired permutation of 
 the records in the second part. 
 
 Such a permutation algorithm is reminiscent of 
 the procedure used in a "bucket sort". In fact, if we 
 make the two parts in Algorithm 3.3 be of equal sizes, 
 then the separation algorithm in the i-th recursive step 
 is equivalent to sorting the records according to the i-th 
 most significant bit of the binary representation of their 
 addresses. 
 
37 
 
 V7e shall next consider several models of 
 magnetic bubble memories and propose corresponding 
 permutation algorithms. All these algorithms use 
 Algorithm 3.2 and 3.3 as basic building blocks. However, 
 they will be modified to suit the specific models. The 
 algorithms used for permutation in these models differ 
 mainly in the relative sizes of the two parts used in the 
 separation algorithm, and the degree of parallelism 
 allowed in each of the models. 
 
 3.4. Model 3.2 
 
 The memory system consists of k loops of size 2, 2, 4, 
 
 k— 1 k 
 
 . . . , 2 , with a total capacity of n=2 . There is a 
 
 switch s[i] between loop i and loop i+1, for i=l, 2, ..., 
 
 k-1. Thus, a total of k-1 switches are used. An example 
 
 for k=4 is given in Figure 3.4a. 
 
 An algorithm for permutation records are shown 
 in Algorithm 3.4. This algorithm is similar to Algorithm 
 3.3 with some modifications: 
 
 1) Since the sizes of the loops are powers of 
 
38 
 
 LOOP LOOP LOOP 
 1 2 3 
 
 LOOP 
 
 H 
 
 13 H 
 
 s, s 2 
 
 ZZ2 
 
 (a ) A MEMORY SYSTEM OF CAPACITY 16 
 
 1 4 7 6 '13 16 11 10 
 
 00 
 
 m 
 
 2 3 8 5 14 15 12 9 
 
 (b)THE CORRESPONDING ADDRESSES 
 
 Figure 3.4. Model 3.2 
 
39 
 
 ALGORITHM 3.4. Permute n records in Model 3.2. 
 
 procedure permute2 (n,nO) ; 
 
 (* c(i) denotes the destination address of the record at 
 memory address i. Given n records with destination 
 address nO, nO+1, . .., n+nO-1, the procedure rearrange 
 the records such that c(i)=nO+i-l for i=l to n *) 
 
 procedure swap(n); 
 
 (* swap contents of the first lgn -1 loops with loop lgn 
 
 by setting the switches to "through" and shifting the 
 
 resulting loop for half the total length. *) 
 begin 
 
 for i:=l to lgn - 1 do s [i] :="through" ; 
 
 move (1, 2, . . . , lgn - 1; n/2) 
 end; 
 
 procedure separate (n,nO) ; 
 
 (* Given n records with destination addresses nO, nO+1, 
 ..., nO+n-1 in the first lgn loops, they are separated 
 such that those with the larger addresses go to the 
 first lgn -1 loops. *) 
 begin for i:=l to lgn - 2 do s [i] :="through" ; 
 
 x:=n+l; y:=3n/4 + 1; (*x and y are inputs to s[lgn -1]*) 
 
 nn:=n0+n/2; 
 
 for i:=l to n do 
 
 if c(x)£nn and c(y)^nn then 
 begin s[lgn -1] :="closed"; 
 
 move (1, 2, . . . , lgn -1); 
 end 
 else if c (x);>nn and c(y)<nn then 
 begin s[lgn -1] :="closed"; 
 
 move (1,2, . . . ,lgn) 
 end 
 else if c(x)<nn and c(y)^nn then 
 begin s[lgn -1] :="through"; 
 
 move (1,2, . ... ,lgn) 
 end 
 else begin s[lgn -1] :="closed" ; 
 
 move (lgn) 
 end 
 end (*separate*) ; 
 begin (*permute2*) 
 if n=2 then 
 
 if c(l)>c(2) then move(l); 
 else begin 
 
 separate (n,nO) ; 
 s[lgn -1] :="closed"; 
 permute2 (n/2, n/2+nO) ; 
 swap (n) ; 
 
 s[lgn -1] :="closed"; 
 permute2 (n/2,n0) 
 end 
 end (*permute2*) ; 
 
40 
 
 two, the records can be broken into two halves of equal 
 size. 
 
 2) Since the second half consists of a single 
 loop, permutation can only be done on the first half. 
 Thus the recursive application of the permutation 
 algorithm to the two halves of the records is carried out 
 in sequence. Using the loop in the second half as a 
 temporary storage, permutation is firstly carried out on 
 the first half of the records. The two halves are then 
 swapped, and permutation is then carried out on the second 
 half of the records. 
 
 This algorithm calls for a special address 
 scheme for the memory locations. The addressing scheme 
 can be described recursively in the following manner. 
 
 1. If n=2, label the two nodes arbitrarily. 
 
 2. If n=2 1 , for i>l, label the first half the 
 same way as when n=2 1_ . A node in the second half has 
 the same label as a node in the first half that is 
 diagonally opposite, added by n/2. 
 
 An example of this address scheme for a memory 
 of capacity 16 is given in Figure 3.4b. 
 
41 
 
 An example of permuting 8 records by Algorithm 
 3.4 is given in Figure 3.5 j. 
 
 We shall next analyze the behavior of Algorithm 
 3.4. Let P2 (n) be the number of steps required to achieve 
 an arbitrary permutation of n records. To separate a set 
 of n records, n steps are needed in the worst case. 
 (Actually, in the worst case only n-2 steps are required, 
 as shown in Figure 3.6. For simplicity, n would be used 
 instead.) To swap two loops each of size n/2 requires n/2 
 steps. Hence 
 
 P2(n) = P2(n/2) + 3n/2 
 
 = (3/2)n lg n - 2, 
 using the initial condition P2(2)=l. The number of 
 switches in the memory system is clearly 
 
 S2 (n) = lgn -1. 
 
 To compute the number of control states we 
 consider the situation when permutation is being performed 
 on the first k loops. 4 states are used in this level of 
 recursion: 
 
 1) move first k-1 loops, hold loop k, 
 
 2) hold first k-1 loops, move loop k, 
 
 3) move all k loops, with switch s[k-l] set to "through", 
 
 4) move all k loops, with switch s[k-l] set to "closed". 
 
 The procedure "swap" uses only the last state of 
 
42 
 
 b) 
 
 
 d) 
 
 7 8 5 3 
 
 
 
 6 
 
 8 
 •— 
 
 
 
 2 
 
 5 
 — • 
 
 IP 1 
 
 A — ( 
 
 4 
 3 
 
 T — { 
 
 A— 
 
 7 
 
 4 
 •— 
 
 A— 
 
 —A 
 
 6 
 
 2 
 — # 
 
 —A 
 
 i i 
 
 2 
 
 7 i 
 
 r 
 
 13 8 5 
 
 (a) 
 
 (c) 
 
 z> 
 
 (e) 
 
 00 
 
 5 8 3 1 
 
 □ 
 
 6 7 2 4 
 
 14 7 6 
 
 2 3 8 5 
 
 (a) FORM 2 BIG LOOPS 
 
 (b) SEPARATION 
 
 (c) PERMUTE FIRST HALF AND HOLD SECOND HALF 
 
 (d) SWAP 
 
 (e) PERMUTE FIRST HALF AND HOLD SECOND HALF 
 
 Figure 3.5. Example of Permutation in Model 3.1 
 
43 
 
 LOOP 1 
 
 LOOP 2 
 
 • 
 
 
 • 
 
 • 
 
 
 • 
 
 • 
 
 1 ( 
 
 o r 
 
 KM 
 
 ib; 
 
 • 
 
 
 • 
 
 • 
 
 
 • 
 
 • 
 
 
 • 
 
 1 = DESTINATION IS LOOP 1 
 2= DESTINATION IS LOOP 2 
 
 Figure 3.6. Worst Case Performance of the Separation 
 Algorithm 
 
44 
 
 the above. Therefore, for each step in the recursion, 
 only 4 states are introduced. Thus, total number of 
 control states is 
 
 C2 (n) = 41g n - 4. 
 
 1.5. Model 3.3 
 
 In this memory, there are m loops (which shall be referred 
 to as "basic" loops) numbered 1, 2, ..., m, each of size 
 h. There is a switch s[i] between loops i and i+1, for 
 i=l, 2, ..., m-1. For simplicity of discussion, m is 
 assumed to be a power of two. Each of the basic loop is 
 assumed to be capable of carrying out an arbitrary 
 permutation of its records in Px(h) steps. Their detailed 
 internal structure will be described later. 
 
 The addresses of the memory locations are 
 assigned sequentially from basic loops 1 to m, i.e. 
 records in loop i reside in locations (i-l)h+l to ih. 
 
 The permutation algorithm, described in 
 Algorithm 3.5, is similar to Algorithm 3.3. Records are 
 again separated into two halves, with those with smaller 
 addresses go to the first. The recursive step of 
 
45 
 
 ALGORITHM 3.5. Permute n records in Model 3.3. h is the size 
 of the basic loops. 
 
 procedure permute 3 (t,tO) ; 
 
 (* Assume records in loop to, tO+1, . .., tO+t-1 have their 
 
 destinations in these loops, the procedure perform the 
 
 desired permutation for the records. *) 
 
 procedure separate ( t , t ) ; 
 
 (* The procedure separates the records in loops to, tO+1, 
 . . . , tO+t-1 such that records with smaller addresses 
 go to loops tO, tO+1, ..., tO+t/2-1. *) 
 begin tl:=t0+t/2-l; t2:=t0+t-l; tt:=tl*h; 
 for i:=tO to tl-1 do s [i] :=" through" ; 
 for i:=tl+l to t2-l do s [i] :="through" ; 
 x:="address at input of s[tl] in loop tl"; 
 y :=" address at input of s[tl] in loop tl+1"; 
 for i:=l to t*h do 
 
 if c(x)<tt and c(y)£tt then 
 begin t [tl] :="closed M ; 
 
 move (tO, tO+1, . . . ,tl) 
 end 
 if c(x)<tt and c(y)>tt then 
 begin s [tl] :="closed M ; 
 
 move(tO,tO+l, . . . ,t2) 
 end 
 if c(x)>tt and c(y)<tt then 
 begin s [tl] : = ,, through M ; 
 move(tO,tO+l, . . . ,t2) 
 end 
 else begin s [tl] :="closed" ; 
 
 move (tl+l,tl+2, . . . ,t2) 
 end 
 end (*separate*) ; 
 
 begin (*permute3*) 
 
 if t=l then permutex(h); 
 
 (* assume records in the basic loops can be 
 permuted by "permutex" *) 
 else begin 
 
 separate (t,tO) ; 
 s[t0+t/2-l] := M closed M ; 
 simultaneous begin 
 permute 3 (t/2,t0) ; 
 permute3 (t/2,t0+t/2) 
 end 
 end 
 end (*permute3*) ; 
 
46 
 
 permuting the records in the two halves is carried out in 
 parallel, since each half has identical physical 
 structure. Recursion stops when the number of records to 
 be permuted is h, at which time the permutation algorithms 
 for the individual basic loops are used, and in another 
 Px(h) steps, the records are brought to their desired 
 final positions. 
 
 Let P3(n) denote the number of steps required to 
 permute n records, then 
 
 P3(n) = n + P3(n/2) 
 with initial condition P3(h)=Px(h). Thus 
 
 P3(n) = 2n - 2h + Px(h) . 
 
 To count the number of control states, we note 
 that the separation procedure requires only 4 states, as 
 in Model 3.2. However, with each recursion step, the 
 operations in the separation procedure are carried out in 
 parallel, each independent of the other. Hence the total 
 numner of control states is 
 
 C3(m) = 4+4 2 +4 4 + ...+4 i5m +(Cx(h,m)) 
 where Cx(h,m) is the number of control states for the m 
 basic loops, and is included here to account for the 
 control states used in the last recursion step. Therefore 
 
 C3(m) < 2 m+1 + (Cx(h,m)) . 
 
 We can now specify the internal structure for 
 
47 
 the individual basic loops. In Model 3.3a, each loop has 
 the structure identical to that of Model 3.1, i.e. each 
 basic loop consists of two smaller loops: one of sieze 1 
 and the other of size h-1, with a switch between them. 
 The number of steps to permute h records is at most 
 (l/2)hr+0(h) . Thus, the number of permutation steps in 
 Model 3.3a is 
 
 P3a(n) = 2n + (l/2)h 2 + 0(h). 
 If we choose h=/h, then 
 
 P3a(n) = 5n/2 + 0(/n) 
 and the total number of the switches in this model is 
 
 W3a(n) = 2,/n - 1. 
 Since each basic loop has 2 control states, Cx(h,m)=2 m . 
 Therefore the number of control states is 
 
 C3a(n) < (3)2 /n . 
 
 In Model 3.3b, the internal structure for each 
 basic loop is identical to Model 3.2. The addressing 
 scheme for m=2 , h=8 is shown in Figure 3.7c. Thus, 
 
 P3b(n) = 2n - 2h + (3/2)hlgh - 2. 
 If we choose h=2 m , then n=hm=hlgh and 
 
 P3b(n) = 7n/2 - 2h - 2. 
 The total number of switches is 
 
 W3b(n) = (m-1) + m(lgh -1) 
 = lg 2 h - 1 
 
 To count the number of control states for the m 
 
48 
 
 B 
 
 2 
 
 4 — • — • — 
 
 (a) A MEMORY SYSTEM OF CAPACITY 16 
 
 4 3 2 1 12 11 10 9 
 
 • • 
 
 ■# 4 
 
 5 6 7 8 13 14 15 16 
 
 (b) CORRESPONDING ADDRESSES FOR 
 MODEL 3.3a 
 
 1 4 7 6 9 12 15 14 
 
 * — • — i 
 
 2 3 8 5 10 11 16 13 
 
 (c) CORRESPONDING ADDRESSES FOR 
 MODEL 3.3b 
 
 Figure 3.7. Model 3.3a and 3.3b. 
 
49 
 
 basic loops, we note that each recursion step in the 
 application of Algorithm 3.3 is synchronized for all m 
 loops, i.e. each loop takes the same number of steps for 
 each recursion step. Since there are 4 m control states 
 for each recursion step, a total of (lgh -1)4 is needed. 
 Thus the number of control states for Model 3.3b is 
 C3b(n) = 2 m+1 + (lgh -1)4™ 
 = h 2 lgh - h 2 + 2h. 
 letting m=lg h. 
 
 3.6. Model 3.4 
 
 In this model of bubble memory, we assume that the number 
 of switches k is arbitrary but fixed. There are k+1 loops 
 of size L, , L 2 , ..., L, respectively, with L-=l. There 
 is a switch s[i] between loop i and loop i+1. Let P4(n;k) 
 be the number of steps required to achieve an arbitrary 
 permutation of n records in this model. The sizes of the 
 loops will be chosen so as to minimize the permutation 
 time. 
 
 When k=l, Algorithm 3.1 is used. Therefore 
 P4(n;l)=Pl(n)=(l/2)n 2 + (n) . 
 
50 
 
 For k=2, we have n=L +L +L . Algorithm 3.6 
 describes an algorithm which achieves an arbitrary 
 permutation. 
 
 ALGORITHM 3.6. Generate an arbitrary permutation for 
 three loops in Model 3.4. The addresses for the 
 records in the three loops are assigned as shown in 
 Figure 3.8a. 
 
 1. Use Algorithm 3.2, separate the records so that 
 those with smaller addresses go to loop 1 and 2, and 
 those with larger addresses go to loop 3. 
 
 2 . Permute the records in loop 1 and 2 so that the 
 resulting order is as shown in Figure 3.8, while 
 holding the records in loop 3 stationary. This takes 
 (1/2) (L 1 +L 2 ) 2 + 0(1^+^) steps. 
 
 3. The "sorted" records are then moved from loop 1 
 and 2 to loop 3, and at the same time same number of 
 records are moved from loop 3 to loop 1 and 2 . The 
 separation algorithm is applied again so that records 
 with the smallest addresses (of the remainding 
 "unsorted" records) are in loop 1 and 2. At this 
 point, the beginning of the "sorted" records in loop 3 
 is at the switch. Loop 3 is then shifted so that the 
 "tail" of the "sorted" records is at the switch. See 
 Figure 3.8c. This takes a total of n steps. 
 
 4. Step 2 and 3 are repeated until all records are 
 in "sorted" order. This is executed |~L /(L +L_)J times. 
 
 The total number of steps required by this 
 algorithm is therefore 
 
 P4(n;2) = [l 3 / (L 1 +L 2 )] (n + (1/2 ) (I^+L^ 2 ) . 
 It is clear that the best choice of L_ is such that 
 L. +L =ayn. Then the terms in the sum have the same order 
 
 of magnitude. Thus 
 
 P4(n;2) = f" n "^ n 1 ( n +ian) 
 a7n 
 
 < (1/a + a/2) n 3 / 2 
 
51 
 
 LOOP : 1 2 3 
 
 SMALLEST LARGEST 
 
 ADDRESS ADDRESS 
 
 (a) ADDRESS ASSIGNMENT 
 
 (b) DESIRED PERMUTED ORDER IN LOOPS 1 AND 2 
 
 i 
 
 J 
 
 MOVE 
 
 
 B 
 
 
 
 
 SEPARATE 
 
 SHIFT 
 
 
 (9 
 
 (3 
 
 SORTED PORTION 
 
 (c) PART (3) OF THE ALGORITHM 3.6 
 
 Figure 3.8. Model 3.4. 
 
52 
 
 since fxl<x+l. The coefficient is minimum when a=/2. 
 Thus we have 
 
 P4(n;2) = /2 n 3/2 
 with L-«l, L =V2n - 1, L 3 =n - 72n. 
 
 For k>2, Algorithm 3.6 can be applied 
 recursively. Suppose we can permute records in the first 
 k loops using (k-1) switches. When applying the 
 separation algorithm, records with smaller addresses go to 
 the first k loop, while those with larger addresses go to 
 loop k+1. Using the same procedure as in Algorithm 3.6, 
 we have 
 
 P4(n;k) = 
 
 'k+1 
 
 k 
 
 (n+P4(£ L.;k-1)) 
 i=l 
 
 THEOREM 3.2. P4 (n;k) < 2*" 1/k k n 1+1/k 
 
 if we assume ? L.= 2 1/k n 1 " 1/k 
 i=l X 
 
 PROOF. By induction. 
 
 Note that the corresonding loop sizes L, , L^ , 
 , I^j,I^ are respectively 
 
 i i i i- 1 i i- i i x_i 
 
 1, (2 2 n -1), ..., (2 k n k "-2 FIT n ^ =T ) , (n-2 F n F ) . 
 
53 
 
 Note that Algorithm 3.6 results in an address 
 assignment as shown in Figure 3.9a; whereas the recursive 
 application of the algorithm requires that the final 
 configuration be as in Figure 3.9b, so that the "sorted" 
 records can be moved out into the next bigger loop (the 
 one on the right in Figure 3.9b). To get around this 
 problem, the following procedure can be used. As soon as 
 the "head" of the record stream (i.e. the record with the 
 smallest address) reaches the switch connecting the bigger 
 loop (the rightmost switch in Figure 3.9b), the switch is 
 set to mode "through" so that the record stream moves 
 directly into the bigger loop (Figure 3.9c) instead of 
 circulating back. This modification may in fact save some 
 running time . 
 
 To count the number of control states for Model 
 3.4, we note that the process of separating records 
 requires 4 states as before. Moreover, when the first p 
 loops, say, are separating records, loop p+1 to k+1 are 
 all held stationary. Also, 2 control states are 
 sufficient to permute records in the first 2 loops. 
 Therefore the total number of control states is 
 
 C4(n) = 4(k-l) + 2 
 = 4k - 2. 
 
\ 
 
 B 
 
 (a) 
 
 H 
 
 (b) 
 
 54 
 
 SMALLEST 
 ADDRESS 
 
 LARGEST 
 ADDRESS 
 
 
 H 
 
 H 
 
 (c) 
 
 Figure 3.9. Record Movement in Model 3.4. 
 
55 
 
 3.7. Summary and Conclusion 
 
 The performance for the various models are given in Table 
 3.1. Some previous work are included for comparison. 
 
 Mote that as far as the number of control lines 
 is concerned, Model 3.3a and the other models in [15] and 
 [10] are practically not usable. Model 3.3b is of some 
 theoretical interest, since it gives a linear-time 
 permutation algorithm with a small number of switches as 
 well as control lines. It is also interesting to note 
 that in Model 3.4, the minimum number of steps is achieved 
 when k=ln(n/2). Thus Model 3.4 performs well only when k 
 
 is small. (note the substantial increase in performance 
 
 3/2 2 
 
 when k=2 (O (n ) as compared to the O (n ) time when 
 
 k=l.) In terms of the simplicity of its permutation 
 algorithm, as well as the favorable values of its three 
 parameters, Model 3.2 seems to be a reasonable choice for 
 a practical implementation of magnetic bubble memories. 
 
 The question still remains open as to the 
 relationship of these 3 parameters in an optimal magnetic 
 bubble memory designed for permutation of data. Fxcept 
 for the obvious fact that in a linear memory structure, 
 0(n) steps are necessary to move a record from one end of 
 the memory to the other, we know of no other theoretic 
 
56 
 
 Mode 1 
 
 Number of 
 switches 
 
 Number of steps 
 
 Number of 
 control states 
 
 3.1 
 
 1 
 
 (l/2)n 2 
 
 2 
 
 3.2 
 
 lgn - 1 
 
 (3/2)nlgn - 2 
 
 41gn - 4 
 
 3.3a 
 
 2/n - 1 
 
 (5/2)n + 0(/n) 
 
 <(3)2 n 
 
 3.3b 
 
 (n=hlgh) 
 lg 2 h - 1 
 
 (7/2)n - 2h - 2 
 
 <h 2 lgh + 0(h ) 
 
 3.4 
 
 k 
 
 2" 1 / k kn 1+1 / k 
 
 4k - 2 
 
 [10] 
 
 n-1 
 
 n/2 
 
 2 n-l 
 
 [15] 
 
 n 
 
 n-1 
 
 2 n 
 
 Table 3.1 Summary of Permutaion of Records 
 in Pubble Memories. 
 
57 
 lower bounds. 
 
 The structure of the memory models we have 
 studied so far is essentially one dimemsional. It would 
 also be interesting to see if any two-dimensional memory 
 structures would give better performance. 
 
58 
 
 CHAPTER 4 
 
 SORTING 
 
 In this chapter, the problem of sorting in 
 magnetic bubble memories is studied. We introduce a new 
 kind of switch (details to be described later) that not 
 only can route bubble streams, but can also do so 
 according to their contents, i.e. a switch that can also 
 do comparison. The advantage of having comparators inside 
 the magnetic bubble memory, as opposed to hardware 
 comparators outside the memory is two- fold: firstly, it 
 makes the magnetic bubble memory a self-contained, unit; 
 and secondly, as we will see later, it simplifies the 
 control, and hence reduces the number of control lines 
 needed for sorting. 
 
 As we mentioned in Chapter 1, there are three 
 basic parameters of interest, namely, the number of 
 switches, the number of control states and the number of 
 
59 
 
 steps required to carry out the sorting operation. 
 Several simple models of magnetic bubble memories and 
 their corresponding sorting algorithms are proposed and 
 analyzed in terms of these three basic parameters. We 
 shall see how sorting time is affected by the choice of 
 the number of switches and the number of control states. 
 Similar results, of course, have been observed in the last 
 chapter when the problem of permutation of data was 
 studied. 
 
 The first two models of bubble memories (Model 
 4.1 and 4.2) are straight- forward implementations of 
 "bubble" sort and odd-even transpositon sort respectively. 
 Models 4.3 and 4.4 are built on the first two models and 
 use the concept of bitonic sort introduced by Eatcher 
 [16]. 
 
 4.1. Basic Model 
 
 We assume that a magnetic bubble memory consists of loops 
 of bubble domains. All the loops are continuously 
 circulating at the same speed in counter-clockwise 
 direction. Each bubble domain represents one bit of 
 information. The basic information unit we are interested 
 
60 
 
 in is a record, which consists of r bits, the first k bits 
 of which are called the key field. The records are to be 
 sorted according to their keys. The number of bubble 
 domains in each loop is assumed to be an integral multiple 
 of the record size. Thus, when we say the size of the 
 loop is m, we mean that the loop contains m records. The 
 time required to move a bubble domain for the distance of 
 r bubble positions is defined as one step, which is our 
 basic time unit. A move (d) instruction, used in the 
 latter sections, will mean circulating the loop of bubble 
 domains in question for d record lengths. V'hen d=l, we 
 shall sirnly say "move". 
 
 Records can pass from one loop to the other 
 through a "compare and steer" switch (switch for short) 
 placed between two loops. Each switch has four modes of 
 operation (See Figure 4.1): 
 
 1. a -> c, b -» d. 
 
 2. b -> c, a -> d. 
 
 3. If key (a) < key (b) then a -> c, b -» d; 
 
 else b -> c, a -* d. 
 
 4. If key (a) > key (b) then a -» c, b •» d ; 
 
 else b -» c, a -» d. 
 The first two modes indicate fixed routes for the records. 
 Ve shall refer to mode 1 as the "closed" mode and mode 2 
 as the "through" mode. The third and fourth modes 
 describe the routes of the records after a comparison. 
 
61 
 
 a d 
 
 (a) A COMPARE AND STEER SWITCH 
 
 c v / 
 
 a' 'd 
 
 MODE 1 
 
 a' *d 
 
 MODE 2 
 
 min (a,b) b max(a,b) b 
 
 / 
 
 max (a,b) a min (a,b) 
 
 MODE 3 
 
 MODE 4 
 
 (b) THE FOUR MODES OF A SWITCH 
 
 Figure 4.1. The Four Modes of a Compare and Steer Switch 
 
62 
 
 Thus, they will be referred to as "compare" modes. Such 
 comparisons can be done by comparing the bubbles pair by 
 pair as they pass through the switch. There is no need 
 for lookahead or memories. A similar switch has been 
 proposed and its feasibility demonstrated. [19] 
 
 In general, a model with x switches may have a 
 total of 4 x possible states. However, in our proposed 
 sorting algorithms only a small subset of them will be 
 required. The cardinality of this subset is the number of 
 control states necessary. 
 
 4.2. Model 4.1 
 
 A simplest model of bubble memories in which sorting can 
 be done consists of two loops and a switch. One loop is 
 of size 1; the other loop of size (n-1) . In Figure 4.2a, 
 the loop of size 1 is labelled 7; the two records in the 
 other loop which are on the opposite side of the switch 
 are labelled X and Y. The loops are circulating in 
 counterclockwise dircection. The records X and Y 
 corespond to a and c respectively in Figure 4.1 and the 
 record Z corresponds to to both b and d. Suppose the 
 switch is set to mode 2 ("through" mode) , then after a 
 
nH a 
 
 (a) MODEL 1 : ARROWHEAD DESIGNATES 
 BEGINNING OF RECORD 
 
 
 
 X 
 
 (b) A SIMPLIFIED VERSION OF (a) 
 
 SMALLEST LARGEST 
 
 -O KEY KEY 
 
 (c) TYPE 1 : SORTED KEYS IN ASCENDING ORDER 
 
 (d) TYPE 2: SORTED KEYS IN DESCENDING ORDER 
 
 Figure 4.2. Model 4.1. 
 
64 
 
 "move" instruction, record X will move to the original 
 position of Z, and Z will move to that of Y, and the rest 
 of the records will move for one record length in 
 counterclockwise direction. If the switch is set to mode 
 3 ("compare" mode), then after a "move" instruction, the 
 smaller of X, Z will move to the original position of Y 
 and the larger will occupy that of Z. Thus if the switch 
 is set to this mode for (n-1) steps, the largest of all 
 the records will be at the original position of Z. The 
 sorting algorithm proposed in Algorithm 4.1 is a modified 
 "bubble" sort, where the records are sorted in ascending 
 or descending ordering according to whether the parameter 
 "type" has the value of 1 or 2. 
 
 ALGORITHM 4.1. Sort n records in Model 4.1 
 
 procedure sortl (n, type) ; 
 
 (* if type=l, sort in ascending order (Figure 4.2c) *) 
 (* if type=2, sort in descending order (Figure 4. 2d) *) 
 begin for i:=l to n-1 do 
 
 begin switch :=type+2; (* set switch to sort mode *) 
 move (n-1) ; 
 
 switch: =2; (* set to through mode *) 
 move 
 end 
 end; 
 
 As an example, let n=8, type=l. The input 
 sequence is (4, 3, 6, 2, 1, 7, 5, 8) and the output 
 sequence will be (1, 2, 3, 4, 5, 6, 7, 8). Some 
 configurations after execution of certain steps of the 
 algorithm are displayed in Figure 4.3. 
 
65 
 
 7 5 8 
 
 • 4 
 
 I 3 O 
 
 2 6 3 
 
 INPUT SEQUENCE 
 
 5 8 3 
 
 a- 
 
 1 2 6 
 
 AFTER i =1 , j = 1 
 
 6 5 7 
 
 1 
 
 '8 
 
 2 4 3 
 AFTER i=l, j = 7 
 
 5 7 8 
 
 1 2 4 
 AFTER SWITCH = 2 AND MOVE 
 
 5 6 7 
 
 • 8 
 
 3 2 1 
 AFTER i=7, j=7 
 
 ^> 5 
 
 6 7 8 
 
 o 
 
 4 3 2 
 AFTER SWITCH = 2 AND MOVE 
 
 Figure 4.3. Example of Sorting in Model 4.1. 
 
66 
 
 Clearly, the total number of steps to sort n 
 records is given by 
 
 Sl(n) = n(n-l) = n 2 - n. 
 The number of switches in this model is 
 
 Wl(n) = 1. 
 Since the switch can only be in mode 2, 3, or 4, the 
 number of control states is 
 
 Cl(n) = 3. 
 
 4.3. Model 4.2 
 
 In this model of bubble memory, parallelism is fully 
 exploited by having a bubble structure of n loops, one for 
 each record. There is a switch s[i] between loop i and 
 loop i+1, for i=l, 2, ..., n-1. (See Figure 4.4a.) This 
 memory structure is identical to the uniform ladder [9,10] 
 described in Chapter 2, execpt that the compare and steer 
 switches are used instead of the conventional 2-input 
 2-output switches. The sorting algorithm used is a 
 adoptation of the even-odd transposition sort (described 
 in Chapter 2) . 
 
67 
 
 LOOP 
 
 SWITCH 
 
 
 
 B 
 
 
 
 2 n-1 
 
 H • •• IS 
 
 n 
 
 
 
 n-2 
 
 s n-l 
 
 (a) MODEL 2 
 
 O 
 
 SMALLEST 
 KEY 
 
 LARGEST 
 KEY 
 
 (b) TYPE 1 SORTED KEYS 
 
 -O 
 
 LARGEST 
 KEY 
 
 SMALLEST 
 KEY 
 
 (c) TYPE 2 SORTED KEYS 
 
 Figure 4.4. Model 4.2 
 
68 
 
 ALGORITHM 4.2. Adaptation of even-odd transportation sort 
 for Model 4.2. 
 
 procedure sort2 (n,type) ; 
 
 (* type=l: sort in ascending order, starting from 1 *) 
 (* type=2: sort in descending order *) 
 (* initially, the beginning of the records in loop i 
 
 and loop i+i are at switch i, for i odd *) 
 begin 
 
 for i:=l to n do 
 
 if odd(i) then switch [i] :=type+2 
 else switchfi] :=1; 
 
 (* set odd switch to "compare", even ones to "closed"*) 
 
 move (1/2) ; 
 
 for i:=l to n-1 do switch [i] :=type+2; 
 
 (* set all switch to "compare" mode*) 
 
 move( [(n-l)/2j + 1/2) ; 
 
 (* the comparison/exchange is done simultaneouly at 
 the even and odd switches in an alternate fashion*) 
 end; 
 
 In Figure 4.5, and example for n=6, type=l is given, where 
 the configurations after every half step are shown. In 
 general, we have the number of steps for this algorithm: 
 
 S2(n) = n/2, 
 the number of swtches: 
 
 V2 (n) = n-1, 
 and the number of control states: 
 
 C2(n) = 2. 
 
 4.4. Eitonic Sorting 
 
 The next two models of bubble memory use the concept of 
 
69 
 
 Loop Input 
 Sequence 
 
 1 
 
 
 2 
 
 
 3 
 
 
 4 
 
 
 5 
 
 
 6 
 
 
 
 * 
 
 i 
 
 i 
 
 
 - 
 
 1 
 
 2 
 
 V 
 
 
 
 
 
 
 i 
 
 i 
 
 V 
 
 
 
 
 I 
 
 1 
 
 
 ■ 
 
 
 
 A 
 
 i 
 
 1 
 
 
 
 i 
 
 > 
 
 
 A 
 
 / 
 
 
 4 
 
 
 3 
 
 6 
 
 
 5 
 
 
 
 3 
 
 s/ 
 
 
 \ 
 
 1 
 
 V 
 
 
 
 
 
 i 
 
 i 
 
 
 ' 
 
 
 i 
 
 ' 
 
 i 
 
 i 
 
 
 /\ 
 
 i 
 
 i 
 
 
 /\ 
 
 i 
 
 i 
 
 
 2 
 
 
 
 4 
 
 
 6 
 
 
 5 
 
 
 
 
 
 1 
 
 
 
 
 5 
 
 
 
 i 
 
 
 - 
 
 1 
 
 1 
 
 i 
 
 i 
 
 i 
 
 i 
 
 2 
 
 
 3 
 
 
 
 4 
 
 
 6 
 
 
 
 1 
 
 
 
 i 
 i 
 
 
 
 
 
 
 / 
 
 ■ 
 
 ■ 
 
 i 
 
 i 
 
 i 
 
 1 
 i 
 
 i 
 
 2 
 
 
 3 
 
 4 
 
 5 
 
 
 6 
 
 1 
 
 V 
 
 
 
 
 
 
 . 
 
 
 
 
 ' 
 
 
 1 
 
 ! 
 
 
 r 
 
 
 
 
 /s 
 
 i 
 
 1 
 
 
 < 
 
 i 
 
 ■ 1 
 
 
 
 i 
 
 
 2 
 
 
 3 
 
 4 
 
 5 
 
 
 6 
 
 
 < 
 
 - 
 
 
 
 i 
 
 
 ' 
 
 f 
 
 i 
 
 1 
 
 
 
 i 
 
 i 
 
 
 
 i 
 
 I 
 
 
 Figure 4.5. Example of Sorting in Model 4.2. 
 
70 
 bitonic sorting first introduced by Batcher [16]. V7e 
 present some definitions and a theorem here, which will be 
 needed later. 
 DEFINITION 4.1. Let 
 
 a i a 2 "•' V 
 
 b b ... b . , 
 
 1 2 k* 
 
 such that k+k'=n, then the sequence (or any cyclic 
 shift thereof) 
 
 a i a 2"- a k b k'"- b 2 b l 
 is called a bitonic sequence. 
 
 DEFINITION 4.2. The process of sorting a bitonic sequence 
 
 in order is called a bitonic sort. 
 
 THEOREM 4.1. If a a ...a (n even) is a bitonic sequence. 
 
 1 2 n 
 
 then the sequences (note: min(x,y) and max(x,y) 
 means the smaller and the larger of x and y 
 respectively) 
 
 (1) min(a ,a ), min (a ,a ) , . . . , min(a ,a ) 
 
 1 *sn+l 2 *sn+2 *jn n 
 
 (2) max(a lf a^ n+1 ), ^(a^a^),..., max (a %R , a J 
 are also bitonic sequences, and all the numbers in 
 the first sequence is no larger than any number in 
 the second sequence. 
 
 DEFINITION 4.3. The process of separating a bitonic 
 
 sequence into two such sequences is called a bitonic 
 spliting. 
 
 COROLLARY 4.2. Theorem 4.1 gives following bitonic 
 
 sorting algorithm for a bitonic sequence a,a_...a : 
 
 12 n 
 
 Bitonic sort [a.a_...a ] 
 
 12 n 
 
71 
 
 = Bitonic sort [min(a_,a 1 _), ..., min(a ,a )], 
 
 1 *jn+i *sn n 
 
 Bitonic sort [max (a .a, ,) , . .., max (a, , a )]. 
 
 1 *sn+l *sn n 
 
 4.5. Model 4.3. 
 
 In this model there are m loops each of size h (i.e. 
 n=hm) . These loops, referred to as "basic" loops, are 
 numbered 1, 2, ..., m. We assume that m is a power of 2. 
 There is a switch s[i] between loop i and loop (i+1) for 
 i=l, ..., m-1. Each basic loop is of the structure of 
 Model 4.1, i.e. each loop consists of two smaller loops 
 and a switch between them. One of these two loops is of 
 size 1 and is called the "head" of the whole loop. This 
 switch is called t[i] if the loop is numbered i. For i=l, 
 3, ..., m-1, the heads of loops i and i+1 are placed next 
 to the switch s[i], (See Figure 4.6a) 
 
 Algorithm 4.3 describes how a bitonic sort can 
 be adopted in our bubble memory structure of Model 4.3. 
 The procedures used here need some explanations. The 
 procedure "sortla (p, type)" sorts the loop p in either 
 ascending or descending order according to the type 
 required. This is exactly the procedure "sortl" in 
 Algorithm 4.1 except that p is used here to identify the 
 loop in which sorting is done. 
 
72 
 
 Loop 
 1 
 
 
 2 
 
 IS 
 s 2 
 
 3 
 
 
 4 
 
 K 
 
 B 
 
 SI 
 
 B 
 
 B 
 
 B 
 
 Switch 1 
 
 s l 
 
 f 2 
 
 f 3 
 
 s 3 
 
 U 
 
 m-1 
 
 m 
 
 El • • • 
 
 t s t 
 
 (a) MODEL 3 
 
 Loop 
 
 i + 1 
 
 (b) A BIG LOOP IS FORMED 
 
 AFTER SWITCHES tj ,Sj ,t j+1 
 ARE SET TO MODE 2 
 
 Figure 4.6. Model 4.3. 
 
73 
 
 ALGORITHM 4.3. Sort n records in Model 4.3 Memory 
 
 procedure sort3 (p,q, type) ; 
 
 (* sort q loops, starting at loop p, according to "type" 
 (Figure 4.7c) . h is the size of the basic loops.*) 
 
 procedure sort la (p, type) ; 
 
 (* sort loop p according to "type" (Fig 4.2)*) 
 
 begin for i:=l to h-1 do 
 
 begin t[p] :=type+2; (*set t switches to compare*) 
 move (h-1) ; 
 t[p]:=2; 
 move 
 end 
 end; 
 
 procedure bitonic sort (p,q, type) ; 
 
 (* bitonic sort q loops starting from loop p, according 
 to "type" (Fig. 4.7b,c) *) 
 
 procedure shif t (p,q,x) ; 
 
 (* shift q loops, starting from loop p, by x positions*) 
 begin for i:=p to p+q-2 do 
 
 begin s[i]:=2; t[i]:=2 end; 
 
 t[p+q-l]:=2; 
 
 move (x) 
 end (*shift*); 
 
 procedure bitonic_split (p,q,type) ; 
 (* bitonic split q loops, starting from loop p, accordng 
 
 to "type" (Fig. 4.7a) *) 
 begin 
 
 for i:=p to p+q-2 do 
 
 begin s[i]:=2; t[i]:=2 end; 
 
 t[p+q-l] :=2; 
 
 s [p+q/2-1] :=type+2 ; (*set middle switch to compare*) 
 
 move (q*h/2) 
 end (*bitonic split*) ; 
 
74 
 
 ALGORITHM 4.3. (cont. ) 
 
 begin (*bitonic_sort*) 
 if q=l then 
 
 if (type=l) or (type=2) then sortla(p,l) 
 else sortla(p,2); 
 else begin 
 
 if (type=l) or (type=3) then bitonic_split (p,q, 1) 
 
 else bitonic split (p,q, 2) ; 
 
 s [p+q/2-1] :=T; (*close middle sv;itch*) 
 
 if (type=l) or (type=2) 
 
 then simultaneously begin 
 bitonic__sort (p,q/2,l) ; 
 bitonic__sort (p+q/2,q/2,2) 
 end 
 
 else simultaneously begin 
 bitonic_sort (p, q r 4) ; 
 bitonic__sort (p+q/2,q/2, 3) 
 end; 
 shif t (p,q,q*h/4) (*to correct position*) 
 end 
 end (*bitonic__sort*) ; 
 
 begin (*sort3*) 
 if size=h then 
 
 if type=l then sortla(p,l) 
 else sortla(p,2); 
 else begin s [p+q/2-1] :=1; (*close middle switch*) 
 simultaneously begin 
 sort3 (p,q/2, 1) ; 
 sort3 (p+q/2,q/2, 3) 
 end; 
 
 bitonic_sort (p,q, type) 
 end 
 end (*sort3*) ; 
 
75 
 
 The procedure "shift (p, q, x) " first forms a 
 big loop out of q basic loops, starting from loop p. The 
 resulting loop is then cyclically shifted by x record 
 length. 
 
 The procedure "bitonic_split (p, q, type)" first 
 forms a big loop out of q basic loops, starting from loop 
 p. It assume that the records in this loop form a bitonic 
 sequence. By setting the middle switch (i.e. s[p+q/2-l]) 
 to "compare" mode, the records are separated into two 
 halves, so that according to Theorem 4.1, records in the 
 first q/2 basic loops (starting from loop p) and records 
 in the next q/2 basic loops each forms a bitonic sequence. 
 If type=l, we set the middle switch to mode 3, so that 
 after bitonic splitting, records in the first q/2 basic 
 loops are less than that in the next q/2 loops. If 
 type=2, the middle switch is set to mode 4, so that after 
 bitonic splitting, records in the first q/2 loops are 
 greater than that in the next q/2 loops. (See Figure 
 4.7a) 
 
 The procedure "bitonic_sort (p, q, type)" sorts 
 the reocrds in loop p, p+1, ..., P+q-1 in order, given 
 that these reocrds initially form a bitonic sequence, and 
 according to the procedures in Corollary 4.2. There are 4 
 types of order that the records can be sorted into (see 
 
76 
 
 b > b 
 
 TYPE 1 
 
 TYPE 2 
 
 (a) BITONIC SPLIT*, b MEANS BITONIC SEQUENCE 
 
 TYPE 1 : 
 
 b 
 
 TYPE 2 •• 
 
 b 
 
 TYPE 3 : 
 
 b 
 
 TYPE 4 : 
 
 b 
 
 ~z> 
 
 z> 
 
 < 
 
 -O 
 
 -O 
 
 -O 
 
 > 
 
 ♦ o 
 
 o 
 
 (b) BITONIC SORT 
 
 ■O 
 
 TYPE 1 
 
 TYPE 2 
 
 TYPE 3 
 
 TYPE 4 
 
 (c) SORTED ORDER IN MODEL 3 
 
 Figure 4.7. Different Types of Bitonic Split, 
 Bitonic Sort, and Sort. 
 
77 
 
 Figure 4.7b). For example, if the required type is 1, 
 then the given bitonic sequence is split into two halves, 
 with records in the first half smaller than those in the 
 second half. They are then sorted in order: the first 
 half according to type 1, the second half according to 
 type 2. Finally, they are pieced together and shifted 1/4 
 of the length of all the records. Note that when q=l, 
 i.e. when only one basic loop is involved, then records 
 are sorted in order by procedure "sortla". Note also that 
 sorting of the first half and the second half are carried 
 out in parallel. 
 
 Finally, procedure "sort3 (p,q,type)" sorts the 
 records in loop p, p+1, . .., p+q-1 in order. The first 
 q/2 loops and the next q/2 loops are separately but 
 simultaneouly sorted in order (recursively) , one in 
 ascending order, and the other in descending order, so 
 that they form a bitonic sequence. They are then sorted 
 in order by calling the procedure "bitonic__sort" . We also 
 have 4 types of sorted order as indicated in Figure 4.7c. 
 
 An example of sorting is given in Figure 4.8, 
 for a memory of 8 basic loops, for type=2. Line 1 is the 
 input sequence, which is distributed among the 8 loops. 
 Line 2 shows the result of sorting individual loops 
 simultaneously by the procedure "sortla". Note that 
 odd-numbered loops are sorted according to type 1 while 
 
78 
 
 -INE 
 1 
 
 2 
 
 3 
 
 4 
 
 5 
 
 6 
 
 LZJ LZ 
 
 1 
 
 1 
 
 1 
 
 
 1 1 
 
 1 
 
 I 
 
 
 1 1 
 
 1 
 
 1 
 1 
 1 
 1 
 
 1 I 1 
 
 
 
 
 
 1 
 
 
 
 
 
 
 
 
 -o o 
 
 1 
 
 
 -o o 
 
 1 
 
 * • 1 
 
 vJ U 
 
 
 O O ■' 
 
 b < b 
 
 
 b 
 
 < b 
 
 1 
 
 1 
 
 b 
 
 l<l b 
 
 1 
 
 b hi b 
 
 t» r^ 
 
 
 
 r\ -* 
 
 
 ^^ ~a 
 
 » < o 
 
 1 o «• — 
 
 
 -♦ o — 
 
 1 
 
 1 
 
 
 * < ° 
 
 -o -• — 
 
 < m 
 
 ^ o , 
 
 ■o o- 
 
 < 
 
 -o o 
 
 < 
 
 7 (qt3 s DrJsjjO - Qj (d 
 
 t 
 
 9 ( 
 
 10 
 
 -o 
 
 a- 
 
 »t?«:=) 
 
 O 
 
 -O 
 
 D- 
 
 -^ >♦- 
 
 (c 
 
 11 
 
 12 , 
 
 13 (I b |<| b 
 14 
 15 
 16 
 
 -O O 
 > 
 
 > 
 
 M 
 
 ) 
 
 QjNtO 2 CE^t° * CEHX) * E} 
 
 < 
 
 -o +- 
 
 M 
 
 17 
 
 Figure 4.8. Example of Sorting in Model 4.3. 
 
79 
 
 even-numbered loops are sorted according to type 2 . As a 
 result, loop i and (i+1) form a bitonic sequence for i=l, 
 3, 5, 7. Line 3 shows the result of applying bitonic 
 split with type=l to these four bitonic sequences. 
 Individual loops are sorted again in line 4, with types=l, 
 1, 2, 2, 1, 1, 2, 2 respectively. Now each pair of loops 
 form a sorted sequence. Line 5 shows the result of 
 shifting the four sorted sequences by 1/4 of their 
 lengths. Thus the first and the last two sequences each 
 form a bitonic sequence. Simultaneous application of 
 bitonic sorting to these two sequences give us two sort 
 sequences at line 10, which also form a bitonic sequence. 
 Aplication of bitonic sorting to this sequence finally 
 produce the desired sorted sequence. 
 
 We now study the complexity of the sorting 
 algorithm in Model 4.3. Let B(n) be the number of steps 
 to bitonic sort n records. Then 
 
 B(n) = n/2 + B(n/2) + n/4 
 
 = B(n/2) + (3/4)n 
 
 2 
 with B(h)=h -h. The term (n/2) comes from the bitonic 
 
 split and the term (n/4) is the result of shifting the 
 
 whole sequence for one quarter of the length. The initial 
 
 condition B(h) comes from Model 4.1. Solving the 
 
 recurrence relation, we have 
 
 B(n) = (3/2)n + h 2 - (5/2)h. 
 
80 
 
 Let S3 (n) be the number of steps to sort n 
 records in Model 4.3 then 
 
 S3(n) = S3(n/2) + B(n) 
 
 - S3(n/2) + (3/2)n + h 2 - (5/2)h 
 
 2 
 
 with initial condition S3(h)=h -h. Thus, 
 
 S3(n) = 3n+(h 2 -h)lgn - h 2 (lgh-l) + high - 4h. 
 
 So far the size of the basic loops has not been 
 specified. If we let h= /n , then 
 
 S3 (n)=3n+ (n-/n) lgn - n (lg>/n-l)+/nlg»/n -4/n 
 = (l/2)n lg n + 0(n) . 
 If however, we let h=/(n/lgn) , then 
 S3(n)=(7/2) n + (nlglgn/lgn) . 
 
 We can now count the number of switches and 
 control states. Recall that m is the number of loops 
 (n=mh) , we note that the total number of control states 
 depends on m only. Moreover, whenever the t-switches are 
 set to modes 2, 3, or 4, i.e. when sorting is being done 
 in the basic loops, the s-swiches are set to mode 1 
 ("closed mode) . On the other hand, if the s-switches are 
 not in mode 1, then the t-switches are in mode 2. 
 Therefore, if we let Cs (m) and Ct(m) be the respective 
 numbers of control states of the s-switches and 
 t-switches, then the total number of control states C3 (m) 
 
81 
 
 is given by 
 
 C3(m) = Cs(m) + Ct(m) - 1. 
 
 It is easy to see that during the sorting 
 process only a total of lgm + 2 distinct control states 
 for the t-switches are needed, i.e. Ct(m)=lgm +2. In 
 fact they can be explicitly enumerated as follows: 
 
 Control 
 state 
 
 t[l] t[2] t[3] t[4] 
 
 t[ra] 
 
 lgm + 2 
 
 3 4 . 
 
 3 3 . 
 
 4 4 4 
 
 3 3 3 3 
 
 In the example of Figure 4.8, in all lines where 
 no sorting of the basic loops is involved, t-switches are 
 are in control state 1. This is the case in all lines 
 except 2, 4, 8, and 14, in which case the t-switches 
 assume the states 2, 3, 4, and 5 respectively. 
 
 To compute Cs(m), we look at the process of 
 bitonic sorting more carefully. Given a bitonic sequence, 
 this process splits the sequence up into two halves, each 
 of which is a bitonic sequence. Two kinds of operations 
 
82 
 
 are involoved, namely, bitonic split and shift. 
 Furthermore, at any time only one of the two is in 
 operation. There are exactly lg m kinds of shifts, 
 namely, (1) all m loops form a big loop and shift; (2) 
 first m/2 loops form a big loop, and the second m/2 loops 
 form another big loop, and they shift simultaneouly; (3) 
 every m/4 loops form a big loop and shift, and so on. The 
 corresponding control states for the s-switches are as 
 following: 
 
 Control 
 state 
 
 lg m 
 
 s[l] 
 
 s[m/4] 
 
 2 
 
 2 
 
 2 12 
 
 s[m/2] 
 
 2 
 2 12 
 2 12 
 
 s[3m/4] 
 
 s[m-l] 
 
 2 
 
 2 
 
 2 12 
 
 21.. 212 1.. 212 1... 2121... 2 
 
 Let the number of occurrences of bitonic splits 
 in a bitonic sorting of m loops be B'(m). Then 
 
 B' (m) = 1 + E 1 (m/2) 
 with initial condition B' (1)=0, where the "1" in the above 
 equality denotes one occurrence of bitonic split. Thus 
 E' (m) = lg m. 
 
 Let the number of occurrences of bitonic splits 
 in the sorting procedure be B" (m) . Then 
 
83 
 
 B M (m) = B M (m/2) + B' (m) 
 with B" (1)=0. Thus 
 
 B"(m) = (l/2)lg 2 m + (l/2)lgm. 
 
 Since each such occurrence in our sorting 
 procedure requires a distinct control state, the 
 corresponding number of control states is also B" (m) . 
 Thus the total number of control states for the s-switches 
 
 is 
 
 Finally, 
 
 Cs(m) = (l/2)lg 2 m + (3/2) lg m. 
 
 C3(m) = (l/2)lg 2 m + (5/2) lgm + 1. 
 
 Total number of switches is sum of the 
 s-switches and the t-switches. Thus, 
 W3(m) = 2m -1. 
 
 When h=m=vfi, we have 
 C3(n) = (l/8)lg 2 n + (5/4)lgn + 1, 
 W3(n) = 2 fa -1. 
 When h= /(n/lgn) , m= Ai lg n, we have 
 
 C3(n) = (l/8)lg 2 n + 0(lgn lglgn) , 
 W3(n) = 2 A lg n - 1. 
 
84 
 4.6. Model 4.4 
 
 In the last section, we saw how Batcher's bi tonic sorting 
 scheme can be adapted to sorting in bubble memories. 
 Sorting is carried out with certain degree of parallelism. 
 In this section, we attempt to further reduce the number 
 of switches and control states by implementing the bitonic 
 
 sorting scheme in a serial fashion. This model of memory 
 
 k— 2 
 system consists of k loops of sizes 1, 1, 2, 4, ..., 2 , 
 
 that is, n=2*""-'-. There is a switch between adjacent loops 
 
 with a total of (k-1) switches designated s[l], s[2], ..., 
 
 s[k-l]. See Figure 4.9. 
 
 We also sort the records in this model by 
 implementary bitonic sorting scheme. It differs from from 
 Model 4.3 in that during the sorting process, the larger 
 loops are used mainly as temporary storage while the 
 sraller loops do the actual sorting. 
 
 Some procedures used in Algorithm 4.4 is quite 
 similar to the ones used in Algorithm 4.3 and would only 
 be mentioned briefly. The procedure M sort2a (delay, 
 type)" sort the two records in the first two loops in time 
 "delay" steps, where "delay" is assumed to be even. Since 
 the two records can be sorted in atmost 2 steps, the 
 records are circulating idly for the rest of the time. 
 The reason for introducing the delay would be given later. 
 
85 
 
 LOOP 
 
 1 2 
 
 3 
 
 
 4 
 
 
 H 
 
 
 EI 
 
 
 B 
 
 
 s l s 2 s 3 
 
 s 4 
 
 (a) M0DEL4 
 
 -O 
 
 TYPE 1 TYPE 2 
 
 (b) SORTED ORDER IN SORT_2a 
 
 C3-D0 
 
 C3 
 
 (c) AN EXAMPLE OF SORT. 2a 
 
 BfrD 
 
 •>&> 
 
 D 
 
 t> 
 
 a-co 
 
 I — o 
 
 (d) BITONIC SORT 
 
 Figure 4.9. Model 4.4 
 
86 
 
 iLGORITHI' 4.4. Sort n records in Model 4.4 Memory 
 
 procedure sort4 (p,type) ; 
 (* sort the first p loops according to "type" (Fig. 4.9d)*) 
 
 procedure sort2a (delay, type) ; 
 
 (* sort 2 records in the first 2 loops in time "delay" 
 
 (assumed even) and according to "type" (Fig. 4.9b) *) 
 begin s [1] :=2; 
 
 move (1/2) ; 
 
 if type=l then s[l]:=4 
 else s[l] :=3; 
 
 move; (*records are in desired order nov/*) 
 
 s[l]:=2; move(delay-3/2) (*idle*) 
 end (*sort2a*) ; 
 
 procedure shift(p,x); 
 
 (* shift the first p loops by x positions *) 
 begin for i:=l to p-1 do s[i]:=2; 
 
 move (x) 
 end (*shift*); 
 
 procedure bitonic sort (p, type) ; 
 
 (* bitonic sort first p loops according to "type" 
 ( Figure 4.9d) *) 
 
 procedure bitonic plit (p, type) ; 
 
 (* bitonic split First p loops according to "type" 
 (Figure 4.9d) *) 
 
 begin for i:=l to p-2 do s[i]:=2; 
 
 s [p-1] :=type+2; (*set to compare mode*) 
 move (2 t (p-1) ) (*xfy mean x to the power y*) 
 
 end (* bitonic split*); 
 
87 
 
 ALGORITHM 4.4. (Cont.) 
 
 begin (*bitonic_sort*) 
 if p=2 then sort2a(4) 
 else begin move ( (3/4) *2 +(p-l) ) ; (*idle*) 
 
 bitonci__split (p,3-type) ; 
 
 bitonic_sort (p-l,type) ; 
 
 shift (p,2 +(p-2) ) ; (*exchange two halves*) 
 
 bitonic__sort (p-l,type) ; 
 
 shift (p, 2 +(p-3) ) (*shift to desired conf.*) 
 end 
 end (*bitonic_sort*) ; 
 
 begin (*sort4) 
 
 if p=2 then sort2a(6) 
 else begin move (2+ (p-2) ) ; (*idle*) 
 sort4 (p-1,2) ; 
 
 shift (p,2 + (p-2) ) ; (*exchange two halves*) 
 sort4 (p-1,1) ; 
 bi tonic__sort ( si ze , type ) 
 end 
 end (*sort4*) ; 
 
88 
 
 We also sort the records in two different configurations 
 as depicted in Figure 4.9b, according to the value of the 
 parameter "type". An example is shown in Figure 4.9c, 
 where two records a and b(a<b) are to be sorted according 
 to type 1 with delay=4. The first configuration is the 
 input, the second is the result of setting switch to mode 
 2 for haft a step. The switch is then set to mode 4 for 1 
 step, arriving at configuration 3. Finally, we set the 
 switch to mode 2 and let the loop idle for one and half 
 steps to arrive at the final configuration. 
 
 Procedure "shift (p,x)" forms a big loop out of 
 the first p loops, and shifts the resulting loop by x 
 steps. 
 
 Procedure "bitonic_split (p, type) " performs a 
 bitonic split of the first p loops according to the 
 disired type. If type=l then records in the first p-1 
 loops are smaller than those in the p-th loop; if type=2, 
 otherwise. See Figure 4.7a. 
 
 Procedure "Bitonicjsort (p, type)" sorts the 
 records that form a bitonic sequence in the first p loops 
 into ascending or descending order as specified by "type" 
 (see Figure 4.9d). This procedure is similar to the one 
 in Algorithm 4.3, except that in the recursive step, the 
 sorting of two halves of the loop (called LI and L2 
 
89 
 respectively) are not done in parallel. Ll is sorted 
 first while L2 is idling. Ll and L2 are then interchanged 
 by shifting the combined loop and L2 is then sorted with 
 Ll idling. However, if the combination of these two 
 sorted sequences is to form a sorted sequence, the 
 relative positions of the records in Ll and L2 must be 
 maintained carefully. Specifically, when the sorting of 
 L2 is done, the beginning of Ll should be at the switch 
 separating Ll and L2. Let B(n) be the number of steps to 
 sort a bitonic sequence of size n. Since the sizes of Ll 
 L2 are equal, we require that B(n) be a multiple of n. To 
 achieve this, a delay of 3n/4 is introduced before sorting 
 starts, and the initial condition B(n)=4 imposed. Thus, 
 B(n) = 3n/4 + n/2 + B(n/2) + n/2 + B(n/2) + n/4 
 
 = 2B(n/2)+ 2n 
 
 = 2n lg n. 
 
 Procedure "sort4 (p, type)" sorts first p loops 
 in order according to types 1 or 2 as specified in Figure 
 4.9b. The two halves of the records are each sorted in 
 oder, one in ascending and one in descending order, 
 forming a bitonic sequence. Again, to ensure proper 
 positioning of the records, a delay of n/2 is introduced 
 at start and initial condition of S4(2)=6 required, where 
 S4(n) is the number of steps to sort n records. Thus, 
 
 S4(n) = n/2 + S4(n/2) + n/2 + S4(n/2) + B(n) 
 = 2S4(n/2) + 2n lg n + n 
 
90 
 = nlg 2 n + 2 nig n. 
 
 The total number of switches in this model is 
 W4(n) = k - 1 = lg n. 
 
 To count the number of control states for the 
 switches, we first note that when the first two loops 
 (each of size 1) are doing sorting all the other switches 
 are set to "closed" mode (mode 1) . During this sorting 
 process, the switch s[l] can be in modes 2, 3, or 4. 
 
 In procedure "sort4", two basic operations are 
 in execution, namely, shifts and bitonic splits. To count 
 the maximum number of control states possible when a shift 
 is in execution, we first note that switch s[l] is always 
 in mode 2. When the shift is being done for the first 
 three loops, the first 2 switches are in mode 2, while the 
 others are in mode 1. By the same reasoning, all the 
 possible control states for shifts of loops of various 
 sizes are as follows: 
 
91 
 
 s[l] s[2] s[3] s[4] s[5] . . . s[k-l] 
 
 2 2 1 1 1 . . . 1 
 
 2 2 2 1 1 . . . 1 
 
 2 2 2 2 1 . . . 1 
 
 • • • 
 
 with a total of k-2=lgn -1 states. 
 
 To count the possible number of control states a 
 bitonic split can be in, we note that the switch s[l] is 
 always in mode 2. If the split occurs in the first 3 
 loops, then s[2] can be in mode 3 or 4. Thus by similar 
 reasoning, we have all the control states for bitonic 
 splits of loops of various sizes as follows: 
 
 s[l] s[2] s[3] s[4] s[5] . . . s[k-l] 
 
 2 3 111... 1 
 
 2 4 1 1 1 . . . 1 
 
 2 2 3 11... 1 
 
 2 2 4 11... 1 
 
 2 2 2 2 2... 3 
 2 2 2 2 2 . . . 4 
 
 with a total of 2(k-2) = 21gn - 2 states. 
 
92 
 
 Summing all these up, the total number of 
 control states is 
 
 C4(n) = 3 + lgn - 1 + 21gn - 2 
 =3 lg n. 
 
 7. Summary and Conclusion 
 
 The performance for the various models is summarized in 
 Table 4.1. 
 
 For applications where sorting time is not a 
 crucial factor, Model 4.1 is obviously the best choice, 
 because of its small number of switches and control states 
 and the simplicity of its control scheme. Model 4.2 seems 
 to require too many switches to be of any practical use. 
 But because of its ability to completely overlap 
 input/output operations with sorting, it might be of some 
 use in applications where n is small. It is interesting 
 to see how Batcher's bi tonic sorting scheme can be adapted 
 in a restricted memory system such as the bubble memories 
 (Model 4.3 and 4.4) and how the choice of the number of 
 switches and control states can affect the sorting time. 
 Model 4.3b is especially interesting since it can sort in 
 linear time without requiring 0(n) number of switches. 
 
93 
 
 Model 
 
 Number of 
 steps to sort 
 
 Number of 
 switches 
 
 Number of 
 control states 
 
 4.1 
 
 n - n 
 
 1 
 
 3 
 
 4.2 
 
 n/2 
 
 n - 1 
 
 2 
 
 4.3a 
 
 (h=/n): 
 
 
 
 4.3b 
 
 Inlgn + 0(n) 
 2 
 
 2/n - 1 
 
 ilg 2 n + 5-Lgn + 1 
 8 A 
 
 1 2 
 
 ■s-lg n +0(lgnlglgn) 
 
 (h=/n/lgn) : 
 4fi +0(nlglgn/lgn) 
 
 2/nlgn - 1 
 
 4.4 
 
 2 
 
 nig n + 2nlgn 
 
 lgn 
 
 31gn 
 
 Table 4.1 Summary of sorting Records in Bubble Memories. 
 
94 
 
 Little is known about the relationship among the 
 three parameters (i.e. sorting time, number of switches 
 and number of control states) for an optimal bubble 
 structure for sorting. For an linear array of loops, it 
 is obvious that 0(n) number of steps is necessary. Also, 
 from the information theoretic argument, we know that n lg 
 n comparisons are necessary in sorting. Therefore n lg n 
 is also a lower bound for the product 
 
 (number of step to sort) X (number of switches) 
 In this respect, Model 4.4 comes closest to this bound. 
 This lower bound, however, is probably too loose, since it 
 does not take into consideration of the restrictions 
 imposed by the structure of bubble memories. 
 
95 
 
 CHAPTER 
 
 TREE STORAGE SCHEMES 
 
 We have so far concerned ourselves with the 
 problem of data arrangement and sorting in bubble memories 
 in the last two chapters. In this chapter we turn to the 
 problem of maintaining data file in magnetic bubble 
 memories. We shall propose specific structures for 
 magnetic bubble memories in which records can be organized 
 in the form of a tree. We would like to be able to carry 
 out the operations usually associated with a data tree, 
 namely, searching for a record, inserting a new record 
 into the tree, and deleting a record from the tree. But 
 since bubble memories are intrinsically memories with 
 restricted access, such operations would be more difficult 
 to carry out than in a conventional random access 
 memories. We shall study efficient algorithms for these 
 operations. We would also like, on the other hand, to be 
 able to access the records in a sequential order and to 
 
96 
 maintain high degree of storage utilization. 
 
 In the first part of this chapter, a model for 
 the bubble memory in the form of a tree structure is 
 presented and a special 3-input 3-output switch 
 introduced. With a special ordering scheme for the memory 
 loops, and a set of independently controlled switches, we 
 
 show that searching a record in an n record file takes 
 
 2 
 time lg n/(21glg n)+0(lg n) . Insertion or deletion of a 
 
 record takes additional time lg n+0(l). Moreover, records 
 
 can be very easily ouput in sequential order. The only 
 
 drawback for such a scheme is the complexity of the 
 
 control mechanism, and the slightly inferior search time. 
 
 In the second part of this chapter, the model is 
 slightly modified, and another ordering scheme for the 
 loops presented. With only two control operations for the 
 switches, we show how searching, insertion and deletion of 
 records of the tree without balancing can be done. 
 Although in the worst case, space would be very poorly 
 ultilized, such a scheme can be useful in applications 
 where deletions and insertions are infrequent. In such 
 cases, records can be reorganized into completely balanced 
 tree by unloading and loading the whole file, each of 
 which takes 3n steps, and a (5/2) lg n search time can then 
 be achieved. 
 
97 
 
 5.1 Physical Model 
 
 The memory consists of k levels of loops. The levels are 
 numbered 0, 1,2, ... ,k-l, respectively, and level i has 2 
 loops. All the loops are of the same size, i.e. having 
 the same number of bits. Furthermore, we assume that each 
 loop occupies that same physical area. 
 
 The loops can fit into a rectangle of size h X w 
 as follows (See Figure 5.1): level has only 1 loop of 
 
 dimension h X ■ ?*,, ; level i has 2 loops, each of 
 
 h ^ w 
 dimension ~ X 
 
 i k-i+1* 
 2 2 
 
 There are 2 1 switches connecting loops at level 
 i to loops at level i+1. Each loop at level i is 
 connected to 2 loops at level i+1, as shown in Figure 5.1. 
 The functions of the switch will be specified in the next 
 section. In our model, we only require that the bubbles 
 circulate in one direction, say, the clockwise direction. 
 
 5.2 The Switch 
 
 The switches are located at the places where 3 loops meet, 
 
90 
 
 level 
 
 S? 3-input 3-output switch 
 
 Figure 5.1. A Memory of 4 Levels of Loops 
 
99 
 
 i.e. they are switches with 3 inputs and 3 outputs (See 
 Figure 5.2a). Each switch has 4 modes of operations: 
 
 (a) Detached :Ij-4 1 ,I 2 -> °2' I 3~" * °3 ? 
 
 (b) Left connected :I-j_— > C^,!^"** °i» I 3~'^ °3» 
 
 (c) Right connected: I -j— » 03,13— > O^^— > 2 ; 
 
 (d) Connected :Ii-* 03,13-* 2 #l2~"^ 0]_- 
 
 Figure 5.2b shows the 4 ways the loops can be connected 
 under these 4 modes of operation. 
 
 It should be pointed that such a switch can be 
 implemented by means of 2-input, 2-output switches and 
 delay elements. The 2-input, 2-output switch has two 
 modes of operation as depicted in Figure 2.5. In Figure 
 5.3, the implementation of the 3-input, 3-output switch is 
 shown, where D is a delay element, used to make bubbles in 
 each loop come out in phase. 
 
 5.3 Storage of Data 
 
 Since each loop is connected to two switches, to simplify 
 the storage scheme of data within the loops, we further 
 require that the two portions of any loop between the two 
 switches be of equal length. 
 
100 
 
 0. 
 
 4 — — 4 
 
 ►— — ► 
 
 II 
 
 O- 
 
 °2 *3 
 
 (a) 
 
 4 4 
 
 ► -j r- — ► 
 
 >— J ( | ► 
 
 Detached 
 
 Left Connected 
 
 
 4 1 1 4 
 
 * — r-i > 
 
 Right Connected 
 
 Connected 
 
 (b) 
 
 Figure 5.2. The Four Modes of Operations of a 
 3-Input 3-Output Switch. 
 
101 
 
 « — — 4 
 
 * 1 I —* 
 
 — 4 ' 
 
 
 
 i » 
 
 -4- 
 
 
 
 
 i 
 
 » i 
 i 
 
 L_. 
 
 x> 
 
 ■►■ 
 
 
 
 
 ^-P 
 
 i 
 _j_> 
 
 i 
 
 
 
 
 i 
 
 ' i 
 
 k 
 
 
 
 
 Delay Element 
 
 Figure 5.3. Implementation of the Switch Using 
 2-Input 2-Output Switches and 
 Delay Elements. 
 
102 
 
 In addition, there is another loop adjacent to 
 the loop at level 0. This loop is used as input/output 
 buffer only and is not used for the storage of data. This 
 buffer loop is connected to the loop at level by a 
 2-input, 2-output switch on one side and to a access port 
 on the other. Its function will become clear later. 
 
 From now on, we shall assume that each loop 
 contains a record. Schematically, our memory structure 
 can be represented by the graph in Figure 5.4, where the 
 nodes of the graph represent the loops. The nodes in the 
 graph form an obvious binary tree, namely, the node at 
 level is the root, the two nodes at level 1 are its 
 descendents and so on. 
 
 There are some intersting properties about this 
 memory structure. By setting all the switches to 
 "connected" mode, the whole memory can be made to form a 
 big loop. In fact, if we define an imbedded tree as a 
 subset of nodes which also forms a tree (for example, the 
 node marked "a" in Figure 5.4), then by appropriate 
 setting of the switches, any imbedded tree can be made to 
 form a loop. Furthermore, any path from the root to a 
 leaf not only forms a loop, but also forms a structure 
 equivalent to a uniform ladder (See Chpater 2) . 
 
 For later use, we would define a step as the 
 
103 
 
 buffer 
 
 level 
 
 level 1 
 
 level 2 
 
 level 3 
 
 Figure 5.4. A Schematic Representation of the 
 Memory Structure. 
 
104 
 
 time it takes to simultaneouly shift all the loops in the 
 memory in clockwise direction for a complete revolution, 
 i.e. the time it takes to move a record from one place to 
 the other. 
 
 4 First Ordering Scheme of Loops 
 
 To assign an order to the loops in our memory structure we 
 would use their underlying tree strcuture. For 
 convenience, we shall use the terminology of trees to 
 describe our memory structure and each loop will be 
 referred to as a node. Therefore, according to the 
 conventional way of ordering nodes in a binary search 
 tree, the nodes in the left subtree precede the root, 
 which in trun precedes the nodes in the right subtree. If 
 we order our loops in the memory in this fashion, 
 searching will be efficient, but inserting and deletion 
 will not be. Furthermore, since the memory is not always 
 full, it is desirable to keep the records in a balanced 
 tree form after insertions and deletions, so that higher 
 storage utilization and better performance can be 
 achieved. However, the usual tree balancing scheme will 
 not work here since while it is a simple matter to change 
 pointers in a random access memory, a whole subtree will 
 
105 
 have to be moved physically in our memory structure. 
 
 We now give a recursive definition of a way to 
 traverse the tree. The order of the traversal will be 
 used as the order of the nodes in the tree, hence the 
 order of the memory loops. 
 
 ALGORITHM 5.1. Tree Traversal Algorithm for First Model. 
 
 1. If root is empty, return. 
 
 2. Visit the root. 
 
 3. Traverse the left subtree of the left descendent. 
 
 4. Traverse the right subtree of the left descendent. 
 
 5. Visit the left descendent. 
 
 6. Traverse the left subtree of the right descendent. 
 
 7. Traverse the right subtree of the right descendent. 
 
 8. Visit the right descendent. 
 
 Such a traversal can also be described by the following 
 two co-routines: 
 
 procedure Tl(node); 
 begin if node £ nil then 
 begin visit (node); 
 T2 (left (node)) ; 
 T2 (right (node) ) 
 end 
 end; 
 
 procedure T2 (node) ; 
 begin if node ^ nil then 
 begin Tl (left (node) ) ; 
 Tl (right (node) ) ; 
 visit (node) 
 end 
 end; 
 
106 
 
 Figure 5.5 is an example of such a traversal of a tree of 
 26 nodes. 
 
 There are some interesting properties about such 
 an ordering of the nodes in the tree: 
 
 1) All the nodes in the left subtree are less 
 than those in the right subtree. 
 
 2) The root of a subtree is the smallest if it 
 is on an even level, the largest if it is on an odd level. 
 
 3) Two nodes that are labeled consecutively are 
 at most 2 edges apart in the representative graph of the 
 memory structure. 
 
 5 Movement of Records in the Memory Structure 
 
 As before, assume each loop contains a record. Further 
 assume the records are all distinct and have an ordering 
 among them. The reocrds are stored in consistence with 
 the ordering of the loops as described in Section 5.4. We 
 shall call the record located at loop i record i. Suppose 
 each record has a head and a tail and the heads are 
 
107 
 
 3 4 6 7 10 11 13 1+ IB 19 21 
 
 Figure 5.5. First Ordering Scheme for the Bubble Memories. 
 
108 
 
 initially at odd-level switches (See Figure 5.6). Recall 
 that a subset of nodes in the tree is called an imbedded 
 tree if it forms a tree itself. For example, the records 
 16, 9, 12, 15, and 13 in Figure 5.6 reside in an imbedded 
 tree. We have the following property about the records in 
 an imbedded tree: 
 
 1) By properly setting the switches, the records 
 in an imbedded tree can be made to form a loop with all 
 the records in order. 
 
 To achieve this, we have to firstly isolate the 
 records in the imbedded tree from the rest of the tree by 
 setting the appropriate switches to "detached" mode. From 
 now on, we shall be concerned only with the switches 
 relevant to the imbedded tree. 
 
 We then set the odd-level switches to 
 "connected" mode. This should be interpreted as "left 
 connected", "right connected" or "connected", depending on 
 the actual imbedded tree. The even-level switches are set 
 to "detached" mode. Rotate the memory for half a step. 
 At the end, we have a loop consisting of all the records 
 in imbedded tree with all records in order. (Figure 5.6b) 
 
 We shall be concerned mostly with the following 
 special kind of imbedded trees. It consists of two parts: 
 
109 
 
 i—O >-i 
 
 16 
 
 26 
 
 <-< o- 1 
 
 u< o- 1 
 
 r-0 >-| 
 
 i—O >n r-O >n 
 9 17 
 
 r-o >-. 
 
 23 
 
 head 
 
 < 
 tail 
 
 (a) 
 
 16 
 
 o-J 
 
 r-0 >n 
 
 12 
 
 o-J 
 
 16 
 
 $ 
 
 A 6 
 
 after 
 15 * ste P ±2 
 
 r-O v/ U Q N >n 
 
 13 
 
 13 
 
 L-< O- 1 
 
 15 
 
 (b) 
 
 Figure 5.6. The Record Movement in an Imbedded Tree. 
 
110 
 
 a path from the root to a node at level i and an imbedded 
 tree rooted at this node, of size, say, q (including the 
 root). See Figure 5.7. 
 
 As described above, in half a step, the records 
 in the imbedded tree form a loop with records in order. 
 If we now set all the relevant switches to "connected 1 ' 
 mode, i.e. for both the odd and even level switches, then 
 in (i+q) steps, this loop completes a full revolution, 
 since there are (i+q) records in the loop. Finally, if we 
 set the odd-level switches to "detached" mode and the 
 even-level switches to "connected" mode, in half a step, 
 the loop will return to its original state of the memory. 
 This process takes a total of (i+q+1) steps. In other 
 words, in (i+q+1) steps, the records in the imbedded tree 
 form an ordered loop, cycle through the root of the tree 
 and back to the original position. This process is very 
 important to our tree searching, insertion and deletion 
 schemes, which would be described later. 
 
 2) If we refer to the cyclic permutation 
 
 /l 2 3 .... n-1 n \ 
 \n 1 2 .... n-2 n-1/ 
 
 of all the records in the tree as moving the records one 
 position forward, then to move m positions forward will 
 take (m+1) steps. To see this, we only have to regard the 
 
Ill 
 
 level 
 
 level i 
 
 imbedded tree 
 of q nodes 
 
 Figure 5.7. A Special Kind of Imbedded Tree. 
 
112 
 
 whole tree as an imbedded tree and apply the method 
 described above. 
 
 It is interesting to note that moving the 
 records backward can also be done efficiently. 
 
 3) If we refer to the cyclic permutation 
 
 /l 2 3 .... n-1 n\ 
 
 \2 3 4 .... n 1/ 
 
 of all the records in the tree as moving the records one 
 position backward, then to move m positions backward would 
 take (3m+l) steps. 
 
 We shall show how this can be done for m=l. 
 First, we set the switches at even levels to "connected" 
 mode and switches at odd levels to "detached" mode, and 
 rotate the memory by two steps. We then set the switches 
 at even levels to "detached" mode and switches at odd 
 levels to "connected" mode, and again rotate the memory by 
 two steps. Figure 5.8 shows the result as the algorithm 
 is applied to the records in the tree in Figure 5.5. Note 
 that in Figure 5.8b the switch connecting records 20 and 
 21 is set to "left connected" mode for one step and 
 "detached" mode for another step. Thus a total of 4 steps 
 is needed to rotate the tree backward by 1 position. 
 
3 4-6 7 10 11 13 14 16 19 21 
 
 (a) After first two steps 
 
 2 3 5 6 9 10 12. 13 17 18 20 
 
 (b) After next two steps 
 
 Z4 
 
 Figure 5.8. Realization of the Backward Cyclic Permutation. 
 
114 
 
 For general m, if we apply this procedure m 
 times, the total number of steps will be 4m. However, we 
 can overlap the last half step of the first two rotations 
 with the first half step of the next two rotations, etc. 
 (See Figure 5.9) The total number of steps is thus 
 (3n+l/2) . Finally, we set all the switches to "detached" 
 mode and rotate the memory for half a step so that all the 
 records are in the correct orientation. Thus the total 
 process takes (3m+l) steps. 
 
 Notice that in the same manner, an imbedded tree 
 can also be rotated backward by m positions in (3m+l) 
 steps. 
 
 4) The n records in the tree can be ouput in 
 sorted order through the buffer loop in n+2 steps. 
 
 To see this, we move all the (n+1) loops 
 (including the buffer loop) forward by (n+1) positions. 
 The records in the tree would pass the buffer loop one by 
 one, in sorted order. 
 
115 
 
 O123456789 10 step 
 
 S Q : odd-level switches on 
 So : even-level switches on 
 
 Figure 5.9. Movement of Records by m Positions Backward, 
 
116 
 
 .6 Searching 
 
 We are now ready to describe algorithms for searching, 
 inserting, and deleting records in such a memory structure. 
 Before and after each of these operations, we require that 
 the records in the tree be kept in order and in a balanced 
 tree form. More specifically, we require that the records 
 be kept in the order described in Section 5.4, and that 
 all records in the leaves of the tree be at level h or 
 (h-1), with all those at level h positioned as far left as 
 possible. Figure 5.5 is such an example. 
 
 Because of properties 1 and 2 of the ordering of 
 the nodes in the tree (Section 5.4), to search for record 
 k, one can extend the binary search strategy for ordinary 
 binary trees to the present case. The resulting algorithm 
 consists of two parts. The first part can be described as 
 follows. Suppose we are at the root of a subtree. If 
 this root is at an even (odd) level, then a comparison of 
 k with the left (right) descendent (instead of the root) 
 will decide whether to continue the search on the left or 
 the right subtree. Specifically, we have the following 
 procedure: 
 
 ALGORITHM 5.2. Search for record u in a tree rooted at 
 "root". 
 
117 
 
 procedure search (root) ; 
 
 begin if root=nil then begin report fail; goto exit end; 
 if level (root) =even then t:=lef tTroot) 
 
 else t:=right (root) ; 
 if t=u then report__found 
 else if t<u then search (right (root) ) 
 else search (left (root) ) 
 exit: end; 
 
 However, this procedure may have skipped the 
 record to be searched. For example, if want to search for 
 record 2 in Figure 5.5, by this procedure we shall compare 
 records 16, 9, 5, and 4 without finding record 2. 
 Therefore, the second part of the search procedure is to 
 perform a binary search on the set of skipped records. 
 Fortunately, for a tree of n records, the number of this 
 set is atmost (1/2) lg n. Thus, in the worst case, the 
 search time is lg n+0(lg lg n) . 
 
 This algorithm can be adopted to our memory 
 structure with slight modification. In our memory 
 structure, we have only one access port, located at the 
 buffer loop. Thus, records must be physically moved to 
 the access port before it can be read and compared. 
 Afterwards, it must be moved back to its original 
 position. To compare a record at level i, we form a big 
 loop consisting of the record and all the records on the 
 path from the node of the record to the root and the 
 buffer node. Thus, the total number of records in the 
 loop in (i+2). By the method described in Section 5.5, to 
 
118 
 
 cycle all the records through the buffer node exactly once 
 takes a total of (i+3) steps. In the worst case, the 
 first part of the previous search algorithm has to compare 
 records at level 1, 2, 3, . .., lg n. Thus, in the worst 
 case, the number of steps is 
 
 4+5+...+ (lg n + 3) = (l/2)lg 2 n + 0(lg n) 
 Note that the second part of the search algorithm can 
 actually be executed while the first part is in operation. 
 This is because the "skipped" records are always on the 
 path of some of the records to be compared and can be read 
 without extra cost. For example, consider searching for 
 record 2 in Figure 5.4, after comparing with records 16 
 and 9, we have to compare record 5, while skippinng record 
 2. But to compare record 5, we have to form, a loop 
 containing the buffer, records 1, 2, 5, and 16 (in that 
 order) and rotate the loop for one complete revolution. 
 Thus, we can compare record 2 in the process. 
 
 We can further improve the search time by 
 bringing q records together to the buffer instead of only 
 one record at a time. Suppose the next record to be 
 compared is at level i (Figure 5.7). Let us consider the 
 records in a triangle of q nodes rooted at this record. 
 By the procedure described in Section 5.5, these records 
 can be cycled through the buffer node in (i+q+2) steps. 
 Let us call this process an iteration. Then each 
 iteration enables us to choose one out of the (1/2) (q+1) 
 
119 
 
 subtrees hanging at the end of the triangle, and bringing 
 us lg(q+l) - 1 levels down the tree. 
 
 Let h be the number of levels of the tree, i.e. 
 
 2 n+1 -l=n (assuming the tree to be full) , and let 
 
 t=4~ — m M 1. Then the number of search steps is 
 
 llg(q+l)-l I 
 
 t-1 
 
 £ I {i[lg(q+l) - 1] + q + 2} 
 i=0 
 
 =J5t(t-l).{lg(q+l) - 1}+ t(q+2) 
 
 2 
 
 .^h+2h+h£ h 
 -lg(q+i) -1 +2 + q + 2 - 
 
 To find an optimal value of q such that the 
 
 expression is minimized, we set the derivative of the 
 
 expression to zero: 
 
 (l/2)h +2h+hq = In 2 (q+1) [lg (q+1) -1] [h+lg (q+1) -1] 
 
 Negecting low order terms in h, we have 
 
 h 
 
 * = 2 In 2 lg h 
 
 Thus the previous upper bound becomes 
 
 ln2(q+l)h + ln2(q+l) [lg(q+l) - l]+h/2 + q + 2 
 
 _h 
 
 " 2 lg h 
 
 - lg^ 1 
 2 lg lg n ' 
 
 In conclusion, in the worst-case, the number of 
 
 search steps is approximately 
 
 lg^ 
 2 lg lg n ' 
 
120 
 
 5.7. Insertion of Records 
 
 We shall next present an algorithm for inserting a record 
 into the file, so that the records in the file will again 
 be in order and the file in the form of a balanced tree. 
 Assume the record to be inserted is p, initially located 
 the buffer node. By the previous searching algorithm, we 
 find out where p belongs to, say x p y. Also, to hold one 
 extra record, a new node (loop) has to be added to the 
 tree. By our definition of a balanced tree, this node 
 must be the rightmost one on the bottom level of the tree. 
 For ease of description, we assume this new node has a 
 record b, which when included in our traversal ordering of 
 the nodes described before, is between i and 
 j (i.e. i b j). Therefore, the tree insertion probelm 
 reduces to placing a record p from the buffer node to its 
 destination node in the tree, and putting record b to the 
 buffer node while keeping the tree balanced and the 
 records in order. We have two cases: 
 Case 1 
 
 Initial configuration: (p 1 2 ... i b j ...xy...n) 
 Final configuration: (bl 2 ... i j ... xpy ... n) 
 
 Conceptually, an obvious algorithm is to 
 cyclically shift the records (b j . . . x) forward once and 
 
121 
 
 then replace b by p to obtain (j ...x p). Fortunately, a 
 similar strategy can adopted to our memory structure. 
 
 ALGORITHM 5.3. Insert a record into the tree structured 
 memory with balance. 
 
 1. Pick the smallest imbedded tree that includes the 
 records b, j , . ,.,x. Isolate them from the rest of the 
 tree and shift the records forward by one position. 
 
 (For example, in the tree of Figure 5.5, 
 suppose the record 24.5 is to be inserted (Figure 
 5.10a). Then the smallest imbedded tree will consist 
 of records 17, b, 22, 23, 24, 26. Note that 21<b<22. 
 After shifting the records forward for one position, we 
 have the configuration in Figure 5.10b.) 
 
 2. Consider the path from the buffer node to 
 the destination node of record p. Let the set of 
 records on this path be S, and let the set of records 
 on the same path in the final configuration (i.e. 
 after the insertion is completed) be T. For the 
 records in S that is also in T, permute them into the 
 corresponding positions in T, and arrange the other 
 records in S arbitarily. 
 
 (In our example S=(24.5, 1, 17, 24, 26), 
 (Figure 5.10b) and T ={b, 1, 26, 24, 24.5) (Figure 
 5.10d). Figure 5.10c shows the configuration after 
 this step. As a result of this step, the record p is 
 in its destination node, while b is somewhere in the 
 tree. ) 
 
 3. Consider the path from the buffer node to 
 the node with record b. Permute the nodes in the path 
 to the final desired configuration. 
 
 (In our example, the path is (17, 1, 26, 
 b) (Figure 5.10c). After permutation, we have (b, 1, 
 26, 17) (Figure 5.10d) .) 
 
 To estimate the number of steps required, we see 
 that (1) takes 2 steps, and (2) and (3) each takes at most 
 (1/2) (lg n + 1) steps. Thus the total is at most lg n+ 3 
 
122 
 
 18 19 21 22. 
 (b) 
 
 18 1^ 21 11 
 (c) 
 
 icure 5.10. An Example of Inserting a Record, 
 
 Figure 
 
123 
 
 steps. The steps can actually be reducd since (2) and (3) 
 can be partially overlapped. 
 
 Case 2 
 
 Initial configuration: (p 1 2 ... xy ... iby ... n) 
 Final configuration: (b 1 2 ... xpy ... i j ... n) 
 
 The algorithm for insertion is similar, except 
 that we shift the records in the smallest imbedded tree 
 containing (y ... i b) backward for one position instead 
 of forward. Since this operation can be done in 4 steps, 
 the whole procedure takes lg n + 5 steps. 
 
 5.8. Deletion of Records 
 
 The algorithm for the deletion of a record from the tree 
 is similar to the previous insertion algorithm. Again, we 
 require the records be in a balanced tree form after 
 deletion. Assume p is the record to be deleted and x<p<y. 
 After deletion, a node will become empty. To keep the 
 records in a balanced tree form we require that the empty 
 node be the rightmost one on the bottom level of the tree. 
 Let us assume the order of this node in the final tree is 
 
124 
 
 between i and j, and assume that initially, the buffer 
 node contains a dummy null record b that is to be moved 
 into this node. Thus the deletion problem now becomes 
 that of bringing p to the buffer node, and putting b to 
 the node to be removed, while keeping the records in order 
 (See Figure 5.11). Again we have two cases: 
 
 Case 1 
 
 Initial configuration: (b 1 2 ... xpy ... i j ... n) 
 
 Final configuration: (pi 2 ... xy ... ibj ... n); 
 
 Case 2 
 
 Initial configuration: (b 1 2 ... i j ...xpy... n) 
 
 Final configuration: (pi 2 ... ibj ... xy ... n) 
 
 But they are exactly the two cases in insertion 
 if we interchange b and p. Therefore, the previous 
 procedure applies here with deletion time of lg n + 3 in 
 case 1 and lg n + 5 in case 2. 
 
 5.9. Tree Structured Memories with Simpler Control 
 
 The memory structure discribed so far requires that each 
 switch be able to be set independently, a feature that may 
 
3 4 (6 7 dO 11 13 14 16 19 21 
 
 (a) Before deletion 
 
 3 4 6 ? H 12 14 15 19 2.0 b 
 
 (b) After deletion of record 8 
 
 Figure 5.11. An Example of Deleting a Record. 
 
126 
 
 not be practical. In the rest of chapter, we shall 
 demonstrate that with a new ordering of the loops of the 
 bubble memory, and a slight modification of the memory 
 structure, searching, insertion and deletion of the 
 records in a tree can still be implemented with only 2 
 control state for the witches. 
 
 In general, a switch has four modes of 
 operation. Thus, x swithes enable a total of 4 X possible 
 states. In our proposed memory structure, only two of 
 them will be required. 
 
 Before proposing our memory structure and the 
 ordering of loops, let us consider a conventional search 
 tree of n nodes. The search process can be described by 
 the following procedure: 
 
 ALGORITH?! 5.4. Search a record u in a binary serach tree 
 rooted at p. 
 
 procedure search (p); 
 begin 
 
 if p=nil then report_fail 
 
 else if p=u then report found 
 
 else if p>u then searchTlef t (p) ) 
 
 else search (right (p) ) 
 end; 
 
 A node at level i>0 in the tree can be reached 
 
127 
 from the root by a seq <ence of steps: 
 
 XI XZ • • • XK • • • XX 
 
 where xk can be L or R, representing the left or right 
 branch taken at that step. If the leaf is reached before 
 a match is found then the search fails. 
 
 Figure 5.12 shows a completely balanced binary 
 search tree of 31 nodes. The search sequence for record 
 14 is (LRR) , and that for reocrd 18.5 is (RLLR) . 
 
 In order to simulate the search algorithm for a 
 binary search tree on a bubble memory, three conditions 
 must be satisfied: 
 
 1) For each of the sequence (xl x2 ...xi) describing a 
 search operation, there must be a corresponding 
 sequence of operations in the bubble memory. 
 
 2) If a node p in the search tree can be reached by the 
 sequence (xl x2 ...xi), the coresponding sequence of 
 operations in the bubble memory should bring record p 
 to an access port. 
 
 3) If the sequence (xl x2 ...xi) corresponds to a sequence 
 of operations (yl y2 ...yj) in the bubble memory then 
 the sequence (xl x2 ...xi x(i+l)) should corresponds to 
 the sequence of operations (yl y2 ...yj...yk) in the 
 
128 
 
 ± 35 7 11 13 15 »7 19 21 23 25 27 29 31 
 
 Figure 5.12. A Completely Balanced Binary Search Tree 
 of 31 Nodes. 
 
129 
 
 bubble memory. 
 
 The last condition is necessary since the 
 operation sequence in the bubble memory is not 
 pre-determined, but is based on the result of comparison 
 with the record read at the access port. 
 
 We shall propose a scheme for implementing such 
 a binary search algorithm in bubble memory, which is based 
 on a tree-structured memory porposed by Kluge [17] . 
 Although this structure was originally intended for tree 
 traversal, with suitable relabeling of the nodes, it can 
 be adopted to tree searching, inserting, and deletion. In 
 this scheme, there are two tree-structured bubble memories 
 and a single-record memory that stores the root of the 
 search tree. There are three access ports: one each at 
 the roots of the tree-structured memories and the other at 
 the single-record memory. Let M denote the single-record 
 memory, Tl and T2 the tree-structured memories that 
 respresent the left and the right subtrees, respectively. 
 
 There are two allowable operations in this 
 structure. Operation A performs a cyclic shift of the 
 records for one step in the clockwise direction with the 
 foo lowing setting of the switches in the two 
 tree-structured memories: The even-level swithes in Tl 
 are set to "connected" mode, odd-level switches in Tl to 
 
130 
 
 "detached" mode, while the even-level switches in T2 are 
 set "detached" mode, the odd-level switches in T2 to 
 "connected" mode. Operation B is the exact opposite of A: 
 it is the same as A except that the modes "connected" and 
 "detached" are interchanged. Figure 5.13 shows such a 
 memory, with the solid and dashed lines indicating the 
 movements associated with operations A and B respectively. 
 (The labels of the nodes will be discussed later.) 
 
 A sequence of search steps (xl x2 ...xi) can be 
 translated into a operation sequence of A and B according 
 to the following rules: 
 
 1) Suppose xl=L. For 2<k£i, 
 
 if xk=L then xk is substituted by A for k even and by B 
 for k odd; 
 
 if xk=R then xk is substituted by AA for k even and by 
 BB for k odd. 
 
 2) Suppose xl=R. The substitution rule is the same as in 
 1) , except that A and B are interchanged. 
 
 Refering to Figures 5.12 and 5.13, we have the 
 following example: 
 
131 
 
 Tl 
 
 M 
 
 Ho • 
 
 ft 
 
 T2 
 
 24 A 
 
 20 *- « * 28 
 
 4 \ 
 
 2fc 22*- ---4 --W 30 2 
 
 10 6 
 
 A A A A A /A 
 
 1 9 5 13 3 11 7 15 17 25 21 29 19 27 23 31 
 
 Figure 5.13. Second Addressing Scheme of Bubble Memories. 
 
132 
 
 node 
 
 search seq ©nee 
 in Figure 5.12 
 
 operation seq. 
 in Figure 5.13 
 
 complementary 
 seq ence 
 
 6 
 
 5 
 
 7 
 
 29 
 
 LLR 
 LLRL 
 LLRR 
 RRRL 
 
 ABB 
 ABBA 
 ABBAA 
 BBAAB 
 
 BAA 
 AABAA 
 ABAA 
 BBAB 
 
 where a complementary sequence is defined as a sequence of 
 operations A and B such that the compositon of the original 
 sequence and the complementary sequence yields the identity 
 by means of the equalities AAA=BBB= identity. 
 
 Each node in the binary search tree in Figure 
 5.12 defines uniquely a search sequence, thus an operation 
 sequence and a complementary sequence. 
 
 We are now ready to label the nodes in our 
 bubble memory. The single-record memory M and the roots 
 of Tl, T2 have exactly the same labels as the ordinary 
 binary search tree. For any node t other than these 
 three, we compute its complementary sequence as above and 
 place it at the root of Tl if the first operation in the 
 complementary sequence is A, and at the root of T2 
 otherwise. The node where t finally resides after the 
 application of the complementary sequence will have the 
 label t. The resulting labels for the completely balanced 
 binary tree of Figure 5.12 is Figure 5.13. 
 
133 
 
 It should be noted that for a general binary 
 tree, the corresponding tree in the bubble memory would 
 have a different shape. In some cases, some internal nodes 
 of the tree in the bubble memory would be null. 
 
 5.10. Tree Searching 
 
 The search algorithm for the model of bubble memories in 
 Section 3.9 can be described by Algorithm 5.5. Notice the 
 correspondence between this and Algorithm 5.4. 
 
 The procedure "move" applies operations A or B 
 according to whether the current node being accessed is in 
 the left or the right subtree of the search tree, and 
 whether it is on the even or odd level. The first 
 argument to this procedure is the number of times 
 operation A or B should be applied. In our case, this can 
 be 1 if the corresponding search step is L and 2 if it is 
 R. This procedure also reads a record from either Tl or 
 T2. If the node is reached from above and the operation 
 applied is A, then Tl is read, otherwise T2 is read. The 
 second argument indicates the direction of traversal. 
 
134 
 
 LGORITHM 5.5. Search a Record u In Bubble Memory 
 (2nd model) . 
 
 procedure search (level) ; 
 
 (* upon initial entry, level=0, value=M*) 
 global state, value; 
 
 procedure move (x,dir) ; 
 
 (* apply operations A or B to bubble memory x times*) 
 (* and read a record from Tl or T2 *) 
 begin if (level=even) and (state=left) or 
 (level=odd) and (state=right) 
 then begin 
 
 for i:=l to x do A; (* apply op A *) 
 if dir=down then value :=Tl 
 
 else value:=T2 
 end 
 else begin 
 
 for i:=l to x do B; (* apply op B *) 
 if dir=down then value :=T2 
 else value :=T1 
 end 
 end; 
 
 begin (* of search *) 
 
 if value=nil then report_fail 
 else if level=0 then 
 
 if u=value then report__found 
 else if u<value then 
 
 begin state:=left; (*left subtree*) 
 value :=T1; (* read Tl *) 
 search (level+1) 
 end 
 else begin state:=right; 
 value :=T2; 
 search (level+1) 
 end 
 else begin level:=level+l; 
 
 if u=value then report_found 
 else if u<value then 
 
 begin move ( 1 , down ) ; (*operation corresp. to L*) 
 search (level) ; 
 
 move (2, up) (*apply complementary operation*) 
 end 
 else begin move ( 2 , down ) ; (*oper. corr. to R*) 
 search (level) ; 
 move ( 1 , up ) 
 end 
 end 
 end; 
 
135 
 
 Notice also that the file must be brought back to 
 its original configuration after each search. Therefore 
 the complementary operations are applied at the end of the 
 search (successful or otherwise) . 
 
 For a very skewed tree, the search time can be 
 bad, and storage poorly ultilized. To improve performance 
 and to better ultilize the storage, the file should be 
 reorganized by unloading the records in sequential order 
 and then loading them back into the menory in balanced tree 
 form. For a balanced tree of n records, the worst case 
 search time occurs when searching records at the bottom 
 level of the tree. The total cycle time (search time plus 
 the time to bring the file back to its initial 
 configuration) is equal to the number of search operations 
 plus the number of complementary operations. Therefore, it 
 takes atmost 3(lg(n+l) - 2) operations to search a record. 
 
 Since a record must be completely read and 
 compared before the next step of operation can be 
 determined, search operations in the bubble memory cannot 
 be overlapped. But since the complementary operations are 
 known before hand, they can be overlapped and a saving of 
 (1/2) (lg(n+l) -2) steps results. Thus, (5/2)lg(n+l) - 5 
 operations will suffice. 
 
136 
 
 5.12. Unloading, Loading, Insertion, and Deletion of Records 
 
 Unloading records from the bubble memory in sequential 
 order corresponds to traversing the binary serach tree in 
 in-order: 
 
 ALGORITHM 5.6. Traverse a tree rooted at in in-order. 
 
 procedure in order (p); 
 
 begin if p=nTl then goto exit; 
 
 in__order (left (p) ) ; 
 
 visit (p) ; 
 
 in__order (right (p) ) 
 exit:end; 
 
 Such a traversal can also be simulated in our 
 bubble memory, by applying operations A or B and outputting 
 records at M, Tl, or T2 at appropiate time. Recall that 
 complementary operations must be used, when returning from 
 the subtrees to the parent node. Algorithm 5.7 describes 
 such a traversal in bubble memory, while unloading the 
 records at the same time. 
 
 To load an ordered file of records into the 
 bubble memory in balanced tree structure, the corresponding 
 balanced binary search tree must be traversed. Instead of 
 a read operation when the record reaches an access port, a 
 write operation is performed. The procedure is similar to 
 
137 
 
 ALGORIHM 5.7. To unload the file from memory in sequential 
 order. (2nd model) 
 
 procedure traverse (level) ; 
 
 '(* upon the initial entry to this procedure, level has 
 
 the value of 0, value equals M *) 
 
 global state, value; 
 
 procedure move(x,dir); (* same as in Algorithm 5.5 *) 
 
 begin if value^nil then 
 begin if level=0 then 
 
 begin state:=left; value:=Tl; 
 
 traverse (level+1) ; (* traverse left subtree *) 
 output (M) ; 
 
 state :=right; value :=T2; 
 
 traverse (level+1) (* traverse right subtree *) 
 end 
 else begin level :=level+l; 
 
 move ( 1 , down ) ; (* oper. corr. to L *) 
 traverse (level) ; 
 
 move(2,up); (* complementary operation *) 
 output (value) ; 
 
 move ( 2 , down ) ; (* operation corr. to R *) 
 traverse (level) ; 
 
 move (1, up) (* complementary operation *) 
 end 
 end 
 end; (* traverse *) 
 
138 
 
 the unload operation, and would not be described in details 
 here. 
 
 To count the number of steps to unload or load a 
 tree of n records , we notice that each edge in the binary 
 search tree is traversed exactly twice, once down and once 
 up. Since it takes 3 operations to traverse an edge twice, 
 and since there are (n-1) edges in the binary search tree, 
 a total of 3 (n-1) operations are needed. This can be 
 reduced if operations are overlapped. 
 
 When a search fails, a null record will be 
 brought to one of the access port. To insert a record into 
 the tree, the null record can be replaced by the record to 
 be inserted. VThen the tree is brought back to its initial 
 configuration, the new record becomes a new leaf. 
 
 To delete a record, the deletion algorithm for a 
 binary search tree can be used. If the record p to be 
 deleted is a leaf, then p is deleted; if p is an internal 
 node, then the node q preceding p, which must be a leaf, is 
 deleted, and p replaced by q. All of these can be done in 
 the bubble memory in a single phase. 
 
 For example, in Figure 5.12, record 12 is to be 
 deleted. After 12 is located, we follow a sequence of 
 LR...R until the leaf (record 11) is reached. In our case, 
 
139 
 
 the operation sequence to reach 11 is (AABAA) ♦ Record 11 
 is now at a access port, and is read and replaced by a null 
 record. The complementary operation (ABBA) is then 
 applied. After the application of the operations (ABB) , 
 record 12 is at the access port, and is replaced by content 
 of record 11. Continuing with the remaining operations in 
 the complementary operations will bring the tree to the 
 correct configuration, completing the deletion of record 
 12. 
 
 5.12. Conclusion 
 
 In this chapter we propose a magnetic bubble memory 
 structure for storing records in the form of a binry tree 
 for efficient retrieval and updating operations. Two 
 memory schemes are proposed that can perform these 
 operations quite efficiently. In the first scheme, trees 
 are maintained in balanced form after each operation, but 
 it also requires a set of independently settable switches. 
 In the second scheme, only 2 control states of the switches 
 are needed, but the tree cannot be easily mintained in 
 balanced form. 
 
140 
 
 Because of its superior search time and 
 simplicity of its control algorithms, the second scheme 
 seems to be very attractive, especially in applications 
 where updating operations are infrequent. 
 
 It remains to be investigated whether other 
 memory models with moderate number of control operations 
 can perform the retrieval and updating operations and 
 still maintain the data tree in some kind of balanced 
 form. 
 
141 
 
 REFERENCES 
 
 [1] A. H. Bobeck, P. I. Bonyhard, and J. E. Geusic, 
 
 "Magnetic Bubbles - An Emerging Mew Memory Technology," 
 
 Proc. of the IEEE, Vol. 63, No 8, pp. 1176-1195, 
 1975. 
 
 [2] H. Chang, Magnetic Bubble Technology, IEEE Press, New 
 York, 1975. 
 
 [3] P. I. Bonyhard, I. Danylchuk, D. E. Kish, and 
 J. L. Smith, "Applications of Bubble Devices," IEEE 
 Trans. Magn. , Vol. MAG-6 , pp. 447-451, 1970. 
 
 [4] P. I. Bonyhard, J. E. Geusic, A. II. Bobeck, Y. S. Chen, 
 P. C. Michaelis, and J. L. Smith, "Magnetic Bubble 
 Memory Chip Design," IEEE Trans. Magn., Vol. MAG-10, 
 pp. 285-289, 1973. 
 
 [5] W. E. Beausoleil, D. T. Brown, and B. E. Phelps, 
 "Magnetic Bubble Memory Organization," IBM J. Res. 
 Dev., Vol. 16, pp. 587-591, 1972. 
 
 [6] P. I. Bonyhard, and T. J. Nelson, "Dynamic Data 
 Relocation In Bubble Memories," Bell Syst. Tech. J., 
 Vol 52, pp. 307-317, 1973. 
 
 [7] C.Tung, T. C. Chen, and H. Chang, "A Bubble Ladder 
 Structure for Information Processing," IEEE Trans. 
 Magn. MAG-11, 1163-1165, 1975. 
 
 [8] C. K. Wong and D. Coppersmith, "The Generation of 
 Permutations in Magnetic Bubble Memories", IEEE Trans. 
 Comp., Vol C-25, pp. 254-262, 1976. 
 
 [9] T. C. Chen and C. Tung, "Storage Management Operations 
 in Linked Uniform Shift Register Loops," IBM J. Res. 
 Dev., Vol 20, pp. 123-131, 1976. 
 
 [10] T. C. Chen, K. P. Eswaran, V. Y. Lum, and C. Tung, 
 "Simplified Odd-Even Sort Using Multiple Shift-Register 
 Loops," Intern. J. Comp. Info. Sc, Vol 7, pp. 
 295-314, 1978 
 
 [11] D. E. Knuth, The Art of Computer Programming, Vol. 3, 
 Addison Wesley, Mass, 1973. 
 
 [12] F. Chin and K. S. Fok, "Fast Sorting Algorithms on 
 Multiple Shift-Register Loops," Techn. Report, Dept. 
 of Comp. Sc, U. of Alberta, 1977. 
 
142 
 
 [13] T. C. Chen, V. Y. Lum and C. Tung, "The Rebound Sorter: 
 An Efficient Sort Engine for Large Files," IBM RJ-2204, 
 1978. 
 
 [14] W. E. Kluge, "Data File Management in Shift-Register 
 Memories," ACM Trans. Database Sys., Vol. 3, 
 pp. 159-177, 1978. 
 
 [15] G. Bongiovanni and F. Luccio, "Permutation of Data 
 Blocks in a Bubble Memory," To appear in CACM. 
 
 [16] K. E. Batcher, "Sorting Networks and Their 
 Applications," Proc. AFIPS Spring Joint Comp. Conf., 
 Vol. 32, pp. 307-314, 1968. 
 
 [17] W. E. Kluge, "Traversing Binary Tree Structures with 
 Shift- Register Memories," IEEE Trans. Comp, Vol. C-2 6, 
 pp. 1112-1122, 1977. 
 
 [18] K. M. Chung, F. Luccio, and C. K. Wong, "A New 
 Permutation Algorithm for Bubble Memories," To appear. 
 
 [19] B. Antonini, M. Bacchi, and C. Bongiovanni, "A Bubble 
 String Comparator for Information Processing," To appear 
 in IEEE Trans. Magn. 
 
143 
 
 VITA 
 
 Kin-man Chung was born in 1948, in China. He 
 received his A. B. degree in 1971 from University of 
 California, Berkeley, his M. A. degree in 1973 from State 
 University of New York at Stony Brook, both in physics. 
 
 From 1974, he has been a research asistant, first at 
 U. S. Army Construction Engineering Research Laboratory, then 
 at the University of Illinois. 
 
 He was a visitor at IBM T. J. Wastson Research 
 Center at Yorktown Heights, New York in Summer 1978. 
 
 He is a member of Sigma Xi. 
 
BIBLIOGRAPHIC DATA 
 SHEET 
 
 1. Report No. 
 
 UIUCDCS-R-79-976 
 
 3. Recipient's Accession No. 
 
 4. Title and Subtitle 
 
 A STUDY OF DATA MANIPULATION ALGORITHMS IN MAGNETIC BUBBLE 
 
 MEMORIES 
 
 5. Report Date 
 
 June 1979 
 
 6. 
 
 7. Author(s) 
 
 Kin-Man Chung 
 
 8- Performing Organization Rept. 
 No. 
 
 9. Performing Organization Name and Address 
 
 Dept. of Computer Science 
 University of Illinois 
 Urbana, IL 61801 
 
 10. Project/Task/Work Unit No. 
 
 11. Contract /Grant No. 
 
 NSF MCS 77-22830 
 
 12. Sponsoring Organization Name and Address 
 
 National Science Foundation 
 Washington, D.C. 
 
 13. Type of Report & Period 
 Covered 
 
 Ph.D. Thesis 
 
 14. 
 
 Abstract: In this thesis the problems permuting, sorting and retrieving data in magne- 
 tic bubble memories are discussed. Improvements on known results have been made in 1) 
 the number of switches, 2) number pf control states and 3) execution time. For example, 
 with lgn-1 switch any permutation can be realized in time proportional to *nlgn, but 
 with k switches the time is proportional 2"'/ k kn 1+ l/k. The model cons idere d for sortin 
 presumes the switches to comparators also. One result is that with 2v / nTgn~ -1 switches 
 sorting can be done in time i n+0(nlglgn/lgn). Data storage and retrieval is studied 
 for bubble memoreis organized as binary trees. Two models are considered; the first 
 have many control status but fast insertion and deletion, the second has only 2 control 
 states but unwildy insertion and deletion. Both have fast search times and sequential 
 access. 
 
 17. Key Words and Document Analysis. 17a. Descriptors 
 
 Key words, magnetic bubble memories, design and analysis of algorithm, permutation, 
 sorting, bitonic sorting, binary tree, searching, deletion, insertion, tree 
 balancing, shift register memories. 
 
 17b. Identifiers/Open-Ended Terms 
 
 17c. COSATI Field/Group 
 
 18. Availability Statement 
 
 19. Security Class (This 
 Report) 
 
 UNCLASSIFIED 
 
 20. Security Class (This 
 
 Page 
 UNCLASSIFIED 
 
 21. No. of Pages 
 
 22. Price 
 
 FORM NTIS-35 (10-70) 
 
 USCOMM-DC 40329-P71 
 
J!\H2 4 
 
 V0 
 
m 2 o m