LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.84 IJKoY ho.643-M8 cop- 2 The person charging this material is re sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANACHAMPAIGN g lit i ■ L161 — O-1096 Digitized by the Internet Archive in 2013 http://archive.org/details/viptran2improved643weav DIUCDCS-R-7U-6^3 VTPTRAN2 - AN IMPROVED PROGRAMMING LANGUAGE AND ITS COMPILER FOR PROCESS CONTROL EQUATIONS by Alfred Charles Weaver May 197*+ •* The person charging this material is re- sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may - result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAIGN AUG i * 1974 \U6 1 * <:dcs-r-7 j 4-61+3 VIPTRAN2 - AN IMPROVED PROGRAMMING LANGUAGE AND ITS COMPILER FOR PROCESS CONTROL EQUATIONS by Alfred Charles Weaver May, 197^ Department of Computer Science University of Illinois at Urban a -Champaign Urbana, Illinois 5// . .if* i I i TABLE OF CONTENTS Page 1 . VIPTRAN2 VS . VIPTRAN 1 2 . THE NEED FOR VIPTRAN2 PROGRAMMING 2 2.1 Introduction 2 2.2 The VIP Controller 2 2.3 VIP Programming Example 1 7 2.k VIP Programming Example 2 10 2 . 5 VIP Programming Example 3 • 11 2.6 The VIPTRAN2 Compiler 15 3 . VIPTRAN2 LANGUAGE DEFINITION l8 3.1 Definitions 18 3 . 2 VTPTRAN2 Compiler Options 21 3.3 VIPTRAN2 Syntax 23 3.3.1 Variable Type Declaration and Address Assignment 2k 3.3.1.1 Automatic Address Assignment Algorithm 26 3.3.1.2 Source Card Requirements 28 3.3.2 Control Program Segment 28 3.3.3 Advanced VIPTRAN2 - Control of Master and Enable Registers 29 3.3.3.1 The Master Register 31 3.3.3.2 The Enable Register 32 3.3.3.3 Master and Enable Registers in Combination 33 3.3.3.^ The ON and OFF Variables 3^ Page 4 . PROGRAM LOGIC MANUAL 36 4.1 Overview of the Compiler's Responsibilities 36 4.2 Module Technical Descriptions 4.2.1 BATCH 38 4.2.2 COMPILER kO 4.2.3 LEXI 42 4.2.4 LOOKUP 44 4.2.5 MAPPING 44 4.2.6 ERROR 45 4.2.7 SYNA 45 4.2.8 ADCHECK 45 4.2.9 EXPRESSION 46 4.2.10 OUT 46 4.2.11 DUMP 46 4.2.12 SEMA 48 4.2.13 SORT 49 4.2.14 CODEGEN 50 4.2.15 TEMPGEN 53 4.2.16 GEN 54 4.2.17 OBJECT 55 4.2.18 PRINT 55 5. SUMMARY 56 LIST OF REFERENCES 57 APPENDIX A. VTPTRAN2 Programming Examples 58 B. VIPTRAN2 Language Syntax, Modified Backus-Naur Form 119 C. VIPTRAN2 Error Messages 122 LIST OF FIGURES Figure Page 1. Relay Diagram for Burglar Alarm Example 9 2. VIPTRAN2 Compiler Module Containment Map 39 1. VTPTRAN2 VS. VTPTRAN VTPTRAN2 is a much improved version of VTPTRAN, a programming language and a compiler for Boolean systems of process control equations. The numerous improvements made to VTPTRAN during the past year have now exceeded the author's ability to describe them by word-of-mouth or by issuing programming manual "revisions". The current version of VIPTRAN2 has been in use for several months and has been remarkably stable and error-free. It is probable that VTPTRAN2 represents the final version of this software product. More additions or changes to the VTPTRAN2 syntax would probably be due to hardware changes in the VIP, which would justify an entirely new compiler. 2. THE NEED FOR VTPTRAN2 PROGRAMMING 2.1 Introduction VIPTRAN2 is a high-level, FORTRAN- like programming, language specifically designed for use with the Struthers-Dunn VIP (Variable Industrial Programmer), a multi-purpose industrial process control minicomputer. The language allows the programmer to express a Boolean system of control parameters as a sequence of semi-Boolean equations whose cyclic evaluation in real time determines the on-off state of real world devices. Previous attempts to solve the process control problem have followed the general scheme of expressing process control logic by some series of pseudo-assembler language commands which are then translated into a system simulation language, analyzed and processed at this higher level, then retranslated into machine understandable commands. Attempts to perform this operation in real time generally result in either slow response times or extra expense for faster-than-necessary computing circuitry. VIPTRAN2 and the VIP in combination allow the programmer the ease and flexibility of expressing algorithms in a higher-level language while dispensing with all the system simulation by merely solving the Boolean equations themselves. 2.2 The VIP Controller To understand adequately the features and capabilities of ^/IPTRAN2, it is necessary first to investigate the nature of the VIP itself. The VIP is actually an electronically programmable logic system, designed to perform the same control functions as a conventional relay or solid state logic system. Information is accepted at the inputs of the VIP, analyzed, and the appropriate output commands provided. The input information may he in the form of voltage or current levels from such devices as limit switches, pushbuttons, photo-electric controls, etc. Output commands are provided from the controller in the form of voltage or current signals capable of driving conventional solenoids, relays, lights, motor starters, and similar devices. Inputs are generally classified as 6, 12, 2k, k-Q, or 120 volt AC or DC inputs. The existence of a zero voltage is considered a logic "0" (Boolean "false") while the non-zero voltage is considered a logic "1" (Boolean "true"). External inputs are connected to the VIP through input register circuits. Information fed to the VIP in the form of voltage levels represents the logical condition of the external switches. If a given switch is closed, the input register stores a logic "l"; if open, the input register stores a logic "0". The output register is the means by which all command signals are fed from the VIP to the real world. The output registers actually serve two purposes : (1) they provide a contact closure for each load (motor, solenoid, light, etc.) in the form of a solid state switch; (2) information stored within the output register corresponding to a particular device is representative of that device's physical condition, i.e., energized or de-energized. Output registers may be either AC or DC. Timer registers may be used in place of an output register to introduce a delay between the storing of a logic "l" and the energizing of the external load. This delay is physically adjustable and covers a range of approximately 100 milliseconds to 30 seconds. Magnetic latch memories are also interchangeable with output registers. In the event of a power failure to the VIP these retentive memories retain their most recent value, thus duplicating the memory inherent in the mechanical or magnetic two-coil latching relay. A scratchpad memory is also available which provides a storage area for temporary or virtual results. One scratchpad contains 512 addressable locations. The input, output, timer, and latch registers are available in groups of sixteen like devices on one plug-in "card". The physical location of these plug-in cards thus forms the address space used by the machine. If, for instance, one were to place one each of input, output, timer, and latch cards in the successive low-order card positions, the address space would be : address space card position card type decimal octal 1 2^-volt DC input through 15 through 17 2 EC output 16 through 31 20 through 37 3 timer 32 through V7 ^0 through 57 k latch kQ through 63 60 through 77 Each plug-in card thus occupies l6 in contiguous addresses beginning at an address which is a multiple of l6 1r) . Each card is positionally interchangeable with all others, except for the low-order card (addresses through lTo) which must be of type input . Location is reserved; line power to the VIP is connected here, thus forming the basis for a guaranteed logic "1" at address 0. Scratchpad memory is slightly different in that it is one card which may be inserted or deleted as a matter of convenience. If included, it provides 512, n additional "scratch" memory locations (or "virtual control relays") at addresses IOOOq through 17TTo' The VIP is equipped with a 4096-word by 12-bit read-only memory in which the control program is stored. Depending upon the total number of inputs, outputs, timers, and latches used by the control program, the VIP is available in three models: mini -VIP 128 in addressable locations midi-VIP 256 n addressable locations maxi-VIP 512, n addressable locations Each model will accommodate a single optional scratchpad. When the control program is executed, the following sequence of events is performed cyclically: (1) At the beginning of each scan of the read-only memory, and synchronized with the peak voltage of the power line, all of the inputs to the machine are simultaneously examined and their logic state stored in the input holding registers. Thus all inputs which change state do so simultaneously at the beginning of each memory scan. (2) The entire logical sequence of instructions (< lj-096 instructions) is executed sequentially at a rate of one instruction per ten microseconds, or ^0.96 milliseconds to scan all of memory once. (3) At the end of the memory scan, and synchronized with a zero voltage on the power line, all of the outputs in the output holding registers are simultaneously gated to the output terminals. Thus all outputs which change state do so simultaneously at the end of each memory scan. The above sequence of operations is repeated indefinitely. The instruction set of the VIP consists of the following mneumonic operation codes and operands: LDA
load accumulator with data at
LDAC
load accumulator with the complement of the data at
Boolean AND the accumulator with the data at
, leaving the result in the accumulator Boolean AND the accumulator with the complement of the data at
, leaving the result in the accumulator OR
Boolean OR the accumulator with the data at
, leaving the result in the accumulator ORC
Boolean OR the accumulator with the complement of the data at
, leaving the result in the accumulator STO
store the content of the accumulator into
(accumulator is unchanged) AND
ANDC
AUK 777 AUX 776 AUX 775 AUK 77^ no operation (erasure) load the master register from the accumulator load the enable register from the accumulator the 9 -hit address of the next sequential instruction refers to scratchpad 7 AUX 773 all forthcoming 9-bit addresses refer to scratchpad until an AUX 772 instruction is processed AUX 772 terminate scratchpad addressing mode AUX 771 end of program The CPU of the VIP contains one 1-bit accumulator for evaluating logical expressions, one 1-bit master register whose content is always ANDed with the accumulator and the resulting quantity stored for each STO instruction (the accumulator itself remains unchanged), and one 1-bit enable register which, if zero, inhibits the action of STOre instructions, thus simulating a logical "jump" around a block of code. At this point three examples will help to clarify the coding procedure, 2.3 VIP Programming Example 1 A bank has installed a VIP to sound a burglar alarm and turn off electrical power to the vault door timer in any of the following events : (1) The bank office door is opened while the burglar alarm power switch is activated; (2) The vault door is opened while the burglar alarm power switch is activated; (3) A manual pushbutton is depressed. It is natural to invent Boolean variables to represent the logical states as described above. Let us use the following: variable name type description DOOR' input true when bank door is open, false when bank door is closed SWITCH input true when power is applied to burglar alarm, false when power is not applied variable name VAULT PUSHBUTTON ALARM TIMER type description input true when vault door is open, false when vault door is closed input true when pushbutton is depressed (closed), false when pushbutton is released (open) output true when alarm is to sound, false when alarm is to be silent output true when power is applied to vault door timer, false when power is interrupted The two Boolean control equations, without simplification, are: ALARM = (DOOR A SWITCH) V (VAULT A SWITCH) V PUSHBUTTON TIMER = (DOOR A SWITCH) V (VAULT A SWITCH) V PUSHBUTTON where A represents a Boolean AND, V represents a Boolean OR, and represents a Boolean complement (NOT). The system, expressed as a relay tree, might be graphically depicted as in Figure 1. Let DOOR, SWITCH, VAULT, and PUSHBUTTON be inputs to a VIP, connected to input register locations In, 2o, 3o, and kn respectively. Let ALARM and TIMER be outputs from the VIP, connected to an AC output register at locations 20„ and 21q respectively. The machine code for the VIP would be: instruction address variable name LDA AND 1 2 DOOR SWITCH comments load status of door AND with alarm switch status O LINE POWER DOOR SWITCH VAULT SWITCH \[ ■II- PUSHBUTTON DOOR SWITCH ]\- VAULT SWITCH PUSHBUTTON ■II- ALARM TIMER Figure 1. Relay Diagram for Burglar Alarm Example 10 instruction address variable name STO 22 TEMPI LDA 3 VAULT AND 2 SWITCH OR 22 TEMPI OR k PUSHBUTTON STO 20 ALARM LDA 1 DOOR AND 2 SWITCH STO 22 TEMPI LDA 3 VAULT AND 2 SWITCH OR 22 TEMPI OR 4 PUSHBUTTON STO 23 TEMP2 LDAC 23 TEMP2 STO 21 TIMER comments save result in temporary location load vault status AND with alarm switch status OR with temporary result OR with button status output status of alarm load status of door AND with alarm switch status save temporary result load vault status AND with alarm switch status OR with temporary result OR with button status save temporary result load complement of TEMP output status of timer 2 A VIP Programming Example 2 Of course the preceding example made no attempt to optimize either the Boolean equations or the VIP code for the system. The application of simple Boolean identities reduces the control equations to ALARM = ( (DOOR v VAULT) A SWITCH) V PUSHBUTTON TIMER = ALARM which codes as follows 11 comments load status of door OR with vault status AND with alarm status OR with button status output status of alarm load complement of alarm output timer status Although both sets of equations are logically correct, their VIP implementation is much more efficient in the latter case. 2. 5 VIP Programming Example 3 An automatic welder is to produce an L-shaped weld such as: instruction address variable name LDA 1 DOOR OR 3 VAULT AND 2 SWITCH OR k PUSHBUTTON STO 20 ALARM LDAC 20 ALARM STO 21 TIMER under the control of a VIP. One welding cycle, which is signaled by a momentary START switch, should: (1) start a motor for horizontal movement to the right and turn on power to the welder for 10 seconds; (2) then stop the horizontal motion and begin upward motion for 15 seconds; (3) then turn off power to the welder and return the welder to its physical origin. The origin is identified by two limit switches in the lower left corner being ON simultaneously; (k) the welder should wait at the origin until the start button is again depressed. 12 This problem introduces the concept of a timer and a timer function. Any timer has two "slides" - input and output. A "1" stored into a timer address starts the timing process; storing a "0" has no effect. A load (IDA) from a timer address fetches the current output of the timer. Thus it is impossible to tell by only fetching whether a timer is "timed out" or whether it is off because it was never set. A second (scratch) variable is often used with timers to indicate the current input to the timer. VIP timers, just like timing relays, may be either on-delay or off -delay timers. Further, each of the two delay types may function in either a timed-closed or timed-open mode. Thus the full range of timer relay logic is available to the user of the VIP. The VIP explicitly implements the on-delay, timed-closed timer as a solid state device. The other three timer types are easily generated by manipulating the input to and output from the standard timer according to the following table: timer type input/output to standard on-delay, timed-closed timer on-delay, timed-closed normal input, normal output on-delay, timed-open normal input, complemented output off -delay, timed-closed complemented input, normal output off -delay, timed-open complemented input, complemented output The user need not be concerned about the apparent complexity of the different timer types - the VTPTRAN2 programming language and compiler automatically perform all the necessary complementations in accordance with the previous table. Rather than do all the previously indicated bookkeeping himself, the user is encouraged to define a specific timer !3 name as being of type ONDEIAY or OFFDELAY, and further qualifying each use of that name by one of two timer function suffixes, -TC or -TO, which specify timed-closed and timed-open, respectively. With this information the compiler automatically provides for complementing inputs to off -delay timers and complementing outputs from timed-open timers. Appendix A shows several programming examples utilizing all combinations of on-delay, off -delay, timed-closed, and timed-open VIP timers (see programming example ik) . Programming example 3 is the VTPTPAN2 expression of the current welding example; programming example 13 shows a real -world problem utilizing VTP timers. Now we may proceed with an example of the use of timer functions, For simplicity, the problem is formulated in terms of on-delay timers. Using the following variable names and address assignments: variable name LEFT RIGHT address 20 21 type output output UP 22 output DOWN 23 output WELD 2k output identification motor control, horizontal movement to the left motor control, horizontal movement to the right motor control, upward movement motor control, downward movement power to welder 11+ LSI 1 input LS2 2 input START 3 input T10 ko ondelay timer T15 kl ondelay timer limit switch 1, horizontal limit switch 2, vertical momentary pushbutton switch externally set for 10 seconds externally set for 15 seconds The strategy should be: (1) activate LEFT when both T10 and T15 have timed out and LSI is off; (2) activate DOWN when both T10 and T15 have timed out and LS2 is off; (3) activate T10 (set timer) when START is on; (h) activate RIGHT while T10 is timing; (5) activate T15 (set timer) when T10 has timed out; (6) activate UP while T15 is timing and RIGHT is off; (7) activate WELD when either RIGHT or UP is activatedo One (non-unique) set of Boolean control equations for this system is: LEFT = T10 ~ T15 ~ LSI DOWN = T10 ~ T15 ~ LS2 T10 = START RIGHT- T10 T15 = T10 UP = T15 ~ RIGHT WELD = LEFT .. RIGHT I The VIP machine code instruction address IDA AND ANDC STO LDA AM) ANDC STO LDA STO LDAC STO LDA STO LDAC ANDC STO LDA OR STO ko kl 1 20 ko kl 2 23 3 k ko 21 lj-0 kl kl 21 22 20 21 2k for this set of variable name T10 T15 LSI LEFT T10 T15 LS2 DOWN START T10 T10 RIGHT T10 T15 T15 RIGHT UP LEFT RIGHT WELD equations is: comments load T10 output AND with T15 output AND with complement of LSI controls left movement load T10 output AND with T15 output AND with complement of LS2 control down movement load status of start button possibly set T10 load T10 output complemented control right movement load T10 output possibly set T15 load complement of T15 output AND with complement of RIGHT control up movement load left movement status OR with right movement status WELD is on if LEFT or RIGHT is on 2.6 The VTPTRAN2 Compiler The foregoing examples begin to illustrate the desirability of a higher-level language rather than the currently used sequences of operation 16 codes and addresses (this is equivalent to an elementary assembler language). VTPTRAN2 provides this flexibility by allowing the user to express his system of control equations in a high-level FORTRAN-like language designed especially for Boolean systems and the VIP. VIPTRAN2 allows the programmer to write arbitrarily complex assignment statements using the Boolean operators AND, OR, and NOT, the six timer functions resulting from on-delay and off -delay timers, and two special operators which allow the programmer to optimize his own code by efficient use of the master and enable registers. In addition, the VIPTRAN2 compiler will optionally perform all the bookkeeping operations such as variable address assignment, VIP plug-in card assignment, and automatic addressing in scratchpad (when a scratchpad is included) or in unused outputs (when a scratchpad is not included) for compiler generated temporary variables (such as TEMPI and TEMP2 in example l). The compiler will also produce a memory map of the plug-in cards, showing their type and octal address, as well as a memory map of all individual variable names, showing their type and address, sorted into ascending order by octal address. Another option causes the compiler to sort all of the equations and thus find dependencies which are sensitive to physical location. If A, B, and C are variables used in a program, then the (trivial) sequence of assignment statements A = B B = C should be reordered as B = C A = B 17 so that A will have a correct value on the first scan of memory. The sorting algorithm identifies all such interdependencies and reorders the eqiiations to eliminate as many as possible. In the event that two or more equations are unresolvably interlocked, as in A = B ' N C B = A v C the compiler identifies all such equations for further study by the programmer. All "normal" program errors are trapped by the compiler and an explicit, informative error message is produced, physically located near the site of the error itself on the source listing. The object code produced by the compiler is printed showing the read-only memory word number, instruction mneumonic, octal address, and variable name. If desired, a companion program (PLOTTER) can use a disk copy of the compiler's output to produce a relay tree depicting the controlled system in conventional relay logic graphics. Other features of the compiler allow the programmer maximum flexibility in his effort to turn Boolean equations into VIP machine code. 18 3. VIPTRAN2 LANGUAGE DEFINITION 3 .1 Definitions The VIPTRAN2 language syntax, technically described in modified Backus-Naur Form in Appendix B, is best understood after some basic definitions of commonly used terms. VARIABLE - a logical quantity which can assume the Boolean values of "1" and "0" (or, equivalently, "true" and "false"). A variable always assumes one of its two possible values. VARIABLE NAME - a character string which is the symbolic reference to a variable. In a previous example, VAULT was the variable name which referred to the logical condition of a bank vault door being' either open or closed. Every variable name has an associated octal address corresponding to the physical layout of the VTP. Again using the bank vault example, VAULT was the variable name which was used to denote the logic variable stored at input address 3o« All variable names contain 1 to 12 contiguous characters. (Note: Only the first 8 characters of the name will be reproduced by PLOTTER.) The legal characters for a variable name are: ABCDEFGHIJKLMNOPQRSTUVWXYZ" . -0123^ 56?89 The first character must not be a digit (0 through 9)« Legal variable names include: A ABC i ! VAULT "VAULT" ZZ123 1 * 567890 T-l-2 The following are illegal variable names: 6 first character is a digit 2B first character is a digit A B characters are not contiguous NAMEISTOOLONG contains more than 12 characters OFF? illegal character ? ADDRESS - the physical location of a variable. If the associated variable is an input or output variable, the address also specifies the physical location of the external device connection. All addresses are specified in octal. All addresses are in the range < address < 17TTo« Addresses — — o and IOOOq are reserved and cannot be used by the programmer. FUNCTION - a suffix added to a timer variable name to specify timed-closed (-TC) or timed-open (-TO). The suffix -TO causes the compiler to use the complement of the timer's output. Example: A = TIMER2-T0 OPERATOR - one of three Boolean operations. operator symbol operator type AND * binary OR + binary NOT 1 unary 20 As in algebra, the operators have an inherent priority so that any string of variables and operators will have one and only one logical interpretation (i.e., the meaning is unambiguous). The order of evaluation of terms in a VTPTRAN expression is 1. terms inside the innermost parentheses 2. unary NOT 3. binary AND k. binary OR 5. left to right TERM - a complemented or uncomplemented variable name. EXPRESSION - the result of ANDing and ORing Boolean terms, using parentheses to control grouping and to distribute the unary NOT over several terms. Boolean expressions equivalent VIPTRAN expression A V B A + B A A B A * B AA(BVC) A * (b + C) parentheses necessary A V (B A c) A + B * C parentheses unnecessary because AND has priority over OR A V B /A + B NOT has priority over OR A V B /(A + B) parentheses necessary to distribute NOT A V ((B ^ C) ad) A + /(B * C) * D parentheses necessary to distribute NOT (A A B) v (A A B) A * B + /A * /B parentheses unnecessary AVBVCVD /(A+/(B+/(C+D))) parentheses necessary 21 Extra parentheses in the VTPTRAN2 expression cause no logic problem; thus (A)*(B*(C*D)) = A*B*C*D. Furthermore, when the nature of the expression requires a temporary result to be generated, as in (A+B) * (C+D), the compiler automatically allocates an unused variable to store the result of A+B while C+D is being evaluated. ASSIGNMENT STATEMENT - the specification of where the result of an evaluated expression should be stored. It is of the form = No blanks are required around the equal sign or throughout the expression. Note that only variable names and timer names (not timer functions) may appear to the left of the equal sign. DECLARATION - the association of a specific variable type (input, output, timer, latch, scratch) with a specific variable name. 3.2 VTPTRAN2 Compiler Options The first card of a VI PTRAN2 program is the $VIP card, so called because it contains the characters $VTP in card columns 1 through k, inclusive. Any cards preceding the $VIP card will be completely ignored, and thus may be freely used for comments or any other purpose whatsoever. The $VIP card is used to specify which compiler options the user wishes to invoke. For each of 9 groups of options, one of the choices is already the default option. Explicitly stating the default option has no effect, while stating another option within the group resets the compiler's logic to perform (or not perform) the specified task. The 9 options, with their default values underlined, are: 22 SOURCE or NOSOURCE The SOURCE option causes the input deck to be listed in its entirety, with card numbers and program statement numbers added for easy reference. Most error messages refer to a particular card number or program statement number, so un-debugged programs should use the SOURCE option until they are error-free. After this point, and particularly if the source deck is long, NOSOURCE prevents needless repetition and saves some execution time. SORT or NOSORT The SORT option causes the compiler to examine and possibly reorder the given sequence of source equations. The sorting algorithm will determine whether the equations are interlocked, and if so will attempt to move one or more equations to new positions which will make them independent. If one or more groups of equations are interlocked and cannot be satisfactorily rearranged, the sort fails and a message describing the situation is printed. PRINTSORT or NOPRINTSORT The PRINTSORT option will cause the source equations to be listed in their (new) sorted order - the order from which the compiler will generate code; NOPRINTSORT suppresses this listing. NOSORT implies NOPRINTSORT. CODE or NOCODE The CODE option causes the compiler to generate object code for the VIP if there are no serious errors in the program. NOCODE inhibits the code generation phase and allows fast syntax checking with a significant decrease in execution time. 23 SORTFAIL or NOSOJRTFAIL If the SORT option has "been specified, the SORTFAIL option will cause the compiler to stop before code generation if the sorter has found inseparable dependencies among the equations; NOSORTFAIL allows the code generator to proceed without regard to any error messages produced by the sorter. MAP or NOMAP The MAP option lists all the variable names, their types, and their octal addresses in order of ascending octal address; NOMAP inhibits the listing. TTY or NOTTY If the compiler's output is to be printed by a teletype, option TTY should be in use. If the output is to be printed by a line printer, NOTTY should be specified. SCRATCHPAD or NOSCRATCHPAD SCRATCHPAD specifies that a VIP scratchpad card will be inserted in the machine and is available to the compiler for compiler-generated temporary variables. NOSCRATCHPAD indicates that no scratchpad will be included in this machine. SKIPd - d represents 0, 1, 2, 3, h, 5, 6, 7, 8, or 9. Default: d = 0. After every STO instruction, d VIP read-only memory words are skipped (left blank), thus leaving small "holes" in the memory for subsequent error correction or code modification. 3.3 VTPTRAN2 Syntax The VTPTRAN2 language syntax can be divided into two distinct 2k segments: variable type declaration and optional address assignment, and the Boolean equations forming the control program itself. Let us discuss the two segments separately. 3.3.1 Variable Type Declaration and Address Assignment Any VTPTRAN2 variable is one of ten possible types. The types and their corresponding VTPTRAN2 keyword abbreviations are: physical type VTPTRAN2 declaration keyword 6 volt input INPUT6. 12 volt input INPUT12. 2k volt input INPUT2U. kQ volt input INPUTS. 120 volt input LNPUT120. AC output OUPPUTAC. DC output OUTPUTDC. magnetic latch retentive memory LATCH. on-delay timer ONDEIAY. off -delay timer OFFDELAY. scratchpad SCRATCH. To declare any list of variables to be one of the above types, the declaration keyword is listed, followed by the list of variables to be so typed, with each variable and declaration keyword separated from its neighbor by one or more blanks. When all of the variables of a given type have been listed, a new declaration keyword is listed followed by its own list of variables names. The process is repeated, using as many declarations and as many lines as necessary, until all variables which need to be typed have been declared. ExampJ INPUT6. Al B2 C3 OUTPUTAC. 0UT1 0UT2 LATCH. CR1 SCRATCH. SI S2 S3 The above example declares variables Al, B2, and C3 to be 6-volt inputs, 0UT1 and 0UT2 to be AC outputs, CR1 to be a magnetic latch, and SI, S2, and S3 to be in scratchpad. There is no required ordering of the declaration keywords. Each keyword may appear any number of times and may be followed by a null list. The following declaration segment is also correct. Example : INPUT120. OUTPUTDC. A B INPUT120. IN6 INPUT120. IN7 INPUT6. D E F SCRATCH. SI Example : OKDELAY . Tl T2 OFFDELAY . T3 Tk For each of the above examples, the octal address of the variable will be determined and mapped by the compiler. This option may be overridden if the user desires to specify the address of one or more variables by applying the following rule : Wherever a variable name appears in a declaration, it may be optionally followed by an octal address, separated from the variable name by one or more blanks. Those variable names followed by legal octal addresses will be assigned to those physical locations; all other variables will be optimally assigned by the compiler to fit "around" those (if any) specified by the user. 26 3.3»1«1 Automatic Address Assignment Algorithm The following strategy is used, by the compiler to allocate the octal address of unspecified variables: (1) If the programmer supplies an address, (a) the address is error-checked for being an octal number, for being in the proper range, and for not being multiply defined; (b) if the variable is type "scratch" its address must be in the range IOOOq < address < 177Tn; (c) if the variable is not of type "scratch" its address must be in the range < address < TT7oj (d) the addresses and lOOOn are reserved and may be assigned by the compiler but not by the programmer. (2) If the programmer does not specify an address (a) and if the variable is declared to be a specific type, the next available location on a plug-in card of that type will be assigned. (b) and if the variable is not declared, (i) and if the SCRATCHPAD option on the $VIP card is in use, the next available scratchpad location is assigned, (ii) and if the SCRATCHPAD option is not in use, the next unused position on any OUTPUTAC or OUTPUTDC card is assigned. (3) If the compiler must assign temporary variables for use during the code generation phase of compilation, as in the case of generating Examp.l INPUT6. Al B2 C3 OUTPUTAC. 0UT1 0UT2 LATCH. CR1 SCRATCH. SI S2 S3 The above example declares variables Al, B2, and C3 to be 6 -volt inputs, 0UT1 and 0UT2 to be AC outputs, CR1 to be a magnetic latch, and SI, S2, and S3 to be in scratchpad. There is no required ordering of the declaration keywords. Each keyword may appear any number of times and may be followed by a null list. The following declaration segment is also correct. Example : INPUT120. OUTPUTDC. A B INPUT120. IN6 LNPUT120. IN7 INPUT6. D E F SCRATCH. SI Example : ONDEIAY . Tl T2 OFFDEIAY. T3 Tk For each of the above examples, the octal address of the variable will be determined and mapped by the compiler. This option may be overridden if the user desires to specify the address of one or more variables by applying the following rule : Wherever a variable name appears in a declaration, it may be optionally followed by an octal address, separated from the variable name by one or more blanks. Those variable names followed by legal octal addresses will be assigned to those physical locations; all other variables will be optimally assigned by the compiler to fit "around" those (if any) specified by the user. 26 3.3«1«1 Automatic Address Assignment Algorithm The following strategy is used by the compiler to allocate the octal address of unspecified variables: (1) If the programmer supplies an address, (a) the address is error-checked for being an octal number, for being in the proper range, and for not being multiply defined; (b) if the variable is type "scratch" its address must be in the range IOOOq < address < 1777o; (c) if the variable is not of type "scratch" its address must be in the range < address < 777o5 (d) the addresses and IOOOq are reserved and may be assigned by the compiler but not by the programmer. (2) If the programmer does not specify an address (a) and if the variable is declared to be a specific type, the next available location on a plug-in card of that type will be assigned. (b) and if the variable is not declared, (i) and if the SCRATCHPAD option on the $VIP card is in use, the next available scratchpad location is assigned, (ii) and if the SCRATCHPAD option is not in use, the next unused position on any OUTPUTAC or OUTPUTDC card is assigned. (3) If the compiler must assign temporary variables for use during the code generation phase of compilation, as in the case of generating 27 code to evaluate (A+B)*(a+D) , then (a) if the SCRATCHPAD option is in use, the compiler assigns the next available scratchpad location. (b) if the SCRATCHPAD option is not in use, the compiler assigns the next unused location on any OUTPUTAC or OUTPUTDC card. If all OUTPUTAC and OUTPUTDC cards are already full, the compiler generates an error message for lack of sufficient space and suggests re-running the program with the SCRATCHPAD option enabled. When the compiler assigns a temporary variable, that variable (and hence its location) are reserved for the duration of the equation and will not be reused, even if it is "safe" to do so. This feature aids debugging of machines running in the field and allows examination of temporary results. Compiler generated temporaries are given the mnemonic name TEMPdddd where dddd is the new variable's octal address. After all of the code for an equation has been generated, all temporaries used by that equation are "released" and will be reused in the next equation requiring temporary storage. In all of the cases listed above except 3(h), the allocation of a variable of some type will use a position on an unfilled card of that type before allocating an additional card (l6-. n variables) of that same type. Situation 3(b) is handled optimally since the allocation of an additional OUTPUTAC or OUTPUTDC card, with its l6 variable capacity, is just as expensive as adding a scratchpad with a capacity of 512, n variables. Re-running the program with the SCRATCHPAD option enabled might well eliminate one or more (expensive) OUTPUTAC or OUTPUTDC cards. 28 The user may specify some addresses and allow the compiler to assign all of the others. • A variable may be declared more than once as long as no type or address conflicts occur. Example : IWPUT6. A 2 B C D 3 E OUTPUTDC. X Y 100 Z 110 OKDEIAY. Tl T2 >+0 T3 T>+ 1+1 3.3.1.2 Source Card Requirements Finally, each line of coding in the declaration segment represents one IBM card in terms of input to the compiler. Only columns 1 through 72 may be used, and column 1 is reserved for special purposes. Thus the declaration segment text is contained within columns 2 through 72, inclusive, and may occupy any number of sequential cards. The source program listing will show each of the source cards sequentially numbered for ease of reference and fast identification of errors. 3.3*2 Control Program Segment The control program segment is identified by the declaration keyword "PROGRAM.". All of the assignment statements which make up the program logic follow the PROGRAM, keyword. All of the assignment statements must be contained within columns 2-72 of any one card. If an expression is too long to fit on one card, it may be continued to another card by placing the continuation character ">" in column 1 of the card which is the continuation. This makes columns 2 - 72 of the continuation card a logical extension of the previous card, subject to the constraint that variable names may not be "broken" across a card boundary. Continuation cards may themselves be continued by placing the continuation character in column 1 of the next continuation card. There is no limit to the number of continuation cards used to express a single assignment statement. There is no limit on the number of cards used to express the control program segment. There is a compiler-defined limit of 512, statements in any one program. The physical end of the control program segment is marked by a ^TRANSLATE card, containing those 10 characters in columns 1 to 10 of the card, and followed by a $END card, containing those K characters in columns 1 to k of that card. Documentation is an important part of any program. Placing the character "C" in column 1 of any card makes the entire card a comment. Any text on the comment card is printed on the source listing, but is in no way examined by the compiler. Comment cards may be used anywhere within a program except between continuation cards. VTPTRAN2 is a batch compiler and can process any number of separate programs sequentially. Each program, from $VTP card through $END card inclusive, is stacked in the input stream and the compiler runs each program independently and sequentially. Errors in any one program have no effect on the performance of any other program. This degree of explanation of the VTPTRAN2 language is sufficient to allow the programmer to write a simple VTPTRAN2 program. There are some advanced features yet to be discussed which allow the user to optimize his programming, but first consider the programming examples in Appendix A. 30 3.3.3 Advanced VIPTRAN2 - Control of Master and Enable Registers A common reality in process control is the recurrence of a specific variable or expression which expresses some "master" condition. A simple example is that a group of control equations might contain the terms " * LIKEPOWER " where LINEPOWER is an input variable name describing the master on-off state of the controlled machine. In this instance, the control equations might be of the form LIGHT = RIM * /START * LIKE POWER GATE = (RUN + MAMJAL) * LIKEPOWER BELL = (/SAFETY + /GATE) * LIKEPOWER This example produces the following code: instruction variable name IDA RUK AHDC START AND LIKEPOWER STO LIGHT LDA RUK OR MAKUAL AKD LIKEPOWER STO GATE LDAC SAFETY ORC GATE AKD LIKEPOWER STO BELL 3.3«3«1 The Master Register While the program and code given are both exactly correct, an obvious optimization, considering the hardware capabilities of the VTP, would be to use the master register to hold the repeated variable LINEPOWER. Since the master register is automatically ANDed with the accumulator before a STOre instruction is executed, loading the master register with LINEPOWER would have the same logical effect as repeating "AND LINEPOWER" in the instruction stream for each assignment statement. There would be a net saving of one instruction per equation less the two instructions necessary to load LINEPOWER into the accumulator and then load the master register from the accumulator. For this purpose, VTPTRAN2 uses a fourth binary operator, the ampersand (&) . The definition of the "&" operator is that it loads the master register with the contents of the variable name immediately to its left, if and only if that variable is not already stored in the master register. By replacing "* LINEPOWER" with "LINEPOWER &" in the previous example, the following equations are generated: LIGHT = LINEPOWER & RUN * /START GATE = LINEPOWER & (RUN + MANUAL) BELL = LINEPOWER & (/SAFETY + /GATE) The priority of "&" is such that the loading of the master register is the first code generated for an assignment statement using "&". Naturally, the "master control" of a set of equations may depend upon the logical combination of many variables, so an expression may be generated to express that combination of conditions. The simplest way to utilize the master register optimization technique in this event is to assign the controlling expression to a "scratch" variable (for which 32 the compiler will automatically assign an address if not specified by the programmer), then use the new variable as the object of the & operator, Example : MASTER = LINEPOWER * ( LIMIT. SW1 * /LIMIT. SW2 + /LIMIT. SW1 * LIMIT. SW2) LIGHT = MASTER & MASTERS TOP PANEL = MASTER & (RUN + START) POWER = MASTER & /SAFETYVALVE WHISTEL = MASTER & (SAFETY + STOP +/ TOWER) In the above example, 19 instructions are saved by use of the master register. In the event that some, but not all, of the controlling equations are controlled by some master condition, the master register must be loaded while the master equations are being evaluated, and must be "unloaded" or cleared when statements are encountered which do not utilize the master register feature. Clearing the master register actually means setting it to "l", and this accomplished by loading the accumulator from address (a guaranteed logic "1") and loading the master register from the accumulator. This operation is performed with the two instructions IDA AUX 776 3.3.3.2 The Enable Register A second optimization technique involves the use of the pseudo- jump featiare generated by use of the enable register. Recall that setting the enable register to a logic "0" inhibits all STOre instructions. Using this feature one may simulate the results of a FORTRAN IF statement, and in a limited sense, the GO TO statement. The use of the enable register is invoked by VTPTRAN2's fifth vinary operator, colon (:). Its use is analogous to that of the ampersand in that the colon operator loads the enable register with the content of the variable name immediately to its left if and only if that variable is not already stored in the enable register. The priorities of "&" and ":" are equal, so the loading of the enable register is the first code generated for an assignment statement using ":". As an example, suppose the variable A should be set equal to X+/Y*Z if B is true, and to X*/Y+Z if B is false. The following three statements perform this operation: (1) NOTB = /B (2) A=B:X+/Y*Z (3) A = NOTB : X * /Y + Z In the above case, only one of equations (2) and (3) can execute its STO instruction in any one memory scan. Note that equation (l) should precede the other two; if (l) and (2) were to be interchanged, the enable register would be loaded with B during execution of the first equation, unloaded (or cleared) during execution of NOTB = /B, and loaded with NOTB during execution of equation (3). Although this sequence remains logically correct, and codes correctly, it is needlessly inefficient. 3.3.3.3 Master and Enable Registers in Combination The full power of the enable register is not apparent until we see that entire blocks of code may be optionally, or conditionally, executed. As before, if the conditional assignment is dependent upon an expression, rather than a variable, a simple assignment statement eliminates the problem. 3^ Example : START-UP = START-SWITCH * LINEPOWER * /RESET RUN = /START-UP A = START-UP : LIMIT. SW1 * LIMIT. SW2 B = START-UP : PANEL + MANUAL C = START-UP : REMOTE + LOCAL A = RUN : LIMIT. SW1 + LIMIT. SW2 B = RUN : PANEL * MANUAL C = RUN : REMOTE + TEST It is not unusual to find all the operators in use in a simple assignment statement. MASTER1 = LINEPOWER * /STOP + MANUAL MASTER2 = SAFETY + ABORT + OFF A - MA.STER1 & START-UP : LIMIT. SW1 * LIMIT. SW2 B = MASTER1 & START-UP : PANEL + MANUAL C = MASTER2 & START-UP : REMOTE + LOCAL A = MASTER1 & RUN : LIMIT. SW1 + LIMIT. SW2 B = MASTER1 & RUN : PANEL * MANUAL C = MA.STER2 & RUN : REMOTE + TEST 3.3.3.4 The ON and OFF Variables Occasionally the user simply wants to specifically set a variable (probably an output control) to a logic "1" (ON) or to a logic "0" (OFF). For this reason two variable names are reserved which may be used as the Boolean constants. The variable names are: "1" Boolean "true" "0" Boolean "false" 35 Althcnigh these variables may be used in any expression, they find special use in conjunction with the enable register. For example, assume that MOTOR and LIGHT should be "on" if SWITCH ic "on", but should retain their former state (whichever it is) if SWITCH is "off". This situation is expressed in VTPTRAN2 as: MOTOR = SWITCH : "l" LIGHT = SWITCH : "l" The variable "0" is used analogously. 36 k. PROGRAM LOGIC MANUAL k.l Overview of the Compiler's Responsibilities The"\ffPTRAN2 compiler operates in a logical and predictable fashion, The purpose of this section is to explain exactly what internal logic decisions are made and what factors influence those choices. The compiler is comprised of 18 major sections, some dependent on and some independent of other sections. Most major sections have a number of subsections to perform repeated or specialized tasks. The major sections and their functions are: function section name BATCH COMPILER LEXI LOOKUP the program batch driver; initializes the global variables for any "batch" of programs; sets parameters for compiler's table sizes and work space. controls compilation phases for each individual program; performs symbol table and global variable initialization for each individual program; selects $VTP card compiler options; controls optional invocation of all working procedures, lexical analysis; collects tokens from the source cards and classifies them semantically as identifiers, numbers, or operators, symbol table manager; finds and inserts identifiers and keywords in the symbol table. section name MAPPING ERROR SYNA ADCHECK EXPRESSION OUT DUMP SEMA CODEGEN TEMPGEN GEN Amotion outputs a variable name and address map, sorted by ascending address. error message writer; prints six classes of error messages and sets severity code of error. syntactic analysis; examines the input stream and verifies each"\IPTRAN2 statement for syntactic correctness, correcting errors whenever possible, checks programmer-defined variable addresses for proper upper and lower bounds, duplication, and type. syntactic analysis and postfixing; examines each AZEPTRAN2 assignment statement for syntactic correctness, correcting errors whenever possible; reduces the infix expression to Polish postfix; recognizes and translates timer functions, manages postfix stack. prints compiler's internal variables, stacks, and tables for inspection by systems programmer, performs semantic typing of variables; determines type and address of undeclared variables, the code generator; translates Polish postfix from SYNA into VIP machine code. allocates variable and address for compiler-defined temporary variables. manages the code generator stack; inserts AUX instructions into output coding stream for 38 section name function optimal (least number of instructions) scratchpad addressing. OBJECT formats, edits, and prints the final output page (object code) of VIP machine code. PRINT formats and prints the sorted list of source equations, and retrieves same from an indexed sequential direct access data set. SORT determines what inter dependencies exist among the source equations and reorders them as necessary to prevent use of uninitialized variables. These sections are logically connected as shown in Figure 2. h.2 Module Technical Descriptions The following section describes each of the 18 major modules in detail, with emphasis upon the logical sequence of operation of each. U.2.1 BATCH A "job" consists of any number of sequential programs. BATCH separates the input stream into programs and monitors their compilation, and for each program initializes the global parameters affecting the compiler's internal size. These internal limits include: (1) the number of VIPTRAN2 assignment statements in the PROGRAM segment, currently 512; (2) the number of hash buckets for the symbol table, currently 257; (3) the length of the array containing the postfixed representation of the source program, currently 5000 words; BATCH compiler LEXI LOOKUP MAPPING ERROR SYNA ADCHECK EXPRESSION OUT DUMP SEMA CODEGEN TEMPGEN GEN OBJECT PRINT SORT Figure 2. VIPTRAN2 Compiler Module Containment Map 1+0 (k) size of the symbol table, representing the maximum number of user-defined and compiler-defined variables in any one program, currently 1000; (5) number of reserved keywords recognized by the compiler • and stored in the symbol table, currently 2k. Execution of the compiler begins with a scan of the input stream for a source card containing the four characters "$VIP" in card columns 1-k. When such a card is located control passes to COMPILER. If no such card is found the compiler takes a "normal exit" by simply returning control to the operating system with no condition codes set. When a $VIP card has been recognized and the program following it has been processed by COMPILER, control returns to BATCH and a search for another $VIP card begins. Thus, BATCH terminates (l) if no $VIP card occurs in the input stream, or (2) when control returns from COMPILER and no more $VTP cards occur in the input stream. U.2.2 COMPILER This is the initialization and sequence of control module. COMPILER initializes: (1) an address map of 102^ bits; (2) flag bits for each of the compiler options on the $VIP card; (3) the symbol table, each entry containing fields for the variable's character string name (12 or fewer characters), its octal address, its type, a map and count of all its uses in the program, and a hash collision resolution chain; (k) an order table which stores the position of the equation in its final (sorted) order, pointers to the head and tail of the postfix array section containing the translated equation, and the physical card number on ■which the source equation started (supplied by the compiler and used as a key for the disk copy of the input ) ; (5) the hash table of prime length. The time and date are then fetched from the system clock, the external file for source card images is created, the $VIP card is examined for the nine compiler options which may be specified and appropriate flags set, the symbol table is initialized with 2k reserved keywords, the compiler heading lines (version number, time, date and options in use) are printed, and then begins a series of calls directed by the compiler's flag bits and the current error status of the program. The sequence is: SY1IA DUMP SEMA DUMP if MAP option enabled, then MAPPING if terminal error has occurred, return to BATCH if SORT option enabled, then SORT DUMP if a terminal error has occurred, return to BATCH if PRINTSORT option enabled, then PRINT DUMP if CODE option enabled, then CODEGEN DUMP return to BATCH k2 The multiple calls to DUMP provide the systems programmer with an opportunity to examine the dynamic status of the compiler's stacks, tables, and internal variables, more thoroughly described in section DUMP. 1+.2.3 LEXI Lexi identifies the next token of the input stream, defined to be the longest contiguous string of a letter followed by zero or more letters and/or digits (an identifier or keyword), a digit followed by zero or more digits (an address), an operator (/, *, +, &, :, =), or delimiter (left parenthesis, right parenthesis, comma, space, end-of-line marker, end-of-statement marker). The space is the most common delimiter and is used to separate tokens. The character string X123 unambiguously represents the variable name X123, while X 123 is the declaration of the variable X and its assignment to address 123o» Each source card is examined between columns 1-72 (only). The remaining columns may be used for any purpose, possibly sequence identification While the text of the declaration and program segments must be contained in columns 2-72, column 1 is always examined and the card processed according to its content: character in column 1 action C This card is a comment; columns 1-72 of the card are printed in the source listing. > Used only in the program segment, it identifies the current card as a logical extension of the previous card (continuation card). Its use in the declaration segment has no effect. 1*3 character in column 1 $ action $ signifies a special control operation. If columns 1-10 contain ^TRANSLATE, the syntax parse will end; if columns 1-5 contain $ST0P, the compiler halts; otherwise, columns 2 and 3 are taken as a two digit code for dumping the compiler's stacks and tables. The codes are explained in section DUMP, blank In the program segment, a blank in column 1 logically ends the previous assignment statement and restarts the assignment statement parser. If the compiler is examining the program segment, a copy of the source cards is filed on disk to facilitate later printing of the sorted equations. If, during the assignment statement parse, the input stream is exhausted and no $TRANSLATE card has been found, a $TRANSLATE card is inserted by the compiler, a non-terminal error message printed, and the assignment statement parse terminates normally. Identification of a token containing more than 12 characters results in an error message; the first 12 characters of the token are used in place of the offending identifier. If a token is an identifier, it is located or inserted in the symbol table and semantically classified as a variable or compiler keyword. kk k.2.k LOOKUP The symbol. table manager uses the method of hash buckets with direct chaining. The hash key is defined by a simple function L L . KEY = ( z C. 2 _1 ) mod 257 i=l 1 where KEY is the hash key (hash bucket pointer), C. is the 8-bit EBCDIC code for the i — character in the token, and L is the number of characters in the token. The function assures that every character in the token participates in the resultant key. The function is implemented by addition and shifting to achieve maximum speed. In the event of collisions, the chain field of the symbol table is a linked list which is sequentially searched. This lookup method is one of the fastest known but does require a moderate amount of storage for the hash buckets and chain field. Furthermore, the method allows unlimited growth of the symbol table and the number of hash buckets by merely changing the appropriate global variables in BATCH. U.2.5 MAPPING This module produces a listing of the program variables, sorted by ascending octal address, without actually sorting (moving) any data. The output lists the variable name, its address, and its type. If the variable name is a timer, its input is identified; if a timer function, the timer base variable and its input are identified. All of this information is recorded in the symbol table and the cross-references are obtained by following linked lists of maximum length two. 4.2.6 ERROR The error message writer produces an English language error message and a compiler-generated card number or statement number for easy reference, The message is printed on the line below the offending statement if the error is syntactic, and on the line(s) below the $TRANSLATE statement if semantic. Other error messages, such as SORT failure or code generator failure, also appear below the ^TRANSLATE statement. If appropriate, a portion of the source text is included in the error message to identify the left- or right-context of the error. A complete list of error messages, their causes, and some examples, are contained in Appendix C. 4.2.7 SYNA The syntactic analysis of the source program is performed by SYNA. The declaration and program segments are examined separately. The declaration parse searches for the first occurrence of a keyword (TNPUT6., INPUT12., TNPUT24., INPUT48., INPUT 120., OUTPUTAC, OUTPUTDC, ONDELAY . , OFFDELAY., LATCH., or SCRATCH.) and then types all variables between the current and next keyword to be of the current type. Identification of the PROGRAM, keyword terminates the declaration parse and initiates the assignment statement parse. SYNA recognizes the target (left-hand side variable) of an assignment statement and the assignment operator (-) and calls EXPRESSION to translate the right-hand side expression into postfix. This operation is repeated for each assignment statement. Recognition of the $TRANSLATE card terminates the assignment statement parse. 4.2.8 ADCHECK The address checking module ascertains that no variable is multiply or ambiguously defined. Variable addresses are error checked for proper k6 bounds depending upon the type of variable, and assigned addresses are recorded in the symbol table. 4.2.9 EXPRESSION VTPTRAN2 expressions are translated into Polish postfix using operator precedence functions . EXPRESSION also handles the special complementing of off -delay timer inputs and timed-open timer outputs. Whenever a timed-open timer is used on the right hand side of an equation, EXPRESSION generates code to use the complement of the output; when an off -delay timer is the target of an assignment statement, EXPRESSION automatically generates code to complement the input. 4.2.10 OUT This simple module checks the postfix stack for overflow and either issues the appropriate stack overflow error message or adds the current token to the postfix stack. 4.2.11 DUMP The successful development of a compiler is hastened by being able to examine the internal tables, stacks, pointers, and major variables dynamically. Rather than insert and remove this code as needed, it has been permanently included as a separate module and is optionally invoked at any of seven distinct times in the compilation process. A simple coding scheme allows the systems programmer to cause the compiler to print its tables for examination. This option is invoked by including a source card of the form $< digit > < digit > kl using columns 1-3 • Such a command card may appear anywhere in the source deck and does not disturb the normal operations of the compiler. The first digit specifies the time that the printout is to occur and the second digit specifies exactly what is to be printed. The possibilities are: gl 1 when DUMP is invoked immediately 1 after syntactic analysis 2 after semantic analysis 3 after sorting h after printing of sorted equations 5 after code has been generated . , . . , , 2 what is printed variable address allocation map; VIP card type allocation map 1 hash table 2 symbol table 3 postfix stack h sorted order table Thus, the systems programmer could include cards such as $11 $52 to examine the hash table after syntactic analysis and the symbol table after code generation. U8 h.2.12 SEMA Semantic analysis determines the type and address of undeclared variables and the optimal distribution of VIP plug-in cards. The symbol table entries are scanned in three passes to accomplish optimal address assignment. Pass 1 . Although the lowest order plug -in card (addresses 0-17o) must be of type INPUT, it may equally well be of the 6, 12, 2k, kQ, or 120 volt variety. The first pass through the symbol table determines which input type (voltage) has been used, and in the rare event of no inputs assigns type INPUT120 to card position 1. The first pass is usually quite fast since inputs are traditionally declared first. Pass 2 . All user-variable addresses must be allocated before compiler- assigned addresses can be allocated. A second pass through the symbol table determines what card types are required by the programmer-supplied addresses and assigns VIP cards as required. At the same time all variables whose address map to the same card are error checked to assure that those variables are of identical type. Pass 3 » All variables which have not been assigned addresses, whether declared or not, are given physical locations by pass 3» If a variable is declared to be of type x, the current VIP cards are examined to find one of type x which is not full. If such a card is found, the first (lowest number) address is allocated. If all cards of type x are full, a new card of type x is added to the card map and its first position is allocated. If a variable has not been declared, it may now be reasonably assumed to be a virtual control relay (i.e., a programmer defined variable with no connection to the outside world). If the SCRATCHPAD option is in use, the variable is assigned to an unfilled scratchpad location; if no scratchpad is allowed (the NOSCRATCHPAD option), the variable is allocated to the first unused position on the first partially filled OUTPUTAC or OUTPUTDC card, using the algorithm previously described. Having assigned addresses to all variables, the VIP card requirements are now known, so the VIP card map is printed. lf.2.13 SORT The SORT module determines which assignment statements use a variable on the right-hand (expression) side of the assignment operator when that same variable is also in use on the left-hand (target) side of some other equation(s). For all such situations the sorter attempts to place the definition (target side use) of the variable prior to all of the expression-side uses of that variable. The sorter uses a 512 by 512 bit matrix supplied by SYNA, and the count field for each variable in the symbol table, to speedily determine which variables, and hence which equations, must be considered. Sorting time is kept to a minimum by changing statement number indices in arrays, and by not moving characters strings themselves. In the event that two or more equations are interlocked, the sorter drops the last equation of the set (the one with the largest VIPTRAN statement number), issues a warning message indicating which equation has been dropped, and proceeds to resort the remaining equations. The algorithm necessarily terminates, since in the worst case of every equation being interlocked with every other equation, all but the first equation will eventually be dropped and the sort is "successful." The logic of the sorter was designed and first implemented by Professor T. A. Murrell. 50 1+.2.1U CODEGEN CODEGEN is. the master module for code generation. It always prints the page headings and the machine initialization sequence LDA load logic "1" ' AUX 776 set master register to "1" AUX 775 set enable register to "1" AUX 77^- enable scratchpad mode for next instruction STO store "1" at 1000 g Since each scan of the VIP's read-only memory executes these five instructions, the master and enable registers, if altered by the execution of the previous scan, are now restored for proper execution of the current scan. Each equation in sorted order is now examined sequentially (if the NOSORT option was in effect, sorted order is identically the original order). For each equation, the following operations are performed: (1) All compiler-generated temporary variables allocated by the previous equation are released by "unmarking" the address map. (2) The master and/ or enable register might need to be reset if the previous equation used that feature and the current equation does not use that feature, or does not use it with the same variable . The compiler considers 5 cases to produce optimal code. ■Case 1 The previous equation used both the master and enable registers; the current equation uses neither. Both registers must be cleared. The emitted code is: 51 IDA load logic "1" AUX 776 set master register to "1" AUX 775 set enable register to "1" Case 2 The previous equation used the master register; the current equation does not. The master register is cleared by emitting: IDA load logic "l" AUX 776 set master register to "l" Case 3 The previous equation did not use the master register and the current equation does, or the previous equation used the master register and the current equation uses it with a different variable. The master register is loaded with the new variable by emitting : LDA AUX 776 load master register Case h The previous equation used the enable register; the current equation does not. The enable register is cleared by emitting: LDA load logic "1" AUX 775 set enable register to "1" Case 5 The previous equation did not use the enable register and the current equation does , or the previous equation used the enable and the current equation uses it, but with a 52 different variable. The enable register is cleared by- emitting: ID A AUK 775 set enable register to "1" (3) Now begins the actual code generation for a given equation. The compiler initializes a compile-time stack for use in code generation, utilizing the postfixed form of the source equation. The standard techniques for translating postfixed expressions are not directly applicable because of (l) the availability of AM) -complement, OR -complement, and LDA- complement instructions, and (2) the emphasis on optimized code. The coding loop will cause generation of a temporary storage location whenever necessary. The equation X - (A + B) * (C + D) whose postfixed representation is (left to right) XAB + CD + * = is evaluated in the following steps. compile-time stack code generator action X X A X A B X A B + X *i X *i c X t C D emit "LDA A" emit "OR B" generate temporary location TEMP to hold t. = A + B compile- time stack X TEMP c X TEMP C D X TEMP C D + X TEMP *2 X TEMP V Xt 3 X V code generator action emit "STO TEMP" emit "LDA C" emit "OR D" emit "AND TEMP" emit "STO X" The lack of a store-complement instruction requires a complemented expression such as X = /(A+b) to be evaluated in the following steps: LDA A load A OR with B generate temporary storage space load it back complemented final result The compile -time stack is arbitrarily set to a maximum height of 20 (experience shows its average height is about 5)« If a deeply nested equation attempts to overflow the stack, a terminal error is announced and code generation stops. U.2.15 TEMPGEN The compiler's temporary generator is called whenever the content of the accumulator must be retained for future use and yet the next instruction will be LDA or LDAC. The temporary location generated is chosen in accordance with this rule: OR B STO TEMP LDAC TEMP STO X 5h If the SCRATCHPAD option is in use, the first non-used scratchpad position is allocated; otherwise, the first non-used position on an already allocated (by SYNA) VIP plug -in card of type OUTPUTAC or • OUTPUTDC is used. If, in the latter case, all VIP cards are full, a terminal error message is issued which explains the situation (lack of space) and suggests rerunning the program with the SCRATCHPAD option. When a location is available for use, an entry is made in the symbol table using the variable name TEM Pdddd, where dddd is the octal address of the temporary variable. The address is pushed onto a stack of code- generator defined temporaries and marked "not reusable" for the duration of the equation's translation. The latter decision, while not strictly optimal since a given temporary location might be safely reused many times within the same equation, was made so that a field engineer could physically monitor all temporary results. The stack of temporary variable addresses is arbitrarily set to a maximum height of 20. If an equation attempts to overflow the stack, a terminal error is issued and the code generator stops. U.2.16 GEN References to scratchpad addresses require adding instructions to the normal instruction stream to assure optimized code. A single reference to scratchpad (recognized by the address beginning > IOOOq) should be preceded by the AUX 77^ instruction. Sequential references to scratchpad of length 2 or more are better coded by considering the stream of scratchpad 55 referencing instructions to be a block, preceded by the AIJX 773 instruction and followed by the AUX 772 instruction. By utilizing a two-level stack, GEN automatically inserts these AUX instructions into the output code emitted by CODEGEN. U.2.17 OBJECT This module is merely an editor for the final form of the object code. The VIP read-only memory word number is incremented by 1 for each successive instruction generated, except for the instruction following a STOre which is handled in accordance with the SKIPd option. The SKIPd option allows the programmer to automatically skip d memory locations after every STOre instruction. This feature can be used to introduce small "holes" in the read-only memory (treated as "no-operations" during VIP execution) for later adjustment or correction of code. . 1+.2.18 PRINT The source equations are stored on disk as an indexed sequential data set and keyed by a four character code which represents the compiler- assigned card number assigned to that source image (and printed on the source listing). For speed, each source record contains a one character field which delimits the last card of a multi-card (continued) assignment statement. Thus, a request to print a particular assignment statement will actually print all the original source cards which were used to define that equation (no upper limit). This method of filing and retrieving the source data was tested and found to be significantly faster, more cost-effective, and less demanding of core storage than recreating the source text from the postfix. 56 5. SUMMARY The goal of VTPTRAN2, like VIPTRAN and FORTRAN, is to save a programmer's time and reduce the frequency of coding errors by introducing the proper vehicle, in this case a new programming language, for the expression of algorithms. The first two years of experience at St rut hers -Dunn, using engineers with little or no programming experience, has been a definite decrease in both programming time and actual expense. Those persons using the language regard it favorably because VTPTRAN2 does allow one to think and design at a higher level than does an assembler language. While the syntax of VTPTRAN2 was somewhat predicated on the knowledge of the VIP hardware, the techniques employed by the compiler are actually sufficiently general to allow conversion to a similar machine by changing only the structure of the code generator. This might well be an area for profitable future research. It is anticipated that VIPTRAN2 is an end product, having emerged from two years of experience and the extensive revision of its predecessor, VIPTRAN. While the intial experience with VIPTRAN2 has shown the compiler to be essentially error-free, newer versions of the compiler can and will be released as necessary to correct errors or improve the compiler's efficiency. Every effort will be made to keep the VTPTRAN2 programming system viable. I sincerely expect that future experiences with VTPTRAN2 will validate its primary goal: to make the human being more productive. 57 LIST OF REFERENCES Gear, C. W., Computer Organization and Programming , McGraw-Hill, Inc., New York, 1969. Gries, D., Compiler Construction for Digital Computers, John Wiley and Sons, Inc., New York, 1971. Henry, Donald, ed., "Operating and Programming Manual," Struthers-Dunn, Bettendorf, Iowa, 1972. , "VIP Seminar Notes, " Struthers-Dunn, Bettendorf, Iowa, 1972. Hopcroft, J. E. and J. D. Ullman, Formal Languages and their Relation to Automata, Addison -Wesley, Reading, Massachusetts, 1969. Kain, R. Y., Automata Theory: Machines and Languages, McGraw-Hill, Inc., New York, 1972. Knuth, D. E., The Art of Computer Programming, Addison-Wesley, Reading, Massachusetts, 1968. Weaver, A. C, "vTPTRAN - A Programming Language and Its Compiler for Boolean Systems of Process Control Equations," report # UIUCDCS- R-73-603, Department of Computer Science, University of Illinois at Urbana-Champaign , Urbana, Illinois, 1973. Wilcox, T. R. , "Class notes for Computer Science ^01 - Compiler Construction," unpublished, University of Illinois at Urbana-Champaign, Urbana, Illinois, 1973. 58 APPENDIX A VTPTRAN2 Programming Examples RAN2 COMPILEP, VFRSION I. OJ : 06/03/74 TIME: 09.58.48.190 IONS> SOUKCE NOSORT NOPRINTSJHT CODE NOSORTFAIL MAP NOTTY N? SCR ATCHPA SOURCE STATEMENT C C PROGRAMMING EXAMPLE I C HANK VAULT BURGLAR ALARMt WITHOUT OPTIMIZAT] ' C C PROGRAMMER: ALFPEC C. WEAVER C C DECLARE INPUT VARIABLES ANT THEIR ADDRESSES C INPUT6. DTOP 1 SWITCH 2 VAULT 5 PUSHBUTT! N 4 C C C HECLARE OUTPUT VARIABLES AND THE If AD^ZSSlS C OUTPUTOC. ALARM 20 TIMER 21 C C BEGIN CCNTRCL PPCGRAM SEGMENT C PROGRAM. 1 ALARM = D0Oft*SWITCH ♦ VAULT*SWITCH + PUSHBUTTON 2 TIMER = /(DO JR*SWITCH + VAULT*SWITCH + PUSHBUTTON) 3 $TP AN SLATE 6o VIP CARD MAP TYPE ADDRESSES INPUT6 -> 17 QUTPUTDC 20 -> 37 NAME VAPIARLE MAP ADDRESS TYPE 03R WITCH AULT USHBUTTON LARM IMER 1 2 3 4 20 21 INPUT6 INPUT6 INPUTb INPUT6 OUTPUTDC OUTPUTDC 62 VIP MACHINE CODE WORD* INSTR AODR VARIABLE NAME OOOl LDA 000 0002 AUX 776 0003 AUX 7 75 0004 AUX 774 0005 STO 000 0006 LDA 001 DOOR 0007 AND 002 SWITCH OOiO STO 022 TEMP0022 0011 LDA 003 VAULT 0012 AND 002 SWITCH 0013 OR 022 TEMP0022 0014 OR 004 PUSHBUTTON 0015 STO 020 ALARM 0016 LDA 001 DOOR 0017 AND 002 SWITCH 0020 STO 022 TEMP0022 0021 LDA 003 VAULT 0022 AND 002 SWITCH 0023 OR 022 TEMP0022 0024 OR 004 PUSHBUTTON 0025 STO 023 TE^P0023 0026 LDAC 023 TEMP0023 0027 STO 021 TIMER RAN2 COMPILERt VERSION 1.00 : 06/03/74 TIME: 09. 54 .26 . I 70 IONS> SOURCE NOSORT NOPR INTSOPT CTDF NOSORTFAIL MAP NITTY NOSCPATCHPA SKI I ) SOURCE STATEMENT C C PROGRAMMING EXAMPLE 2 C «ANK VAULT BURGLAR ALARM, ^ITH 3PTIMIZATI0f C C PROGRAMMER: ALFRED C. WEAVES C C DECLARE INPUT VAPIABLES AND THEIR ADDRESSES C INPUT6. DOOR 1 SWITCH 2 VAULT J PUSHBUTTON 4 C C DECLARE OUTPUT VARIABLES AMD THEIR ATD^ESSES C "!UTPUTDC. ALAR" zo TIMER 21 C C BEGIN CONTROL PROGRAM SEGMENT c PROGRAM. 1 ALARM = (D'"*np + VAULT) * SWITCH * PIJSHHUTT1N 2 TIMER = /ALAkm 3 STRAMSLATt VIP CARD MAP TYPE ADDRESSES INPUT6 -> 17 OUTPUTDC 20 -> 37 6k 65 NAME VARIABLE MAP AOORFSS TYPE )OQR iWlTCH /AULT >USHBUTTON U.ARM riMER 1 2 3 4 20 21 INPUT6 INPUT6 INPUT6 INPUT6 OUTPUTDC OUTPUTDC VIP MACHINE CODE W3RD# INSTR ADDP VARIABLE NAME 66 OOOl LDA 000 . 0002 AUX 7 76 0003 AUX 775 0004 AUX 7 74 0005 STO 000 C006 LDA 001 DOOR 0007 OR 003 VAULT 0010 AND 002 SWITCH 0011 AND 004 PUSHBUTTON 0012 STO 020 ALARM 0013 LDAC 020 ALARM 0014 STO 021 TIMER IPTRAN2 COMPILER, VERSIJN 1.00 ATE: 06/03/7* TIMF: 09. 59. JO. 890 67 OPTIGNS> SOURCE NOSORT N0PRINTS1FT CDDE N3S0RTFAIL 'MP N3TTY N' SCf-AT'"MU Aj s<[p, ARD* STMT* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 11 23 24 25 26 27 28 29 30 31 32 33 3* 35 36 37 38 39 43 1 2 3 4 5 6 7 8 SOURCE STATEMENT C C PROGRAMMING EXAMPLE 3 C AUTOMATIC WELDER CONTROLLER C C PROGRAMMER: ALFFED C. WEAVER C C DECLARE OUTPUT VARIABLES AND THEIR An9 RESS ES DUTPUTAC. LEFT 20 C C DECLARE INPUT VARIABLES C L^T COMPILE* ASSIGN ADDRESSES TO INPUTS RIGHT 2 1 UP 22 D : •/ N 2 3 w t- L n 24 C C c c c c c c c c c c c INPUT120. LSI LS2 START DECLARE TIMER VARIABLES USE TWO ONDELAY TIMERS, Tio AN" T15, FXTERNALLY SFT FOB 10 AND 15 SECONDS RESPECTIVELY. THE TIMEP FUNCTICN SUFFIX »-TC" INDICATES T I mc D-C L -St 'D WHILE «-T0- INDICATES TIMED-OPEN. Th^ FUNC>I jn SUFfFx SHOULD APPEAR ON EVERY TIMER NAME USED ON TH= R IGHT-mInO-S I- L pt THE COMPILER ASSIGN ADDRESSES FOR THE TIMERS ONDELAY. TIO T15 BEGIN CONTROL PROGRAM SEGMEN T PROGRAM. LEFT = TIO-TC * T15-TC * /LSI DOWN = TIO-TC * T15-TC * /LS2 TIO = START RIGHT = TIO- TO T15 = TIO-TC UP = TiO-TO * /R IGHT WELC = LETT + P IGHT * T R AN SLATE 68 VIP CARD MAP TYPE ADDRESSES INPUT120 -> L7 OUTPUTAC 20 -> 37 TIMER 40 -> 57 VARI ABLE MAP NAME ADDRESS TYPE LSI 1 INPUT120 LS2 2 INPUT120 START 3 INPUT120 .EFT 20 QUTPUTAC UGHT 21 OUTPUTAC JP 11 °UTPIJTAC ^OWN 23 OUTPUTAC rfELD 2* OUTPUTAC no 40 CNDELAY 15 41 ONDELAY 69 70 VIP MACHINE CODE WORD* INSTR ADDR VARIABLE NAME 0001 LDA 000 0002 AUX 776 0003 AUX 775 0004 AUX 774 0005 STO 000 0006 LDA 040 TU-TC 0007 AND 041 T15-TC OOLO ANDC 001 LSI OOli STO 020 LEFT 0012 LDA 040 T10-TC 0013 AND 041 T15-TC 0014 ANDC C02 LS2 0015 STO 023 DOWN 0016 LDA 003 START 0017 STO 040 T10 0020 LDAC 040 T10-T0 0021 STC 021 RIGHT 0022 LDA 040 TiO-TC 0023 STO 041 T15 0024 LDAC 040 T10-T0 0025 ANDC 021 RIGHT 0026 STO 022 UP 0027 LDA 020 LEFT 0030 OR 021 RIGHT 0031 STO 24 WELH >TRAN2 COMPILERt VERSION 1.00 E: 06/03/74 TIME: J9.59.3A.S7U 73 >TIONS> SOUPCt NHSIPT NOPRINTSOPT CODE NOSPRTFAIL MAP NITTY I 10 SCF I ~C ">' A, ,- ID* STMT* 1 2 3 4 SOURCE STATEMENT C PROGRAMMING EXAMPLE A CONTROL EQUATIONS WITH COMMON MASTER CONTROL EXPRESSI NO MASTER REGISTER OPTIMIZATION PfcOGRA^E*: ALFRED C. WEAVER DECLARE THE INPUT VAFIA&LES LET THE COMPILER ASSIGN THEIk ADDRESSES INPUT120. PUN START MANUAL SAFETY DECLARATION KEYWORDS CAN APPEAR REPEATE'UY, AND IN ANY OPDrR INPUT I 20. LINFPOWER TECLAPE THE OUTPUT VARIABLES LET THE COMPILER ASSIGN' TH 17 3UTPUTAC 20 -> 37 VARIABLE MAP NAME ADDRESS TYPE RUN I INPUT120 START 2 INPUT120 MANUAL 3 INPUT120 SAFETY 4 IMPUT120 L INEPOWER 5 INPUT120 LIGHT 20 OUTPUTAC GATE 21 OUTPUTAC BELL 22 OUTPUTAC VIP MACHINE CODE WORD# INSTR ADDR VARIABLE NAME OOOl LDA 000 0002 AUX 776 0003 AUX 775 0004 AUX 774 0005 STO 000 0006 LDA 001 RUN 0007 ANDC 002 START 0010 AND 005 LIMEPGWER 0011 STO 020 L I GHT 0012 LDA 001 RUN 0013 OR 003 MANUAL 0014 AND 005 LINEPOWER 0015 STO 021 GATE 0016 LDAC C04 SAFETY 0017 ORC 021 GATE 0020 AND 005 LINEPOWER 0021 STO 022 BELL RAN2 COMPILER, VERSION 1.00 : 06/03/7* TIME: 09.59.38.790 SOURCE N0S1RT NOPRINTSORT CDDE N0S.1PTFAIL MAP N )TTY N^SC h AKHPA:.- SK o 1 2 3 4 SOURCE STATEMENT C PROGRAMMING EXAMPLE 5 CONTROL EQUATIONS WITH C IMmqn MASThH CONTROL EXPRESS] UTILIZING "ASTER REGISTER OPTIMISATION PROGRAMMER: ALFREC C. WEAVER DECLAPE THE INPUT VARIABLES LET THE COMPILER ASSIGN THEIR ADDRESSES INPUT120. RUN START MANUAL SAFETY DECLARATIONS OF A BLOCK MAY EXTEND OVER AS *ANY SOUPC= CARDS AS NECESSARY. LINEPOWER DECLARE THE OUTPUT VARIABLES LET THE COMPILER ASSIGN THEI« ADDRESSES OUTPUTAC. L IGHT GATE BELL CONTROL PROGRAM SEGMENT PROGRAM. LIGHT = LINEPOWER E RUN * /STA»T GATE = LINEPOWER & (RUN + MANUAL) BELL = LINEPOWER £ (/SAFETY ♦ /GATE) $TRANSLATE 76 VIP CARD MAP TYPE ADDRESSES INPUT120 -> OUTPUTAC 20 -> 17 37 77 VARIABLE MAP NAME ADOPESS TYPF RUN 1 INPUT120 START 2 INPUT120 MANUAL 3 INPUT120 SAFETY 4 INPUT12U LINEPOWER 5 INPUT120 LIGHT 20 HUTPUTAC GATE 21 OUTPIJTAC BELL 22 3UTPUTAC 78 VIP MACHINE CODE WORD* INSTR ADDR VARIABLE NAME OOOl LDA COO . 0002 AUX 7 76 0003 AUX lib 0004 AUX 7 74 0005 sm 000 0006 LDA 005 LINEPOWER 0007 AUX lib 0010 LDA 001 RUN 0011 ANDC 002 START 0012 STO 020 LIGHT 0013 LDA 001 RUN 0014 OR 003 MANUAL 0015 STO 021 GATE 0016 LDAC 004 SAFETY 0017 ORC 021 GATE 0020 STO 022 RELL ^IPTRAN SOURCE NOSORT NOPRINTS'JPT C IDE NOSOPTFAIL N'AP NOTTY I :Aan« stmt* i 2 3 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 " 28 29 30 3i 32 33 34 35 36 37 38 39 40 41 1 42 43 44 45 2 2 3 3 4 4 5 5 6 6 SOURCE STATEMENT C P&1GRAMMING EXAMPLE 6 *ASTE* REGISTER OPTIMIZATION IF A MASTER CONTRA QUATI - PROGRAMMER: ALFRED C. WEAVER DECLARE 48-VOLT INPUTS THE COMPILER WILL ASSIGN ALL VARIABLE ADDRESSES INPUT48. LIMIT. SW1 LIMIT. SW2 DECLARE 6-VOLT INPUTS INPUT6. C C C C C C c C C c C C c c c > C c C c MASTERSTOP SAFETYVALVE RUN START POWER DECLARE DC OUTPUTS OUTPUTDC. LIGHT PANEL POWER WHISTLE CONTROL PROGRAM SEGMENT PROGRAM. THE FIRST TARGET VARIABLE, 'MASTER', IS AN VIRTUAL CONTpn L RELAY, I.E., IT DOES NOT CONTROL AN EXTERNAL LOAD. BECAUSE Dnc,r,nK 0T nK 0E r LARED ™ E C0 * P1 ^* WILL ASSIGN IT TO AN UNUSED POSITION ON THE OUTPUTDC CARD. THE FIRST ASSIGNMENT STATEMENT DOES NOT FIT ON A SINGLE CARD, SO A CONTINUATION CARD IS EMPLOYED. MASTER = LINEPOWER * (LIMIT. SW1 * /LIMIT. SW2 + /LIMIT. SW1 * LIMIT. SW2) LIGHT = MASTER £ MASTERSTOP PANEL = MASTER G (RUN ♦ START) POWER = MASTER £ /SAFETYVALVE WHISTLE = MASTER L (SAFETY + STOP ♦ /POWER) STRANSLATE 8o VIP CARD MAP TYPE ADDRESSES INPUT48 -> 17 INPUT6 20 -> 37 OUTPUTDC 40 -> 57 O'JTPUTAC 60 -> 77 VARIABLE MAP NAME ADDRESS TYPE LIMIT. SWl L INPUT48 LIMIT. SW2 2 INPUT48 HASTERSTOP 20 INPUT6 RUN 21 INPUT6 START 22 INPUT6 SAFETYVALVE 23 INPUT6 POWER 40 OUTPUTDC LIGHT 41 OUTPUTDC PANEL 42 OUTPUTOC WHISTLE 43 OUTPUTDC MASTER 60 OUTPUTAC LINEPOWER 61 OUTPUTAC SAFETY 62 OUTPUTAC STOP 63 OUTPUTAC VIP MACHINE CODE WORD* INSTR ADDR VARIABLE NAME 82 OOOl LOA 000 0002 AUX 776 0003 AUX 775 0004 AUX 774 0005 STG 000 0006 LDA 001 LIMIT. SW1 0007 ANDC 002 LIMIT. SW2 OOLO STO 044 TEMP0044 0011 LOAC 001 LIMIT. SW1 0012 AND 002 LIMIT. SW2 0013 OR 044 TEMP0044 0014 AND 061 LINEPOWER 0015 STO 060 MASTER 0016 LDA 060 MASTER 0017 AUX 776 0020 LDA 020 MASTERSTOP 0021 STO 041 LIGHT 0022 LDA 021 RUN 0023 OR 022 START 0024 STO 042 PANEL 0025 LDAC 023 SAFETYVALVE 0026 STO 040 PJWER 0027 LDA 062 SAFETY 0030 OR 063 STOP 0031 ORC 040 POWER 00 32 STO 043 WHISTLE TRAN2 COMPILER, VPesilN 1.00 E: 06/03/7* TIME: 0). v> . 46 . 460 TIONS> SOURCE N^SORT N^PR I NTS^RT C DDE N.1S0RTFAIL MAP NITTY f> 3 SC c ^ TCH-»A' . STURC: STATEMENT C PROGRAMMING EXAMPLE 7 ENABLE REGISTER OPTIMIZATION PKTGRAMMER: ALFRED C. WEAVER THE COMPILER WILL ASSIGN ALL VA&URLt ADDRESSES DECLARE THE 24-V p LT INPUTS INPUT24. X Y Z DECLARE THE OUTPUT VARIABLE "HJTPUTAC. A C1NTP0L PROGRAM SEGMENT PROGRAM. THE VARIABLF 'NOTB* HAS MOT BEEN DECLARED. IT TO AN UNUSED POSITION ON THE OUT^JTAC CARD. ILL *fc ASSIGI IN THE EQUATIONS BEL3W, OPLY 1NE OF EQUATIONS (2) ANL (31 CAN EXECUTE ITS STO INSTRUCTION IN ANY 3NE MEMORY SCAN. HENCE, 'A' CONDITIONALLY ASSUMES ONE 3F TWO POSSIBLE DEFINITIONS DEPENDING UPON THE CURRENT VALUE OF THE INPUT »B«- NOTfi = / B A=B: X * /Y * Z A = NOTB : X * /Y ♦ Z ^TRANSLATE Qk VIP CARD MAP TYPE ACDRESSES INPUT24 -> 17 OUTPUTAC 20 -> 37 VARIABLE MAP NAME ADDRESS TYPE X Y Z A NDTB B 1 2 3 20 21 22 INPUT24 INPUT24 INPUT24 OUTPUTAC OUT PUT AC OUTPUTAC 85 VIP MACHINE CODE WORD* INSTR ADDR VARIABLE NAME 86 OOOl LDA 000 0002 AUX 7 76 0003 AUX 775 0004 AUX 7 74 0005 STO 000 0006 LDAC 022 3 0007 STO 021 NOTR 0010 LDA 022 B 0011 AUX 775 0012 LDAC 002 Y 0013 AND 03 I 0014 OR 001 X 0015 STO 020 A 0016 LDA 021 NOTB 0017 AUX 775 0020 LDA 001 X 0021 ANDC 002 Y 0022 OP 003 I 0023 STO 020 A VIPTRAN2 COMPILER, VERSION I. GO 9ATE: 06/03/74 TIME: 09. 59 . 50 . 840 SOURCE NHS^T NOPklNTSORT CODE N0S1RTFAIL MAP rnTTY CPATCHPAt) .1 CARD* S 1 2 3 5 6 7 8 9 10 LI 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 TMT# 1 1 1 I 2 3 4 5 6 7 8 9 SOURCE STATEMENT C PROGRAMMING EXAMPLE 8 ENABLE REGISTER ?PTIMI 7AT I TN - CONDITIONAL eXECUTl ' PROGRAMMER: ALFRED C. WEAVER THE COMPILER WILL ASSIGN ALL VA«IARLE ADDRESSFS PFCLAK E Tt-E INPUT S INPUT12. START-SWITCH LI M IT.S«l LI M IT.SW2 INPUT120. LINEPOWER PANEL INPUT24. RESET MANUAL "EMOTt LOCAL TtST DECLARE THF OUTPUTS OUTPUTOC. START-UP ^UN CONTROL PPCGRAM SEGMENT PROGRAM. •START-UP' AND 'PUN' ARE THE Y REGISTER CCNTPOL VARIABLES START-UP = START-SWITCH * LINEPOWER * /RESET RUN = /START-UP A = START-UP : LIMIT. S 41 * LIMIT. SW2 B = START-UP : PANEL + MANUAL C = START-UP : REMOTE ♦ LOCAL A = RUN : LIMIT. SW1 ♦ LIMIT. SW2 B = RUN : PANEL * MANUAL C = RUN : REMOTE ♦ TEST STRANSLATE 88 VIP CARD MAP TYPE INPUT12 INPUT 120 INPUT2* GUTPUTDC ADDRESSES -> 17 20 -> 37 40 -> 57 60 -> 77 VARIABLE MAP NAME ADDRESS TYPE START-SWITCH 1 INPUU2 .IMIT.SWL 2 INPUT12 .IMIT.SW2 3 INPUT12 LINEPOWER 20 INPUT120 >ANEl 21 INPUT120 *ESET 40 INPUT24 1ANUAL 41 INPUT24 DEMOTE 42 INPUT24 .OCAL 43 INPUT24 rEST 44 INPUT24 START-UP 60 OUTPUTDC *UN 61 OUTPUTDC * 62 OUTPUTDC J 63 OUTPUTDC : 64 OUTPUTDC 90 VIP MACHINE CODE WORD* INSTR ADDP VARIABLE NAME 0001 LDA 000 0002 AUX 7 76 0003 AUX 775 0004 AUX 774 0005 STO 000 0006 LDA 001 START-SWITCH 0007 AND 020 LINEPOWER 0010 AN DC 040 RESET 0011 STQ 060 START-UP 0012 LDAC 060 START-UP 0013 STO 061 CUN 0014 LDA 060 START-UP 0015 AUX 7 75 0016 LDA 002 LIMIT. SWi 0017 AND 003 LIMIT. SW2 0020 STO 062 A 0021 LDA 021 PANEL 0022 OR 041 MANUAL 0023 STO 063 B 0024 LDA 042 REMOTE 0025 OR 04 3 LOCAL 0026 STO 064 C 0027 LDA 061 RUN 0030 AUX 775 0031 LDA 002 LI^ IT. SWI 0032 OR 003 LIMIT. SW2 0033 STO 062 A 0034 LDA 021 PANEL 0035 AND 041 MANUAL 0036 STO 063 B 0037 LDA 042 REMOTE 0040 OP 044 TEST 0041 STO 064 C rfIPTRAN2 COMPILFR, VEHSMN I. 00 )ATE: 06/03/74 TIME: 09.59.55.010 COPTIONS> SOURCE NHSORT NOP(< I NTSTPT COTE NPSORTFAIL "AP THY NOSCR A T.HPAO SKJI :ard# STMT* 1 2 3 4 5 6 7 8 9 10 LI 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 SIURCE STATEMENT C PROGRAMING EXAMPLE 9 MASTER AMD ENABLE FEGISTF& OPTIMIZATION IN C^H I f\' A T I I PROGRAMMER: ALFPFC C. WEAVER THIS EXAMPLE ILLUSTRATES THE COMPLICATED LOADING .^ r !D UNLOADING OF TH C MASTER AND ENABLE REGISTERS WHICH IS AUTOMAT I C i LLY HANDLED Q V COMPILER. THE COMPILER WILL ASSIGN ALL VARIABLE ADDRESSES DECLARE THE OUTPUTS DUTPUTAC. A R C DECLARE THE INPUTS INPUT120. LINEPCWER STOP MANUAL SAFLTY ABORT OFF START-UP LIMIT. SW1 LIMIT. Sw2 PANEL REMOTE LOCAL PUN TEST CONTROL PROGRAM SEGMENT PROGRAM. MASTER1 = LINEPCWER * /STOP ♦• MANUAL MASTER2 = SAFETY + ABORT + OFF A = MASTER1 £ START-UP : LIMIT. SW1 * LIMIT. Sw2 B = MASTER1 €, START-UP : PANEL «■ MANUAL C = MASTER2 £ START-UP : REMOTE ♦ LOCAL A = MASTER1 £ RUN : LIMIT. SW 1 *■ LIMIT. SW2 3 = MASTER1 £ PUN : PANEL * MANUAL C = MASTER2 & PUN : REMOTE + TEST $TRANSLATE 92 VIP CARD MAP TYPE ADDRESSES INPUT 120 -> 17 OUTPUTAC 20 -> 37 VARIABLE MAP NAME ADDRESS TYPE INEPOWER 1 INPUT120 TOP 2 INPUT120 ANUAL 3 INPUT120 AFETY SOURCE SORT PrtlNTSORT CODE NDSORTFAIL MAP NOTTY N )SCh £ Tl HP A i: SKII CARD* STMT* SOURCE STATEMENT 1 C 2 C PROGRAMMING EXAMPLE 10 3 OCA PROGRAM TO ILLUSTRATE A SUCCESFUL SORT ^F INTEKDEPENI ' r 4 C ASSIGNMENT STATEMENTS. THE 'SORT' AND • PR INTSOF T • 5 C OPTIONS ARE ON. 6 C 7 C PROGRAMMER: ALFPEC C. WEAVER 8 C 9 C DECLARE THE INPUTS 10 C 11 INPUT24. SWITCH1 SWITCH2 12 C 13 C DECLARE THE OUTPUTS 14 C 15 OUTPUTDC. A B C D E F 16 HORN PELL 17 C 18 PROGRAM. 19 1 C 20 1 C THE FOLLOWING SIX EQUATIONS ARE NOT IN OPTIMAL CRDfcP 21 1 C 22 1 A = 17 OUTPUTDC 20 -> 37 VARIABLE MAP NAME ADDRESS TYPE jWITCHl 1 INPUT24 JWITCH2 2 INPUT24 \ 20 OUTPUTDC 1 21 OUTPUTDC - 22 OUTPUTOC ) 23 OUTPUTDC ■ 24 OUTPUTOC - 25 OUTPUTDC HORN 26 OUTPUTDC 3ELL 27 OUTPUTDC »7 98 SOURCE EQUATIONS IN SORTED ORDER STMT* SOURCE STATEMENT 1 E = /E 2 F = SWITCH1 ♦ SWITCH2 3 * = E+F 4 C = B*C 5 D = / SOURCE SORT PRINTSCRT NDCODE NOSORTFAIL MAP NITTY NO SC« ATCHPAf, SKI^U CARD* STMT* I 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 23 29 SOURCE STATEMENT C PROGRAMMING EXAMPLE 11 A PROGRAM TO ILLUSTRATE AN UNSUCCES-RIL SORT THE 'SORT' AND •PRINTSORT' OPTIONS AP PROGRAMMER: ALFPEC C. WEAVER DECLARE THE INPUTS INPUT48. SWITCH1 SWITCH2 DECLARE THE OUTPUTS ON, OUTPUTAC. D PROGRAM. THIS 8L0CK OF EQUATIONS CAN M n T BE SATISFACTORILY REORDERED DUE TO INTERLOCKING A = (B * C ) ♦ E B = (A * C) ♦ E C = (A * B) ♦ E D = E + F E = /E F = SWITCHI ♦ SWITCH2 STRANSLATE VIP CARD MAP TYPE ADDRESSES INPUT*8 -> 17 OUTPUTAC 20 -> 37 10] VARIABLE MAP NAME ADDRESS TYPE 102 SWITCH1 1 INPUT4 8 SWITCH2 2 INPUT48 A 20 OUTPUTAC B 2i OUTPUTAC C 21 OUTPUTAC 23 OUTPUTAC E 24 OUTPUTAC F 25 OUTPUTAC ♦ERROR NUMBER 37* ♦DURING ADDRESS ASSIGNMENT* ♦ERROR NUMBER 37* ♦DURING ADDRESS ASSIGNMENT* SORT ROUTINE HAS REMOVED STMT « SORT ROUTINE HAS REMOVED STMT « SOURCE EQUATIONS IN SOPTEC ORDER STMT* SOURCE STATEMENT 1 E = /E 2 A = (B * C) ♦ E 3 C = ( A * B) ♦ E SOURCE NOSDRT NOPRINTSOPT CODE NOSDRTFAIL HAP MOTTY SCRATCHPAD S^IPO CARD* STMT* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 2b 27 28 29 30 31 32 33 SOURCE STATEMENT C PROGRAMMING EXAMPLE 12 A PROGRAM TO ILLUSTRATE AUTOMATIC SCRATCHPAD ADDRESSING THE 'SCRATCHPAD' CPTIDN IS ON PROGRA M MER : ALFRED C. WEAVER DECLARE THE OUTPUTS J T PUTAC. CR3 CR6 DECLARE THE SCRATCH VARIABLES SCF ATCH. CkI CR2 CR4 CP5 D'CLARE THE INPUTS INPUT120. PROGRAM. SWITCH1 L I GHT 1 BUTTCN1 SAFETY1 SWI TCH2 LIGHT2 *UTT3N2 SAFETY2 BUTT0N3 SAFETY3 CR1 = SWITCH1 + S^ITCH2 CP2 = LIGMT1 ♦ LIGHT2 CR3 = CR 1 * /CR2 + /CF 1 * CR2 CR4 = RUTT0N1 * BUTT1N2 * 8UTT0N3 CR5 = SAFETY1 + SAFETY2 ♦ SAFETY3 CFo = C-<4 * /C»5 + /CR4 * CR5 C ^TRANSLATE VIP CARD MAP TYPE ADDRESSES INPUT120 -> 17 OUTPUTAC 20 -> 37 SCRATCHPAD 1000 -> 1777 105 VARIABLE MAP NAME ADDRESS TYPE SWITCH1 I INPUT120 SWITCH2 2 INPUT120 LIGHT 1 3 INPUT120 LIGHT 2 4 INPUT120 BUTTON! 5 INPUT120 BUTT0N2 6 INPUT120 BUTT0N3 7 INPUT120 SAFETY1 10 INPUT120 SAFETY2 IL INPUT120 SAFETY3 12 INPUT120 CR3 20 GUTPUTAC CR6 21 OUTPUTAC CR1 1001 SCRATCH CR2 1002 SCRATCH CR4 1003 SCRATCH CR5 1004 SCRATCH 106 VIP MACHINE CODE W3RD# INSTR APDR VARIABLE NAME 107 0001 LDA 000 0002 AUX 776 0003 AUX 775 0004 AUX 7 74 0005 STO 000 0006 LDA 001 SWITCH I 0007 OR 002 SWITCH2 0010 AUX 7 74 OOil STO 001 CR1 0012 LDA 003 LIGHT1 0013 OR 004 LIGHT2 0014 AUX 773 0015 STO 002 CR2 0016 LDA 001 CRl 0017 ANDC 002 CR2 0020 STO 005 TEMP1005 0021 LDAC 001 CRl 0022 AND 002 CP2 0023 OR 005 TEMP1005 0024 AUX 772 0025 STO 020 CR3 0026 LDA 005 BUTT0N1 0027 AND 006 BUTT0N2 0030 AND 007 BUTT0N3 0031 AUX 774 0032 STO 003 CR4 0033 LDA 010 SAFETY1 0034 OR Oil SAFETY2 0035 OR 012 SAFETY3 0036 AUX 773 0037 STO 004 CR5 0040 LDA 003 CP4 0041 ANDC 04 CR5 0042 STO 005 TEMP1005 0043 LDAC 003 CR4 0044 AND 004 CR5 0045 OR 005 TEMP1005 0046 AUX 772 0047 STO 021 CR6 VIPTRAN2 COMPILER, VERSION 1.00 DATE: 06/03/74 TIME: 10. 00. 19. 070 108 SOURCE NGS3«T NOPRINTSORT CODE N1S0RTFAIL MAP NOTTY NOSCP ATCHP AD SKIP3 CARD* STMT* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 lb 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 SOURCE STATEMENT C PROGRAMMING EXAMPLE 13 A FULL SCAIE EXAMPLE FOP A PEAL SITUATIJN PROGRAMMER: ALFPEC C. WEAVER THE •SKIPS' DPTILN IS IN USE CONTROL PROGRAMMING FTP BAKER PLASTICS C IP P~F- A T I J,\ DECLARE THE INPUTS INPUT24. SSI PL "bl3 SS6 PP.1 LS3 L.S 1 1 SSBA LS6 PRlri L34 LS 7 LSS L 5 ^ LSIO INPUT12. LS5 : DECLARE T HE OUTPUTS AND THEI^ ADDRESSES OUTPUTOC. R22 755 R12 756 R 15 757 c 1 3 760 Pll 7c 1 R18 762 RIO 7o3 59 7o4 P8 7ob = 7 766 R 14 /67 =5 77 ^ 771 Fj 7 72 R 2b R2 774 ^16 775 Kl 776 -21 777 DECLA-E LATCHING RELAYS LATCH. TUN T2IN 63 TK4INPUT ■f, 7INDIJ" TS 10P-PU" r.FCLAF 17 TIMER 20 -> 37 OUTPUTDC 40 -> 57 118 VARIABLE MAP ADDRESS TYPE I INPUT12 2 INPUT12 3 INPUT12 4 INPUT12 20 CNOELAY 21 CNDELAY 22 ONDELAY 23 OFFDELAY 24 3FFDELAY 25 OFFDtLAY 40 GUTPUTDC 41 OUT PUT DC 42 OUTPUTDC 43 OUTPUTDC 44 OUTPUTDC 45 OUTPUTDC VIP MACHINE CODE WORD* INSTR ADDR 120 VARIARLE NAME 0001 IDA 000 0002 AUX 776 0003 AUX 775 0004 AUX 774 0005 STO 000 0006 LDA 020 TIM1-TC 0007 STO 040 XI 0010 LDAC 020 TIMl-TO 0011 STO 041 X2 0012 LDA 023 TIM4-TC 0013 STO 042 X3 0014 LDAC 023 TIM4-T0 0015 STO 043 X4 0016 LDA 022 TIM3-TC 0017 ANDC 025 TIM6-TC 0020 STO 044 X5 0021 LDAC 022 TIM3-T0 0022 OP 025 TIM6-TC 0023 STO 045 X6 0024 LDA C01 A 0025 OR 002 B 0026 OP 003 C 0027 STO 021 TIM2 0030 LDA 004 D 0031 AND 002 B 0032 OR 001 A 0033 STO 046 TEMP0046 0034 LDAC 046 TEMP0046 0035 STO 021 TIM2 0036 LDA 002 B 0037 OR 003 C 0040 AND 001 A 0041 STO 046 TEMP0046 0042 LDAC 046 TEMP0046 0043 STO 024 TIM5 0044 LDA 001 A 0045 OP 003 C 0046 OR 04 D 0047 STO 046 TEMP0046 0050 LDAC 046 TEMP0046 0051 STO 047 TEMP0047 0052 LDAC 047 TEMP0047 0053 STO 024 TIM5 121 HPTRAN2 COMPILER, VERSION 1.00 )ATE: 06/03/74 TIME: 10.00.30.090 :HPTIONS> SOURCE NOSJRT NOPPINTSOPT CODE N0S1RTFAIL MAP NITTY NOSCRATCHPAD S"1PJ ;ard« stmt* SOURCE statement 1 c 2 C PROGRAMMING EXAMPLE 15 3 OCA PROGRAM TO ILLUSTRATE ERROR REC1VEFY 4 C 5 C PROGRAMMER: ALFRED C. WFAVFR 6 C 7 C 'VIPTPAN' RECOVERS RATHEP NIC=LY FkOM A NU'-IBEP OF SYNTACTIC 8 C AND SEMANTIC PROGRAMMING ERRORS. THIS EXAMPLE WILL ILLUS T RATI 9 C THE RANGE OF ERRORS DETECTED AND REPAIRED BY THE COMPILER. 10 c HOC 12 C 13 C MISSING DECLARATICN KEYWORD BEFORE VARIABLES 14 C 15 VARIABLEl VARIABLE2 'ERROR NUMBER 1* ■ON CARD # 15* UNRECOGNIZABLE VIPTFAN2 SECTION NAME: VARIABLEl 'ERROR NUMBER 1* 'ON CARD # 15* UNRECOGNIZABLE VIPTRAN2 SECTION NAME: VARIABL62 16 C 17 C ILLEGAL NAMES DUE TO MISSING VARIABLES IN ADDRFSS LIST 18 C 19 INPUT6. A 70 B71 CDES "ERROR NUMBER 15* • ON CARD # 19* THIS ILLEGAL CHARACTER SKIPPED: % 20 ONDELAY. T 1 40 > T5 •ERROR NUMBER 15* •ON CARD « 20* THIS ILLEGAL CHARACTER SKIPPED: > 21 C 22 C ACDRESSING 23 C 24 OUTPUTAC. Rl 600 R2 600 R3 1006 R4 R5 250 • ERROR NUMBER 5* •ON CARD # 24* THIS ADDRESS USED MORE THAN ONCE: 600 ►ERROR NUMBER 9* •ON CARD # 24* OCTAL ADDRESS > 777 FOR VARIABLE: R3 ►ERROR NUMBER 8* •ON CARD # 24* OCTAL ADDRESS = FOR VARIABLE: R4 25 C 26 SCRATCH. SI 1020 S2 666 S3 2010 S4 1000 S5 1021 •ERROR NUMBER 6* 'ON CARD # 26* OCTAL ADDRESS < 1001 FOR SCRATCHPAD VARIABLE: S2 ■ERROR NUMBER 7* 'ON CARD • 26* OCTAL ADDRESS > 1777 FOP SCRATCHPAD VARIABLE: S3 'ERROR NUMBER 6* ■ON CARD # 26* OCTAL ADDRESS < 1001 FOR SCRATCHPAD VARIABLE: S4 27 C 28 LATCH. LI 107 L2 108 ERROR NUMBER 12* ON CARD * 28* THIS ADDRESS IS NOT OCTAL: 108 29 C 30 C MISMATCHED VARIABLE TYPES ON A SINGLE VIP CARD 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 AFE FLAGGEC LATER t WHEN VIP CARDS ARE ALLOCATED INPUT12. INP12 100 INPUT24. INP24 101 C VIPTRAN ACCEPTS REPEATED, BUT UNAMBIGUOUS, ADDRESSES C ONDEl.AY. T2 T3 41 ONDELAY. T2 T3 41 C C C PROGRAM. C C VARIOUS SYNTAX EPRORS ARE P^SSIRLE WITH c XPRE SSI DM S : C C MISSING ASSIGNMENT OPERATOR C W X * Y * I *ERROR NUMBER 10* ♦IN STMT « 1* MISSING •• = '• INSERTED REFDRE: X 49 2 C 50 2 C ILLEGAL VARIABLE NAMES 51 2 C 52 2 6A = B + C ♦ERROR NUMRER 11* ♦IN STMT # 2* STATEMENT DOES NOT BEGIN WITH VARIABLE NAME 53 4 irf = X+Y + Z9 ♦ERROR NUMBER 12 ♦ ♦IN STMT « 4+ THIS ADDRESS IS NOT OCTAL: 9 54 5 C 55 5 C ILLEGAL CHARACTERS 56 5 C 57 5 A = F? ♦ERROR NUMBER 15+ ♦IN STMT # 5* THIS ILLEGAL CHARACTER SKIPPED: ? 58 6 C 59 6 C ILLEGAL NAMES 60 6 C 6i 6 B = NAME-IS-LCNGEP-THAN-12-CHARACTERS ♦ERROR NUMBER 16^ ♦IN STMT 4 6* NAME TOO LONG - FIRST 12 CHARACTERS USED FDR: NA*L- I S-LONGER-THAN- 12-CHAC ' 62 7 C 63 7 C MISUSE OF COLUMN 1 64 7 C 65 7 X = Y*Z ♦ERROR NUMBER 14+ ♦IN STMT n 7* ILLEGAL USE OF COLUMN 1 - CARD SKIPPED 66 7 C 67 7 C UNPALANCED PARENTHESES 68 7 C 69 7 A=B+ 17 20 -> 37 40 -> 57 60 -> 77 100 -> 117 240 -> 257 600 -> 617 12k VARIABLE MAP NAME ADDRESS TYPE 125 'ARIARLEl ARIABLE2 2 3 AME-IS-LONG 1 INPUT6 2 INPUT6 3 INPUT6 20 OUTPUTAC 21 OUTPUTAC 12. DUTPUTAC Zi OUTPUTAC 24 OUTPUTAC 25 OUTPUTAC 26 OUTPUTAC 27 OUTPUTAC 30 OUTPUTAC 31 OUTPUTAC 32 OUTPUTAC 33 OUTPUTAC 34 OUTPUTAC 35 OUTPUTAC 36 OUToijTAC 37 OUTPUTAC 40 GNDELAY 41 ONDELAY 42 ONDELAY 43 ONDELAY 70 INPUT6 71 INPUT6 100 INPUT12 101 INPUT24 102 LATCH 107 LATCH 250 OUTPUTAC 600 OUTPUTAC 1001 SCRATCH 1002 SCRATCH 1003 SCRATCH 1020 SCRATCH 1021 SCRATCH "RROR NUMBER 17* TURING ADDRESS ASSIGNMENT* >JPi2 IP24 I! ■ t. c I < S SERIOUS ERROR (S) PREVENT FURTHER PROCESSING 126 APPENDIX B VIPTRAN2 Language Syntax, Modified Backus -Naur Form To avoid ambiguity between parentheses as operators and as BNF metasymbols, parentheses used as operators will be underlined. Character strings are enclosed in single quotes. 127 <$VIP card> Assignment statement> * <$VIP card> '$VTP' (|)* 'SOURCE* | 'NOSORT' | 'NOPRINTSORT' | 'CODE' | 'NOSORTFAIL' | 'MAP' | * TTY T | ' NOSCRATCHPAD ' 'SKIPO' 'NOSOURCE' | 'SORT' | 'PRINTSORT' | 'NOCODE' | 'SORTFAIL' | 'NOMAP' | 'NOTTY' | 'SCRATCHPAD' •SKIP' { ( []}} 'INPUT6. « | 'INPUT12. ' | 'INPUT2^. ' | 'INPUTS. » 'INPUT120. ' | 'OUTPUTAC. * | 'OUTPUTDC. ' | 'LATCH. 'I' SCRATCH. » 'PROGRAM.' Assignment statement>* <$TRANSLATE card> <$END card> = {+ } l* } | _[2 [/] -Cvariable name> {< alphanumeric} 11 'A' | 'B' | 'C | 'D' | 'E' | 'F' | 'G' | 'H' | 'I* | 'J' 'K' | 'L' | 'M' | 'N' | '0' | 'P' | 'Q' | 'R' | 'S' | 'T' 'U' I 'V I 'W I 'X' I 'Y' I 'Z' j ' " ' I ' . ' I ' -' 128 <$TRANSIATE card> <$END card> | | '8' | '9' {} '^TRANSLATE' in card columns 1-10 '$END f in card columns 1-^ 129 APPENDIX C VIPTRAN2 Error Messages This appendix lists all of theVIPTRAN2 error messages produced, by the compiler. Each entry shows (1) the English text of the message; (2) the physical location of the error message on the source listing ("where"); (3) an explanation of the circumstances surrounding, causing, or affecting the error ("why"); (k) one or more examples of an instance of this particular error with an explanation of what is wrong ( " example " ) ; (5) the possible steps the user should take to fix the error ("solution"). Errors not found in this appendix do not arise from the compiler; consult a systems programmer. 130 ERROR NUMBER 1 UNRECOGNIZABLE VIPTRAN2 SECTION NAME: ■where: Declaration segment, after $VIP card and before a recognizable declaration keyword such as INPUT6., INPUT12., INPUTS. , INPUTS., INPUT120., OUTPUTAC, OUTPUTDC., LATCH., TIMER,, SCRATCH., or PROGRAM. is the unrecognized name. why: A character string which qualifies as a variable name appears before the first declaration keyword. example : $VIP ABC INPUTo. D E F Variables A, B, and C are in error because they are not preceded by a type declaration keyword. example : $VIP INPUT100. A INPUT120. B Variables INPUT100. and A are not preceded by a type declaration keyword. INPUT100. is a legal variable name but is not a type declaration keyword. solution: Prefix all variables in a block with a legal type declaration keyword. 131 ERROR NUMBER 3 ILLEGAL VIPTRAN2 VARIABLE NAME: -where: Declaration segment. why: The compiler did not find a legal variable name where one was expected. is the illegal quantity. example: OUTPUTAC. A 20 21 C 23 A variable is missing between 20 and 21. solution: Check sequence of variables and addresses. 132 ERROR NUMBER 5 THIS ADDRESS USED MORE THAN ONCE:
■where: Declaration segment. why: A single address has been assigned to two different variable names. example: INPUT12. A 1 B 2 C 3 OUTPUTAC. X 2 Y 21 Z 22 Address 2 is used for both B and X. solution: (l) If the associated variable is of type OUTPUTAC, OUTPUTDC, or SCRATCH, and does not control a physical device, omit the declaration and let the compiler assign an unused address. (2) Reassign one of the variables to an unused address. 133 ERROR NUMB OCTAL ADDRESS < 1001 FOR SCRATCHPAD VARIABLE: where: Declaration segment, in a SCRATCH, declaration block. why: Scratchpad variables must have addresses in the range lOOlo <
< 1777q. example: SCRATCH. X 600 Y 601 Addresses 600 and 601 are out of range for scratchpad variables X and Y. example: SCRATCH. Ql 1000 Q2 1001 Address IOOOq is reserved and can not be assigned by the user. example: SCRATCH. X 1010 OUTFUTCA. Y 3 Keyword "OUTPUTAC." is mis-spelled, making "OUTFUTCA." a legal scratchpad variable with no address assigned; now Y, an output variable, is within the SCRATCH declaration block and 3 is an illegal address. solution: (l) Keep scratchpad addresses in range. (2) Check spelling of declaration keywords, 13^ ERROR NUMBER 7 OCTAL ADDRESS < 1777 FOR SCRATCHPAD VARIABLE: where: Declaration segment, in a SCRATCH, declaration block. why:
is out of range of machine. example: SCRATCH. S 2000 2000q > 1777o> "the largest machine address. solution: (l) Omit address and allow compiler to assign an unused scratchpad address; (2) Use addresses in the range 1001 o <
< 1777 . o ~ — o 135 ERROR NUMBER 8 OCTAL ADDRESS = FOR VARIABLE: where: Declaration segment. why: has been assigned an address of 0; is reserved and can not he assigned by the user. example: INPUT6. A B 1 C 2 solution: Change to an unused address. 136 ERROR NUMBER 9 OCTAL ADDRESS < 777 FOR VARIABLE: where: Declaration segment. why: The address assigned to is out of range of the machine for a non-scratchpad variable. example: OUTRJTDC. X 776 Y 1777 Y is not type SCRATCH, so 1777 is out of range. example: OUTPUTDC. Z 777 SCRATHC. A 1001 B 1002 Keyword "SCRATCH." is mis-spelled, making "SCRATHC." a legal OUTPUTDC variable with no address assigned. Variables A and B, which are in scratchpad, have joined the OUTPUTDC. declaration, making addresses 1001 and 1002 out of range. solution: (l) Keep addresses in range. (2) Check spelling of SCRATCH, keyword. ERROR NUMBER 10 MISSING "=" INSERTED BEFORE: where: Program segment. why: Assignment statements are of the form = The "=" was not found. example: A B*C+D Missing = between A and B. solution: insert = between and 138 ERROR NUMBER 11 STATEMENT DOES NOT BEGIN WITH VARIABLE NAME where: Program segment. why: Column 1 was blank, indicating the beginning of an assignment statement, but the first item on the card was not a variable name. example: 6A = B + C "6A" is an illegal variable name. example: A = B*C*D+E*F Second card is a continuation but column 1 is blank. solution: (l) Assure that variable names are legal. (2) Check column 1 for continuation character ">" if this is a continuation card. ERROR NUMBER 12 THIS ADDRESS IS NOT OCTAL:
where: Declaration segment. why: Programmer-supplied address is not an octal number. example: LATCH. X 76 Y 77 Z 78
= 78 is not octal. solution: Use octal addresses only. 2.1*0 ERROR NUMBER 13 END OF SOURCE PROGRAM - "^TRANSLATE" INSERTED ■where: Program segment. why: The card after the last assignment statement was not a ^TRANSLATE card, with those 10 characters in columns 1-10. The program segment format is : PROGRAM. {all assignment statements} $TRANSLATE $END example : PROGRAM. {all assignment statements} A = B*C+D last card solution: Place $TRANSLATE and $END cards after the last assignment statement. ERROR NUMBER lU ILLEGAL USE OF COLUMN 1 - CARD SKIPPED ■where : Anywhere why: A non-recognized code was used in column 1. The only legal codes are: C comment > continuation $ $TRANSLATE, $END cards in PROGRAM segment blank begins new assignment statement example: PROGRAM. A = B* < (C+D) Column 1 should have been the continuation character ">", solution: Verify that column 1 contains one of the k- legal codes. Note that the entire source card is skipped (just like a comment) when this error occurs. ERROR NUMBER 15 THIS ILLEGAL CHARACTER SKIPPED: lU2 ■where : Anywhere why: An individual character has been found which is not a VTPTRAN variable name, operator, or delimiter. example: OUTPUTDC. A B C$D The "$" is illegal as an alphabetic character. The compiler will give the error and use OUTPUTDC variables A, B, C, and D. example: POWER = GATE*POWER- SUPPLY + MANUAL? The "?" is an illegal alphabetic character. solution: (l) Verify correct spelling of variable names, (2) Remove offending character. ERROR NUMBER 16 NAME TOO LONG - FIRST 12 CHARACTERS USED FOR: where: Anywhere why: Variable names contain 12 or fewer characters. A character string longer than 12 characters has been used as a variable name or timer function. example: OUTPUTDC. MASTERPOWEROUT 100 The name "MASTERPOWEROUT" is too long, example: OFFDELAY. INTERVALTIMER 1+0 The name "INTERVALTIMER" is too long. example: LATCH. INPUT210UTPUT22LIGHT23 No delimiters (spaces) are found between variables and addresses, The entire string becomes one variable "INPUT210UTPU". solution: (l) Rename offending variable. (2) Check length of timer function names. (3) Use spaces freely between variables and addresses. lkk ERROR NUMBER 17 SERIOUS ERROR(S) PREVENT FURTHER PROCESSING where: After $TRANSLATE card. why: An error or errors of such severity that continued compilation is meaningless have occurred. The compiler halts. example: Syntax errors in the PROGRAM segment make code generation meaningless. solution: Correction of all other errors will clear this one also. ERROR NUMBER 18 SORT ROUTINE HAS FAILED where : After ^TRANSLATE card. why: The sort routine, as invoked by the SORT compiler option, has failed to reorder the equations in a way which makes them independent. example : PROGRAM. 1 A = B*C 2 B - A*C 3 $TRANSLATE ***DURING SORTING *** SORT ROUTINE HAS REMOVED STMT #2 ***DURING SORTING *** SORT ROUTINE HAS FAILED Equations 1 and 2 are interlocked because the evaluation of A requires knowledge of B, yet evaluation of B requires knowledge of A. The programmer must decide if this situation is dangerous. solution: (1) Correct equations to remove interdependencies, if possible. (2) If situation is not dangerous, run again using NOSORT option. ike ERROR NUMBER 19 TERMINAL ERROR ENCOUTJTERED DURING CODE GENERATION where: After $TRANSLATE card. why: A serious error during code generation makes further processing impossible. example: A program has only one unused position on an OUTPUT card, and the NOSCRATCHPAD option is in effect. The compiler attempts to translate A = B*C + D*E + F*G which requires two temporary variables. When the second one is needed and no machine address is available, the error occurs. solution: This error occurs in conjunction with another more specific error preceding this one. Clearing the specific error (s) clears this one also. 1'iY ERROR NUMBER 20 COMPILER ERROR - SYMBOL TABLE OVERFLOW where : Anywhere why: For any one program, the compiler can only recognize a fixed total number of programmer-defined and compiler-defined variables. The current limit is 1000. example: The sum of unique variable names, timer functions, and reserved words (currently 2k) in one program exceeds 1000. solution: (l) Assure that the PROGRAM segments of two or more programs have not been intermixed. (2) Call a systems programmer. 11+8 ERROR NUMBER 21 COMPILER ERROR - POSTFIX STACK OVERFLOW where: Program segment. why: For any one program, the compiler can only store a fixed number of symbols which constitute an internal version of the source. The current limit is 5000. example: For programs with a large number of statements and/ or with many lengthy assignment statements, the internal representation may exceed 5000 symbols. solution: (l) Assure that the PROGRAM segments of two or more programs have not been intermixed. (2) Call a systems programmer. ERROR NUMBER 22 EXTRA ")" DELETED I'l I where : Program segment, why: An assignment statement contains an unbalanced number of left and right parentheses (the number of each must be equal). Either too few left parentheses or too many right parentheses were included. example: A = B + (C*((D+E)*F))) There are 3 left parentheses and k right parentheses. solution: (l) Count number of left and right parentheses; assure proper balance. (2) Be sure the source statement is entirely within columns 2-72 (columns 73-80 are not examined). 150 ERROR NUMBER 23 COMPILER ERROR - PARSER STACK OVERFLOW where: Program segment. why: . An assignment statement is so deeply nested that the parser stack overflows. example: A = (B+(C+(D+(E+(F+(G+(H+(l)))))))) Although the statement is syntactically correct, the equation is nested 8 levels deep and the parser stack overflows during evaluation. solution: (l) Determine whether the equation can be re-written to use fewer levels of nesting. (2) Call a systems programmer. IM ERROR NUMBER 2k MISSING OPERAND - "DUMMY" INSERTED BEFORE: where: Program segment. why: In an expression, two operators were detected with no variable between them. example: A = B*+D Missing operand between * and +. example: A = /B*/ 4 ^ Missing operand between / and +. solution: (l) Supply missing operand. (2) Insure that only columns 2-72 were used for the source text. A variable in columns 73-80 would be lost. (3) If the equation is continued, assure that the following card contains the continuation character ">" in column 1. Comments may not separate a source card and its continuation card. 152 ERROR NUMBER 25 MISSING ")" SUPPLIED AT END OF STATEMENT ■where: Program segment. why: An assignment statement contains an unbalanced number of left and right parentheses (the number of each must be equal). Either too many left parentheses or too few right parentheses were included. example: A = ((B-t€)*(D+E) There are 3 left parentheses and 2 right parentheses. solution: (l) Count number of left and right parentheses; assure proper balance. (2) Be sure the source statement is entirely within columns 2-72 (columns 73-80 are not examined). ERROR NUMBER 26 MISSING OPERATOR - "*" SUPPLIED where : Program segment. why: In an expression, two operands were detected with no operator between them. example: A = B+C D Missing operator between C and D. solution: (l) Supply missing operator. (2) Insure that only columns 2-72 were used for the source text. An operator in columns 73-80 would be lost. (3) If the equation is continued, assure that the following card contains the continuation character ">" in column 1. Comments may not separate a source card and its continuation card. 154 ERROR NUMBER 27 INVALID TIMER FUNCTION - THIS VARIABLE IS NOT A TIMER: where: Program segment. why: The variable name was not declared to be of type TIMER. example: LNHJT12. INI HJ2 OUTPUTDC. 0UT1 0UT2 PROGRAM. 0UT1 = INI * IN2 * Tl-TC 0UT2 = INI * IN2 + T1-T0 Variable Tl has not been declared to be a TIMER variable, solution: Declare to be a timer using the format TIMER. ( ) 155 ERROR NUMBER 28 INVALID TIMER FUNCTION - THIS IS NOT A PROPER FUNCTION: where: Program segment. why: The suffix of a timer variable is not one of the six legal functions. example : OFFDELAY . TIMER1 PROGRAM. A = TIMER1-TC * TIMER1-TX Suffix -TX is not legal. solution: (l) Insure that the functional suffix is one of the two legal functions: -TC or -TO (2) Insure that the functional suffix uses the letter and not the digit zero. (3) Insure that the functional name does not extend beyond column 72. 156 ERROR NUMBER 29 INCOMPATIBLE VARIABLE TYPE AND VIP CARD TYPE FOR: where: After $TRANSLATE card. why: Variables of different type have programmer -supplied addresses on the same VIP card. example: INPUTo. INI 1 IN2 2 INPUT12. IN3 3 Variable IN3 at location 3 is a 12 -volt input. Addresses 0-17 o are 6-volt inputs from the INPUT6. declaration, o solution: (l) Omit addresses and allow compiler to assign VIP cards and variable addresses. (2) Change address of to an unused location on a card of proper type. ERROR NUMBER 30 NO AVAIIABLE ADDRESS FOR: 157 where : After ^TRANSLATE card. why: There are no unused locations of the proper type for variable . example: A program uses many types of variables and allows the compiler to assign addresses, and VIP card assignment used every card location in the VIP. The address assignment of attempts to allocate a new VIP card and generates the error. solution: Use manual address assignment and the VIP combination cards. This will require adjustment of variable types and requires a systems programmer. 158 ERROR NUMBER 31 COMPILER ERROR - TEMPORARY STACK OVERFLOW ■where: After $TRANSLATE card. ■why: An equation requires more than 20 temporary variables to evaluate it, thus causing an overflow of the temporary stack. example: A = (B-*C)*(D+E)*(F-K})*(h+I)-*(J+K) > *(l+m)*(n+o)*(p-h^)*(r+s)*(t+u) > *(v+w)*(x+y)*(z+ai)*(bi-k:i)*(di+ei) > *(f1+g1)*(h1+i1)*(j1+kl)*(lhml)*(n1+01) > *(P1-H£L) Each OR pair is stored in a temporary variable so that a field engineer can examine its content. The compiler can use a maximum of 20 temporary variables to evaluate one expression. solution: (l) Rewrite the equation to use fewer temporaries. (2) Break one long equation into two shorter ones, introducing one virtual control relay as in: original: Z = * new: VCR = Z = VCR * L5 I ERROR NUMBER 32 MEMORY OVERFLOW - TOO MANY TEMPORARIES where: After $TRANSLATE card. why: The number of temporary locations needed by an equation exceeds the total number of unused locations on all OUTPUTAC. and OUTPUTDC. cards. example: OUTPUTAC. Al A2 AJ Ah A 5 A6 A7 A.8 A9 A10 All A12 A13 Ali+ A15 Al6 PROGRAM. A = (B4C)*(D+E) The generation of a temporary location to save (B+C) fails because there are no unused locations on the (one) card of type output. solution: Rerun the program using the SCRATCHPAD option. i6o ERROR NUMBER 33 ILLEGAL USE OF "&" OR ":" OPERATOR where: Program segment. why: The "&" and ":" operators may have as their left-hand side argument only a single variable name (not an expression). example: A = /B:C*D solution: Introduce a new variable to hold the controlling expression and use the new variable as the argument of "&" or ":". For the above example, use MASTER = B*C A = MASTER & D 161 ERROR NUMBER 3^ COMPILER ERROR - TOO MANY STATEMENTS where: Program segment. why: The compiler will accept only a fixed number of equations in any one program. That limit is currently 512. example: An exceptionally long program uses more than 512 assignment statements and generates the error. solution: (l) Assure that the program segments of two or more programs have not been intermixed. (2) Call a systems programmer. 162 ERROR NUMBER 35 UNUSED OUTPUTS PROVIDE INSUFFICIENT TEMPORARIES where: After $TRANSLATE card. why: There are not enough total unused locations on OUTPUTAC and OUTPUTDC cards to supply all the temporaries needed to evaluate an expression. example: OUTPUTAC. Al A2 A3 Ah A 5 A6 A7 A8 A9 A10 All A12 A13 Al^ A15 Al6 PROGRAM. A = (B4€)*(D+E) The temporary needed to hold (B+C) can not be assigned to the (only) OUTPUTAC card because the card is full. solution: Rerun the program using the SCRATCHPAD option. ERROR NUMBER 36 RERUN PROGRAM USING "SCRATCHPAD" OPTION 163 where : After $TRANSLATE card. why: The NOSCRATCHPAD option was in effect when the compiler could not find an unused location of the proper type for a necessary compiler -generated temporary location. example: At a time when all addresses on OUTPUTAC and OUTPUTDC cards are in use, the compiler needs another temporary. Module TEMPGEN fails and produces this message. solution: This message is not really an error, but a helpful hint. Utilizing the SCRATCHPAD option will allow 512- _ new variable locations and possibly free some OUTPUT locations - all temporary variables are allocated in scratchpad. 16k ERROR NUMBER 37 SORT ROUTINE HAS REMOVED STMT # where: After $TRANSLATE card. why: The SORT option was invoked. The sorter found one or more interlocked equations (they could not be reordered to make them independent). The sorter dropped statement number (the largest statement number in the interlocked group) and attempts a resort. example: 1 A = B*C*D 2 B - A*B*C 3 C = A+D+B k $ TRANSLATE ***DURING SORTING *** SORT ROUTINE HAS DROPPED STMT #3 ***DURING SORTING *** SORT ROUTINE HAS DROPPED STMT #2 Equations 1, 2, and 3 are interlocked because A is a function of B and C, B is a function of A and C, and C is a function of A and B. The first sorter pass drops equation 3* The remaining equations are still interlocked so statement 2 is dropped. The third pass succeeds trivially in sorting one equation. solution: Determine whether the interlocked equations represent a dangerous situation. If so, rewrite or reorder them. If not, rerun the program using the NOSORT option. JLIOGRAPHIC DATA EET 1. Report No. lJIUCDCS-R-7lt-t-'i | 3. Recipient's Acceaai 5- Repori Date May V <■<-': I VTPTRANP - AN IMPROVED PROGRAMMINC, TANOUAOE AND ITS COMPILER FOR PROCESS CONTROT, EQUATIONS 6. luthor(s) Alfred Charles Weaver 8. Performing Organization Rept. No. Performing Organization Name and Address Department of Computer Science University of Illinois Urbana, Illinois 6l801 10. Project/Task/Work Unit No. 11. Contract /Grant No. Sponsoring Organization Name and Address Department of Computer Science University of Illinois Urbana, Illinois 6l801 13. Type of Report & Period Covered 14. Supplementary Notes Abstracts The solution of some industrial process control problems can be expressed as a system of Boolean algebra equations using variables representing inputs from and outputs to the real world. If this system is solved sequentially, cyclically, and in real time, the outputs may be used directly to control the state of real world devices. VTPTRAN2 is a high-level FORTRAN-like language which allows the programmer to express his Boolean system symbolically in logical (Boolean) equations. The VTPTRAN2 compiler reduces the input to machine code for the VIP process controller, and can plot the resulting system as a relay tree. The concept is extensible to other industrial controllers. Key Words and Document Analysis. 17a. Descriptors Identifiers/Open-Ended Terms 1 COSATI Field/Group Availability Statement 19. Security Class (This Report) UNCLASSIFIED 20. Security Class (This Page UNCLASSIFIED 21. No. of Pages 16k 22. Price C |*l NT IS- 35 (10-70) USCOMM-DC 40329-P7 1 «fe i» % m CO