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 UNIVERSITY OF ILLINOIS 
 
 AT URBANA-CHAMPAIGN 
 
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f) Report No. k6h 
 
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 coo ii+69-0185 
 
 PAGAN, A THREE DIMENSIONAL 
 PATTERN GENERATOR 
 
 by 
 
 RICHARD LANE PARTRIDGE 
 
 August, 1971 
 
 MOV 9-^72 
 
 DEPARTMENT OF COMPUTER SCIENCE 
 UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 
 
 URBANA, ILLINOIS 
 
Report No. k6k 
 
 PAGAN, A THREE DIMENSIONAL 
 PATTERN GENERATOR 
 
 by 
 
 RICHARD LANE PARTRIDGE 
 
 August, 1971 
 
 Department of Computer Science 
 University of Illinois 
 Urbana, Illinois 6l801 
 
 Supported in part by the Department of Computer Science, Department of 
 Electrical Engineering and Contract Number U.S. AEC AT(ll-l) IU69 and 
 submitted in partial fulfillment of the requirements for the degree of 
 Master of Science in Electrical Engineering at the University of Illinois, 
 August, 1971. 
 
Ill 
 ACKNOWLEDGMENT 
 I wish to thank Professor W. J. Poppelbaum and all the members 
 of the Hardware Systems Research Group for the patience and -understanding 
 they have shown me during the course of this project. 
 
 And, I especially want to express my gratitude to Professor 
 William Kubitz whose guidance and encouragement truly made this thesis 
 possible. 
 
IV 
 
 PREFACE 
 This thesis describes the PAGAN system, a pattern generator for 
 refreshed display of three dimensional figures. Work on the PAGAN project 
 was conducted in the Hardware Systems Research Group of the Department of 
 Computer Science at the University of Illinois. Advisors to the project 
 were W. J. Poppelbaum, Professor of Electrical Engineering and Computer 
 Science and William J. Kubitz, Assistant Professor of Computer Science. This 
 research was supported in part by the Atomic Energy Commission. 
 
TABLE OF CONTENTS 
 
 1. INTRODUCTION 1 
 
 1.1 Need for a Test Pattern Generator . . . . 1 
 
 1.2 Lissajous Patterns as Test Figures 3 
 
 1.3 Representation of Figures 5 
 
 2. SYSTEM DESIGN 9 
 
 2.1 Generation in Cylindrical Coordinates 9 
 
 2.2 Digital Synchronization of Subassemblies 11 
 
 2.3 Organizational Overview 13 
 
 3. TECHNICAL DESIGN 17 
 
 3.1 Analog Computation Modules 17 
 
 3.2 Creation of the Radius Modifier Waveform 19 
 
 3.3 cp Accumulator 21 
 
 3.k Creation of Sin 9 and Cos 6 22 
 
 3.5 R Dependence on Z 30 
 
 3.6 Pattern Selection , 32 
 
 k. CONCLUSION 36 
 
 BIBLIOGRAPHY „ 38 
 
VI 
 
 LIST OP FIGURES 
 
 Figure Page 
 
 1. Sample Three Dimensional Figures 2 
 
 2. Lines Analogous to Latitude and Longitude 6 
 
 3. Representative Pyramids 8 
 
 k. Circumscribed Hexagon 10 
 
 5. The Radius Modifier Waveform for s = 3 5 k, 6 ..... 12 
 
 6. Generation of Regular Polygons Ik 
 
 7. Generation of Polyhedral Surfaces 16 
 
 8. Analog Divider and Multipliers 18 
 
 9. Digital to Analog Conversion 20 
 
 10. Four Bit Adder - Subtr actor 23 
 
 11. Adding and Subtracting Accumulator 23 
 
 12. cp UP / DOWN Control 2k 
 
 13. Sinusoidal Waveshaper 28 
 
 ik. 9 UP / DOWN Control 29 
 
 15. R Dependence on Z 31 
 
 16. Pattern Selection 33 
 
 17. Programming Matrix Card 35 
 
1. INTRODUCTION 
 1.1 Need for a Test Pattern Generator 
 
 A portion of the research conducted by the Hardware Systems Research 
 Group of the Department of Computer Science is concerned with display devices. 
 One of the group's major projects, STEREOMATRIX, is a stereoscopic three 
 dimensional display. When supplied with the X, Y, Z coordinates of a point 
 in three dimensional space, STEREOMATRIX determines and projects a polarized 
 stereo - pair of points on a screen. Polarization analyzing glasses separate 
 the left eye and right eye images for the viewer. While the display is 
 designed to interface with a digital computer, the STEREOMATRIX project involves 
 only the construction of the display hardware. To troubleshoot, calibrate 
 and maintain STEREOMATRIX, a three dimensional test pattern generator is 
 needed. 
 
 The PAGAN project, the subject of this thesis, is such a pattern 
 generator. This hardware system creates waveforms representing three dimen- 
 sional geometric figures like those shown in Figure 1. While suitable for 
 use with other of the Hardware Systems Research Group's display systems, PAGAN'S 
 first intended use is as a tool for STEREOMATRIX. 
 
 Since STEREOMATRIX has no refresh memory associated with it, to 
 maintain the output, the input must be continually refreshed. As one solution, 
 a memory could be included in the pattern generator and used to refresh the 
 picture. Then a test pattern could be created once, stored and refreshed 
 from the memory. As an alternative solution, the pattern generator could 
 continually regenerate the test pattern at the required refresh rate. The 
 cost effectiveness of each solution also depends on whether the pattern is 
 generated by digital or analog means. 
 
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 Digital integrated circuits have the advantage of being cheap and 
 reliable. To increase the accuracy of a digital computation, more digits 
 are added with only a linear increase in cost. But the waveforms needed to 
 create three dimensional geometric figures take many steps of digital calcu- 
 lation. So, a purely digital pattern generator requires a refresh memory. 
 On the other hand, analog pattern generation does not require a memory device. 
 The needed waveforms can be quickly formed by employing the techniques of ana- 
 log computation. However, analog function modules are expensive and the 
 cost rises exponentially with accuracy. 
 
 After studying both methods, it was concluded that continually 
 regenerating the patterns using analog circuitry was more cost effective. 
 PAGAN, as currently implemented, contains less than $1,500.00 of electronic 
 components. The project name, PAGAN was chosen as an acronym for PAttern 
 Generator, ANalog. Although the pattern generation is primarily analog, 
 PAGAN is not devoid of digital circuitry. Digital integrated circuits are 
 used to control PAGAN'S analog computation. 
 
 1.2 Lissajous Patterns as Test Figures 
 
 PAGAN creates three dimensional test patterns- by generating three 
 output voltages proportional to the X, Y, and Z coordinates of points in 
 three dimensional space. Although PAGAN'S test patterns actually consist 
 of three voltage waveforms, it is convenient to describe them in terms of 
 the three dimensional figure being represented. In a two dimensional 
 example, a pattern generator would be said to be creating a circle even 
 though its actual outputs were sinoot and cosoot. Yet, if the sinusoidal wave- 
 forms were applied to the horizontal and vertical inputs of an oscilloscope, 
 a circular Lissajous pattern would indeed be formed. Extending to a third 
 
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 dimension, it is useful to imagine PAGAN driving a display that actually 
 illuminates points in three dimensional space. In reality, the display 
 systems under construction in the Hardware Systems Research Group utilize 
 two dimensional screens and perspective transformations. But, by conceptua- 
 lizing a truly three dimensional display, PAGAN'S output waveforms can be 
 visualized as producing three dimensional figures. PAGAN'S "generation of 
 three dimensional test patterns" is to be interpreted in this sense. 
 
 Three dimensional test patterns can be created by using three com- 
 mercial function generators. If the three outputs were synchronized sinusoids 
 with simple frequency ratios, a three dimensional Lissajous pattern would 
 result. Intricate Lissajous figures can be generated but test figures need 
 not be complicated. In fact, some three dimensional Lissajous patterns 
 remind the author more of amusement park roller coasters than of test pat- 
 terns. Their worth as calibration waveforms Is debatable at best. Rather 
 than being complex, test patterns should be recognizable and somewhat 
 regular. For example, the helical curve of a barber's pole would be a more 
 useful test pattern than a multi-frequencied sinusoid Lissajous figure. Such 
 a helix is generated by using two oscillators in conjunction to produce 
 sine and cosine of one frequency and using a third function generator to 
 create a sawtooth wave of a lower frequency. 
 
 For stable figures, all the function generators creating Lissajous 
 like patterns must be capable of being phase locked to a common harmonic 
 or sub-harmonic. On the other hand, the amplitudes of each generator are 
 usually independently assigned. If we allow the amplitudes to be interdepen- 
 dent, other basic and recognizable patterns can be produced from the same 
 function generator configuration. 
 
5 
 If the amplitude of the sine and cosine waveforms is varied in a 
 manner which is inversely proportional to the sawtooth waveform, a spiral 
 resembling a screw thread is formed. Or, the sawtooth waveform can be 
 replaced by a staircase shaped signal with one step occurring for each period 
 of the sinusoids. Then, the helix and screw thread figures would appear 
 to be a cylinder and cone whose circular cross section is outlined only at 
 discrete intervals. A sphere is created by varying the radius of a cylinder, 
 not linearly, but sinusoidally with height. Similarly lateral slices of 
 a torus may be outlined by adding and subtracting from a mean radius a devia- 
 tion varying sinusoidally with height. 
 
 Rather than produce a general class of Lissajous designs, PAGAN 
 creates a small set of figures more recognizable as test patterns. In pro- 
 ducing PAGAW's repertoire, it is more economical to construct the necessary 
 circuitry than it is to purchase a collection of commercially available func- 
 tion generators. For the chosen class of figures, PAGAN behaves as if it 
 were a collection of phase - locked, amplitude interdependent, function gen- 
 erators. Although spherical and toroidal figures are not presently included 
 in PAGAN'S repertoire, their subsequent addition will not require significant 
 modification of the existing circuitry. 
 
 1.3 Representation of Figures 
 
 Any refreshed display is limited with regard to the maximum number 
 of points presentable flicker free. Therefore, the three dimensional figures 
 must be portrayed effectively by a small set of points. The loci of points 
 analogous to lines of longitude and latitude will adequately define the shapes 
 of solids. The cylinder and cone of Figure 2 illustrate lines analogous to 
 latitude and longitude. The sets of points corresponding to lines of latitude 
 
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 are the regular cross sections outlined at uniform intervals along the 
 height. To visualize the generation of lines of longitude, imagine that one 
 unique point is displayed on each and every cross section. When the cross 
 sections are closely "stacked", the locus of the points, one per cross 
 section, is a line of longitude. Thus, by outlining the entire cross sec- 
 tion at regular intervals and displaying only a small number of points on 
 the intervening cross sections, we create a net of lines of latitude and 
 longitude. By restricting the number and location of such lines, we can 
 display the chosen class of polyhedral figures by their edges. The pyramids 
 of Figure 3 are displayed by combinations of lines of both types „ The gat- 
 ing of points to the output is synchronized with the cross section generation 
 in order to achieve a stationary repeatable figure. 
 
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 2. SYSTEM DESIGN 
 2.1 Generation in Cylindrical Coordinates 
 
 It is perhaps easier to think of the previous examples of rota- 
 tionally symetric surfaces as being generated in cylindrical coordinates 
 followed by a conversion to rectangular outputs. The controlled amplitude 
 sine and cosine generators may be considered as performing the coordinate 
 transformations : 
 
 X = r cos 6 
 
 Y = r sin 6 
 
 As an illustration, let us return to the example of a cone, like that of 
 Figure 1, whose circular cross sections are outlined at discrete intervals. 
 -Viewed in cylindrical coordinates, the angle 6 would be the independent 
 variable. The staircase waveform generated for the Z axis is dependent on 
 the angle as it increments one step per period of 0. And, the radius r, 
 controlling the size of the circular cross sections, is inversely proportional 
 to Z. 
 
 Now, let us consider the results if the radius were a function of 
 6 as well as Z. One possibility that comes to mind is a cross section resembl- 
 ing a petaled flower. But, more useful as a test pattern is the use of an 
 appropriately varying radius to shape a circle into a polygon. Consider 
 the circumscribed hexagon of Figure k. In polar coordinates, the polygon 
 is described as a radius, R, and an angle 6. Note that the radius R is a func- 
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 Generalizing to a polygon with "s" sides, we find E = r/f(e, s) 
 where f(0, s) resembles a rectification of multiphase sinusoidal power. 
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 modifier f(e, s) can be rewritten in terms of an angle cp, as shown below: 
 
 f(e, s) = cos cp 
 
 q, » - || + (e + f| )raodulo |* 
 
 It is easier to produce cp(e, s) and derive cos 6 than it is to create f(e, s) 
 directly. Using the coscp waveform, "s" sided regular polygons can be 
 generated readily in cylindrical coordinates. The rectangular outputs are 
 expressed mathematically as: 
 
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 y _ sin 9 
 cos cp 
 
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 mids are outlined. 
 
 2.2 Digital Synchronization of Subassemblies 
 
 Although digital derivation of X and Y from r, 9, <p is possible, 
 the equations are most easily solved using analog computation techniques. 
 Creating the sinusoids, multiplying and dividing them by analog meEms is 
 faster and less costly than digital calculation. And, as mentioned in sec- 
 tion 1.1, a refresh memory is not required if the waveforms can be regener- 
 ated at the refresh rate. 
 
 Yet, for reproducable jitter free displays the various waveforms 
 must be well synchronized to each other. The need for reliable synchroniza- 
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13 
 the coincidence of analog voltages is digitally controlled. The correla- 
 tion of sin 6, cos 6 and cos cp is assured by deriving each from the digital 
 angle a Digital to Analog converters allow the digital to control 
 PAGAN'S analog pattern generation. The output of a digital to analog 
 converter is a discrete "staircase" analog waveform rather than a continuous 
 one, which is, in fact, an advantage. PAGAN'S outputs are the coordinates 
 of discrete points in three dimensional space. A continuous analog wave- 
 form would have to pass through a sample and hold device before being input 
 into STEKEOMATFJX. On the other hand, discrete asynchronous operation 
 allows PAGAN to pause on a step of the staircase signal until STEREOMATRIX 
 has acquired the point. Note that internal synchronization does not pre- 
 clude overall asynchronous response. On the contrary, the lack of predictable 
 regularity in time - independent operation requires that extra care be 
 taken in assuring internal simultaneity. The component waveforms must be 
 precisely related to a master clock, which may itself, however, have irregular 
 periods. 
 
 2.3 Organizational Overview 
 
 At this point, it is appropriate to examine PAGAN'S circuitry to 
 determine how the ideas introduced previously have actually been implemented. 
 It will be helpful to establish an overview of the internal organization by 
 using block diagrams. Figure 6 shows the analog computation and digital 
 synchronization involved in the generation of regular polygons. The angles cp 
 and 6 are created digitally, in synchronism, from a common digital increment 
 and then converted to analog staircase waves. As the radius modifier is a 
 function of both and s, the period of cp is determined from information 
 about the number of sides of the polygon. Analog function modules perform 
 
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 the transformation from Q and R in polar coordinates to X and Y in rectangu- 
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 The extension to three dimensions, including a cross section depen- 
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 accomplished by incrementing the Z accumulator between the generation of 
 successive polygons. Conical figures result if r is inversely proportional 
 to Z; if r is constant, cylinders are formed. The proper increments and 
 limits for the polygon generator and the combined Z, r accumulator are 
 derived within the programming module. Selection can be made of one of 
 sixteen internally stored pattern programs. Or, other patterns may be 
 generated by directly entering the appropriate data via front panel switches. 
 
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 3. TECHNICAL DESIGN 
 3.1 Analog Computation Modules 
 
 In our closer examination of PAGAN'S component circuitry, let 
 us begin with the analog computation of the X and Y outputs. Figure 8 shows 
 the analog divider and multipliers used in PAGAN. The divider module 
 is actually a multiplier placed in the feedback loop of an operational 
 amplifier circuit. Thus, for feedback stability, the denominator input 
 must be a negative voltage. And, the frequency response and accuracy are 
 inversely proportional to the denominator magnitude. For example, if the 
 divisor is the -5v signal corresponding to -cos—, the accuracy and fre- 
 quency response would be only half that of the values with a -lOv denomina- 
 tor input. The specifications of the divider and multiplier modules were 
 determined after allowing for the range of divisors encountered in PAGAN'S 
 polygon generation. Due to the more stringent requirements necessitated 
 by feedback mode operation, the divider module is significantly more 
 expensive than the multipliers. The performance of these modules and the 
 sinusoidal generators will largely determine PAGAN'S output characteristics. 
 
 On the other hand, the speed of the r digital to analog converter 
 is not as critical. The inscribed radius determines the size of the cross 
 section being outlined. For cones and pyramids, r is ordinarily updated 
 only once for each period of 9. Furthermore, for a cylinder or prism, the 
 inscribed radius remains constant. Because PAGAN'S response time is less 
 dependent on the r signal than on the 6, cp sinusoid waveforms, a relatively 
 inexpensive D/A converter is used. 
 
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 3.2 Creation of the Radius Modifier Waveform 
 
 The other divider input, cos cp is one of the major internal wave- 
 forms. Its origin may be traced in the Generation of Regular Polygons 
 block diagram, Figure 6. The sinusoidal waveshaping network produces cos cp 
 from the angle cp in less than a microsecond. The waveshaper's major compon- 
 ent is a Jhi lb rick /Nexus straight line approximation diode resistor sinu- 
 soidal trans conductor . Trans conductor inputs from to 9v correspond to the 
 angular range of to 90 . The resultant current, ranging from 
 from .5 to Oma and directed into the trans conductor 's output terminal, is 
 proportional to the cosine of the applied voltage. An operation amplifier 
 transforms the trans conductor 's current into a voltage varying from lOv 
 to Ov. Summarizing, the voltage transfer equation is written: 
 
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 A subsequent operational amplifier inverter provides the negative sign 
 necessary for divider stability. 
 
 In an apparent discrepency, the PAGAN sinusoidal waveshaper is 
 limited to one quadrant operation whereas the angle cp appears to cover both 
 the first and fourth quadrants. But, by utilizing the fact that 
 cos cp = cos(-cp) we can limit the range to one quadrant. So, in reality, 
 the trans conductor input voltage corresponds to 
 
 * "M -l-f + (e + D modulo §*| 
 
 For proper synchronization, cp is derived digitally and then converted to an 
 analog signal with the circuitry shown in Figure ^. The amplifier producing 
 the negative output is needed only for the 9 waveforms and is not used on the 
 
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 cp D/A converter card. The Analog Devices MDA-10H 10 bit digital to analog 
 converter -was obtained without an output amplifier. By adding a fast 
 operational amplifier, a converter is formed with better cost - performance 
 ratio than is otherwise available commercially. And, the external buffer- 
 ing amplifier may be set for any gain. 
 
 In PAGAN'S application, the gain is set so that a digital input, 
 N, equalling 1510n out of a possible 1777 q produces a 9v output. As the 
 converter is used in conjunction with a sinusoidal waveshaper, a digital 
 input of N is equivalent to an angle of — . Thus a digital input varying 
 
 between and n = 2N/s and synchronized with the 6 angle generation will 
 
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 polygons with s sides, n must be an integer. In order to display polygons 
 
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 3, h, 5, 6, 7, and 8 (=8^0 1Q = 1510 Q ). 
 
 3.3 cp Accumulator 
 
 The digital sequence used to produce cos $ can come from a pro- 
 grammable modulus up - down counter that reverses its direction at zero 
 and at n = 2N/s. However, PAGAN needs the capability to advance the up - 
 down counter by a variety of increments. Creation of lines of longitude 
 (few points per cross section) require much larger increments than for lines 
 of latitude (entire cross section outlined). In addition, to reach the 
 vertices of an s sided figure, the increments must be factors of n. 
 
 An up - down counter may be considered as an accumulator with 
 the ability to add or subtract only the least significant bit. It is thus 
 seen that the variable increment extension to an up - down counter actually 
 results in an adding and subtracting accumulator. PAGAN uses an accumulator 
 
22 
 that interchanges addition and subtraction at zero and n as a variable 
 increment, programmable modulus, up - down counter. The accumulator has 
 been fabricated with four bits per printed circuit card. As displayed 
 in Figure 10 each card consists of: a four bit flip flop storage register, 
 a four bit full adder, selectable increment inversion for two's complement 
 subtraction, and top and bottom limit detectors. The units are cascaded 
 as in Figure 11. 
 
 If all bits of the accumulator equal zero, then all of the 
 ZERO DETECT lines are high. Likewise, when the contents of the accumulator 
 match the TOP LIMIT inputs, all the TOP DETECT lines are high. The function 
 of the cp UP/DOWN Control picture in Figure 12 is simply to reverse the incre- 
 menting direction when n, the top limit, or zero, the bottom limit, is 
 reached. Thus, when the accumulator reaches its top limit, the up - down 
 control reverses the direction of the count. The accumulator then decre- 
 ments down towards the bottom limit. When the accumulator reaches that bot- 
 tom limit, zero, the up - down control causes the increments to be added 
 once again. 
 
 3.^- Creation of Sin 9 and Cos 6 
 
 The other sinusoids, sin 9 and cos 9, are generated by the same 
 scheme used to create cos cp. First, the A0 increment is added to the 9 
 Up - Down Accumulator. Then, the digital angle is converted to an analog 
 voltage that drives two sinusoidal transconductors, one for sin 9 and the 
 other for cos 9. Although this method does not come to mind as the most 
 direct way of creating sinusoids, it is an appropriate means of achieving 
 synchronization . 
 
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25 
 At first, it appeared that sin 6 and cos could each be generated 
 using positive feedback circuits in the manner of sine wave oscillators. 
 But, the standard oscillator circuits are not readily phase locked, and, 
 for stable figures, all of PAGAN'S component waveforms must be capable of 
 being phase locked to a common harmonic or subharmonic. Instead, an 
 approach was taken that is similar to that used in function generators. The 
 triangle wave is the basic waveform produced in a function generator. 
 The square wave, sine wave, and any other waveforms are each derived from 
 the triangle wave. In a function generator, the sine wave is snythesized 
 by passing the triangle wave through a diode resistor waveshaper. 
 
 The function generator's triangle wave is usually produced by 
 means of a capacitive integrating circuit. In PAGAN, the integrating 
 capacitor is replaced by a summing accumulator and a digital to analog 
 conversion. Digital staircase waveform generation allows the use of digital 
 pattern programming and synchronization. But, more importantly, the 
 digital time independent "integration" allows PAGAN to pause on a step of 
 the staircase waveform while STEREOMATRIX displays the output point. Sample 
 and Hold circuits would be necessary if PAGAN could not "hold" at discrete 
 analog levels. The time independent angle generation is more economical 
 than purchasing sample and hold circuits having a throughput matching 
 PAGAN'S speed. 
 
 It is for similar reasons that one sinusoid is not derived from 
 the other using the relation: 
 
 - /sin(x)dx == cos(x) 
 
26 
 Actually, an electronic integrator integrates with respect to dt so that: 
 
 - / sin(cot)dt = cos(cot)/a) 
 
 Note that the amplitude of the integrator's output is frequency dependent. 
 To display a large number of points flicker free, PAGAN must generate out- 
 put points as fast as STEREOMATRIX can handle them. If the output rate is 
 constant, the period of the angle is determined by the number of points 
 displayed per cross section. Angle increases faster for lines of longi- 
 tude (few points per cross section) than for lines of latitude (entire 
 cross section outlined). Thus, a frequency dependent Automatic Gain Control 
 would be needed to restore the amplitude of the derived sinusoid. Rather 
 than derive one sinusoid from the other, PAGAN generates both sin and 
 cos using time independent wave shaping. 
 
 The Philbrick /Nexus SPCOS-N takes a voltage input between and 
 9v, corresponding to to 90 , and produces a current proportional to 
 the cosine of the input voltage. The network used by Philbrick/Nexus in 
 their SPSIN-N requires two complimentary input voltages: to +9v and 
 to -9v. One voltage creates a current proportional to and the other 
 produces a current related to sin 0-0. They are added internally 
 to produce an output current proportional to sin 0. 
 
 Although the trans conductors are designed for one quadrant opera- 
 tion, they can be extended to four quadrants by using the following rela- 
 tions: 
 
27 
 
 sin = sin 6 sin(*-9) -sin(9-jt) -sin(2jt-9) 
 cos = cos -cos(jt-0) -cos(e-jc) cos(2jt-0) 
 
 Using the above relations, it is seen that the argument of each sinus- 
 oid varies from 0, to ^, to 0, to |, and back to 0. A subsequent gateable 
 inverter completes the creation of four quadrant sinusoids. 
 
 Thus, complimentary sawtooth waves, varying from to +9"v, 
 are used as the inputs to the Sinusoidal Transconductors . An operational 
 amplifier circuit converts the output current into a voltage varying from 
 to +10v and resembling a rectified sine or cosine wave. 
 
 The gateable inversion is described in Figure 13. The rectified 
 sinusoid is inverted to form a negative rectified sinusoid. Under the con- 
 trol of a digital signal, the two Field Effect Transistors act as analog 
 switches to select either the positive or negative waveform. 
 
 The complimentary sawtooth waves are actually composed of many 
 small steps since they are the outputs of a Digital to Analog Converter. 
 As is the case with the cos cp argument, the gain of the D/A converter is 
 set so that a digital input of N = 1510q produces a +9v output. An invert- 
 ing amplifier creates the complimentary negative sawtooth. 
 
 Thus, a digital sequence from 0, to N, to 0, to N, and back to 
 will produce the argument for four quadrant sinusoids. The variable incre- 
 ment adding and subtracting accumulator creates that digital sequence. As 
 shown in Figure Ik, the gateable inverter control signals are the outputs of 
 the quadrant flip flops in the 9 UP / DOWN Control. One flip flop toggles 
 when the top limit, N, is reached; the other toggles when 0, the bottom 
 limit, is detected. 
 
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30 
 
 3.5 R Dependence on Z 
 
 Once per period of the 9 sinusoids, the 9 UP / DOWN Control 
 derives a pulse to advance the Z accumulator. At the beginning of the 
 generation of each pattern, the Z accumulator is preset to a top limit. 
 Thereafter, when 9 completes a period, the Z accumulator is decremented 
 by Az. When zero is reached, the top limit is again preset and the Z sign 
 bit flip flop is toggled. By considering the digital Z output as a sign 
 and magnitude representation, figures with Z symetry, i.e. an octahedron, 
 are created. If the Z sign bit is ignored, the octahedron would become 
 a pyramid. 
 
 Recall that pyramids and cones are formed by decreasing the 
 cross sectional radius R as a function of Z. The Z accumulator also 
 serves as the R accumulator. R is derived directly from Z as shown in 
 Figure 15. When the R,Z2 line is high, the R/r>R,- • • .R-, lines are all 
 high. With R,Z0 low, the R^ bit would also be high making the radius 
 R = 1-11 q- 0n the other hand, if R,Z0 is high, R is forced to zero and 
 the radius is 077q« Thus, two cross sectional diameters are available 
 for cylinders and prisms. 
 
 For cones and pyramids, four R,Z dependences are available. 
 When R,Z0, R,Z1, R,Z2 are all low, then R = Z~, Rg = zT . . . R = zT. 
 So, R = 000g when Z - 777 and as Z decreases to OOCu, R increases to 
 177q. Note that R is derived from Z in such a way that the cross sectional 
 radius is inversely dependent on Z. Now, if R,Z1 goes high, then R ... R 
 are the one ' s compliments of Zn ... Z and the sides of the pyramid are 
 less steep. Again, R is forced to zero when R,Z0 is high, thus forming 
 additional slopes parallel to the two just discussed but with a smaller base. 
 
32 
 3.6 Pattern Selection 
 
 As has been discussed, PAGAN uses digital increments, limits and 
 control lines to generate waveforms representing the loci of points in three 
 dimensional space. To specify a particular pattern, the proper digital 
 signals can he input in either of two ways as shown in Figure 16. A switch 
 on PAGAN'S front panel allows the choice of direct access to the control 
 lines or a selection among wired in patterns. 
 
 In the direct access mode, switches on PAGAN'S front panel are 
 enabled to allow direct control of the cp/0 Increment, cp Top Limit, Z Incre- 
 ment, Z Top Limit, and R,Z Dependence lines. By using these switches full 
 advantage may be taken of PAGAN'S capabilities. The cp Top Limit switches 
 are set to n = 2N/s to determine the number of sides on the polygonal cross 
 section. The cp/0 Increment must be chosen such that the increment is an 
 integral factor of both the cp Top Limit, n, and the 6 Top Limit, N. 
 Similarly, the Z Increment must be an integral factor of the Z Top Limit. 
 As previously discussed, the dependence of the cross sectional radius with 
 height is determined by the R,Z Dependence control lines. 
 
 Since the cp/0 Increment must be an integral factor of both n and 
 N, the minimum number of steps on a cross section of h N points is the least 
 common multiple of h and 2s. If it is felt necessary to display fewer points 
 per cross section, then PAGAN must increment more than one step per point 
 displayed. Although a general scheme of incrementing any number of steps 
 per point has not been implemented, a switch on PAGAN'S front panel does 
 allow the choice of one or two steps per point „ 
 
 The stored pattern option is offered for those users of PAGAN who 
 are unwilling to experiment with the direct access switches. The four 
 
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3^ 
 remaining switches on PAGAN'S front panel allow the selection of one of 
 sixteen internally stored patterns. Using a two level tree structure, 
 the four input switches decode into the proper increments and limits . The 
 patterns are stored in a manner similar to a diode matrix. As seen in 
 Figure 17, the inputs of TTL gate are used in place of the diodes in a 
 diode matrix. The vertical and horizontal lines on Figure 17 are on opposite 
 sides of the printed circuit card; the open circles indicate locations 
 where holes have been drilled through the circuit board. Note that the 
 holes have not been plated through; electrical connection is made only 
 after a pin has been inserted and soldered to both sides. The programming 
 of the matrix is accomplished by connecting each TTL input either to the 
 SN7^155N decoder driver or to 5v. 
 
1469-491 
 8X10 Pro gr ammin g Motrix 
 
 35 
 
 + 5V > 
 
 17 « 
 
 M « 
 
 N <■ 
 
 11 <r 
 
 12 <r 
 
 A 19 >- 
 
 B 15 >- 
 
 C 16 >- 
 
 G 18 >- 
 
 9 10 11 12 7 
 
 13 
 
 3 SN74155 
 
 1 Decoder 
 
 2 
 
 > c 
 
 > 8 
 
 > 4 
 
 6D > 3 
 
 > 2 
 
 Figure 17. Programming Matrix Card 
 
36 
 
 h. CONCLUSION 
 
 The PAGAN pattern generator for refreshed display of three dimen- 
 sional figures has been constructed and is operative. The author feels that 
 PAGAN will prove to be a useful instrument for the Hardware Systems Research 
 Group's display devices. 
 
 Although considered completed in terms of the scope of this thesis, 
 PAGAN has been designed to allow for future expansion. If PAGAN is to be 
 enlarged at a future date, the author would like to offer a few suggestions 
 for improvements. The addition to PAGAN'S repertoire of spherical and toroidal 
 figures will require only a moderate amount of additional circuitry. These 
 figures are formed by having the cross sectional size, r, an analog signal, 
 being sinusoidally dependent on the digital contents of the Z accumulator. 
 In adding this feature, a future designer should not have to significantly 
 modify PAGAN'S existing circuitry. 
 
 In the interests of economies of time and resources, much of 
 PAGAN'S circuitry was hand wired on universal circuit boards. Should further 
 work on PAGAN be contemplated, some of the hand wired boards might be con- 
 verted to printed circuit cards. In fabricating new printed circuit cards, 
 investigation should be made of new Medium Scale Integration TTL circuitry 
 and new linear Integrated Circuits that have recently become available. The 
 printed circuit cards that have already been laid out do function properly 
 and do not require updating. However, should a modification be desired, use 
 of newer Integrated Circuits should be contemplated. For example, if a differ- 
 ent operational amplifier is desired on the lk69 - 485 Sinusoidal Transcon- 
 ductor card, then a redesign of the card might also include the addition of 
 Integrated Circuit voltage regulators. The Sinusoidal Transconductors require 
 
37 
 
 +15v accurate to .01$. Currently, the sinusoidal waveforms are tuned up 
 only by adjusting the system's +15v supplies. 
 
 As another illustration, back panel wiring could be simplified by 
 using newer MSI on redesigned boards. Should the operational amplifier 
 of the 1^69 -^75 D/A Converter require offset nulling circuitry, the new 
 version of that card could include the digital D/A Buffer. Also, digital 
 comparators logically belong on the IU69 - ^-8U Four Bit Adder card but 
 were not available when that card was laid out. A repartitioning of the 
 MSI comparators would decongest the back panel of at least forty wires. 
 
38 
 
 BIBLIOGRAPHY 
 
 Hewlett-Packard Company. Electronics for Measurement, Analysis, and 
 Computation . Palo Alto, California: Hewlett Packard, 1970 
 
 Korn, G. A. and T. M. Korn. Electronic Analog and Hybrid Computers . 
 New York: McGraw-Hill Book Company, 196^ 
 
 Partridge, R. L. "Quarterly Technical Progress Report". Urbana, Illinois: 
 Department of Computer Science, University of Illinois, July-September 1970 
 
 Partridge, R. L. "Quarterly Technical Progress Report". Urbana, Illinois: 
 Department of Computer Science, University of Illinois, October - December 
 
 1970 
 
 Partridge, R. L. "Quarterly Technical Progress Report". Urbana, Illinois: 
 Department of Computer Science, University of Illinois, January - March 
 1971 
 
 Strauss, Leonard. Wave Generation and Shaping . New York: McGraw-Hill 
 Book Company, I97O 
 
 Texas Instruments Inc. TTL Integrated Circuits Catalog , Dallas: Texas 
 Instruments, 19&9 
 
>rm (6/«?r 427 US - AT0MIC ENERGY COMMISSION 
 
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 U69-0185 
 
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 2. TITLE 
 
 PAGAN, A THREE DIMENSIONAL PATTERN GENERATOR 
 
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*tt> 
 
 \9,ll